2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/kernel.h>
14 #include <linux/kdev_t.h>
15 #include <linux/string.h>
16 #include <linux/tty.h>
17 #include <linux/console.h>
18 #include <linux/timex.h>
19 #include <linux/sched.h>
20 #include <linux/ioport.h>
22 #include <linux/serial.h>
23 #include <linux/irq.h>
24 #include <linux/bootmem.h>
25 #include <linux/mmzone.h>
26 #include <linux/interrupt.h>
27 #include <linux/acpi.h>
28 #include <linux/compiler.h>
29 #include <linux/sched.h>
30 #include <linux/root_dev.h>
31 #include <linux/nodemask.h>
36 #include <asm/machvec.h>
37 #include <asm/system.h>
38 #include <asm/processor.h>
40 #include <asm/sn/arch.h>
41 #include <asm/sn/addrs.h>
42 #include <asm/sn/pda.h>
43 #include <asm/sn/nodepda.h>
44 #include <asm/sn/sn_cpuid.h>
45 #include <asm/sn/simulator.h>
46 #include <asm/sn/leds.h>
47 #include <asm/sn/bte.h>
48 #include <asm/sn/shub_mmr.h>
49 #include <asm/sn/clksupport.h>
50 #include <asm/sn/sn_sal.h>
51 #include <asm/sn/geo.h>
52 #include <asm/sn/sn_feature_sets.h>
53 #include "xtalk/xwidgetdev.h"
54 #include "xtalk/hubdev.h"
55 #include <asm/sn/klconfig.h>
58 DEFINE_PER_CPU(struct pda_s
, pda_percpu
);
60 #define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */
62 lboard_t
*root_lboard
[MAX_COMPACT_NODES
];
64 extern void bte_init_node(nodepda_t
*, cnodeid_t
);
66 extern void sn_timer_init(void);
67 extern unsigned long last_time_offset
;
68 extern void (*ia64_mark_idle
) (int);
69 extern void snidle(int);
70 extern unsigned char acpi_kbd_controller_present
;
72 unsigned long sn_rtc_cycles_per_second
;
73 EXPORT_SYMBOL(sn_rtc_cycles_per_second
);
75 DEFINE_PER_CPU(struct sn_hub_info_s
, __sn_hub_info
);
76 EXPORT_PER_CPU_SYMBOL(__sn_hub_info
);
78 DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid
[MAX_NUMNODES
]);
79 EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid
);
81 DEFINE_PER_CPU(struct nodepda_s
*, __sn_nodepda
);
82 EXPORT_PER_CPU_SYMBOL(__sn_nodepda
);
84 char sn_system_serial_number_string
[128];
85 EXPORT_SYMBOL(sn_system_serial_number_string
);
86 u64 sn_partition_serial_number
;
87 EXPORT_SYMBOL(sn_partition_serial_number
);
89 EXPORT_SYMBOL(sn_partition_id
);
91 EXPORT_SYMBOL(sn_system_size
);
92 u8 sn_sharing_domain_size
;
93 EXPORT_SYMBOL(sn_sharing_domain_size
);
95 EXPORT_SYMBOL(sn_coherency_id
);
97 EXPORT_SYMBOL(sn_region_size
);
98 int sn_prom_type
; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
100 short physical_node_map
[MAX_PHYSNODE_ID
];
101 static unsigned long sn_prom_features
[MAX_PROM_FEATURE_SETS
];
103 EXPORT_SYMBOL(physical_node_map
);
107 static void sn_init_pdas(char **);
108 static void scan_for_ionodes(void);
110 static nodepda_t
*nodepdaindr
[MAX_COMPACT_NODES
];
113 * The format of "screen_info" is strange, and due to early i386-setup
114 * code. This is just enough to make the console code think we're on a
117 struct screen_info sn_screen_info
= {
120 .orig_video_mode
= 3,
121 .orig_video_cols
= 80,
122 .orig_video_ega_bx
= 3,
123 .orig_video_lines
= 25,
124 .orig_video_isVGA
= 1,
125 .orig_video_points
= 16
129 * This is here so we can use the CMOS detection in ide-probe.c to
130 * determine what drives are present. In theory, we don't need this
131 * as the auto-detection could be done via ide-probe.c:do_probe() but
132 * in practice that would be much slower, which is painful when
133 * running in the simulator. Note that passing zeroes in DRIVE_INFO
134 * is sufficient (the IDE driver will autodetect the drive geometry).
136 #ifdef CONFIG_IA64_GENERIC
137 extern char drive_info
[4 * 16];
139 char drive_info
[4 * 16];
143 * Get nasid of current cpu early in boot before nodepda is initialized
150 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid
, NULL
, NULL
))
156 * This routine can only be used during init, since
157 * smp_boot_data is an init data structure.
158 * We have to use smp_boot_data.cpu_phys_id to find
159 * the physical id of the processor because the normal
160 * cpu_physical_id() relies on data structures that
161 * may not be initialized yet.
164 static int __init
pxm_to_nasid(int pxm
)
169 nid
= pxm_to_nid_map
[pxm
];
170 for (i
= 0; i
< num_node_memblks
; i
++) {
171 if (node_memblk
[i
].nid
== nid
) {
172 return NASID_GET(node_memblk
[i
].start_paddr
);
179 * early_sn_setup - early setup routine for SN platforms
181 * Sets up an initial console to aid debugging. Intended primarily
182 * for bringup. See start_kernel() in init/main.c.
185 void __init
early_sn_setup(void)
187 efi_system_table_t
*efi_systab
;
188 efi_config_table_t
*config_tables
;
189 struct ia64_sal_systab
*sal_systab
;
190 struct ia64_sal_desc_entry_point
*ep
;
195 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
196 * IO on SN2 is done via SAL calls, early_printk won't work without this.
198 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
199 * Any changes to those file may have to be made hereas well.
201 efi_systab
= (efi_system_table_t
*) __va(ia64_boot_param
->efi_systab
);
202 config_tables
= __va(efi_systab
->tables
);
203 for (i
= 0; i
< efi_systab
->nr_tables
; i
++) {
204 if (efi_guidcmp(config_tables
[i
].guid
, SAL_SYSTEM_TABLE_GUID
) ==
206 sal_systab
= __va(config_tables
[i
].table
);
207 p
= (char *)(sal_systab
+ 1);
208 for (j
= 0; j
< sal_systab
->entry_count
; j
++) {
209 if (*p
== SAL_DESC_ENTRY_POINT
) {
210 ep
= (struct ia64_sal_desc_entry_point
212 ia64_sal_handler_init(__va
217 p
+= SAL_DESC_SIZE(*p
);
221 /* Uh-oh, SAL not available?? */
222 printk(KERN_ERR
"failed to find SAL entry point\n");
225 extern int platform_intr_list
[];
226 extern nasid_t master_nasid
;
227 static int __initdata shub_1_1_found
= 0;
232 * Set flag for enabling shub specific wars
235 static inline int __init
is_shub_1_1(int nasid
)
242 id
= REMOTE_HUB_L(nasid
, SH1_SHUB_ID
);
243 rev
= (id
& SH1_SHUB_ID_REVISION_MASK
) >> SH1_SHUB_ID_REVISION_SHFT
;
247 static void __init
sn_check_for_wars(void)
254 for_each_online_node(cnode
) {
255 if (is_shub_1_1(cnodeid_to_nasid(cnode
)))
262 * sn_setup - SN platform setup routine
263 * @cmdline_p: kernel command line
265 * Handles platform setup for SN machines. This includes determining
266 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
267 * setting up per-node data areas. The console is also initialized here.
269 void __init
sn_setup(char **cmdline_p
)
271 long status
, ticks_per_sec
, drift
;
273 u32 version
= sn_sal_rev();
274 extern void sn_cpu_init(void);
276 ia64_sn_plat_set_error_handling_features(); // obsolete
277 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV
);
278 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES
);
281 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
283 * If there was a primary vga adapter identified through the
284 * EFI PCDP table, make it the preferred console. Otherwise
285 * zero out conswitchp.
288 if (vga_console_membase
) {
289 /* usable vga ... make tty0 the preferred default console */
290 add_preferred_console("tty", 0, NULL
);
292 printk(KERN_DEBUG
"SGI: Disabling VGA console\n");
293 #ifdef CONFIG_DUMMY_CONSOLE
294 conswitchp
= &dummy_con
;
297 #endif /* CONFIG_DUMMY_CONSOLE */
299 #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
301 MAX_DMA_ADDRESS
= PAGE_OFFSET
+ MAX_PHYS_MEMORY
;
303 memset(physical_node_map
, -1, sizeof(physical_node_map
));
304 for (pxm
= 0; pxm
< MAX_PXM_DOMAINS
; pxm
++)
305 if (pxm_to_nid_map
[pxm
] != -1)
306 physical_node_map
[pxm_to_nasid(pxm
)] =
310 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
311 * support here so we don't have to listen to failed keyboard probe
314 if (version
<= 0x0209 && acpi_kbd_controller_present
) {
315 printk(KERN_INFO
"Disabling legacy keyboard support as prom "
316 "is too old and doesn't provide FADT\n");
317 acpi_kbd_controller_present
= 0;
320 printk("SGI SAL version %x.%02x\n", version
>> 8, version
& 0x00FF);
322 master_nasid
= boot_get_nasid();
325 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK
, &ticks_per_sec
,
327 if (status
!= 0 || ticks_per_sec
< 100000) {
329 "unable to determine platform RTC clock frequency, guessing.\n");
330 /* PROM gives wrong value for clock freq. so guess */
331 sn_rtc_cycles_per_second
= 1000000000000UL / 30000UL;
333 sn_rtc_cycles_per_second
= ticks_per_sec
;
335 platform_intr_list
[ACPI_INTERRUPT_CPEI
] = IA64_CPE_VECTOR
;
338 * we set the default root device to /dev/hda
339 * to make simulation easy
341 ROOT_DEV
= Root_HDA1
;
344 * Create the PDAs and NODEPDAs for all the cpus.
346 sn_init_pdas(cmdline_p
);
348 ia64_mark_idle
= &snidle
;
351 * For the bootcpu, we do this here. All other cpus will make the
352 * call as part of cpu_init in slave cpu initialization.
359 screen_info
= sn_screen_info
;
364 * set pm_power_off to a SAL call to allow
365 * sn machines to power off. The SAL call can be replaced
366 * by an ACPI interface call when ACPI is fully implemented
369 pm_power_off
= ia64_sn_power_down
;
373 * sn_init_pdas - setup node data areas
375 * One time setup for Node Data Area. Called by sn_setup().
377 static void __init
sn_init_pdas(char **cmdline_p
)
381 memset(sn_cnodeid_to_nasid
, -1,
382 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid
)));
383 for_each_online_node(cnode
)
384 sn_cnodeid_to_nasid
[cnode
] =
385 pxm_to_nasid(nid_to_pxm_map
[cnode
]);
387 numionodes
= num_online_nodes();
391 * Allocate & initalize the nodepda for each node.
393 for_each_online_node(cnode
) {
395 alloc_bootmem_node(NODE_DATA(cnode
), sizeof(nodepda_t
));
396 memset(nodepdaindr
[cnode
], 0, sizeof(nodepda_t
));
397 memset(nodepdaindr
[cnode
]->phys_cpuid
, -1,
398 sizeof(nodepdaindr
[cnode
]->phys_cpuid
));
399 spin_lock_init(&nodepdaindr
[cnode
]->ptc_lock
);
403 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
405 for (cnode
= num_online_nodes(); cnode
< numionodes
; cnode
++) {
407 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t
));
408 memset(nodepdaindr
[cnode
], 0, sizeof(nodepda_t
));
412 * Now copy the array of nodepda pointers to each nodepda.
414 for (cnode
= 0; cnode
< numionodes
; cnode
++)
415 memcpy(nodepdaindr
[cnode
]->pernode_pdaindr
, nodepdaindr
,
416 sizeof(nodepdaindr
));
419 * Set up IO related platform-dependent nodepda fields.
420 * The following routine actually sets up the hubinfo struct
423 for_each_online_node(cnode
) {
424 bte_init_node(nodepdaindr
[cnode
], cnode
);
428 * Initialize the per node hubdev. This includes IO Nodes and
429 * headless/memless nodes.
431 for (cnode
= 0; cnode
< numionodes
; cnode
++) {
432 hubdev_init_node(nodepdaindr
[cnode
], cnode
);
437 * sn_cpu_init - initialize per-cpu data areas
438 * @cpuid: cpuid of the caller
440 * Called during cpu initialization on each cpu as it starts.
441 * Currently, initializes the per-cpu data area for SNIA.
442 * Also sets up a few fields in the nodepda. Also known as
443 * platform_cpu_init() by the ia64 machvec code.
445 void __init
sn_cpu_init(void)
454 static int wars_have_been_checked
;
456 if (smp_processor_id() == 0 && IS_MEDUSA()) {
457 if (ia64_sn_is_fake_prom())
461 printk("Running on medusa with %s PROM\n", (sn_prom_type
== 1) ? "real" : "fake");
464 memset(pda
, 0, sizeof(pda
));
465 if (ia64_sn_get_sn_info(0, &sn_hub_info
->shub2
, &sn_hub_info
->nasid_bitmask
, &sn_hub_info
->nasid_shift
,
466 &sn_system_size
, &sn_sharing_domain_size
, &sn_partition_id
,
467 &sn_coherency_id
, &sn_region_size
))
469 sn_hub_info
->as_shift
= sn_hub_info
->nasid_shift
- 2;
472 * The boot cpu makes this call again after platform initialization is
475 if (nodepdaindr
[0] == NULL
)
478 for (i
= 0; i
< MAX_PROM_FEATURE_SETS
; i
++)
479 if (ia64_sn_get_prom_feature_set(i
, &sn_prom_features
[i
]) != 0)
482 cpuid
= smp_processor_id();
483 cpuphyid
= get_sapicid();
485 if (ia64_sn_get_sapic_info(cpuphyid
, &nasid
, &subnode
, &slice
))
488 for (i
=0; i
< MAX_NUMNODES
; i
++) {
489 if (nodepdaindr
[i
]) {
490 nodepdaindr
[i
]->phys_cpuid
[cpuid
].nasid
= nasid
;
491 nodepdaindr
[i
]->phys_cpuid
[cpuid
].slice
= slice
;
492 nodepdaindr
[i
]->phys_cpuid
[cpuid
].subnode
= subnode
;
496 cnode
= nasid_to_cnodeid(nasid
);
498 sn_nodepda
= nodepdaindr
[cnode
];
501 (typeof(pda
->led_address
)) (LED0
+ (slice
<< LED_CPU_SHIFT
));
502 pda
->led_state
= LED_ALWAYS_SET
;
503 pda
->hb_count
= HZ
/ 2;
508 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
509 memcpy(sn_cnodeid_to_nasid
,
510 (&per_cpu(__sn_cnodeid_to_nasid
, 0)),
511 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid
)));
516 * Only needs to be done once, on BSP.
517 * Has to be done after loop above, because it uses this cpu's
518 * sn_cnodeid_to_nasid table which was just initialized if this
520 * Has to be done before assignment below.
522 if (!wars_have_been_checked
) {
524 wars_have_been_checked
= 1;
526 sn_hub_info
->shub_1_1_found
= shub_1_1_found
;
529 * Set up addresses of PIO/MEM write status registers.
532 u64 pio1
[] = {SH1_PIO_WRITE_STATUS_0
, 0, SH1_PIO_WRITE_STATUS_1
, 0};
533 u64 pio2
[] = {SH2_PIO_WRITE_STATUS_0
, SH2_PIO_WRITE_STATUS_2
,
534 SH2_PIO_WRITE_STATUS_1
, SH2_PIO_WRITE_STATUS_3
};
536 pio
= is_shub1() ? pio1
: pio2
;
537 pda
->pio_write_status_addr
= (volatile unsigned long *) LOCAL_MMR_ADDR(pio
[slice
]);
538 pda
->pio_write_status_val
= is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK
: 0;
542 * WAR addresses for SHUB 1.x.
544 if (local_node_data
->active_cpu_count
++ == 0 && is_shub1()) {
547 cnodeid_to_nasid(numa_node_id() ==
548 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
549 pda
->pio_shub_war_cam_addr
=
550 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid
,
556 * Scan klconfig for ionodes. Add the nasids to the
557 * physical_node_map and the pda and increment numionodes.
560 static void __init
scan_for_ionodes(void)
565 /* fakeprom does not support klgraph */
566 if (IS_RUNNING_ON_FAKE_PROM())
569 /* Setup ionodes with memory */
570 for (nasid
= 0; nasid
< MAX_PHYSNODE_ID
; nasid
+= 2) {
571 char *klgraph_header
;
574 if (physical_node_map
[nasid
] == -1)
578 klgraph_header
= __va(ia64_sn_get_klconfig_addr(nasid
));
579 if (!klgraph_header
) {
580 BUG(); /* All nodes must have klconfig tables! */
582 cnodeid
= nasid_to_cnodeid(nasid
);
583 root_lboard
[cnodeid
] = (lboard_t
*)
584 NODE_OFFSET_TO_LBOARD((nasid
),
586 *) (klgraph_header
))->
590 /* Scan headless/memless IO Nodes. */
591 for (nasid
= 0; nasid
< MAX_PHYSNODE_ID
; nasid
+= 2) {
592 /* if there's no nasid, don't try to read the klconfig on the node */
593 if (physical_node_map
[nasid
] == -1)
595 brd
= find_lboard_any((lboard_t
*)
596 root_lboard
[nasid_to_cnodeid(nasid
)],
599 brd
= KLCF_NEXT_ANY(brd
); /* Skip this node's lboard */
604 brd
= find_lboard_any(brd
, KLTYPE_SNIA
);
607 sn_cnodeid_to_nasid
[numionodes
] = brd
->brd_nasid
;
608 physical_node_map
[brd
->brd_nasid
] = numionodes
;
609 root_lboard
[numionodes
] = brd
;
611 brd
= KLCF_NEXT_ANY(brd
);
615 brd
= find_lboard_any(brd
, KLTYPE_SNIA
);
619 /* Scan for TIO nodes. */
620 for (nasid
= 0; nasid
< MAX_PHYSNODE_ID
; nasid
+= 2) {
621 /* if there's no nasid, don't try to read the klconfig on the node */
622 if (physical_node_map
[nasid
] == -1)
624 brd
= find_lboard_any((lboard_t
*)
625 root_lboard
[nasid_to_cnodeid(nasid
)],
628 sn_cnodeid_to_nasid
[numionodes
] = brd
->brd_nasid
;
629 physical_node_map
[brd
->brd_nasid
] = numionodes
;
630 root_lboard
[numionodes
] = brd
;
632 brd
= KLCF_NEXT_ANY(brd
);
636 brd
= find_lboard_any(brd
, KLTYPE_TIO
);
642 nasid_slice_to_cpuid(int nasid
, int slice
)
646 for (cpu
=0; cpu
< NR_CPUS
; cpu
++)
647 if (cpuid_to_nasid(cpu
) == nasid
&&
648 cpuid_to_slice(cpu
) == slice
)
654 int sn_prom_feature_available(int id
)
656 if (id
>= BITS_PER_LONG
* MAX_PROM_FEATURE_SETS
)
658 return test_bit(id
, sn_prom_features
);
660 EXPORT_SYMBOL(sn_prom_feature_available
);