[IA64-SGI] Hotplug driver related fix in the SN ia64 code.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / sn / kernel / irq.c
1 /*
2 * Platform dependent support for SGI SN
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
9 */
10
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
22
23 static void force_interrupt(int irq);
24 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
25 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
26
27 int sn_force_interrupt_flag = 1;
28 extern int sn_ioif_inited;
29 static struct list_head **sn_irq_lh;
30 static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */
31
32 static inline u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 u64 sn_irq_info,
34 int req_irq, nasid_t req_nasid,
35 int req_slice)
36 {
37 struct ia64_sal_retval ret_stuff;
38 ret_stuff.status = 0;
39 ret_stuff.v0 = 0;
40
41 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
42 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
43 (u64) local_widget, (u64) sn_irq_info, (u64) req_irq,
44 (u64) req_nasid, (u64) req_slice);
45 return ret_stuff.status;
46 }
47
48 static inline void sn_intr_free(nasid_t local_nasid, int local_widget,
49 struct sn_irq_info *sn_irq_info)
50 {
51 struct ia64_sal_retval ret_stuff;
52 ret_stuff.status = 0;
53 ret_stuff.v0 = 0;
54
55 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
56 (u64) SAL_INTR_FREE, (u64) local_nasid,
57 (u64) local_widget, (u64) sn_irq_info->irq_irq,
58 (u64) sn_irq_info->irq_cookie, 0, 0);
59 }
60
61 static unsigned int sn_startup_irq(unsigned int irq)
62 {
63 return 0;
64 }
65
66 static void sn_shutdown_irq(unsigned int irq)
67 {
68 }
69
70 static void sn_disable_irq(unsigned int irq)
71 {
72 }
73
74 static void sn_enable_irq(unsigned int irq)
75 {
76 }
77
78 static void sn_ack_irq(unsigned int irq)
79 {
80 u64 event_occurred, mask;
81
82 irq = irq & 0xff;
83 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
84 mask = event_occurred & SH_ALL_INT_MASK;
85 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
86 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
87
88 move_native_irq(irq);
89 }
90
91 static void sn_end_irq(unsigned int irq)
92 {
93 int ivec;
94 u64 event_occurred;
95
96 ivec = irq & 0xff;
97 if (ivec == SGI_UART_VECTOR) {
98 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
99 /* If the UART bit is set here, we may have received an
100 * interrupt from the UART that the driver missed. To
101 * make sure, we IPI ourselves to force us to look again.
102 */
103 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
104 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
105 IA64_IPI_DM_INT, 0);
106 }
107 }
108 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
109 if (sn_force_interrupt_flag)
110 force_interrupt(irq);
111 }
112
113 static void sn_irq_info_free(struct rcu_head *head);
114
115 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
116 {
117 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
118 int cpuid, cpuphys;
119
120 cpuid = first_cpu(mask);
121 cpuphys = cpu_physical_id(cpuid);
122
123 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
124 sn_irq_lh[irq], list) {
125 u64 bridge;
126 int local_widget, status;
127 nasid_t local_nasid;
128 struct sn_irq_info *new_irq_info;
129 struct sn_pcibus_provider *pci_provider;
130
131 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
132 if (new_irq_info == NULL)
133 break;
134 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
135
136 bridge = (u64) new_irq_info->irq_bridge;
137 if (!bridge) {
138 kfree(new_irq_info);
139 break; /* irq is not a device interrupt */
140 }
141
142 local_nasid = NASID_GET(bridge);
143
144 if (local_nasid & 1)
145 local_widget = TIO_SWIN_WIDGETNUM(bridge);
146 else
147 local_widget = SWIN_WIDGETNUM(bridge);
148
149 /* Free the old PROM new_irq_info structure */
150 sn_intr_free(local_nasid, local_widget, new_irq_info);
151 /* Update kernels new_irq_info with new target info */
152 unregister_intr_pda(new_irq_info);
153
154 /* allocate a new PROM new_irq_info struct */
155 status = sn_intr_alloc(local_nasid, local_widget,
156 __pa(new_irq_info), irq,
157 cpuid_to_nasid(cpuid),
158 cpuid_to_slice(cpuid));
159
160 /* SAL call failed */
161 if (status) {
162 kfree(new_irq_info);
163 break;
164 }
165
166 new_irq_info->irq_cpuid = cpuid;
167 register_intr_pda(new_irq_info);
168
169 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
170 if (pci_provider && pci_provider->target_interrupt)
171 (pci_provider->target_interrupt)(new_irq_info);
172
173 spin_lock(&sn_irq_info_lock);
174 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
175 spin_unlock(&sn_irq_info_lock);
176 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
177
178 #ifdef CONFIG_SMP
179 set_irq_affinity_info((irq & 0xff), cpuphys, 0);
180 #endif
181 }
182 }
183
184 struct hw_interrupt_type irq_type_sn = {
185 .typename = "SN hub",
186 .startup = sn_startup_irq,
187 .shutdown = sn_shutdown_irq,
188 .enable = sn_enable_irq,
189 .disable = sn_disable_irq,
190 .ack = sn_ack_irq,
191 .end = sn_end_irq,
192 .set_affinity = sn_set_affinity_irq
193 };
194
195 unsigned int sn_local_vector_to_irq(u8 vector)
196 {
197 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
198 }
199
200 void sn_irq_init(void)
201 {
202 int i;
203 irq_desc_t *base_desc = irq_desc;
204
205 for (i = 0; i < NR_IRQS; i++) {
206 if (base_desc[i].handler == &no_irq_type) {
207 base_desc[i].handler = &irq_type_sn;
208 }
209 }
210 }
211
212 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
213 {
214 int irq = sn_irq_info->irq_irq;
215 int cpu = sn_irq_info->irq_cpuid;
216
217 if (pdacpu(cpu)->sn_last_irq < irq) {
218 pdacpu(cpu)->sn_last_irq = irq;
219 }
220
221 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
222 pdacpu(cpu)->sn_first_irq = irq;
223 }
224
225 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
226 {
227 int irq = sn_irq_info->irq_irq;
228 int cpu = sn_irq_info->irq_cpuid;
229 struct sn_irq_info *tmp_irq_info;
230 int i, foundmatch;
231
232 rcu_read_lock();
233 if (pdacpu(cpu)->sn_last_irq == irq) {
234 foundmatch = 0;
235 for (i = pdacpu(cpu)->sn_last_irq - 1;
236 i && !foundmatch; i--) {
237 list_for_each_entry_rcu(tmp_irq_info,
238 sn_irq_lh[i],
239 list) {
240 if (tmp_irq_info->irq_cpuid == cpu) {
241 foundmatch = 1;
242 break;
243 }
244 }
245 }
246 pdacpu(cpu)->sn_last_irq = i;
247 }
248
249 if (pdacpu(cpu)->sn_first_irq == irq) {
250 foundmatch = 0;
251 for (i = pdacpu(cpu)->sn_first_irq + 1;
252 i < NR_IRQS && !foundmatch; i++) {
253 list_for_each_entry_rcu(tmp_irq_info,
254 sn_irq_lh[i],
255 list) {
256 if (tmp_irq_info->irq_cpuid == cpu) {
257 foundmatch = 1;
258 break;
259 }
260 }
261 }
262 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
263 }
264 rcu_read_unlock();
265 }
266
267 static void sn_irq_info_free(struct rcu_head *head)
268 {
269 struct sn_irq_info *sn_irq_info;
270
271 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
272 kfree(sn_irq_info);
273 }
274
275 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
276 {
277 nasid_t nasid = sn_irq_info->irq_nasid;
278 int slice = sn_irq_info->irq_slice;
279 int cpu = nasid_slice_to_cpuid(nasid, slice);
280
281 pci_dev_get(pci_dev);
282 sn_irq_info->irq_cpuid = cpu;
283 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
284
285 /* link it into the sn_irq[irq] list */
286 spin_lock(&sn_irq_info_lock);
287 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
288 spin_unlock(&sn_irq_info_lock);
289
290 register_intr_pda(sn_irq_info);
291 }
292
293 void sn_irq_unfixup(struct pci_dev *pci_dev)
294 {
295 struct sn_irq_info *sn_irq_info;
296
297 /* Only cleanup IRQ stuff if this device has a host bus context */
298 if (!SN_PCIDEV_BUSSOFT(pci_dev))
299 return;
300
301 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
302 if (!sn_irq_info)
303 return;
304 if (!sn_irq_info->irq_irq) {
305 kfree(sn_irq_info);
306 return;
307 }
308
309 unregister_intr_pda(sn_irq_info);
310 spin_lock(&sn_irq_info_lock);
311 list_del_rcu(&sn_irq_info->list);
312 spin_unlock(&sn_irq_info_lock);
313 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
314 pci_dev_put(pci_dev);
315 }
316
317 static inline void
318 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
319 {
320 struct sn_pcibus_provider *pci_provider;
321
322 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
323 if (pci_provider && pci_provider->force_interrupt)
324 (*pci_provider->force_interrupt)(sn_irq_info);
325 }
326
327 static void force_interrupt(int irq)
328 {
329 struct sn_irq_info *sn_irq_info;
330
331 if (!sn_ioif_inited)
332 return;
333
334 rcu_read_lock();
335 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
336 sn_call_force_intr_provider(sn_irq_info);
337
338 rcu_read_unlock();
339 }
340
341 /*
342 * Check for lost interrupts. If the PIC int_status reg. says that
343 * an interrupt has been sent, but not handled, and the interrupt
344 * is not pending in either the cpu irr regs or in the soft irr regs,
345 * and the interrupt is not in service, then the interrupt may have
346 * been lost. Force an interrupt on that pin. It is possible that
347 * the interrupt is in flight, so we may generate a spurious interrupt,
348 * but we should never miss a real lost interrupt.
349 */
350 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
351 {
352 u64 regval;
353 int irr_reg_num;
354 int irr_bit;
355 u64 irr_reg;
356 struct pcidev_info *pcidev_info;
357 struct pcibus_info *pcibus_info;
358
359 /*
360 * Bridge types attached to TIO (anything but PIC) do not need this WAR
361 * since they do not target Shub II interrupt registers. If that
362 * ever changes, this check needs to accomodate.
363 */
364 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
365 return;
366
367 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
368 if (!pcidev_info)
369 return;
370
371 pcibus_info =
372 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
373 pdi_pcibus_info;
374 regval = pcireg_intr_status_get(pcibus_info);
375
376 irr_reg_num = irq_to_vector(irq) / 64;
377 irr_bit = irq_to_vector(irq) % 64;
378 switch (irr_reg_num) {
379 case 0:
380 irr_reg = ia64_getreg(_IA64_REG_CR_IRR0);
381 break;
382 case 1:
383 irr_reg = ia64_getreg(_IA64_REG_CR_IRR1);
384 break;
385 case 2:
386 irr_reg = ia64_getreg(_IA64_REG_CR_IRR2);
387 break;
388 case 3:
389 irr_reg = ia64_getreg(_IA64_REG_CR_IRR3);
390 break;
391 }
392 if (!test_bit(irr_bit, &irr_reg)) {
393 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
394 regval &= 0xff;
395 if (sn_irq_info->irq_int_bit & regval &
396 sn_irq_info->irq_last_intr) {
397 regval &= ~(sn_irq_info->irq_int_bit & regval);
398 sn_call_force_intr_provider(sn_irq_info);
399 }
400 }
401 }
402 sn_irq_info->irq_last_intr = regval;
403 }
404
405 void sn_lb_int_war_check(void)
406 {
407 struct sn_irq_info *sn_irq_info;
408 int i;
409
410 if (!sn_ioif_inited || pda->sn_first_irq == 0)
411 return;
412
413 rcu_read_lock();
414 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
415 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
416 sn_check_intr(i, sn_irq_info);
417 }
418 }
419 rcu_read_unlock();
420 }
421
422 void __init sn_irq_lh_init(void)
423 {
424 int i;
425
426 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
427 if (!sn_irq_lh)
428 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
429
430 for (i = 0; i < NR_IRQS; i++) {
431 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
432 if (!sn_irq_lh[i])
433 panic("SN PCI INIT: Failed IRQ memory allocation\n");
434
435 INIT_LIST_HEAD(sn_irq_lh[i]);
436 }
437 }