arch/i386/kernel/irq.c

   1 /*
   2  *      linux/arch/i386/kernel/irq.c
   3  *
   4  *      Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
   5  *
   6  * This file contains the lowest level x86-specific interrupt
   7  * entry, irq-stacks and irq statistics code. All the remaining
   8  * irq logic is done by the generic kernel/irq/ code and
   9  * by the x86-specific irq controller code. (e.g. i8259.c and
  10  * io_apic.c.)
  11  */
  12
  13 #include <asm/uaccess.h>
  14 #include <linux/module.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/kernel_stat.h>
  18 #include <linux/notifier.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21
  22 DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
  23 EXPORT_PER_CPU_SYMBOL(irq_stat);
  24
  25 #ifndef CONFIG_X86_LOCAL_APIC
  26 /*
  27  * 'what should we do if we get a hw irq event on an illegal vector'.
  28  * each architecture has to answer this themselves.
  29  */
  30 void ack_bad_irq(unsigned int irq)
  31 {
  32         printk("unexpected IRQ trap at vector %02x\n", irq);
  33 }
  34 #endif
  35
  36 #ifdef CONFIG_4KSTACKS
  37 /*
  38  * per-CPU IRQ handling contexts (thread information and stack)
  39  */
  40 union irq_ctx {
  41         struct thread_info      tinfo;
  42         u32                     stack[THREAD_SIZE/sizeof(u32)];
  43 };
  44
  45 static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
  46 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
  47 #endif
  48
  49 /*
  50  * do_IRQ handles all normal device IRQ's (the special
  51  * SMP cross-CPU interrupts have their own specific
  52  * handlers).
  53  */
  54 fastcall unsigned int do_IRQ(struct pt_regs *regs)
  55 {
  56         struct pt_regs *old_regs;
  57         /* high bit used in ret_from_ code */
  58         int irq = ~regs->orig_eax;
  59         struct irq_desc *desc = irq_desc + irq;
  60 #ifdef CONFIG_4KSTACKS
  61         union irq_ctx *curctx, *irqctx;
  62         u32 *isp;
  63 #endif
  64
  65         if (unlikely((unsigned)irq >= NR_IRQS)) {
  66                 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
  67                                         __FUNCTION__, irq);
  68                 BUG();
  69         }
  70
  71         old_regs = set_irq_regs(regs);
  72         irq_enter();
  73 #ifdef CONFIG_DEBUG_STACKOVERFLOW
  74         /* Debugging check for stack overflow: is there less than 1KB free? */
  75         {
  76                 long esp;
  77
  78                 __asm__ __volatile__("andl %%esp,%0" :
  79                                         "=r" (esp) : "0" (THREAD_SIZE - 1));
  80                 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
  81                         printk("do_IRQ: stack overflow: %ld\n",
  82                                 esp - sizeof(struct thread_info));
  83                         dump_stack();
  84                 }
  85         }
  86 #endif
  87
  88 #ifdef CONFIG_4KSTACKS
  89
  90         curctx = (union irq_ctx *) current_thread_info();
  91         irqctx = hardirq_ctx[smp_processor_id()];
  92
  93         /*
  94          * this is where we switch to the IRQ stack. However, if we are
  95          * already using the IRQ stack (because we interrupted a hardirq
  96          * handler) we can't do that and just have to keep using the
  97          * current stack (which is the irq stack already after all)
  98          */
  99         if (curctx != irqctx) {
 100                 int arg1, arg2, ebx;
 101
 102                 /* build the stack frame on the IRQ stack */
 103                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
 104                 irqctx->tinfo.task = curctx->tinfo.task;
 105                 irqctx->tinfo.previous_esp = current_stack_pointer;
 106
 107                 /*
 108                  * Copy the softirq bits in preempt_count so that the
 109                  * softirq checks work in the hardirq context.
 110                  */
 111                 irqctx->tinfo.preempt_count =
 112                         (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
 113                         (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
 114
 115                 asm volatile(
 116                         "       xchgl  %%ebx,%%esp      \n"
 117                         "       call   *%%edi           \n"
 118                         "       movl   %%ebx,%%esp      \n"
 119                         : "=a" (arg1), "=d" (arg2), "=b" (ebx)
 120                         :  "0" (irq),   "1" (desc),  "2" (isp),
 121                            "D" (desc->handle_irq)
 122                         : "memory", "cc"
 123                 );
 124         } else
 125 #endif
 126                 desc->handle_irq(irq, desc);
 127
 128         irq_exit();
 129         set_irq_regs(old_regs);
 130         return 1;
 131 }
 132
 133 #ifdef CONFIG_4KSTACKS
 134
 135 /*
 136  * These should really be __section__(".bss.page_aligned") as well, but
 137  * gcc's 3.0 and earlier don't handle that correctly.
 138  */
 139 static char softirq_stack[NR_CPUS * THREAD_SIZE]
 140                 __attribute__((__aligned__(THREAD_SIZE)));
 141
 142 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
 143                 __attribute__((__aligned__(THREAD_SIZE)));
 144
 145 /*
 146  * allocate per-cpu stacks for hardirq and for softirq processing
 147  */
 148 void irq_ctx_init(int cpu)
 149 {
 150         union irq_ctx *irqctx;
 151
 152         if (hardirq_ctx[cpu])
 153                 return;
 154
 155         irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
 156         irqctx->tinfo.task              = NULL;
 157         irqctx->tinfo.exec_domain       = NULL;
 158         irqctx->tinfo.cpu               = cpu;
 159         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
 160         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 161
 162         hardirq_ctx[cpu] = irqctx;
 163
 164         irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
 165         irqctx->tinfo.task              = NULL;
 166         irqctx->tinfo.exec_domain       = NULL;
 167         irqctx->tinfo.cpu               = cpu;
 168         irqctx->tinfo.preempt_count     = 0;
 169         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 170
 171         softirq_ctx[cpu] = irqctx;
 172
 173         printk("CPU %u irqstacks, hard=%p soft=%p\n",
 174                 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
 175 }
 176
 177 void irq_ctx_exit(int cpu)
 178 {
 179         hardirq_ctx[cpu] = NULL;
 180 }
 181
 182 extern asmlinkage void __do_softirq(void);
 183
 184 asmlinkage void do_softirq(void)
 185 {
 186         unsigned long flags;
 187         struct thread_info *curctx;
 188         union irq_ctx *irqctx;
 189         u32 *isp;
 190
 191         if (in_interrupt())
 192                 return;
 193
 194         local_irq_save(flags);
 195
 196         if (local_softirq_pending()) {
 197                 curctx = current_thread_info();
 198                 irqctx = softirq_ctx[smp_processor_id()];
 199                 irqctx->tinfo.task = curctx->task;
 200                 irqctx->tinfo.previous_esp = current_stack_pointer;
 201
 202                 /* build the stack frame on the softirq stack */
 203                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
 204
 205                 asm volatile(
 206                         "       xchgl   %%ebx,%%esp     \n"
 207                         "       call    __do_softirq    \n"
 208                         "       movl    %%ebx,%%esp     \n"
 209                         : "=b"(isp)
 210                         : "0"(isp)
 211                         : "memory", "cc", "edx", "ecx", "eax"
 212                 );
 213                 /*
 214                  * Shouldnt happen, we returned above if in_interrupt():
 215                  */
 216                 WARN_ON_ONCE(softirq_count());
 217         }
 218
 219         local_irq_restore(flags);
 220 }
 221
 222 EXPORT_SYMBOL(do_softirq);
 223 #endif
 224
 225 /*
 226  * Interrupt statistics:
 227  */
 228
 229 atomic_t irq_err_count;
 230
 231 /*
 232  * /proc/interrupts printing:
 233  */
 234
 235 int show_interrupts(struct seq_file *p, void *v)
 236 {
 237         int i = *(loff_t *) v, j;
 238         struct irqaction * action;
 239         unsigned long flags;
 240
 241         if (i == 0) {
 242                 seq_printf(p, "           ");
 243                 for_each_online_cpu(j)
 244                         seq_printf(p, "CPU%-8d",j);
 245                 seq_putc(p, '\n');
 246         }
 247
 248         if (i < NR_IRQS) {
 249                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 250                 action = irq_desc[i].action;
 251                 if (!action)
 252                         goto skip;
 253                 seq_printf(p, "%3d: ",i);
 254 #ifndef CONFIG_SMP
 255                 seq_printf(p, "%10u ", kstat_irqs(i));
 256 #else
 257                 for_each_online_cpu(j)
 258                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 259 #endif
 260                 seq_printf(p, " %8s", irq_desc[i].chip->name);
 261                 seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
 262                 seq_printf(p, "  %s", action->name);
 263
 264                 for (action=action->next; action; action = action->next)
 265                         seq_printf(p, ", %s", action->name);
 266
 267                 seq_putc(p, '\n');
 268 skip:
 269                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 270         } else if (i == NR_IRQS) {
 271                 seq_printf(p, "NMI: ");
 272                 for_each_online_cpu(j)
 273                         seq_printf(p, "%10u ", nmi_count(j));
 274                 seq_putc(p, '\n');
 275 #ifdef CONFIG_X86_LOCAL_APIC
 276                 seq_printf(p, "LOC: ");
 277                 for_each_online_cpu(j)
 278                         seq_printf(p, "%10u ",
 279                                 per_cpu(irq_stat,j).apic_timer_irqs);
 280                 seq_putc(p, '\n');
 281 #endif
 282                 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
 283 #if defined(CONFIG_X86_IO_APIC)
 284                 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
 285 #endif
 286         }
 287         return 0;
 288 }
 289
 290 #ifdef CONFIG_HOTPLUG_CPU
 291 #include <mach_apic.h>
 292
 293 void fixup_irqs(cpumask_t map)
 294 {
 295         unsigned int irq;
 296         static int warned;
 297
 298         for (irq = 0; irq < NR_IRQS; irq++) {
 299                 cpumask_t mask;
 300                 if (irq == 2)
 301                         continue;
 302
 303                 cpus_and(mask, irq_desc[irq].affinity, map);
 304                 if (any_online_cpu(mask) == NR_CPUS) {
 305                         printk("Breaking affinity for irq %i\n", irq);
 306                         mask = map;
 307                 }
 308                 if (irq_desc[irq].chip->set_affinity)
 309                         irq_desc[irq].chip->set_affinity(irq, mask);
 310                 else if (irq_desc[irq].action && !(warned++))
 311                         printk("Cannot set affinity for irq %i\n", irq);
 312         }
 313
 314 #if 0
 315         barrier();
 316         /* Ingo Molnar says: "after the IO-APIC masks have been redirected
 317            [note the nop - the interrupt-enable boundary on x86 is two
 318            instructions from sti] - to flush out pending hardirqs and
 319            IPIs. After this point nothing is supposed to reach this CPU." */
 320         __asm__ __volatile__("sti; nop; cli");
 321         barrier();
 322 #else
 323         /* That doesn't seem sufficient.  Give it 1ms. */
 324         local_irq_enable();
 325         mdelay(1);
 326         local_irq_disable();
 327 #endif
 328 }
 329 #endif
 330