include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / cris / arch-v10 / drivers / i2c.c
1 /*!***************************************************************************
2 *!
3 *! FILE NAME : i2c.c
4 *!
5 *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6 *! kernel modules (i2c_writereg/readreg) and from userspace using
7 *! ioctl()'s
8 *!
9 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
10 *!
11 *!***************************************************************************/
12
13 /****************** INCLUDE FILES SECTION ***********************************/
14
15 #include <linux/module.h>
16 #include <linux/sched.h>
17 #include <linux/smp_lock.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/fs.h>
21 #include <linux/string.h>
22 #include <linux/init.h>
23
24 #include <asm/etraxi2c.h>
25
26 #include <asm/system.h>
27 #include <arch/svinto.h>
28 #include <asm/io.h>
29 #include <asm/delay.h>
30 #include <arch/io_interface_mux.h>
31
32 #include "i2c.h"
33
34 /****************** I2C DEFINITION SECTION *************************/
35
36 #define D(x)
37
38 #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
39 static const char i2c_name[] = "i2c";
40
41 #define CLOCK_LOW_TIME 8
42 #define CLOCK_HIGH_TIME 8
43 #define START_CONDITION_HOLD_TIME 8
44 #define STOP_CONDITION_HOLD_TIME 8
45 #define ENABLE_OUTPUT 0x01
46 #define ENABLE_INPUT 0x00
47 #define I2C_CLOCK_HIGH 1
48 #define I2C_CLOCK_LOW 0
49 #define I2C_DATA_HIGH 1
50 #define I2C_DATA_LOW 0
51
52 #ifdef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
53 /* Use PB and not PB_I2C */
54 #ifndef CONFIG_ETRAX_I2C_DATA_PORT
55 #define CONFIG_ETRAX_I2C_DATA_PORT 0
56 #endif
57 #ifndef CONFIG_ETRAX_I2C_CLK_PORT
58 #define CONFIG_ETRAX_I2C_CLK_PORT 1
59 #endif
60
61 #define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
62 #define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
63 #define i2c_enable()
64 #define i2c_disable()
65
66 /* enable or disable output-enable, to select output or input on the i2c bus */
67
68 #define i2c_dir_out() \
69 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 1)
70 #define i2c_dir_in() \
71 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 0)
72
73 /* control the i2c clock and data signals */
74
75 #define i2c_clk(x) \
76 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SCLBIT, x)
77 #define i2c_data(x) \
78 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SDABIT, x)
79
80 /* read a bit from the i2c interface */
81
82 #define i2c_getbit() (((*R_PORT_PB_READ & (1 << SDABIT))) >> SDABIT)
83
84 #else
85 /* enable or disable the i2c interface */
86
87 #define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_en))
88 #define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))
89
90 /* enable or disable output-enable, to select output or input on the i2c bus */
91
92 #define i2c_dir_out() \
93 *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
94 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
95 #define i2c_dir_in() \
96 *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
97 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);
98
99 /* control the i2c clock and data signals */
100
101 #define i2c_clk(x) \
102 *R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
103 ~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
104 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 1, x);
105
106 #define i2c_data(x) \
107 *R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
108 ~IO_MASK(R_PORT_PB_I2C, i2c_d)) | IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
109 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 0, x);
110
111 /* read a bit from the i2c interface */
112
113 #define i2c_getbit() (*R_PORT_PB_READ & 0x1)
114 #endif
115
116 /* use the kernels delay routine */
117
118 #define i2c_delay(usecs) udelay(usecs)
119
120 static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
121
122 /****************** FUNCTION DEFINITION SECTION *************************/
123
124
125 /* generate i2c start condition */
126
127 void
128 i2c_start(void)
129 {
130 /*
131 * SCL=1 SDA=1
132 */
133 i2c_dir_out();
134 i2c_delay(CLOCK_HIGH_TIME/6);
135 i2c_data(I2C_DATA_HIGH);
136 i2c_clk(I2C_CLOCK_HIGH);
137 i2c_delay(CLOCK_HIGH_TIME);
138 /*
139 * SCL=1 SDA=0
140 */
141 i2c_data(I2C_DATA_LOW);
142 i2c_delay(START_CONDITION_HOLD_TIME);
143 /*
144 * SCL=0 SDA=0
145 */
146 i2c_clk(I2C_CLOCK_LOW);
147 i2c_delay(CLOCK_LOW_TIME);
148 }
149
150 /* generate i2c stop condition */
151
152 void
153 i2c_stop(void)
154 {
155 i2c_dir_out();
156
157 /*
158 * SCL=0 SDA=0
159 */
160 i2c_clk(I2C_CLOCK_LOW);
161 i2c_data(I2C_DATA_LOW);
162 i2c_delay(CLOCK_LOW_TIME*2);
163 /*
164 * SCL=1 SDA=0
165 */
166 i2c_clk(I2C_CLOCK_HIGH);
167 i2c_delay(CLOCK_HIGH_TIME*2);
168 /*
169 * SCL=1 SDA=1
170 */
171 i2c_data(I2C_DATA_HIGH);
172 i2c_delay(STOP_CONDITION_HOLD_TIME);
173
174 i2c_dir_in();
175 }
176
177 /* write a byte to the i2c interface */
178
179 void
180 i2c_outbyte(unsigned char x)
181 {
182 int i;
183
184 i2c_dir_out();
185
186 for (i = 0; i < 8; i++) {
187 if (x & 0x80) {
188 i2c_data(I2C_DATA_HIGH);
189 } else {
190 i2c_data(I2C_DATA_LOW);
191 }
192
193 i2c_delay(CLOCK_LOW_TIME/2);
194 i2c_clk(I2C_CLOCK_HIGH);
195 i2c_delay(CLOCK_HIGH_TIME);
196 i2c_clk(I2C_CLOCK_LOW);
197 i2c_delay(CLOCK_LOW_TIME/2);
198 x <<= 1;
199 }
200 i2c_data(I2C_DATA_LOW);
201 i2c_delay(CLOCK_LOW_TIME/2);
202
203 /*
204 * enable input
205 */
206 i2c_dir_in();
207 }
208
209 /* read a byte from the i2c interface */
210
211 unsigned char
212 i2c_inbyte(void)
213 {
214 unsigned char aBitByte = 0;
215 int i;
216
217 /* Switch off I2C to get bit */
218 i2c_disable();
219 i2c_dir_in();
220 i2c_delay(CLOCK_HIGH_TIME/2);
221
222 /* Get bit */
223 aBitByte |= i2c_getbit();
224
225 /* Enable I2C */
226 i2c_enable();
227 i2c_delay(CLOCK_LOW_TIME/2);
228
229 for (i = 1; i < 8; i++) {
230 aBitByte <<= 1;
231 /* Clock pulse */
232 i2c_clk(I2C_CLOCK_HIGH);
233 i2c_delay(CLOCK_HIGH_TIME);
234 i2c_clk(I2C_CLOCK_LOW);
235 i2c_delay(CLOCK_LOW_TIME);
236
237 /* Switch off I2C to get bit */
238 i2c_disable();
239 i2c_dir_in();
240 i2c_delay(CLOCK_HIGH_TIME/2);
241
242 /* Get bit */
243 aBitByte |= i2c_getbit();
244
245 /* Enable I2C */
246 i2c_enable();
247 i2c_delay(CLOCK_LOW_TIME/2);
248 }
249 i2c_clk(I2C_CLOCK_HIGH);
250 i2c_delay(CLOCK_HIGH_TIME);
251
252 /*
253 * we leave the clock low, getbyte is usually followed
254 * by sendack/nack, they assume the clock to be low
255 */
256 i2c_clk(I2C_CLOCK_LOW);
257 return aBitByte;
258 }
259
260 /*#---------------------------------------------------------------------------
261 *#
262 *# FUNCTION NAME: i2c_getack
263 *#
264 *# DESCRIPTION : checks if ack was received from ic2
265 *#
266 *#--------------------------------------------------------------------------*/
267
268 int
269 i2c_getack(void)
270 {
271 int ack = 1;
272 /*
273 * enable output
274 */
275 i2c_dir_out();
276 /*
277 * Release data bus by setting
278 * data high
279 */
280 i2c_data(I2C_DATA_HIGH);
281 /*
282 * enable input
283 */
284 i2c_dir_in();
285 i2c_delay(CLOCK_HIGH_TIME/4);
286 /*
287 * generate ACK clock pulse
288 */
289 i2c_clk(I2C_CLOCK_HIGH);
290 /*
291 * Use PORT PB instead of I2C
292 * for input. (I2C not working)
293 */
294 i2c_clk(1);
295 i2c_data(1);
296 /*
297 * switch off I2C
298 */
299 i2c_data(1);
300 i2c_disable();
301 i2c_dir_in();
302 /*
303 * now wait for ack
304 */
305 i2c_delay(CLOCK_HIGH_TIME/2);
306 /*
307 * check for ack
308 */
309 if(i2c_getbit())
310 ack = 0;
311 i2c_delay(CLOCK_HIGH_TIME/2);
312 if(!ack){
313 if(!i2c_getbit()) /* receiver pulld SDA low */
314 ack = 1;
315 i2c_delay(CLOCK_HIGH_TIME/2);
316 }
317
318 /*
319 * our clock is high now, make sure data is low
320 * before we enable our output. If we keep data high
321 * and enable output, we would generate a stop condition.
322 */
323 i2c_data(I2C_DATA_LOW);
324
325 /*
326 * end clock pulse
327 */
328 i2c_enable();
329 i2c_dir_out();
330 i2c_clk(I2C_CLOCK_LOW);
331 i2c_delay(CLOCK_HIGH_TIME/4);
332 /*
333 * enable output
334 */
335 i2c_dir_out();
336 /*
337 * remove ACK clock pulse
338 */
339 i2c_data(I2C_DATA_HIGH);
340 i2c_delay(CLOCK_LOW_TIME/2);
341 return ack;
342 }
343
344 /*#---------------------------------------------------------------------------
345 *#
346 *# FUNCTION NAME: I2C::sendAck
347 *#
348 *# DESCRIPTION : Send ACK on received data
349 *#
350 *#--------------------------------------------------------------------------*/
351 void
352 i2c_sendack(void)
353 {
354 /*
355 * enable output
356 */
357 i2c_delay(CLOCK_LOW_TIME);
358 i2c_dir_out();
359 /*
360 * set ack pulse high
361 */
362 i2c_data(I2C_DATA_LOW);
363 /*
364 * generate clock pulse
365 */
366 i2c_delay(CLOCK_HIGH_TIME/6);
367 i2c_clk(I2C_CLOCK_HIGH);
368 i2c_delay(CLOCK_HIGH_TIME);
369 i2c_clk(I2C_CLOCK_LOW);
370 i2c_delay(CLOCK_LOW_TIME/6);
371 /*
372 * reset data out
373 */
374 i2c_data(I2C_DATA_HIGH);
375 i2c_delay(CLOCK_LOW_TIME);
376
377 i2c_dir_in();
378 }
379
380 /*#---------------------------------------------------------------------------
381 *#
382 *# FUNCTION NAME: i2c_sendnack
383 *#
384 *# DESCRIPTION : Sends NACK on received data
385 *#
386 *#--------------------------------------------------------------------------*/
387 void
388 i2c_sendnack(void)
389 {
390 /*
391 * enable output
392 */
393 i2c_delay(CLOCK_LOW_TIME);
394 i2c_dir_out();
395 /*
396 * set data high
397 */
398 i2c_data(I2C_DATA_HIGH);
399 /*
400 * generate clock pulse
401 */
402 i2c_delay(CLOCK_HIGH_TIME/6);
403 i2c_clk(I2C_CLOCK_HIGH);
404 i2c_delay(CLOCK_HIGH_TIME);
405 i2c_clk(I2C_CLOCK_LOW);
406 i2c_delay(CLOCK_LOW_TIME);
407
408 i2c_dir_in();
409 }
410
411 /*#---------------------------------------------------------------------------
412 *#
413 *# FUNCTION NAME: i2c_writereg
414 *#
415 *# DESCRIPTION : Writes a value to an I2C device
416 *#
417 *#--------------------------------------------------------------------------*/
418 int
419 i2c_writereg(unsigned char theSlave, unsigned char theReg,
420 unsigned char theValue)
421 {
422 int error, cntr = 3;
423 unsigned long flags;
424
425 spin_lock(&i2c_lock);
426
427 do {
428 error = 0;
429 /*
430 * we don't like to be interrupted
431 */
432 local_irq_save(flags);
433
434 i2c_start();
435 /*
436 * send slave address
437 */
438 i2c_outbyte((theSlave & 0xfe));
439 /*
440 * wait for ack
441 */
442 if(!i2c_getack())
443 error = 1;
444 /*
445 * now select register
446 */
447 i2c_dir_out();
448 i2c_outbyte(theReg);
449 /*
450 * now it's time to wait for ack
451 */
452 if(!i2c_getack())
453 error |= 2;
454 /*
455 * send register register data
456 */
457 i2c_outbyte(theValue);
458 /*
459 * now it's time to wait for ack
460 */
461 if(!i2c_getack())
462 error |= 4;
463 /*
464 * end byte stream
465 */
466 i2c_stop();
467 /*
468 * enable interrupt again
469 */
470 local_irq_restore(flags);
471
472 } while(error && cntr--);
473
474 i2c_delay(CLOCK_LOW_TIME);
475
476 spin_unlock(&i2c_lock);
477
478 return -error;
479 }
480
481 /*#---------------------------------------------------------------------------
482 *#
483 *# FUNCTION NAME: i2c_readreg
484 *#
485 *# DESCRIPTION : Reads a value from the decoder registers.
486 *#
487 *#--------------------------------------------------------------------------*/
488 unsigned char
489 i2c_readreg(unsigned char theSlave, unsigned char theReg)
490 {
491 unsigned char b = 0;
492 int error, cntr = 3;
493 unsigned long flags;
494
495 spin_lock(&i2c_lock);
496
497 do {
498 error = 0;
499 /*
500 * we don't like to be interrupted
501 */
502 local_irq_save(flags);
503 /*
504 * generate start condition
505 */
506 i2c_start();
507
508 /*
509 * send slave address
510 */
511 i2c_outbyte((theSlave & 0xfe));
512 /*
513 * wait for ack
514 */
515 if(!i2c_getack())
516 error = 1;
517 /*
518 * now select register
519 */
520 i2c_dir_out();
521 i2c_outbyte(theReg);
522 /*
523 * now it's time to wait for ack
524 */
525 if(!i2c_getack())
526 error = 1;
527 /*
528 * repeat start condition
529 */
530 i2c_delay(CLOCK_LOW_TIME);
531 i2c_start();
532 /*
533 * send slave address
534 */
535 i2c_outbyte(theSlave | 0x01);
536 /*
537 * wait for ack
538 */
539 if(!i2c_getack())
540 error = 1;
541 /*
542 * fetch register
543 */
544 b = i2c_inbyte();
545 /*
546 * last received byte needs to be nacked
547 * instead of acked
548 */
549 i2c_sendnack();
550 /*
551 * end sequence
552 */
553 i2c_stop();
554 /*
555 * enable interrupt again
556 */
557 local_irq_restore(flags);
558
559 } while(error && cntr--);
560
561 spin_unlock(&i2c_lock);
562
563 return b;
564 }
565
566 static int
567 i2c_open(struct inode *inode, struct file *filp)
568 {
569 cycle_kernel_lock();
570 return 0;
571 }
572
573 static int
574 i2c_release(struct inode *inode, struct file *filp)
575 {
576 return 0;
577 }
578
579 /* Main device API. ioctl's to write or read to/from i2c registers.
580 */
581
582 static int
583 i2c_ioctl(struct inode *inode, struct file *file,
584 unsigned int cmd, unsigned long arg)
585 {
586 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
587 return -EINVAL;
588 }
589
590 switch (_IOC_NR(cmd)) {
591 case I2C_WRITEREG:
592 /* write to an i2c slave */
593 D(printk("i2cw %d %d %d\n",
594 I2C_ARGSLAVE(arg),
595 I2C_ARGREG(arg),
596 I2C_ARGVALUE(arg)));
597
598 return i2c_writereg(I2C_ARGSLAVE(arg),
599 I2C_ARGREG(arg),
600 I2C_ARGVALUE(arg));
601 case I2C_READREG:
602 {
603 unsigned char val;
604 /* read from an i2c slave */
605 D(printk("i2cr %d %d ",
606 I2C_ARGSLAVE(arg),
607 I2C_ARGREG(arg)));
608 val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
609 D(printk("= %d\n", val));
610 return val;
611 }
612 default:
613 return -EINVAL;
614
615 }
616
617 return 0;
618 }
619
620 static const struct file_operations i2c_fops = {
621 .owner = THIS_MODULE,
622 .ioctl = i2c_ioctl,
623 .open = i2c_open,
624 .release = i2c_release,
625 };
626
627 int __init
628 i2c_init(void)
629 {
630 static int res = 0;
631 static int first = 1;
632
633 if (!first) {
634 return res;
635 }
636 first = 0;
637
638 /* Setup and enable the Port B I2C interface */
639
640 #ifndef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
641 if ((res = cris_request_io_interface(if_i2c, "I2C"))) {
642 printk(KERN_CRIT "i2c_init: Failed to get IO interface\n");
643 return res;
644 }
645
646 *R_PORT_PB_I2C = port_pb_i2c_shadow |=
647 IO_STATE(R_PORT_PB_I2C, i2c_en, on) |
648 IO_FIELD(R_PORT_PB_I2C, i2c_d, 1) |
649 IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1) |
650 IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable);
651
652 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0);
653 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1);
654
655 *R_PORT_PB_DIR = (port_pb_dir_shadow |=
656 IO_STATE(R_PORT_PB_DIR, dir0, input) |
657 IO_STATE(R_PORT_PB_DIR, dir1, output));
658 #else
659 if ((res = cris_io_interface_allocate_pins(if_i2c,
660 'b',
661 CONFIG_ETRAX_I2C_DATA_PORT,
662 CONFIG_ETRAX_I2C_DATA_PORT))) {
663 printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C data port\n");
664 return res;
665 } else if ((res = cris_io_interface_allocate_pins(if_i2c,
666 'b',
667 CONFIG_ETRAX_I2C_CLK_PORT,
668 CONFIG_ETRAX_I2C_CLK_PORT))) {
669 cris_io_interface_free_pins(if_i2c,
670 'b',
671 CONFIG_ETRAX_I2C_DATA_PORT,
672 CONFIG_ETRAX_I2C_DATA_PORT);
673 printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C clk port\n");
674 }
675 #endif
676
677 return res;
678 }
679
680 static int __init
681 i2c_register(void)
682 {
683 int res;
684
685 res = i2c_init();
686 if (res < 0)
687 return res;
688 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
689 if(res < 0) {
690 printk(KERN_ERR "i2c: couldn't get a major number.\n");
691 return res;
692 }
693
694 printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
695
696 return 0;
697 }
698
699 /* this makes sure that i2c_register is called during boot */
700
701 module_init(i2c_register);
702
703 /****************** END OF FILE i2c.c ********************************/