Blackfin: mass clean up of copyright/licensing info
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf533 / boards / H8606.c
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2007-2008 HV Sistemas S.L.
4 * Javier Herrero <jherrero@hvsistemas.es>
5 * 2005 National ICT Australia (NICTA)
6 * Aidan Williams <aidan@nicta.com.au>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
18 #include <linux/usb/isp1362.h>
19 #endif
20 #include <linux/irq.h>
21
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/reboot.h>
25 #include <asm/portmux.h>
26
27 /*
28 * Name the Board for the /proc/cpuinfo
29 */
30 const char bfin_board_name[] = "HV Sistemas H8606";
31
32 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
33 static struct platform_device rtc_device = {
34 .name = "rtc-bfin",
35 .id = -1,
36 };
37 #endif
38
39 /*
40 * Driver needs to know address, irq and flag pin.
41 */
42 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
43 static struct resource dm9000_resources[] = {
44 [0] = {
45 .start = 0x20300000,
46 .end = 0x20300002,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = 0x20300004,
51 .end = 0x20300006,
52 .flags = IORESOURCE_MEM,
53 },
54 [2] = {
55 .start = IRQ_PF10,
56 .end = IRQ_PF10,
57 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
58 },
59 };
60
61 static struct platform_device dm9000_device = {
62 .id = 0,
63 .name = "dm9000",
64 .resource = dm9000_resources,
65 .num_resources = ARRAY_SIZE(dm9000_resources),
66 };
67 #endif
68
69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
70 #include <linux/smc91x.h>
71
72 static struct smc91x_platdata smc91x_info = {
73 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
74 .leda = RPC_LED_100_10,
75 .ledb = RPC_LED_TX_RX,
76 };
77
78 static struct resource smc91x_resources[] = {
79 {
80 .name = "smc91x-regs",
81 .start = 0x20300300,
82 .end = 0x20300300 + 16,
83 .flags = IORESOURCE_MEM,
84 }, {
85 .start = IRQ_PROG_INTB,
86 .end = IRQ_PROG_INTB,
87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
88 }, {
89 .start = IRQ_PF7,
90 .end = IRQ_PF7,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 },
93 };
94
95 static struct platform_device smc91x_device = {
96 .name = "smc91x",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(smc91x_resources),
99 .resource = smc91x_resources,
100 .dev = {
101 .platform_data = &smc91x_info,
102 },
103 };
104 #endif
105
106 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
107 static struct resource net2272_bfin_resources[] = {
108 {
109 .start = 0x20300000,
110 .end = 0x20300000 + 0x100,
111 .flags = IORESOURCE_MEM,
112 }, {
113 .start = IRQ_PF10,
114 .end = IRQ_PF10,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
116 },
117 };
118
119 static struct platform_device net2272_bfin_device = {
120 .name = "net2272",
121 .id = -1,
122 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
123 .resource = net2272_bfin_resources,
124 };
125 #endif
126
127 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
128 /* all SPI peripherals info goes here */
129
130 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
131 static struct mtd_partition bfin_spi_flash_partitions[] = {
132 {
133 .name = "bootloader (spi)",
134 .size = 0x40000,
135 .offset = 0,
136 .mask_flags = MTD_CAP_ROM
137 }, {
138 .name = "fpga (spi)",
139 .size = 0x30000,
140 .offset = 0x40000
141 }, {
142 .name = "linux kernel (spi)",
143 .size = 0x150000,
144 .offset = 0x70000
145 }, {
146 .name = "jffs2 root file system (spi)",
147 .size = 0x640000,
148 .offset = 0x1c0000,
149 }
150 };
151
152 static struct flash_platform_data bfin_spi_flash_data = {
153 .name = "m25p80",
154 .parts = bfin_spi_flash_partitions,
155 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
156 .type = "m25p64",
157 };
158
159 /* SPI flash chip (m25p64) */
160 static struct bfin5xx_spi_chip spi_flash_chip_info = {
161 .enable_dma = 0, /* use dma transfer with this chip*/
162 .bits_per_word = 8,
163 };
164 #endif
165
166 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
167 /* SPI ADC chip */
168 static struct bfin5xx_spi_chip spi_adc_chip_info = {
169 .ctl_reg = 0x1000,
170 .enable_dma = 1, /* use dma transfer with this chip*/
171 .bits_per_word = 16,
172 };
173 #endif
174
175 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
176 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
177 .ctl_reg = 0x1000,
178 .enable_dma = 0,
179 .bits_per_word = 16,
180 };
181 #endif
182
183 /* Notice: for blackfin, the speed_hz is the value of register
184 * SPI_BAUD, not the real baudrate */
185 static struct spi_board_info bfin_spi_board_info[] __initdata = {
186 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
187 {
188 /* the modalias must be the same as spi device driver name */
189 .modalias = "m25p80", /* Name of spi_driver for this device */
190 /* this value is the baudrate divisor */
191 .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
192 .bus_num = 0, /* Framework bus number */
193 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
194 .platform_data = &bfin_spi_flash_data,
195 .controller_data = &spi_flash_chip_info,
196 .mode = SPI_MODE_3,
197 },
198 #endif
199
200 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
201 {
202 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
203 .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
204 .bus_num = 1, /* Framework bus number */
205 .chip_select = 1, /* Framework chip select. */
206 .platform_data = NULL, /* No spi_driver specific config */
207 .controller_data = &spi_adc_chip_info,
208 },
209 #endif
210
211 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
212 {
213 .modalias = "ad1836",
214 .max_speed_hz = 16,
215 .bus_num = 1,
216 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
217 .controller_data = &ad1836_spi_chip_info,
218 },
219 #endif
220
221 };
222
223 /* SPI (0) */
224 static struct resource bfin_spi0_resource[] = {
225 [0] = {
226 .start = SPI0_REGBASE,
227 .end = SPI0_REGBASE + 0xFF,
228 .flags = IORESOURCE_MEM,
229 },
230 [1] = {
231 .start = CH_SPI,
232 .end = CH_SPI,
233 .flags = IORESOURCE_DMA,
234 },
235 [2] = {
236 .start = IRQ_SPI,
237 .end = IRQ_SPI,
238 .flags = IORESOURCE_IRQ,
239 }
240 };
241
242
243 /* SPI controller data */
244 static struct bfin5xx_spi_master bfin_spi0_info = {
245 .num_chipselect = 8,
246 .enable_dma = 1, /* master has the ability to do dma transfer */
247 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
248 };
249
250 static struct platform_device bfin_spi0_device = {
251 .name = "bfin-spi",
252 .id = 0, /* Bus number */
253 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
254 .resource = bfin_spi0_resource,
255 .dev = {
256 .platform_data = &bfin_spi0_info, /* Passed to driver */
257 },
258 };
259 #endif /* spi master and devices */
260
261 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
262 static struct platform_device bfin_fb_device = {
263 .name = "bf537-fb",
264 };
265 #endif
266
267 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
268 static struct resource bfin_uart_resources[] = {
269 {
270 .start = 0xFFC00400,
271 .end = 0xFFC004FF,
272 .flags = IORESOURCE_MEM,
273 },
274 };
275
276 static struct platform_device bfin_uart_device = {
277 .name = "bfin-uart",
278 .id = 1,
279 .num_resources = ARRAY_SIZE(bfin_uart_resources),
280 .resource = bfin_uart_resources,
281 };
282 #endif
283
284 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
285 #ifdef CONFIG_BFIN_SIR0
286 static struct resource bfin_sir0_resources[] = {
287 {
288 .start = 0xFFC00400,
289 .end = 0xFFC004FF,
290 .flags = IORESOURCE_MEM,
291 },
292 {
293 .start = IRQ_UART0_RX,
294 .end = IRQ_UART0_RX+1,
295 .flags = IORESOURCE_IRQ,
296 },
297 {
298 .start = CH_UART0_RX,
299 .end = CH_UART0_RX+1,
300 .flags = IORESOURCE_DMA,
301 },
302 };
303
304 static struct platform_device bfin_sir0_device = {
305 .name = "bfin_sir",
306 .id = 0,
307 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
308 .resource = bfin_sir0_resources,
309 };
310 #endif
311 #endif
312
313 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
314
315 #include <linux/serial_8250.h>
316 #include <linux/serial.h>
317
318 /*
319 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
320 * running at half system clock, both with interrupt output or-ed to PF8. Change to
321 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
322 */
323
324 static struct plat_serial8250_port serial8250_platform_data [] = {
325 {
326 .membase = (void *)0x20200000,
327 .mapbase = 0x20200000,
328 .irq = IRQ_PF8,
329 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
330 .iotype = UPIO_MEM,
331 .regshift = 1,
332 .uartclk = 66666667,
333 }, {
334 .membase = (void *)0x20200010,
335 .mapbase = 0x20200010,
336 .irq = IRQ_PF8,
337 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
338 .iotype = UPIO_MEM,
339 .regshift = 1,
340 .uartclk = 66666667,
341 }, {
342 }
343 };
344
345 static struct platform_device serial8250_device = {
346 .id = PLAT8250_DEV_PLATFORM,
347 .name = "serial8250",
348 .dev = {
349 .platform_data = serial8250_platform_data,
350 },
351 };
352
353 #endif
354
355 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
356
357 /*
358 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
359 * interrupt output wired to PF9. Change to suit different FPGA configuration
360 */
361
362 static struct resource opencores_kbd_resources[] = {
363 [0] = {
364 .start = 0x20200030,
365 .end = 0x20300030 + 2,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = IRQ_PF9,
370 .end = IRQ_PF9,
371 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
372 },
373 };
374
375 static struct platform_device opencores_kbd_device = {
376 .id = -1,
377 .name = "opencores-kbd",
378 .resource = opencores_kbd_resources,
379 .num_resources = ARRAY_SIZE(opencores_kbd_resources),
380 };
381 #endif
382
383 static struct platform_device *h8606_devices[] __initdata = {
384 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
385 &rtc_device,
386 #endif
387
388 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
389 &dm9000_device,
390 #endif
391
392 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
393 &smc91x_device,
394 #endif
395
396 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
397 &net2272_bfin_device,
398 #endif
399
400 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
401 &bfin_spi0_device,
402 #endif
403
404 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
405 &bfin_uart_device,
406 #endif
407
408 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
409 &serial8250_device,
410 #endif
411
412 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
413 #ifdef CONFIG_BFIN_SIR0
414 &bfin_sir0_device,
415 #endif
416 #endif
417
418 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
419 &opencores_kbd_device,
420 #endif
421 };
422
423 static int __init H8606_init(void)
424 {
425 printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
426 printk(KERN_INFO "%s(): registering device resources\n", __func__);
427 platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
428 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
429 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
430 #endif
431 return 0;
432 }
433
434 arch_initcall(H8606_init);