arch/blackfin/mach-bf527/boards/ad7160eval.c

   1 /*
   2  * Copyright 2004-20010 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/export.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <linux/leds.h>
  22 #include <linux/input.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/reboot.h>
  26 #include <asm/nand.h>
  27 #include <asm/portmux.h>
  28 #include <asm/dpmc.h>
  29
  30
  31 /*
  32  * Name the Board for the /proc/cpuinfo
  33  */
  34 const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  35
  36 /*
  37  *  Driver needs to know address, irq and flag pin.
  38  */
  39
  40 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  41 static struct resource musb_resources[] = {
  42         [0] = {
  43                 .start  = 0xffc03800,
  44                 .end    = 0xffc03cff,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = { /* general IRQ */
  48                 .start  = IRQ_USB_INT0,
  49                 .end    = IRQ_USB_INT0,
  50                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  51         },
  52         [2] = { /* DMA IRQ */
  53                 .start  = IRQ_USB_DMA,
  54                 .end    = IRQ_USB_DMA,
  55                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  56         },
  57 };
  58
  59 static struct musb_hdrc_config musb_config = {
  60         .multipoint     = 0,
  61         .dyn_fifo       = 0,
  62         .soft_con       = 1,
  63         .dma            = 1,
  64         .num_eps        = 8,
  65         .dma_channels   = 8,
  66         .gpio_vrsel     = GPIO_PG13,
  67         /* Some custom boards need to be active low, just set it to "0"
  68          * if it is the case.
  69          */
  70         .gpio_vrsel_active      = 1,
  71         .clkin          = 24,           /* musb CLKIN in MHZ */
  72 };
  73
  74 static struct musb_hdrc_platform_data musb_plat = {
  75 #if defined(CONFIG_USB_MUSB_OTG)
  76         .mode           = MUSB_OTG,
  77 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78         .mode           = MUSB_HOST,
  79 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80         .mode           = MUSB_PERIPHERAL,
  81 #endif
  82         .config         = &musb_config,
  83 };
  84
  85 static u64 musb_dmamask = ~(u32)0;
  86
  87 static struct platform_device musb_device = {
  88         .name           = "musb-blackfin",
  89         .id             = 0,
  90         .dev = {
  91                 .dma_mask               = &musb_dmamask,
  92                 .coherent_dma_mask      = 0xffffffff,
  93                 .platform_data          = &musb_plat,
  94         },
  95         .num_resources  = ARRAY_SIZE(musb_resources),
  96         .resource       = musb_resources,
  97 };
  98 #endif
  99
 100 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 101 static struct resource bf52x_ra158z_resources[] = {
 102         {
 103                 .start = IRQ_PPI_ERROR,
 104                 .end = IRQ_PPI_ERROR,
 105                 .flags = IORESOURCE_IRQ,
 106         },
 107 };
 108
 109 static struct platform_device bf52x_ra158z_device = {
 110         .name           = "bfin-ra158z",
 111         .id             = -1,
 112         .num_resources  = ARRAY_SIZE(bf52x_ra158z_resources),
 113         .resource       = bf52x_ra158z_resources,
 114 };
 115 #endif
 116
 117 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 118 static struct mtd_partition ad7160eval_partitions[] = {
 119         {
 120                 .name       = "bootloader(nor)",
 121                 .size       = 0x40000,
 122                 .offset     = 0,
 123         }, {
 124                 .name       = "linux kernel(nor)",
 125                 .size       = 0x1C0000,
 126                 .offset     = MTDPART_OFS_APPEND,
 127         }, {
 128                 .name       = "file system(nor)",
 129                 .size       = MTDPART_SIZ_FULL,
 130                 .offset     = MTDPART_OFS_APPEND,
 131         }
 132 };
 133
 134 static struct physmap_flash_data ad7160eval_flash_data = {
 135         .width      = 2,
 136         .parts      = ad7160eval_partitions,
 137         .nr_parts   = ARRAY_SIZE(ad7160eval_partitions),
 138 };
 139
 140 static struct resource ad7160eval_flash_resource = {
 141         .start = 0x20000000,
 142         .end   = 0x203fffff,
 143         .flags = IORESOURCE_MEM,
 144 };
 145
 146 static struct platform_device ad7160eval_flash_device = {
 147         .name          = "physmap-flash",
 148         .id            = 0,
 149         .dev = {
 150                 .platform_data = &ad7160eval_flash_data,
 151         },
 152         .num_resources = 1,
 153         .resource      = &ad7160eval_flash_resource,
 154 };
 155 #endif
 156
 157 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 158 static struct mtd_partition partition_info[] = {
 159         {
 160                 .name = "linux kernel(nand)",
 161                 .offset = 0,
 162                 .size = 4 * 1024 * 1024,
 163         },
 164         {
 165                 .name = "file system(nand)",
 166                 .offset = MTDPART_OFS_APPEND,
 167                 .size = MTDPART_SIZ_FULL,
 168         },
 169 };
 170
 171 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 172         .data_width = NFC_NWIDTH_8,
 173         .partitions = partition_info,
 174         .nr_partitions = ARRAY_SIZE(partition_info),
 175         .rd_dly = 3,
 176         .wr_dly = 3,
 177 };
 178
 179 static struct resource bf5xx_nand_resources[] = {
 180         {
 181                 .start = NFC_CTL,
 182                 .end = NFC_DATA_RD + 2,
 183                 .flags = IORESOURCE_MEM,
 184         },
 185         {
 186                 .start = CH_NFC,
 187                 .end = CH_NFC,
 188                 .flags = IORESOURCE_IRQ,
 189         },
 190 };
 191
 192 static struct platform_device bf5xx_nand_device = {
 193         .name = "bf5xx-nand",
 194         .id = 0,
 195         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 196         .resource = bf5xx_nand_resources,
 197         .dev = {
 198                 .platform_data = &bf5xx_nand_platform,
 199         },
 200 };
 201 #endif
 202
 203 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 204 static struct platform_device rtc_device = {
 205         .name = "rtc-bfin",
 206         .id   = -1,
 207 };
 208 #endif
 209
 210 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 211 #include <linux/bfin_mac.h>
 212 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 213
 214 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 215         {
 216                 .addr = 1,
 217                 .irq = IRQ_MAC_PHYINT,
 218         },
 219 };
 220
 221 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 222         .phydev_number = 1,
 223         .phydev_data = bfin_phydev_data,
 224         .phy_mode = PHY_INTERFACE_MODE_RMII,
 225         .mac_peripherals = bfin_mac_peripherals,
 226 };
 227
 228 static struct platform_device bfin_mii_bus = {
 229         .name = "bfin_mii_bus",
 230         .dev = {
 231                 .platform_data = &bfin_mii_bus_data,
 232         }
 233 };
 234
 235 static struct platform_device bfin_mac_device = {
 236         .name = "bfin_mac",
 237         .dev = {
 238                 .platform_data = &bfin_mii_bus,
 239         }
 240 };
 241 #endif
 242
 243
 244 #if defined(CONFIG_MTD_M25P80) \
 245         || defined(CONFIG_MTD_M25P80_MODULE)
 246 static struct mtd_partition bfin_spi_flash_partitions[] = {
 247         {
 248                 .name = "bootloader(spi)",
 249                 .size = 0x00040000,
 250                 .offset = 0,
 251                 .mask_flags = MTD_CAP_ROM
 252         }, {
 253                 .name = "linux kernel(spi)",
 254                 .size = MTDPART_SIZ_FULL,
 255                 .offset = MTDPART_OFS_APPEND,
 256         }
 257 };
 258
 259 static struct flash_platform_data bfin_spi_flash_data = {
 260         .name = "m25p80",
 261         .parts = bfin_spi_flash_partitions,
 262         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 263         .type = "m25p16",
 264 };
 265
 266 /* SPI flash chip (m25p64) */
 267 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 268         .enable_dma = 0,         /* use dma transfer with this chip*/
 269 };
 270 #endif
 271
 272 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 273 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 274         .enable_dma = 0,
 275 };
 276 #endif
 277
 278 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 279 static struct platform_device bfin_i2s = {
 280         .name = "bfin-i2s",
 281         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 282         /* TODO: add platform data here */
 283 };
 284 #endif
 285
 286 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 287 static struct platform_device bfin_tdm = {
 288         .name = "bfin-tdm",
 289         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 290         /* TODO: add platform data here */
 291 };
 292 #endif
 293
 294 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 295 #if defined(CONFIG_MTD_M25P80) \
 296         || defined(CONFIG_MTD_M25P80_MODULE)
 297         {
 298                 /* the modalias must be the same as spi device driver name */
 299                 .modalias = "m25p80", /* Name of spi_driver for this device */
 300                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 301                 .bus_num = 0, /* Framework bus number */
 302                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 303                 .platform_data = &bfin_spi_flash_data,
 304                 .controller_data = &spi_flash_chip_info,
 305                 .mode = SPI_MODE_3,
 306         },
 307 #endif
 308 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
 309         || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 310         {
 311                 .modalias = "ad183x",
 312                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 313                 .bus_num = 0,
 314                 .chip_select = 4,
 315         },
 316 #endif
 317 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 318         {
 319                 .modalias = "mmc_spi",
 320                 .max_speed_hz = 30000000,     /* max spi clock (SCK) speed in HZ */
 321                 .bus_num = 0,
 322                 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
 323                 .controller_data = &mmc_spi_chip_info,
 324                 .mode = SPI_MODE_3,
 325         },
 326 #endif
 327 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 328         {
 329                 .modalias = "spidev",
 330                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 331                 .bus_num = 0,
 332                 .chip_select = 1,
 333         },
 334 #endif
 335 };
 336
 337 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 338 /* SPI controller data */
 339 static struct bfin5xx_spi_master bfin_spi0_info = {
 340         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
 341         .enable_dma = 1,  /* master has the ability to do dma transfer */
 342         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 343 };
 344
 345 /* SPI (0) */
 346 static struct resource bfin_spi0_resource[] = {
 347         [0] = {
 348                 .start = SPI0_REGBASE,
 349                 .end   = SPI0_REGBASE + 0xFF,
 350                 .flags = IORESOURCE_MEM,
 351                 },
 352         [1] = {
 353                 .start = CH_SPI,
 354                 .end   = CH_SPI,
 355                 .flags = IORESOURCE_DMA,
 356         },
 357         [2] = {
 358                 .start = IRQ_SPI,
 359                 .end   = IRQ_SPI,
 360                 .flags = IORESOURCE_IRQ,
 361         },
 362 };
 363
 364 static struct platform_device bfin_spi0_device = {
 365         .name = "bfin-spi",
 366         .id = 0, /* Bus number */
 367         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 368         .resource = bfin_spi0_resource,
 369         .dev = {
 370                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 371         },
 372 };
 373 #endif  /* spi master and devices */
 374
 375 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 376 #ifdef CONFIG_SERIAL_BFIN_UART0
 377 static struct resource bfin_uart0_resources[] = {
 378         {
 379                 .start = UART0_THR,
 380                 .end = UART0_GCTL+2,
 381                 .flags = IORESOURCE_MEM,
 382         },
 383         {
 384                 .start = IRQ_UART0_RX,
 385                 .end = IRQ_UART0_RX+1,
 386                 .flags = IORESOURCE_IRQ,
 387         },
 388         {
 389                 .start = IRQ_UART0_ERROR,
 390                 .end = IRQ_UART0_ERROR,
 391                 .flags = IORESOURCE_IRQ,
 392         },
 393         {
 394                 .start = CH_UART0_TX,
 395                 .end = CH_UART0_TX,
 396                 .flags = IORESOURCE_DMA,
 397         },
 398         {
 399                 .start = CH_UART0_RX,
 400                 .end = CH_UART0_RX,
 401                 .flags = IORESOURCE_DMA,
 402         },
 403 };
 404
 405 static unsigned short bfin_uart0_peripherals[] = {
 406         P_UART0_TX, P_UART0_RX, 0
 407 };
 408
 409 static struct platform_device bfin_uart0_device = {
 410         .name = "bfin-uart",
 411         .id = 0,
 412         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 413         .resource = bfin_uart0_resources,
 414         .dev = {
 415                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 416         },
 417 };
 418 #endif
 419 #ifdef CONFIG_SERIAL_BFIN_UART1
 420 static struct resource bfin_uart1_resources[] = {
 421         {
 422                 .start = UART1_THR,
 423                 .end = UART1_GCTL+2,
 424                 .flags = IORESOURCE_MEM,
 425         },
 426         {
 427                 .start = IRQ_UART1_RX,
 428                 .end = IRQ_UART1_RX+1,
 429                 .flags = IORESOURCE_IRQ,
 430         },
 431         {
 432                 .start = IRQ_UART1_ERROR,
 433                 .end = IRQ_UART1_ERROR,
 434                 .flags = IORESOURCE_IRQ,
 435         },
 436         {
 437                 .start = CH_UART1_TX,
 438                 .end = CH_UART1_TX,
 439                 .flags = IORESOURCE_DMA,
 440         },
 441         {
 442                 .start = CH_UART1_RX,
 443                 .end = CH_UART1_RX,
 444                 .flags = IORESOURCE_DMA,
 445         },
 446 #ifdef CONFIG_BFIN_UART1_CTSRTS
 447         {       /* CTS pin */
 448                 .start = GPIO_PF9,
 449                 .end = GPIO_PF9,
 450                 .flags = IORESOURCE_IO,
 451         },
 452         {       /* RTS pin */
 453                 .start = GPIO_PF10,
 454                 .end = GPIO_PF10,
 455                 .flags = IORESOURCE_IO,
 456         },
 457 #endif
 458 };
 459
 460 static unsigned short bfin_uart1_peripherals[] = {
 461         P_UART1_TX, P_UART1_RX, 0
 462 };
 463
 464 static struct platform_device bfin_uart1_device = {
 465         .name = "bfin-uart",
 466         .id = 1,
 467         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 468         .resource = bfin_uart1_resources,
 469         .dev = {
 470                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 471         },
 472 };
 473 #endif
 474 #endif
 475
 476 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 477 #ifdef CONFIG_BFIN_SIR0
 478 static struct resource bfin_sir0_resources[] = {
 479         {
 480                 .start = 0xFFC00400,
 481                 .end = 0xFFC004FF,
 482                 .flags = IORESOURCE_MEM,
 483         },
 484         {
 485                 .start = IRQ_UART0_RX,
 486                 .end = IRQ_UART0_RX+1,
 487                 .flags = IORESOURCE_IRQ,
 488         },
 489         {
 490                 .start = CH_UART0_RX,
 491                 .end = CH_UART0_RX+1,
 492                 .flags = IORESOURCE_DMA,
 493         },
 494 };
 495
 496 static struct platform_device bfin_sir0_device = {
 497         .name = "bfin_sir",
 498         .id = 0,
 499         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 500         .resource = bfin_sir0_resources,
 501 };
 502 #endif
 503 #ifdef CONFIG_BFIN_SIR1
 504 static struct resource bfin_sir1_resources[] = {
 505         {
 506                 .start = 0xFFC02000,
 507                 .end = 0xFFC020FF,
 508                 .flags = IORESOURCE_MEM,
 509         },
 510         {
 511                 .start = IRQ_UART1_RX,
 512                 .end = IRQ_UART1_RX+1,
 513                 .flags = IORESOURCE_IRQ,
 514         },
 515         {
 516                 .start = CH_UART1_RX,
 517                 .end = CH_UART1_RX+1,
 518                 .flags = IORESOURCE_DMA,
 519         },
 520 };
 521
 522 static struct platform_device bfin_sir1_device = {
 523         .name = "bfin_sir",
 524         .id = 1,
 525         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 526         .resource = bfin_sir1_resources,
 527 };
 528 #endif
 529 #endif
 530
 531 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 532 #include <linux/input/ad7160.h>
 533 static const struct ad7160_platform_data bfin_ad7160_ts_info = {
 534         .sensor_x_res = 854,
 535         .sensor_y_res = 480,
 536         .pressure = 100,
 537         .filter_coef = 3,
 538         .coord_pref = AD7160_ORIG_TOP_LEFT,
 539         .first_touch_window = 5,
 540         .move_window = 3,
 541         .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
 542                         AD7160_EMIT_ABS_MT_PRESSURE |
 543                         AD7160_TRACKING_ID_ASCENDING,
 544         .finger_act_ctrl = 0x64,
 545         .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
 546                                 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 547                                 AD7160_HAPTIC_SLOT_B(60) |
 548                                 AD7160_HAPTIC_SLOT_B_LVL_LOW,
 549
 550         .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
 551                                 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 552                                 AD7160_HAPTIC_SLOT_B(80) |
 553                                 AD7160_HAPTIC_SLOT_B_LVL_LOW |
 554                                 AD7160_HAPTIC_SLOT_C(120) |
 555                                 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
 556                                 AD7160_HAPTIC_SLOT_D(30) |
 557                                 AD7160_HAPTIC_SLOT_D_LVL_LOW,
 558 };
 559 #endif
 560
 561 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 562 static struct resource bfin_twi0_resource[] = {
 563         [0] = {
 564                 .start = TWI0_REGBASE,
 565                 .end   = TWI0_REGBASE,
 566                 .flags = IORESOURCE_MEM,
 567         },
 568         [1] = {
 569                 .start = IRQ_TWI,
 570                 .end   = IRQ_TWI,
 571                 .flags = IORESOURCE_IRQ,
 572         },
 573 };
 574
 575 static struct platform_device i2c_bfin_twi_device = {
 576         .name = "i2c-bfin-twi",
 577         .id = 0,
 578         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 579         .resource = bfin_twi0_resource,
 580 };
 581 #endif
 582
 583 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 584 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 585         {
 586                 I2C_BOARD_INFO("ad7160", 0x33),
 587                 .irq = IRQ_PH1,
 588                 .platform_data = (void *)&bfin_ad7160_ts_info,
 589         },
 590 #endif
 591 };
 592
 593 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 594 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 595 static struct resource bfin_sport0_uart_resources[] = {
 596         {
 597                 .start = SPORT0_TCR1,
 598                 .end = SPORT0_MRCS3+4,
 599                 .flags = IORESOURCE_MEM,
 600         },
 601         {
 602                 .start = IRQ_SPORT0_RX,
 603                 .end = IRQ_SPORT0_RX+1,
 604                 .flags = IORESOURCE_IRQ,
 605         },
 606         {
 607                 .start = IRQ_SPORT0_ERROR,
 608                 .end = IRQ_SPORT0_ERROR,
 609                 .flags = IORESOURCE_IRQ,
 610         },
 611 };
 612
 613 static unsigned short bfin_sport0_peripherals[] = {
 614         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 615         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 616 };
 617
 618 static struct platform_device bfin_sport0_uart_device = {
 619         .name = "bfin-sport-uart",
 620         .id = 0,
 621         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 622         .resource = bfin_sport0_uart_resources,
 623         .dev = {
 624                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 625         },
 626 };
 627 #endif
 628 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 629 static struct resource bfin_sport1_uart_resources[] = {
 630         {
 631                 .start = SPORT1_TCR1,
 632                 .end = SPORT1_MRCS3+4,
 633                 .flags = IORESOURCE_MEM,
 634         },
 635         {
 636                 .start = IRQ_SPORT1_RX,
 637                 .end = IRQ_SPORT1_RX+1,
 638                 .flags = IORESOURCE_IRQ,
 639         },
 640         {
 641                 .start = IRQ_SPORT1_ERROR,
 642                 .end = IRQ_SPORT1_ERROR,
 643                 .flags = IORESOURCE_IRQ,
 644         },
 645 };
 646
 647 static unsigned short bfin_sport1_peripherals[] = {
 648         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 649         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 650 };
 651
 652 static struct platform_device bfin_sport1_uart_device = {
 653         .name = "bfin-sport-uart",
 654         .id = 1,
 655         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 656         .resource = bfin_sport1_uart_resources,
 657         .dev = {
 658                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 659         },
 660 };
 661 #endif
 662 #endif
 663
 664 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 665 #include <asm/bfin_rotary.h>
 666
 667 static struct bfin_rotary_platform_data bfin_rotary_data = {
 668         /*.rotary_up_key     = KEY_UP,*/
 669         /*.rotary_down_key   = KEY_DOWN,*/
 670         .rotary_rel_code   = REL_WHEEL,
 671         .rotary_button_key = KEY_ENTER,
 672         .debounce          = 10,        /* 0..17 */
 673         .mode              = ROT_QUAD_ENC | ROT_DEBE,
 674 };
 675
 676 static struct resource bfin_rotary_resources[] = {
 677         {
 678                 .start = IRQ_CNT,
 679                 .end = IRQ_CNT,
 680                 .flags = IORESOURCE_IRQ,
 681         },
 682 };
 683
 684 static struct platform_device bfin_rotary_device = {
 685         .name           = "bfin-rotary",
 686         .id             = -1,
 687         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
 688         .resource       = bfin_rotary_resources,
 689         .dev            = {
 690                 .platform_data = &bfin_rotary_data,
 691         },
 692 };
 693 #endif
 694
 695 static const unsigned int cclk_vlev_datasheet[] = {
 696         VRPAIR(VLEV_100, 400000000),
 697         VRPAIR(VLEV_105, 426000000),
 698         VRPAIR(VLEV_110, 500000000),
 699         VRPAIR(VLEV_115, 533000000),
 700         VRPAIR(VLEV_120, 600000000),
 701 };
 702
 703 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 704         .tuple_tab = cclk_vlev_datasheet,
 705         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 706         .vr_settling_time = 25 /* us */,
 707 };
 708
 709 static struct platform_device bfin_dpmc = {
 710         .name = "bfin dpmc",
 711         .dev = {
 712                 .platform_data = &bfin_dmpc_vreg_data,
 713         },
 714 };
 715
 716 static struct platform_device *stamp_devices[] __initdata = {
 717
 718         &bfin_dpmc,
 719
 720 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 721         &bf5xx_nand_device,
 722 #endif
 723
 724 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 725         &rtc_device,
 726 #endif
 727
 728 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 729         &musb_device,
 730 #endif
 731
 732 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 733         &bfin_mii_bus,
 734         &bfin_mac_device,
 735 #endif
 736
 737 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 738         &bfin_spi0_device,
 739 #endif
 740
 741 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 742 #ifdef CONFIG_SERIAL_BFIN_UART0
 743         &bfin_uart0_device,
 744 #endif
 745 #ifdef CONFIG_SERIAL_BFIN_UART1
 746         &bfin_uart1_device,
 747 #endif
 748 #endif
 749
 750 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 751         &bf52x_ra158z_device,
 752 #endif
 753
 754 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 755 #ifdef CONFIG_BFIN_SIR0
 756         &bfin_sir0_device,
 757 #endif
 758 #ifdef CONFIG_BFIN_SIR1
 759         &bfin_sir1_device,
 760 #endif
 761 #endif
 762
 763 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 764         &i2c_bfin_twi_device,
 765 #endif
 766
 767 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 768 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 769         &bfin_sport0_uart_device,
 770 #endif
 771 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 772         &bfin_sport1_uart_device,
 773 #endif
 774 #endif
 775
 776 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 777         &bfin_rotary_device,
 778 #endif
 779
 780 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 781         &ad7160eval_flash_device,
 782 #endif
 783
 784 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 785         &bfin_i2s,
 786 #endif
 787
 788 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 789         &bfin_tdm,
 790 #endif
 791 };
 792
 793 static int __init ad7160eval_init(void)
 794 {
 795         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 796         i2c_register_board_info(0, bfin_i2c_board_info,
 797                                 ARRAY_SIZE(bfin_i2c_board_info));
 798         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 799         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 800         return 0;
 801 }
 802
 803 arch_initcall(ad7160eval_init);
 804
 805 static struct platform_device *ad7160eval_early_devices[] __initdata = {
 806 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 807 #ifdef CONFIG_SERIAL_BFIN_UART0
 808         &bfin_uart0_device,
 809 #endif
 810 #ifdef CONFIG_SERIAL_BFIN_UART1
 811         &bfin_uart1_device,
 812 #endif
 813 #endif
 814
 815 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 816 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 817         &bfin_sport0_uart_device,
 818 #endif
 819 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 820         &bfin_sport1_uart_device,
 821 #endif
 822 #endif
 823 };
 824
 825 void __init native_machine_early_platform_add_devices(void)
 826 {
 827         printk(KERN_INFO "register early platform devices\n");
 828         early_platform_add_devices(ad7160eval_early_devices,
 829                 ARRAY_SIZE(ad7160eval_early_devices));
 830 }
 831
 832 void native_machine_restart(char *cmd)
 833 {
 834         /* workaround reboot hang when booting from SPI */
 835         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 836                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 837 }
 838
 839 void bfin_get_ether_addr(char *addr)
 840 {
 841         /* the MAC is stored in OTP memory page 0xDF */
 842         u32 ret;
 843         u64 otp_mac;
 844         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 845
 846         ret = otp_read(0xDF, 0x00, &otp_mac);
 847         if (!(ret & 0x1)) {
 848                 char *otp_mac_p = (char *)&otp_mac;
 849                 for (ret = 0; ret < 6; ++ret)
 850                         addr[ret] = otp_mac_p[5 - ret];
 851         }
 852 }
 853 EXPORT_SYMBOL(bfin_get_ether_addr);