include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / kernel / process.c
1 /*
2 * Blackfin architecture-dependent process handling
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later
7 */
8
9 #include <linux/module.h>
10 #include <linux/smp_lock.h>
11 #include <linux/unistd.h>
12 #include <linux/user.h>
13 #include <linux/uaccess.h>
14 #include <linux/slab.h>
15 #include <linux/sched.h>
16 #include <linux/tick.h>
17 #include <linux/fs.h>
18 #include <linux/err.h>
19
20 #include <asm/blackfin.h>
21 #include <asm/fixed_code.h>
22 #include <asm/mem_map.h>
23
24 asmlinkage void ret_from_fork(void);
25
26 /* Points to the SDRAM backup memory for the stack that is currently in
27 * L1 scratchpad memory.
28 */
29 void *current_l1_stack_save;
30
31 /* The number of tasks currently using a L1 stack area. The SRAM is
32 * allocated/deallocated whenever this changes from/to zero.
33 */
34 int nr_l1stack_tasks;
35
36 /* Start and length of the area in L1 scratchpad memory which we've allocated
37 * for process stacks.
38 */
39 void *l1_stack_base;
40 unsigned long l1_stack_len;
41
42 /*
43 * Powermanagement idle function, if any..
44 */
45 void (*pm_idle)(void) = NULL;
46 EXPORT_SYMBOL(pm_idle);
47
48 void (*pm_power_off)(void) = NULL;
49 EXPORT_SYMBOL(pm_power_off);
50
51 /*
52 * The idle loop on BFIN
53 */
54 #ifdef CONFIG_IDLE_L1
55 static void default_idle(void)__attribute__((l1_text));
56 void cpu_idle(void)__attribute__((l1_text));
57 #endif
58
59 /*
60 * This is our default idle handler. We need to disable
61 * interrupts here to ensure we don't miss a wakeup call.
62 */
63 static void default_idle(void)
64 {
65 #ifdef CONFIG_IPIPE
66 ipipe_suspend_domain();
67 #endif
68 local_irq_disable_hw();
69 if (!need_resched())
70 idle_with_irq_disabled();
71
72 local_irq_enable_hw();
73 }
74
75 /*
76 * The idle thread. We try to conserve power, while trying to keep
77 * overall latency low. The architecture specific idle is passed
78 * a value to indicate the level of "idleness" of the system.
79 */
80 void cpu_idle(void)
81 {
82 /* endless idle loop with no priority at all */
83 while (1) {
84 void (*idle)(void) = pm_idle;
85
86 #ifdef CONFIG_HOTPLUG_CPU
87 if (cpu_is_offline(smp_processor_id()))
88 cpu_die();
89 #endif
90 if (!idle)
91 idle = default_idle;
92 tick_nohz_stop_sched_tick(1);
93 while (!need_resched())
94 idle();
95 tick_nohz_restart_sched_tick();
96 preempt_enable_no_resched();
97 schedule();
98 preempt_disable();
99 }
100 }
101
102 /*
103 * This gets run with P1 containing the
104 * function to call, and R1 containing
105 * the "args". Note P0 is clobbered on the way here.
106 */
107 void kernel_thread_helper(void);
108 __asm__(".section .text\n"
109 ".align 4\n"
110 "_kernel_thread_helper:\n\t"
111 "\tsp += -12;\n\t"
112 "\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous");
113
114 /*
115 * Create a kernel thread.
116 */
117 pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
118 {
119 struct pt_regs regs;
120
121 memset(&regs, 0, sizeof(regs));
122
123 regs.r1 = (unsigned long)arg;
124 regs.p1 = (unsigned long)fn;
125 regs.pc = (unsigned long)kernel_thread_helper;
126 regs.orig_p0 = -1;
127 /* Set bit 2 to tell ret_from_fork we should be returning to kernel
128 mode. */
129 regs.ipend = 0x8002;
130 __asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):);
131 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL,
132 NULL);
133 }
134 EXPORT_SYMBOL(kernel_thread);
135
136 /*
137 * Do necessary setup to start up a newly executed thread.
138 *
139 * pass the data segment into user programs if it exists,
140 * it can't hurt anything as far as I can tell
141 */
142 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
143 {
144 set_fs(USER_DS);
145 regs->pc = new_ip;
146 if (current->mm)
147 regs->p5 = current->mm->start_data;
148 #ifndef CONFIG_SMP
149 task_thread_info(current)->l1_task_info.stack_start =
150 (void *)current->mm->context.stack_start;
151 task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
152 memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
153 sizeof(*L1_SCRATCH_TASK_INFO));
154 #endif
155 wrusp(new_sp);
156 }
157 EXPORT_SYMBOL_GPL(start_thread);
158
159 void flush_thread(void)
160 {
161 }
162
163 asmlinkage int bfin_vfork(struct pt_regs *regs)
164 {
165 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL,
166 NULL);
167 }
168
169 asmlinkage int bfin_clone(struct pt_regs *regs)
170 {
171 unsigned long clone_flags;
172 unsigned long newsp;
173
174 #ifdef __ARCH_SYNC_CORE_DCACHE
175 if (current->rt.nr_cpus_allowed == num_possible_cpus()) {
176 current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
177 current->rt.nr_cpus_allowed = 1;
178 }
179 #endif
180
181 /* syscall2 puts clone_flags in r0 and usp in r1 */
182 clone_flags = regs->r0;
183 newsp = regs->r1;
184 if (!newsp)
185 newsp = rdusp();
186 else
187 newsp -= 12;
188 return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
189 }
190
191 int
192 copy_thread(unsigned long clone_flags,
193 unsigned long usp, unsigned long topstk,
194 struct task_struct *p, struct pt_regs *regs)
195 {
196 struct pt_regs *childregs;
197
198 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
199 *childregs = *regs;
200 childregs->r0 = 0;
201
202 p->thread.usp = usp;
203 p->thread.ksp = (unsigned long)childregs;
204 p->thread.pc = (unsigned long)ret_from_fork;
205
206 return 0;
207 }
208
209 /*
210 * sys_execve() executes a new program.
211 */
212 asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp)
213 {
214 int error;
215 char *filename;
216 struct pt_regs *regs = (struct pt_regs *)((&name) + 6);
217
218 filename = getname(name);
219 error = PTR_ERR(filename);
220 if (IS_ERR(filename))
221 return error;
222 error = do_execve(filename, argv, envp, regs);
223 putname(filename);
224 return error;
225 }
226
227 unsigned long get_wchan(struct task_struct *p)
228 {
229 unsigned long fp, pc;
230 unsigned long stack_page;
231 int count = 0;
232 if (!p || p == current || p->state == TASK_RUNNING)
233 return 0;
234
235 stack_page = (unsigned long)p;
236 fp = p->thread.usp;
237 do {
238 if (fp < stack_page + sizeof(struct thread_info) ||
239 fp >= 8184 + stack_page)
240 return 0;
241 pc = ((unsigned long *)fp)[1];
242 if (!in_sched_functions(pc))
243 return pc;
244 fp = *(unsigned long *)fp;
245 }
246 while (count++ < 16);
247 return 0;
248 }
249
250 void finish_atomic_sections (struct pt_regs *regs)
251 {
252 int __user *up0 = (int __user *)regs->p0;
253
254 switch (regs->pc) {
255 default:
256 /* not in middle of an atomic step, so resume like normal */
257 return;
258
259 case ATOMIC_XCHG32 + 2:
260 put_user(regs->r1, up0);
261 break;
262
263 case ATOMIC_CAS32 + 2:
264 case ATOMIC_CAS32 + 4:
265 if (regs->r0 == regs->r1)
266 case ATOMIC_CAS32 + 6:
267 put_user(regs->r2, up0);
268 break;
269
270 case ATOMIC_ADD32 + 2:
271 regs->r0 = regs->r1 + regs->r0;
272 /* fall through */
273 case ATOMIC_ADD32 + 4:
274 put_user(regs->r0, up0);
275 break;
276
277 case ATOMIC_SUB32 + 2:
278 regs->r0 = regs->r1 - regs->r0;
279 /* fall through */
280 case ATOMIC_SUB32 + 4:
281 put_user(regs->r0, up0);
282 break;
283
284 case ATOMIC_IOR32 + 2:
285 regs->r0 = regs->r1 | regs->r0;
286 /* fall through */
287 case ATOMIC_IOR32 + 4:
288 put_user(regs->r0, up0);
289 break;
290
291 case ATOMIC_AND32 + 2:
292 regs->r0 = regs->r1 & regs->r0;
293 /* fall through */
294 case ATOMIC_AND32 + 4:
295 put_user(regs->r0, up0);
296 break;
297
298 case ATOMIC_XOR32 + 2:
299 regs->r0 = regs->r1 ^ regs->r0;
300 /* fall through */
301 case ATOMIC_XOR32 + 4:
302 put_user(regs->r0, up0);
303 break;
304 }
305
306 /*
307 * We've finished the atomic section, and the only thing left for
308 * userspace is to do a RTS, so we might as well handle that too
309 * since we need to update the PC anyways.
310 */
311 regs->pc = regs->rets;
312 }
313
314 static inline
315 int in_mem(unsigned long addr, unsigned long size,
316 unsigned long start, unsigned long end)
317 {
318 return addr >= start && addr + size <= end;
319 }
320 static inline
321 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
322 unsigned long const_addr, unsigned long const_size)
323 {
324 return const_size &&
325 in_mem(addr, size, const_addr + off, const_addr + const_size);
326 }
327 static inline
328 int in_mem_const(unsigned long addr, unsigned long size,
329 unsigned long const_addr, unsigned long const_size)
330 {
331 return in_mem_const_off(addr, size, 0, const_addr, const_size);
332 }
333 #define ASYNC_ENABLED(bnum, bctlnum) \
334 ({ \
335 (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
336 bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
337 1; \
338 })
339 /*
340 * We can't read EBIU banks that aren't enabled or we end up hanging
341 * on the access to the async space. Make sure we validate accesses
342 * that cross async banks too.
343 * 0 - found, but unusable
344 * 1 - found & usable
345 * 2 - not found
346 */
347 static
348 int in_async(unsigned long addr, unsigned long size)
349 {
350 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
351 if (!ASYNC_ENABLED(0, 0))
352 return 0;
353 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
354 return 1;
355 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
356 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
357 }
358 if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
359 if (!ASYNC_ENABLED(1, 0))
360 return 0;
361 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
362 return 1;
363 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
364 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
365 }
366 if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
367 if (!ASYNC_ENABLED(2, 1))
368 return 0;
369 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
370 return 1;
371 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
372 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
373 }
374 if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
375 if (ASYNC_ENABLED(3, 1))
376 return 0;
377 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
378 return 1;
379 return 0;
380 }
381
382 /* not within async bounds */
383 return 2;
384 }
385
386 int bfin_mem_access_type(unsigned long addr, unsigned long size)
387 {
388 int cpu = raw_smp_processor_id();
389
390 /* Check that things do not wrap around */
391 if (addr > ULONG_MAX - size)
392 return -EFAULT;
393
394 if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
395 return BFIN_MEM_ACCESS_CORE;
396
397 if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
398 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
399 if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
400 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
401 if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
402 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
403 if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
404 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
405 #ifdef COREB_L1_CODE_START
406 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
407 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
408 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
409 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
410 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
411 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
412 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
413 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
414 #endif
415 if (in_mem_const(addr, size, L2_START, L2_LENGTH))
416 return BFIN_MEM_ACCESS_CORE;
417
418 if (addr >= SYSMMR_BASE)
419 return BFIN_MEM_ACCESS_CORE_ONLY;
420
421 switch (in_async(addr, size)) {
422 case 0: return -EFAULT;
423 case 1: return BFIN_MEM_ACCESS_CORE;
424 case 2: /* fall through */;
425 }
426
427 if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
428 return BFIN_MEM_ACCESS_CORE;
429 if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
430 return BFIN_MEM_ACCESS_DMA;
431
432 return -EFAULT;
433 }
434
435 #if defined(CONFIG_ACCESS_CHECK)
436 #ifdef CONFIG_ACCESS_OK_L1
437 __attribute__((l1_text))
438 #endif
439 /* Return 1 if access to memory range is OK, 0 otherwise */
440 int _access_ok(unsigned long addr, unsigned long size)
441 {
442 int aret;
443
444 if (size == 0)
445 return 1;
446 /* Check that things do not wrap around */
447 if (addr > ULONG_MAX - size)
448 return 0;
449 if (segment_eq(get_fs(), KERNEL_DS))
450 return 1;
451 #ifdef CONFIG_MTD_UCLINUX
452 if (1)
453 #else
454 if (0)
455 #endif
456 {
457 if (in_mem(addr, size, memory_start, memory_end))
458 return 1;
459 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
460 return 1;
461 # ifndef CONFIG_ROMFS_ON_MTD
462 if (0)
463 # endif
464 /* For XIP, allow user space to use pointers within the ROMFS. */
465 if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
466 return 1;
467 } else {
468 if (in_mem(addr, size, memory_start, physical_mem_end))
469 return 1;
470 }
471
472 if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
473 return 1;
474
475 if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
476 return 1;
477 if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
478 return 1;
479 if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
480 return 1;
481 if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
482 return 1;
483 #ifdef COREB_L1_CODE_START
484 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
485 return 1;
486 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
487 return 1;
488 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
489 return 1;
490 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
491 return 1;
492 #endif
493
494 aret = in_async(addr, size);
495 if (aret < 2)
496 return aret;
497
498 if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
499 return 1;
500
501 if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
502 return 1;
503 if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
504 return 1;
505
506 return 0;
507 }
508 EXPORT_SYMBOL(_access_ok);
509 #endif /* CONFIG_ACCESS_CHECK */