arch/blackfin/include/asm/system.h

   1 /*
   2  * File:        include/asm/system.h
   3  * Based on:
   4  * Author:      Tony Kou (tonyko@lineo.ca)
   5  *              Copyright (c) 2002 Arcturus Networks Inc.
   6  *                    (www.arcturusnetworks.com)
   7  *              Copyright (c) 2003 Metrowerks (www.metrowerks.com)
   8  *              Copyright (c) 2004 Analog Device Inc.
   9  * Created:     25Jan2001 - Tony Kou
  10  * Description: system.h include file
  11  *
  12  * Modified:     22Sep2006 - Robin Getz
  13  *                - move include blackfin.h down, so I can get access to
  14  *                   irq functions in other include files.
  15  *
  16  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2, or (at your option)
  21  * any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; see the file COPYING.
  30  * If not, write to the Free Software Foundation,
  31  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  32  */
  33
  34 #ifndef _BLACKFIN_SYSTEM_H
  35 #define _BLACKFIN_SYSTEM_H
  36
  37 #include <linux/linkage.h>
  38 #include <linux/compiler.h>
  39 #include <mach/anomaly.h>
  40 #include <asm/pda.h>
  41 #include <asm/processor.h>
  42
  43 /* Forward decl needed due to cdef inter dependencies */
  44 static inline uint32_t __pure bfin_dspid(void);
  45 #define blackfin_core_id() (bfin_dspid() & 0xff)
  46
  47 /*
  48  * Interrupt configuring macros.
  49  */
  50 #define local_irq_disable() \
  51         do { \
  52                 int __tmp_dummy; \
  53                 __asm__ __volatile__( \
  54                         "cli %0;" \
  55                         : "=d" (__tmp_dummy) \
  56                 ); \
  57         } while (0)
  58
  59 #if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
  60 # define NOP_PAD_ANOMALY_05000244 "nop; nop;"
  61 #else
  62 # define NOP_PAD_ANOMALY_05000244
  63 #endif
  64
  65 #ifdef CONFIG_SMP
  66 # define irq_flags cpu_pda[blackfin_core_id()].imask
  67 #else
  68 extern unsigned long irq_flags;
  69 #endif
  70
  71 #define local_irq_enable() \
  72         __asm__ __volatile__( \
  73                 "sti %0;" \
  74                 : \
  75                 : "d" (irq_flags) \
  76         )
  77 #define idle_with_irq_disabled() \
  78         __asm__ __volatile__( \
  79                 NOP_PAD_ANOMALY_05000244 \
  80                 ".align 8;" \
  81                 "sti %0;" \
  82                 "idle;" \
  83                 : \
  84                 : "d" (irq_flags) \
  85         )
  86
  87 #ifdef CONFIG_DEBUG_HWERR
  88 # define __save_and_cli(x) \
  89         __asm__ __volatile__( \
  90                 "cli %0;" \
  91                 "sti %1;" \
  92                 : "=&d" (x) \
  93                 : "d" (0x3F) \
  94         )
  95 #else
  96 # define __save_and_cli(x) \
  97         __asm__ __volatile__( \
  98                 "cli %0;" \
  99                 : "=&d" (x) \
 100         )
 101 #endif
 102
 103 #define local_save_flags(x) \
 104         __asm__ __volatile__( \
 105                 "cli %0;" \
 106                 "sti %0;" \
 107                 : "=d" (x) \
 108         )
 109
 110 #ifdef CONFIG_DEBUG_HWERR
 111 #define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
 112 #else
 113 #define irqs_enabled_from_flags(x) ((x) != 0x1f)
 114 #endif
 115
 116 #define local_irq_restore(x) \
 117         do { \
 118                 if (irqs_enabled_from_flags(x)) \
 119                         local_irq_enable(); \
 120         } while (0)
 121
 122 /* For spinlocks etc */
 123 #define local_irq_save(x) __save_and_cli(x)
 124
 125 #define irqs_disabled()                         \
 126 ({                                              \
 127         unsigned long flags;                    \
 128         local_save_flags(flags);                \
 129         !irqs_enabled_from_flags(flags);        \
 130 })
 131
 132 /*
 133  * Force strict CPU ordering.
 134  */
 135 #define nop()  asm volatile ("nop;\n\t"::)
 136 #define mb()   asm volatile (""   : : :"memory")
 137 #define rmb()  asm volatile (""   : : :"memory")
 138 #define wmb()  asm volatile (""   : : :"memory")
 139 #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
 140 #define read_barrier_depends()          do { } while(0)
 141
 142 #ifdef CONFIG_SMP
 143 asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
 144 asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
 145 asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
 146 asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
 147                                         unsigned long new, unsigned long old);
 148 asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
 149                                         unsigned long new, unsigned long old);
 150 asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
 151                                         unsigned long new, unsigned long old);
 152
 153 #ifdef __ARCH_SYNC_CORE_DCACHE
 154 # define smp_mb()       do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
 155 # define smp_rmb()      do { barrier(); smp_check_barrier(); } while (0)
 156 # define smp_wmb()      do { barrier(); smp_mark_barrier(); } while (0)
 157 #else
 158 # define smp_mb()       barrier()
 159 # define smp_rmb()      barrier()
 160 # define smp_wmb()      barrier()
 161 #endif
 162
 163 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
 164                                    int size)
 165 {
 166         unsigned long tmp;
 167
 168         switch (size) {
 169         case 1:
 170                 tmp = __raw_xchg_1_asm(ptr, x);
 171                 break;
 172         case 2:
 173                 tmp = __raw_xchg_2_asm(ptr, x);
 174                 break;
 175         case 4:
 176                 tmp = __raw_xchg_4_asm(ptr, x);
 177                 break;
 178         }
 179
 180         return tmp;
 181 }
 182
 183 /*
 184  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
 185  * store NEW in MEM.  Return the initial value in MEM.  Success is
 186  * indicated by comparing RETURN with OLD.
 187  */
 188 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 189                                       unsigned long new, int size)
 190 {
 191         unsigned long tmp;
 192
 193         switch (size) {
 194         case 1:
 195                 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
 196                 break;
 197         case 2:
 198                 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
 199                 break;
 200         case 4:
 201                 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
 202                 break;
 203         }
 204
 205         return tmp;
 206 }
 207 #define cmpxchg(ptr, o, n) \
 208         ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
 209                 (unsigned long)(n), sizeof(*(ptr))))
 210
 211 #define smp_read_barrier_depends()      smp_check_barrier()
 212
 213 #else /* !CONFIG_SMP */
 214
 215 #define smp_mb()        barrier()
 216 #define smp_rmb()       barrier()
 217 #define smp_wmb()       barrier()
 218 #define smp_read_barrier_depends()      do { } while(0)
 219
 220 struct __xchg_dummy {
 221         unsigned long a[100];
 222 };
 223 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
 224
 225 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
 226                                    int size)
 227 {
 228         unsigned long tmp = 0;
 229         unsigned long flags = 0;
 230
 231         local_irq_save(flags);
 232
 233         switch (size) {
 234         case 1:
 235                 __asm__ __volatile__
 236                         ("%0 = b%2 (z);\n\t"
 237                          "b%2 = %1;\n\t"
 238                          : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 239                 break;
 240         case 2:
 241                 __asm__ __volatile__
 242                         ("%0 = w%2 (z);\n\t"
 243                          "w%2 = %1;\n\t"
 244                          : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 245                 break;
 246         case 4:
 247                 __asm__ __volatile__
 248                         ("%0 = %2;\n\t"
 249                          "%2 = %1;\n\t"
 250                          : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
 251                 break;
 252         }
 253         local_irq_restore(flags);
 254         return tmp;
 255 }
 256
 257 #include <asm-generic/cmpxchg-local.h>
 258
 259 /*
 260  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
 261  * them available.
 262  */
 263 #define cmpxchg_local(ptr, o, n)                                               \
 264         ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
 265                         (unsigned long)(n), sizeof(*(ptr))))
 266 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
 267
 268 #include <asm-generic/cmpxchg.h>
 269
 270 #endif /* !CONFIG_SMP */
 271
 272 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
 273 #define tas(ptr) ((void)xchg((ptr), 1))
 274
 275 #define prepare_to_switch()     do { } while(0)
 276
 277 /*
 278  * switch_to(n) should switch tasks to task ptr, first checking that
 279  * ptr isn't the current task, in which case it does nothing.
 280  */
 281
 282 #include <asm/blackfin.h>
 283
 284 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
 285
 286 #define switch_to(prev,next,last) \
 287 do {    \
 288         memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
 289                 sizeof *L1_SCRATCH_TASK_INFO); \
 290         memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
 291                 sizeof *L1_SCRATCH_TASK_INFO); \
 292         (last) = resume (prev, next);   \
 293 } while (0)
 294
 295 #endif  /* _BLACKFIN_SYSTEM_H */