2 * Copyright (C) 2006, 2008 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/platform_device.h>
15 #include <linux/sysdev.h>
24 struct sys_device sysdev
;
26 unsigned long suspend_ipr
;
27 unsigned long saved_ipr
[64];
31 extern struct platform_device at32_intc0_device
;
34 * TODO: We may be able to implement mask/unmask by setting IxM flags
35 * in the status register.
37 static void intc_mask_irq(struct irq_data
*d
)
42 static void intc_unmask_irq(struct irq_data
*d
)
47 static struct intc intc0
= {
50 .irq_mask
= intc_mask_irq
,
51 .irq_unmask
= intc_unmask_irq
,
56 * All interrupts go via intc at some point.
58 asmlinkage
void do_IRQ(int level
, struct pt_regs
*regs
)
60 struct pt_regs
*old_regs
;
62 unsigned long status_reg
;
66 old_regs
= set_irq_regs(regs
);
70 irq
= intc_readl(&intc0
, INTCAUSE0
- 4 * level
);
71 generic_handle_irq(irq
);
74 * Clear all interrupt level masks so that we may handle
75 * interrupts during softirq processing. If this is a nested
76 * interrupt, interrupts must stay globally disabled until we
79 status_reg
= sysreg_read(SR
);
80 status_reg
&= ~(SYSREG_BIT(I0M
) | SYSREG_BIT(I1M
)
81 | SYSREG_BIT(I2M
) | SYSREG_BIT(I3M
));
82 sysreg_write(SR
, status_reg
);
86 set_irq_regs(old_regs
);
89 void __init
init_IRQ(void)
91 extern void _evba(void);
92 extern void irq_level0(void);
93 struct resource
*regs
;
98 regs
= platform_get_resource(&at32_intc0_device
, IORESOURCE_MEM
, 0);
100 printk(KERN_EMERG
"intc: no mmio resource defined\n");
103 pclk
= clk_get(&at32_intc0_device
.dev
, "pclk");
105 printk(KERN_EMERG
"intc: no clock defined\n");
111 intc0
.regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
113 printk(KERN_EMERG
"intc: failed to map registers (0x%08lx)\n",
114 (unsigned long)regs
->start
);
119 * Initialize all interrupts to level 0 (lowest priority). The
120 * priority level may be changed by calling
121 * irq_set_priority().
124 offset
= (unsigned long)&irq_level0
- (unsigned long)&_evba
;
125 for (i
= 0; i
< NR_INTERNAL_IRQS
; i
++) {
126 intc_writel(&intc0
, INTPR0
+ 4 * i
, offset
);
127 readback
= intc_readl(&intc0
, INTPR0
+ 4 * i
);
128 if (readback
== offset
)
129 irq_set_chip_and_handler(i
, &intc0
.chip
,
133 /* Unmask all interrupt levels */
134 sysreg_write(SR
, (sysreg_read(SR
)
135 & ~(SR_I3M
| SR_I2M
| SR_I1M
| SR_I0M
)));
140 panic("Interrupt controller initialization failed!\n");
144 void intc_set_suspend_handler(unsigned long offset
)
146 intc0
.suspend_ipr
= offset
;
149 static int intc_suspend(struct sys_device
*sdev
, pm_message_t state
)
151 struct intc
*intc
= container_of(sdev
, struct intc
, sysdev
);
154 if (unlikely(!irqs_disabled())) {
155 pr_err("intc_suspend: called with interrupts enabled\n");
159 if (unlikely(!intc
->suspend_ipr
)) {
160 pr_err("intc_suspend: suspend_ipr not initialized\n");
164 for (i
= 0; i
< 64; i
++) {
165 intc
->saved_ipr
[i
] = intc_readl(intc
, INTPR0
+ 4 * i
);
166 intc_writel(intc
, INTPR0
+ 4 * i
, intc
->suspend_ipr
);
172 static int intc_resume(struct sys_device
*sdev
)
174 struct intc
*intc
= container_of(sdev
, struct intc
, sysdev
);
177 WARN_ON(!irqs_disabled());
179 for (i
= 0; i
< 64; i
++)
180 intc_writel(intc
, INTPR0
+ 4 * i
, intc
->saved_ipr
[i
]);
185 #define intc_suspend NULL
186 #define intc_resume NULL
189 static struct sysdev_class intc_class
= {
191 .suspend
= intc_suspend
,
192 .resume
= intc_resume
,
195 static int __init
intc_init_sysdev(void)
199 ret
= sysdev_class_register(&intc_class
);
204 intc0
.sysdev
.cls
= &intc_class
;
205 ret
= sysdev_register(&intc0
.sysdev
);
209 device_initcall(intc_init_sysdev
);
211 unsigned long intc_get_pending(unsigned int group
)
213 return intc_readl(&intc0
, INTREQ0
+ 4 * group
);
215 EXPORT_SYMBOL_GPL(intc_get_pending
);