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(CR):[Kane]:[factory]Modfiy panel into the DTSB mode
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / arch / arm64 / boot / dts / exynos / exynos9609-robusta2_common.dtsi
1 /*
2 * SAMSUNG EXYNOS9610 board device tree source
3 *
4 * Copyright (c) 2017 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include "exynos9610_battery_data.dtsi"
13 #include <dt-bindings/clock/exynos9610.h>
14 #include "modem-ss360ap-sit-pdata.dtsi"
15 #include "exynos9610-display-lcd.dtsi"
16 #include "exynos9610-robusta2-camera.dtsi"
17 #include "novatek-nt36xxx-i2c.dtsi"
18 #include "himax-hx83112a-i2c.dtsi"
19 #include "wing-sensor.dtsi"
20 #include "exynos9610-robusta2-motor.dtsi"
21
22 / {
23 fragment@common {
24 target-path = "/";
25 __overlay__ {
26 #address-cells = <2>;
27 #size-cells = <1>;
28
29 fixed-rate-clocks {
30 oscclk {
31 compatible = "samsung,exynos9610-oscclk";
32 clock-frequency = <26000000>;
33 };
34 };
35
36 firmware {
37 android {
38 compatible = "android,firmware";
39 vbmeta {
40 compatible = "android,vbmeta";
41 parts = "vbmeta,boot,system,vendor";
42 };
43 fstab {
44 compatible = "android,fstab";
45 vendor {
46 compatible = "android,vendor";
47 dev = "/dev/block/platform/13520000.ufs/by-name/vendor";
48 type = "ext4";
49 mnt_flags = "ro";
50 fsmgr_flags = "wait,avb,slotselect";
51 };
52 };
53 };
54 };
55
56 ifconn {
57 status = "okay";
58 compatible = "samsung,ifconn";
59 ifconn,usbpd = "s2mm005";
60 ifconn,muic = "s2mu106-muic";
61 };
62
63 /*Fingerprint start*/
64 et320: et320{
65 compatible = "egistec,et320";
66 status = "ok";
67 reg = <0>;
68 clocks = <&clock GATE_SPI_1_QCH>, <&clock SPI1>;
69 clock-names = "spi", "spi_busclk0";
70 pinctrl-names = "default";
71 pinctrl-0 = <&spi7_bus &spi7_cs_func>;
72 egistec,gpio_irq = <&gpa0 5 0>;
73 egistec,gpio_rst = <&gpa1 1 0>;
74 egistec,gpio_ldo3p3_en = <&gpg2 0 0>;
75 egistec,gpio_ldo1p8_en = <&gpg2 2 0>;
76 };
77 /*Fingerprint end*/
78
79 speedy@11a10000 {
80 status = "okay";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 s2mpu09mfd@00 {
84 compatible = "samsung,s2mpu09mfd";
85 acpm-ipc-channel = <2>;
86 i2c-speedy-address;
87 s2mpu09,wakeup = "enabled";
88 s2mpu09,irq-gpio = <&gpa2 0 0>;
89 reg = <0x00>;
90 interrupts = <2 0 0>;
91 interrupt-parent = <&gpa2>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pmic_irq &pm_wrsti>;
94 /* RTC: wtsr/smpl */
95 wtsr_en = "enabled"; /* enable */
96 smpl_en = "enabled"; /* enable */
97 wtsr_timer_val = <3>; /* 1000ms */
98 smpl_timer_val = <4>; /* 500ms */
99 check_jigon = <0>; /* do not check jigon */
100 /* RTC: If it's first boot, reset rtc to 1/1/2017 12:00:00(Sun) */
101 init_time,sec = <0>;
102 init_time,min = <0>;
103 init_time,hour = <12>;
104 init_time,mday = <1>;
105 init_time,mon = <0>;
106 init_time,year = <117>;
107 init_time,wday = <0>;
108
109 regulators {
110 b1_reg: BUCK1 {
111 regulator-name = "vdd_mif";
112 regulator-min-microvolt = <500000>;
113 regulator-max-microvolt = <1100000>;
114 regulator-always-on;
115 regulator-ramp-delay = <12000>;
116 regulator-initial-mode = <2>;
117 };
118
119 b2_reg: BUCK2 {
120 regulator-name = "vdd_cpucl1";
121 regulator-min-microvolt = <500000>;
122 regulator-max-microvolt = <1300000>;
123 regulator-always-on;
124 regulator-ramp-delay = <12000>;
125 regulator-initial-mode = <1>;
126 };
127
128 b3_reg: BUCK3 {
129 regulator-name = "vdd_cpucl0";
130 regulator-min-microvolt = <500000>;
131 regulator-max-microvolt = <1300000>;
132 regulator-always-on;
133 regulator-ramp-delay = <12000>;
134 regulator-initial-mode = <1>;
135 };
136
137 b4_reg: BUCK4{
138 regulator-name = "vdd_int";
139 regulator-min-microvolt = <500000>;
140 regulator-max-microvolt = <1100000>;
141 regulator-always-on;
142 regulator-ramp-delay = <12000>;
143 regulator-initial-mode = <2>;
144 };
145
146 b5_reg: BUCK5 {
147 regulator-name = "vdd_g3d";
148 regulator-min-microvolt = <500000>;
149 regulator-max-microvolt = <1200000>;
150 regulator-always-on;
151 regulator-ramp-delay = <12000>;
152 regulator-initial-mode = <2>;
153 };
154
155 b6_reg: BUCK6 {
156 regulator-name = "vdd_cam_vipx";
157 regulator-min-microvolt = <500000>;
158 regulator-max-microvolt = <1300000>;
159 regulator-always-on;
160 regulator-ramp-delay = <12000>;
161 regulator-initial-mode = <2>;
162 };
163
164 b7_reg: BUCK7 {
165 regulator-name = "vdd2_mem";
166 regulator-min-microvolt = <500000>;
167 regulator-max-microvolt = <1300000>;
168 regulator-always-on;
169 regulator-ramp-delay = <12000>;
170 regulator-initial-mode = <3>;
171 };
172
173 b8_reg: BUCK8 {
174 regulator-name = "vdd_lldo";
175 regulator-min-microvolt = <1200000>;
176 regulator-max-microvolt = <1500000>;
177 regulator-always-on;
178 regulator-ramp-delay = <12000>;
179 regulator-initial-mode = <3>;
180 };
181
182 b9_reg: BUCK9 {
183 regulator-name = "vdd_mldo";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <2100000>;
186 regulator-always-on;
187 regulator-ramp-delay = <12000>;
188 regulator-initial-mode = <3>;
189 };
190
191 l1_reg: LDO1 {
192 regulator-name = "vdd_ldo1";
193 regulator-min-microvolt = <700000>;
194 regulator-max-microvolt = <1300000>;
195 regulator-always-on;
196 regulator-ramp-delay = <12000>;
197 regulator-initial-mode = <3>;
198 };
199
200 l2_reg: LDO2 {
201 regulator-name = "vqmmc";
202 regulator-min-microvolt = <1800000>;
203 regulator-max-microvolt = <3375000>;
204 regulator-ramp-delay = <12000>;
205 };
206
207 l3_reg: LDO3 {
208 regulator-name = "vdd_ldo3";
209 regulator-min-microvolt = <800000>;
210 regulator-max-microvolt = <1950000>;
211 regulator-always-on;
212 regulator-ramp-delay = <12000>;
213 regulator-initial-mode = <3>;
214 };
215
216 l4_reg: LDO4 {
217 regulator-name = "vdd_ldo4";
218 regulator-min-microvolt = <500000>;
219 regulator-max-microvolt = <1100000>;
220 regulator-always-on;
221 regulator-ramp-delay = <12000>;
222 regulator-initial-mode = <1>;
223 };
224
225 l5_reg: LDO5 {
226 regulator-name = "vdd_ldo5";
227 regulator-min-microvolt = <800000>;
228 regulator-max-microvolt = <1300000>;
229 regulator-always-on;
230 regulator-ramp-delay = <12000>;
231 regulator-initial-mode = <1>;
232 };
233
234 l6_reg: LDO6 {
235 regulator-name = "vdd_ldo6";
236 regulator-min-microvolt = <800000>;
237 regulator-max-microvolt = <1300000>;
238 regulator-always-on;
239 regulator-ramp-delay = <12000>;
240 regulator-initial-mode = <1>;
241 };
242
243 l7_reg: LDO7 {
244 regulator-name = "vdd_ldo7";
245 regulator-min-microvolt = <800000>;
246 regulator-max-microvolt = <1950000>;
247 regulator-always-on;
248 regulator-ramp-delay = <12000>;
249 regulator-initial-mode = <1>;
250 };
251
252 l8_reg: LDO8 {
253 regulator-name = "vdd_ldo8";
254 regulator-min-microvolt = <500000>;
255 regulator-max-microvolt = <1300000>;
256 regulator-always-on;
257 regulator-ramp-delay = <12000>;
258 regulator-initial-mode = <1>;
259 };
260
261 l9_reg: LDO9 {
262 regulator-name = "vdd_ldo9";
263 regulator-min-microvolt = <500000>;
264 regulator-max-microvolt = <1300000>;
265 regulator-always-on;
266 regulator-ramp-delay = <12000>;
267 regulator-initial-mode = <1>;
268 };
269
270 l10_reg: LDO10 {
271 regulator-name = "vdd_ldo10";
272 regulator-min-microvolt = <500000>;
273 regulator-max-microvolt = <1300000>;
274 regulator-always-on;
275 regulator-ramp-delay = <12000>;
276 regulator-initial-mode = <1>;
277 };
278
279 l11_reg: LDO11 {
280 regulator-name = "vdd_ldo11";
281 regulator-min-microvolt = <500000>;
282 regulator-max-microvolt = <1300000>;
283 regulator-always-on;
284 regulator-ramp-delay = <12000>;
285 regulator-initial-mode = <1>;
286 };
287
288 l12_reg: LDO12 {
289 regulator-name = "vdd_ldo12";
290 regulator-min-microvolt = <800000>;
291 regulator-max-microvolt = <1300000>;
292 regulator-always-on;
293 regulator-ramp-delay = <12000>;
294 regulator-initial-mode = <1>;
295 };
296
297 l13_reg: LDO13 {
298 regulator-name = "vdd_ldo13";
299 regulator-min-microvolt = <800000>;
300 regulator-max-microvolt = <1950000>;
301 regulator-always-on;
302 regulator-ramp-delay = <12000>;
303 regulator-initial-mode = <1>;
304 };
305
306 l14_reg: LDO14 {
307 regulator-name = "vdd_ldo14";
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <3375000>;
310 regulator-always-on;
311 regulator-ramp-delay = <12000>;
312 regulator-initial-mode = <1>;
313 };
314
315 l33_reg: LDO33 {
316 regulator-name = "vdd_ldo33";
317 regulator-min-microvolt = <800000>;
318 regulator-max-microvolt = <1950000>;
319 regulator-ramp-delay = <12000>;
320 };
321
322 l34_reg: LDO34 {
323 regulator-name = "vdd_ldo34";
324 regulator-min-microvolt = <1800000>;
325 regulator-max-microvolt = <3375000>;
326 regulator-ramp-delay = <12000>;
327 };
328
329 l35_reg: LDO35 {
330 regulator-name = "vmmc";
331 regulator-min-microvolt = <1800000>;
332 regulator-max-microvolt = <3375000>;
333 regulator-ramp-delay = <12000>;
334 };
335
336 l36_reg: LDO36 {
337 regulator-name = "vdd_ldo36";
338 regulator-min-microvolt = <500000>;
339 regulator-max-microvolt = <1300000>;
340 regulator-always-on;
341 regulator-ramp-delay = <12000>;
342 regulator-initial-mode = <1>;
343 };
344
345 l37_reg: LDO37 {
346 regulator-name = "vdd_ldo37";
347 regulator-min-microvolt = <3300000>;
348 regulator-max-microvolt = <3300000>;
349 regulator-ramp-delay = <12000>;
350 regulator-always-on;
351 };
352
353 l38_reg: LDO38 {
354 regulator-name = "VLDO38_PMIC_RCAM_AFVCC_2P8";
355 regulator-min-microvolt = <2800000>;
356 regulator-max-microvolt = <2800000>;
357 regulator-ramp-delay = <12000>;
358 };
359
360 l39_reg: LDO39 {
361 regulator-name = "vdd_ldo39";
362 regulator-min-microvolt = <800000>;
363 regulator-max-microvolt = <1950000>;
364 regulator-ramp-delay = <12000>;
365 regulator-always-on;
366 };
367
368 l40_reg: LDO40 {
369 regulator-name = "vdd_ldo40";
370 regulator-min-microvolt = <3000000>;
371 regulator-max-microvolt = <3000000>;
372 regulator-ramp-delay = <12000>;
373 regulator-initial-mode = <3>;
374 regulator-always-on;
375 };
376
377 l41_reg: LDO41 {
378 regulator-name = "VLDO41_PMIC_FCAM_AVDD_2P8";
379 regulator-min-microvolt = <2800000>;
380 regulator-max-microvolt = <2800000>;
381 regulator-ramp-delay = <12000>;
382 };
383
384 l42_reg: LDO42 {
385 regulator-name = "vdd_ldo42";
386 regulator-min-microvolt = <800000>;
387 regulator-max-microvolt = <1950000>;
388 regulator-ramp-delay = <12000>;
389 regulator-always-on;
390 };
391
392 l43_reg: LDO43 {
393 regulator-name = "vdd_ldo43";
394 regulator-min-microvolt = <500000>;
395 regulator-max-microvolt = <1300000>;
396 regulator-always-on;
397 regulator-ramp-delay = <12000>;
398 regulator-initial-mode = <1>;
399 };
400
401 l44_reg: LDO44 {
402 regulator-name = "VLDO44_PMIC_DCAM_DVDD_1P2";
403 regulator-min-microvolt = <1200000>;
404 regulator-max-microvolt = <1200000>;
405 regulator-ramp-delay = <12000>;
406 };
407 };
408 };
409 };
410
411
412 exynos_rgt {
413 compatible = "samsung,exynos-rgt";
414 };
415
416 mailbox_cp: mcu_ipc@11920000 {
417 compatible = "samsung,exynos-shd-ipc-mailbox";
418 reg = <0x0 0x11920000 0x180>;
419 mcu,name = "mcu_ipc_cp";
420 mcu,id = <0>;
421 interrupts = <0 40 0 >;
422 };
423
424 mailbox_gnss: mcu_ipc@11A00000 {
425 compatible = "samsung,exynos-shd-ipc-mailbox";
426 reg = <0x0 0x11A00000 0x180>;
427 mcu,name = "mcu_ipc_gnss";
428 mcu,id = <1>;
429 interrupts = <0 43 0>; /* INTREQ__MAILBOX_GNSS2AP */
430 };
431
432 gnss_pdata {
433 status = "okay";
434
435 compatible = "samsung,gnss_shdmem_if";
436 shmem,name = "KEPLER";
437 shmem,device_node_name = "gnss_ipc";
438
439 /* INTREQ__ALIVE_GNSS_ACTIVE, INTREQ__GNSS2AP_WDOG_RESET, INTREQ__GNSS2AP_WAKEUP, INTREQ__GNSS2AP */
440 interrupts = <0 27 0>, <0 81 0>, <0 80 0>, <0 79 0>;
441 interrupt-names = "ACTIVE", "WATCHDOG", "WAKEUP", "REQ_INIT";
442
443 memory-region = <&gnss_reserved>;
444 mbox_info = <&mailbox_gnss>;
445
446 mbx,int_ap2gnss_bcmd = <0>;
447 mbx,int_ap2gnss_req_fault_info = <1>;
448 mbx,int_ap2gnss_ipc_msg = <2>;
449 mbx,int_ap2gnss_ack_wake_set = <3>;
450 mbx,int_ap2gnss_ack_wake_clr = <4>;
451
452 mbx,irq_gnss2ap_bcmd = <0>;
453 mbx,irq_gnss2ap_rsp_fault_info = <1>;
454 mbx,irq_gnss2ap_ipc_msg = <2>;
455 mbx,irq_gnss2ap_req_wake_clr = <4>;
456
457 mbx,reg_bcmd_ctrl = <0>, <1>, <2>, <3>;
458
459 reg_rx_ipc_msg = <1 5>;
460 reg_tx_ipc_msg = <1 4>;
461 reg_rx_head = <1 3>;
462 reg_rx_tail = <1 2>;
463 reg_tx_head = <1 1>;
464 reg_tx_tail = <1 0>;
465 fault_info = <1 0x200000 0x180000>;
466
467 shmem,ipc_offset = <0x380000>;
468 shmem,ipc_size = <0x80000>;
469 shmem,ipc_reg_cnt = <32>;
470 };
471
472 gpio_keys {
473 status = "okay";
474 compatible = "gpio-keys";
475 #address-cells = <1>;
476 #size-cells = <0>;
477 pinctrl-names = "default";
478 pinctrl-0 = <&key_voldown &key_volup &key_power>;
479 button@1 {
480 label = "gpio-keys: KEY_VOLUMEDOWN";
481 linux,code = <114>;
482 gpios = <&gpa1 6 0xf>;
483 };
484 button@2 {
485 label = "gpio-keys: KEY_VOLUMEUP";
486 linux,code = <115>;
487 gpios = <&gpa1 5 0xf>;
488 };
489 button@3 {
490 label = "gpio-keys: KEY_POWER";
491 linux,code = <116>;
492 gpios = <&gpa1 7 0xf>;
493 gpio-key,wakeup = <1>;
494 };
495 };
496
497 dwmmc2@13550000 {
498 status = "okay";
499 num-slots = <1>;
500 supports-4bit;
501 supports-cmd23;
502 supports-erase;
503 supports-highspeed;
504 card-detect-invert;
505 card-detect-gpio;
506 bypass-for-allpass;
507 card-init-hwacg-ctrl;
508 skip-init-mmc-scan;
509 qos-dvfs-level = <100000>;
510 fifo-depth = <0x40>;
511 desc-size = <4>;
512 card-detect-delay = <200>;
513 data-timeout = <200>;
514 hto-timeout = <80>;
515 samsung,dw-mshc-ciu-div = <3>;
516 clock-frequency = <800000000>;
517 samsung,dw-mshc-sdr-timing = <3 0 2 0>;
518 samsung,dw-mshc-ddr-timing = <3 0 2 1>;
519 samsung,dw-mshc-sdr50-timing = <3 0 4 2>;
520 samsung,dw-mshc-sdr104-timing = <3 0 3 0>;
521
522 num-ref-clks = <9>;
523 ciu_clkin = <25 50 50 25 50 100 200 50 50>;
524
525 /* Swapping clock drive strength */
526 clk-drive-number = <4>;
527 pinctrl-names = "default",
528 "fast-slew-rate-1x",
529 "fast-slew-rate-2x",
530 "fast-slew-rate-3x",
531 "fast-slew-rate-4x";
532 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &dwmmc2_cd_ext_irq>;
533 pinctrl-1 = <&sd2_clk_fast_slew_rate_1x>;
534 pinctrl-2 = <&sd2_clk_fast_slew_rate_2x>;
535 pinctrl-3 = <&sd2_clk_fast_slew_rate_3x>;
536 pinctrl-4 = <&sd2_clk_fast_slew_rate_4x>;
537
538 card-detect = <&gpa0 7 0xf>;
539 #address-cells = <1>;
540 #size-cells = <0>;
541 slot@0 {
542 reg = <0>;
543 bus-width = <4>;
544 disable-wp;
545 };
546 };
547
548 usb_notifier {
549 compatible = "samsung,usb-notifier";
550 udc = <&udc>;
551 };
552
553 usb_hs_tune:usb_hs_tune {
554 hs_tune_cnt = <12>;
555
556 /* value = <device host> */
557 hs_tune1 {
558 tune_name = "tx_vref";
559 tune_value = <0xf 0xf>;
560 };
561
562 hs_tune2 {
563 tune_name = "tx_pre_emp";
564 tune_value = <0x3 0x3>;
565 };
566
567 hs_tune3 {
568 tune_name = "tx_pre_emp_plus";
569 tune_value = <0x0 0x0>;
570 };
571
572 hs_tune4 {
573 tune_name = "tx_res";
574 tune_value = <0x3 0x3>;
575 };
576
577 hs_tune5 {
578 tune_name = "tx_rise";
579 tune_value = <0x3 0x3>;
580 };
581
582 hs_tune6 {
583 tune_name = "tx_hsxv";
584 tune_value = <0x3 0x3>;
585 };
586
587 hs_tune7 {
588 tune_name = "tx_fsls";
589 tune_value = <0x3 0x3>;
590 };
591
592 hs_tune8 {
593 tune_name = "rx_sqrx";
594 tune_value = <0x7 0x7>;
595 };
596
597 hs_tune9 {
598 tune_name = "compdis";
599 tune_value = <0x7 0x7>;
600 };
601
602 hs_tune10 {
603 tune_name = "otg";
604 tune_value = <0x2 0x2>;
605 };
606
607 hs_tune11 {
608 /* true : 1, false: 0 */
609 /* <enable_user_imp user_imp_value> */
610 tune_name = "enable_user_imp";
611 tune_value = <0x0 0x0>;
612 };
613
614 hs_tune12 {
615 /* PHY clk : 1 , FREE clk : 0 */
616 tune_name = "is_phyclock";
617 tune_value = <0x1 0x1>;
618 };
619 };
620
621 usb3_ss_tune:ss_tune {
622 ss_tune_cnt = <15>;
623
624 /* value = <device host> */
625 ss_tune1 {
626 tune_name = "tx0_term_offset";
627 tune_value = <0x0 0x0>;
628 };
629
630 ss_tune2 {
631 tune_name = "pcs_tx_swing_full";
632 tune_value = <0x7f 0x7f>;
633 };
634
635 ss_tune3 {
636 tune_name = "pcs_tx_deemph_6db";
637 tune_value = <0x1c 0x1c>;
638 };
639
640 ss_tune4 {
641 tune_name = "pcs_tx_deemph_3p5db";
642 tune_value = <0x1c 0x1c>;
643 };
644
645 ss_tune5 {
646 tune_name = "tx_vboost_lvl_sstx";
647 tune_value = <0x7 0x7>;
648 };
649
650 ss_tune6 {
651 tune_name = "tx_vboost_lvl";
652 tune_value = <0x4 0x4>;
653 };
654
655 ss_tune7 {
656 tune_name = "los_level";
657 tune_value = <0x9 0x9>;
658 };
659
660 ss_tune8 {
661 tune_name = "los_bias";
662 tune_value = <0x5 0x5>;
663 };
664
665 ss_tune9 {
666 tune_name = "pcs_rx_los_mask_val";
667 tune_value = <0x104 0x104>;
668 };
669
670 ss_tune10 {
671 tune_name = "tx_eye_height_cntl_en";
672 tune_value = <0x1 0x1>;
673 };
674
675 ss_tune11 {
676 tune_name = "pipe_tx_deemph_update_delay";
677 tune_value = <0x2 0x2>;
678 };
679
680 ss_tune12 {
681 tune_name = "pcs_tx_swing_full_sstx";
682 tune_value = <0x7f 0x7f>;
683 };
684 ss_tune13 {
685 tune_name = "rx_eq_fix_val";
686 tune_value = <0x2 0x2>;
687 };
688
689 ss_tune14 {
690 tune_name = "rx_decode_mode";
691 tune_value = <0x1 0x1>;
692 };
693
694 ss_tune15 {
695 tune_name = "decrese_ss_tx_imp";
696 tune_value = <0x1 0x1>;
697 };
698 };
699
700 usb3_hs_tune:usb3_hs_tune {
701 hs_tune_cnt = <10>;
702
703 /* value = <device host> */
704 hs_tune1 {
705 tune_name = "tx_pre_emp";
706 tune_value = <0x3 0x3>;
707 };
708
709 hs_tune2 {
710 tune_name = "tx_pre_emp_plus";
711 tune_value = <0x0 0x0>;
712 };
713
714 hs_tune3 {
715 tune_name = "tx_vref";
716 tune_value = <0x7 0x7>;
717 };
718
719 hs_tune4 {
720 tune_name = "rx_sqrx";
721 tune_value = <0x7 0x7>;
722 };
723
724 hs_tune5 {
725 tune_name = "tx_rise";
726 tune_value = <0x3 0x3>;
727 };
728
729 hs_tune6 {
730 tune_name = "compdis";
731 tune_value = <0x7 0x7>;
732 };
733
734 hs_tune7 {
735 tune_name = "tx_hsxv";
736 tune_value = <0x3 0x3>;
737 };
738
739 hs_tune8 {
740 tune_name = "tx_fsls";
741 tune_value = <0x3 0x3>;
742 };
743
744 hs_tune9 {
745 tune_name = "tx_res";
746 tune_value = <0x3 0x3>;
747 };
748
749 hs_tune10 {
750 tune_name = "utim_clk";
751 tune_value = <0x1 0x1>;
752 };
753 };
754
755 /* Secure RPMB */
756 ufs-srpmb {
757 compatible = "samsung,ufs-srpmb";
758 interrupts = <0 460 0>;
759 };
760
761 V_SYS: fixedregulator@0 {
762 compatible = "regulator-fixed";
763 regulator-name = "V_SYS";
764 regulator-min-microvolt = <4200000>;
765 regulator-max-microvolt = <4200000>;
766 regulator-boot-on;
767 regulator-always-on;
768 };
769
770
771 dummy_audio_codec: audio_codec_dummy {
772 status = "okay";
773 compatible = "snd-soc-dummy";
774 };
775
776 dummy_audio_cpu: audio_cpu_dummy {
777 compatible = "samsung,dummy-cpu";
778 status = "okay";
779 };
780
781 sound {
782 status = "okay";
783 compatible = "samsung,exynos9610-madera";
784
785 clock-names = "xclkout";
786 clocks = <&clock OSC_AUD>;
787 pinctrl-names = "default";
788 pinctrl-0 = <&xclkout0>;
789
790 cirrus,sysclk = <1 4 98304000>;
791 cirrus,dspclk = <8 4 147456000>;
792 cirrus,fll1-refclk = <1 0 26000000 98304000>;
793
794 cirrus,opclk = <3 0 12288000>;
795
796 gpios = <&gpm25 0 0>;
797
798 samsung,routing =
799 "HEADSETMIC", "MICBIAS1B",
800 "IN1BR", "HEADSETMIC",
801 "DMIC1", "MICBIAS2A",
802 "IN1AL", "DMIC1",
803 "DMIC2", "MICBIAS2A",
804 "IN2L", "DMIC2",
805 "DMIC3", "MICBIAS2B",
806 "IN2R", "DMIC3",
807 "RECEIVER", "EPOUTN",
808 "RECEIVER", "EPOUTP",
809 "HEADPHONE", "HPOUTL",
810 "HEADPHONE", "HPOUTR",
811 "AIF2 Playback", "OPCLK",
812 "AIF2 Capture", "OPCLK",
813 "VOUTPUT", "ABOX UAIF0 Playback",
814 "SPEAKER", "Left SPK",
815 "VOUTPUTCALL", "ABOX SIFS0 Playback",
816 "ABOX SIFS0 Capture", "VINPUTCALL";
817
818 samsung,codec = <&abox &abox_uaif_0 &abox_uaif_1 &abox_uaif_2
819 &abox_uaif_4 &abox_dsif &abox_spdy &cs35l41_left>;
820 samsung,prefix = "ABOX", "ABOX", "ABOX", "ABOX",
821 "ABOX", "ABOX", "ABOX", "SPK";
822 samsung,aux = <&abox_effect &abox_bt>;
823
824 rdma@0 {
825 cpu {
826 sound-dai = <&abox 0>;
827 };
828 platform {
829 sound-dai = <&abox_rdma_0>;
830 };
831 codec {
832 sound-dai = <&dummy_audio_codec>;
833 };
834 };
835 rdma@1 {
836 cpu {
837 sound-dai = <&abox 1>;
838 };
839 platform {
840 sound-dai = <&abox_rdma_1>;
841 };
842 codec {
843 sound-dai = <&dummy_audio_codec>;
844 };
845 };
846 rdma@2 {
847 cpu {
848 sound-dai = <&abox 2>;
849 };
850 platform {
851 sound-dai = <&abox_rdma_2>;
852 };
853 codec {
854 sound-dai = <&dummy_audio_codec>;
855 };
856 };
857 rdma@3 {
858 cpu {
859 sound-dai = <&abox 3>;
860 };
861 platform {
862 sound-dai = <&abox_rdma_3>;
863 };
864 codec {
865 sound-dai = <&dummy_audio_codec>;
866 };
867 };
868 rdma@4 {
869 cpu {
870 sound-dai = <&abox 4>;
871 };
872 platform {
873 sound-dai = <&abox_rdma_4>;
874 };
875 codec {
876 sound-dai = <&dummy_audio_codec>;
877 };
878 };
879 rdma@5 {
880 cpu {
881 sound-dai = <&abox 5>;
882 };
883 platform {
884 sound-dai = <&abox_rdma_5>;
885 };
886 codec {
887 sound-dai = <&dummy_audio_codec>;
888 };
889 };
890 rdma@6 {
891 cpu {
892 sound-dai = <&abox 6>;
893 };
894 platform {
895 sound-dai = <&abox_rdma_6>;
896 };
897 codec {
898 sound-dai = <&dummy_audio_codec>;
899 };
900 };
901 rdma@7 {
902 cpu {
903 sound-dai = <&abox 7>;
904 };
905 platform {
906 sound-dai = <&abox_rdma_7>;
907 };
908 codec {
909 sound-dai = <&dummy_audio_codec>;
910 };
911 };
912 wdma@0 {
913 cpu {
914 sound-dai = <&abox 8>;
915 };
916 platform {
917 sound-dai = <&abox_wdma_0>;
918 };
919 codec {
920 sound-dai = <&dummy_audio_codec>;
921 };
922 };
923 wdma@1 {
924 cpu {
925 sound-dai = <&abox 9>;
926 };
927 platform {
928 sound-dai = <&abox_wdma_1>;
929 };
930 codec {
931 sound-dai = <&dummy_audio_codec>;
932 };
933 };
934 wdma@2 {
935 cpu {
936 sound-dai = <&abox 10>;
937 };
938 platform {
939 sound-dai = <&abox_wdma_2>;
940 };
941 codec {
942 sound-dai = <&dummy_audio_codec>;
943 };
944 };
945 wdma@3 {
946 cpu {
947 sound-dai = <&abox 11>;
948 };
949 platform {
950 sound-dai = <&abox_wdma_3>;
951 };
952 codec {
953 sound-dai = <&dummy_audio_codec>;
954 };
955 };
956 wdma@4 {
957 cpu {
958 sound-dai = <&abox 12>;
959 };
960 platform {
961 sound-dai = <&abox_wdma_4>;
962 };
963 codec {
964 sound-dai = <&dummy_audio_codec>;
965 };
966 };
967 /** ToDo: enable dp_audio link after enabling DP Audio
968 * dp_audio@0 {
969 * cpu {
970 * sound-dai = <&dummy_audio_cpu>;
971 * };
972 * codec {
973 * sound-dai = <&dummy_audio_codec>;
974 * };
975 * };
976 */
977 uaif@0 {
978 format = "i2s";
979 cpu {
980 sound-dai = <&abox_uaif_0>;
981 };
982 codec {
983 sound-dai = <&cs47l35 0>;
984 };
985 };
986 uaif@1 {
987 format = "i2s";
988 cpu {
989 sound-dai = <&abox_uaif_1>;
990 };
991 codec {
992 sound-dai = <&dummy_audio_codec>;
993 };
994 };
995 uaif@2 {
996 format = "i2s";
997 cpu {
998 sound-dai = <&abox_uaif_2>;
999 };
1000 codec {
1001 sound-dai = <&cs47l35 2>;
1002 };
1003 };
1004 uaif@4 {
1005 format = "i2s";
1006 bitclock-master;
1007 frame-master;
1008 cpu {
1009 sound-dai = <&abox_uaif_4>;
1010 };
1011 codec {
1012 sound-dai = <&dummy_audio_codec>;
1013 };
1014 };
1015 dsif@0 {
1016 format = "pdm";
1017 cpu {
1018 sound-dai = <&abox_dsif>;
1019 };
1020 codec {
1021 sound-dai = <&dummy_audio_codec>;
1022 };
1023 };
1024 spdy@0 {
1025 cpu {
1026 sound-dai = <&abox_spdy>;
1027 };
1028 codec {
1029 sound-dai = <&dummy_audio_codec>;
1030 };
1031 };
1032 sifs0@0 {
1033 cpu {
1034 sound-dai = <&abox 13>;
1035 };
1036 codec {
1037 sound-dai = <&dummy_audio_codec>;
1038 };
1039 };
1040 sifs1@0 {
1041 cpu {
1042 sound-dai = <&abox 14>;
1043 };
1044 codec {
1045 sound-dai = <&dummy_audio_codec>;
1046 };
1047 };
1048 sifs2@0 {
1049 cpu {
1050 sound-dai = <&abox 15>;
1051 };
1052 codec {
1053 sound-dai = <&dummy_audio_codec>;
1054 };
1055 };
1056
1057 codec-left-amp@0 {
1058 format = "i2s";
1059
1060 cpu {
1061 sound-dai = <&cs47l35 1>;
1062 };
1063 codec {
1064 sound-dai = <&cs35l41_left 0>;
1065 };
1066 };
1067
1068 cpu-dsp-voice-control@0 {
1069 cpu {
1070 sound-dai = <&cs47l35 3>;
1071 };
1072 codec {
1073 sound-dai = <&dummy_audio_codec>;
1074 };
1075 };
1076
1077 cpu-dsp-trace@0 {
1078 cpu {
1079 sound-dai = <&cs47l35 4>;
1080 };
1081 codec {
1082 sound-dai = <&dummy_audio_codec>;
1083 };
1084 };
1085
1086 cpu-dsp2-text@0 {
1087 cpu {
1088 sound-dai = <&cs47l35 5>;
1089 };
1090 codec {
1091 sound-dai = <&dummy_audio_codec>;
1092 };
1093 };
1094
1095 cpu-dsp3-text@0 {
1096 cpu {
1097 sound-dai = <&cs47l35 6>;
1098 };
1099 codec {
1100 sound-dai = <&dummy_audio_codec>;
1101 };
1102 };
1103
1104 cpu-dsp1-text@0 {
1105 cpu {
1106 sound-dai = <&cs47l35 7>;
1107 };
1108 codec {
1109 sound-dai = <&dummy_audio_codec>;
1110 };
1111 };
1112 };
1113 }; /* end of __overlay__ */
1114 }; /* end of fragment */
1115 }; /* end of root */
1116
1117 &i2c_0 {
1118 #address-cells = <1>;
1119 #size-cells = <0>;
1120 status = "okay";
1121 s2mu106-fuelgauge@3B {
1122 compatible = "samsung,s2mu106-fuelgauge";
1123 reg = <0x3B>;
1124 pinctrl-names = "default";
1125 pinctrl-0 = <&fuel_irq>;
1126 fuelgauge,fuel_int = <&gpa2 3 0>;
1127 fuelgauge,fuel_alert_vol = <3400>;
1128 fuelgauge,fuel_alert_soc = <1>;
1129 fuelgauge,type_str = "SDI";
1130 fuelgauge,model_type = <1>;
1131 };
1132
1133 usbpd-s2mu106@3C {
1134 compatible = "sec-usbpd,i2c";
1135 reg = <0x3C>;
1136 pinctrl-names = "default";
1137 pinctrl-0 = <&usbpd_irq>;
1138 usbpd,usbpd_int = <&gpa2 2 0>;
1139
1140 pdic-manager {
1141 /* sink */
1142 pdic,max_power = <5000>;
1143 pdic,op_power = <2500>;
1144 pdic,max_voltage = <6000>;
1145 pdic,max_current = <2000>;
1146 pdic,min_current = <500>;
1147
1148 pdic,giveback = <0>;
1149 pdic,usb_com_capable = <1>;
1150 pdic,no_usb_suspend = <1>;
1151
1152 /* source */
1153 source,max_voltage = <5000>;
1154 source,min_voltage = <4000>;
1155 source,max_power = <2500>;
1156
1157 /* sink cap */
1158 sink,capable_max_voltage = <9000>;
1159 };
1160 };
1161 };
1162
1163 &i2c_1 {
1164 #address-cells = <1>;
1165 #size-cells = <0>;
1166 status = "okay";
1167 s2mu106@3d {
1168 compatible = "samsung,s2mu106mfd";
1169 reg = <0x3d>;
1170 pinctrl-names = "default";
1171 pinctrl-0 = <&if_pmic_irq>;
1172 s2mu106,irq-gpio = <&gpa2 1 0>;
1173 s2mu106,wakeup;
1174
1175 muic {
1176 status = "okay";
1177 muic,uart_addr = "11850000.pinctrl";
1178 muic,uart_rxd = "gpq0-3";
1179 muic,uart_txd = "gpq0-4";
1180 };
1181 };
1182
1183 s2mu106-haptic {
1184 status = "okay";
1185 haptic,pwm_id = <1>;
1186 haptic,operation_mode = <2>; /* 0 : ERM_I2C, 1 : ERM_GPIO, 2 : LRA */
1187 haptic,hbst_en;
1188 haptic,hbst_automode;
1189 haptic,boost_level = <5000>;
1190 };
1191
1192 s2mcs02-charger@41 {
1193 compatible = "samsung,s2mcs02-charger";
1194 reg = <0x41>;
1195 default-clk = <100000000>;
1196 };
1197
1198 flash_led {
1199 /* Change here if you want to use FLED_EN pin
1200 fled-en1-gpio = <&gpg1 2 0>;
1201 fled-en2-gpio = <&gpg1 2 0>;
1202 fled-en3-gpio = <&gpg1 2 0>;
1203 fled-en4-gpio = <&gpg1 2 0>;
1204 */
1205 status = "okay";
1206 default_current = <50>;
1207 max_current = <200>;
1208 default_timer = <0>;
1209
1210 s2mu106-channel1 {
1211 id = <0>;
1212 /*
1213 current = <100>;
1214 timer = <200>;
1215 */
1216 };
1217
1218 s2mu106-channel2 {
1219 id = <1>;
1220 /*
1221 current = <100>;
1222 timer = <200>;
1223 */
1224 };
1225
1226 s2mu106-channel3 {
1227 id = <2>;
1228 /*
1229 current = <100>;
1230 timer = <200>;
1231 */
1232 };
1233 };
1234
1235 s2mu106-charger {
1236 status = "okay";
1237 battery,charger_name = "s2mu106-charger";
1238 battery,chg_gpio_en = <0>;
1239 battery,chg_polarity_en = <0>;
1240 battery,chg_gpio_status = <0>;
1241 battery,chg_polarity_status = <0>;
1242 battery,chg_float_voltage = <4350>;
1243 battery,chg_recharge_vcell = <4250>;
1244 battery,chg_full_vcell = <4300>;
1245 battery,full_check_type = <2>;
1246 battery,full_check_type_2nd = <2>;
1247 battery,input_current_limit = <
1248 500 450 500 1200 500 1200 1200 1000 1000 1000
1249 1000 500 500 1200 1000 500 450>;
1250 battery,fast_charging_current = <
1251 500 450 500 1200 500 1200 1200 1000 1000 1000
1252 1000 500 500 1200 1000 500 450>;
1253 battery,full_check_current_1st = <
1254 300 0 300 300 300 300 300 300 300 300
1255 300 300 300 300 300 300 0>;
1256 battery,full_check_current_2nd = <
1257 100 0 100 100 100 100 100 100 100 100
1258 100 100 100 100 100 100 0>;
1259 };
1260 };
1261
1262 &exynos_adc {
1263 status = "okay";
1264 cpu_thermistor {
1265 compatible = "murata,ncp03wf104";
1266 status = "okay";
1267 pullup-uv = <1800000>;
1268 pullup-ohm = <100000>;
1269 pulldown-ohm = <0>;
1270 io-channels = <&exynos_adc 0>;
1271 io-channel-names = "cpu_therm";
1272 };
1273 battery_thermistor {
1274 compatible = "murata,ncp15xh103";
1275 status = "okay";
1276 pullup-uv = <1800000>;
1277 pullup-ohm = <100000>;
1278 pulldown-ohm = <0>;
1279 io-channels = <&exynos_adc 1>;
1280 io-channel-names = "bat_therm";
1281 };
1282 pa_thermistor {
1283 compatible = "murata,ncp15xh103";
1284 status = "okay";
1285 pullup-uv = <1800000>;
1286 pullup-ohm = <0>;
1287 pulldown-ohm = <10000>;
1288 io-channels = <&exynos_adc 4>;
1289 io-channel-names = "pa_therm";
1290 connected-positive;
1291 };
1292 board_thermistor {
1293 compatible = "murata,ncp03wf104";
1294 status = "okay";
1295 pullup-uv = <1800000>;
1296 pullup-ohm = <100000>;
1297 pulldown-ohm = <0>;
1298 io-channels = <&exynos_adc 7>;
1299 io-channel-names = "board_therm";
1300 };
1301 usb_con_thermistor {
1302 compatible = "murata,ncp03wf104";
1303 status = "okay";
1304 pullup-uv = <1800000>;
1305 pullup-ohm = <100000>;
1306 pulldown-ohm = <0>;
1307 io-channels = <&exynos_adc 8>;
1308 io-channel-names = "usb_con_therm";
1309 };
1310 };
1311
1312 &i2c_2 {
1313 #address-cells = <1>;
1314 #size-cells = <0>;
1315 status = "okay";
1316
1317 samsung,i2c-max-bus-freq = <600000>;
1318
1319 sec-nfc@27 {
1320 compatible = "sec-nfc";
1321 reg = <0x27>;
1322
1323 sec-nfc,ven-gpio = <&gpg0 0 0>;
1324 sec-nfc,firm-gpio = <&gpg0 2 0>;
1325
1326 sec-nfc,irq-gpio = <&gpa1 2 0>;
1327 sec-nfc,clk_req-gpio = <&gpg0 1 0>;
1328 sec-nfc,ldo_en = <&gpm22 0 0>;
1329
1330 clock-names = "OSC_NFC";
1331 clocks = <&clock OSC_NFC>;
1332 pinctrl-names = "default";
1333 pinctrl-0 = <&xclkout1>;
1334 };
1335 };
1336
1337 &sec_pwm {
1338 status = "okay";
1339 pinctrl-names = "default";
1340 pinctrl-0 = <&motor_pwm>;
1341 };
1342
1343
1344 &fmp_0 {
1345 exynos,block-type = "sda";
1346 exynos,fips-block_offset = <5>;
1347 };
1348
1349 &contexthub_0 {
1350 /* chub irq pin lists */
1351 chub-irq-pin = <162>;
1352 clocks =
1353 /* SHUB */
1354 <&clock UMUX_CLKCMU_SHUB_BUS>,
1355 /* MAG. SENSOR : AK09918C */
1356 <&clock CMGP01_USI>,
1357 /* PROX. SENSOR : TMD3702 */
1358 <&clock CMGP03_USI>,
1359 /* ALS SENSOR : BH1726 */
1360 <&clock CMGP_I2C>;
1361 clock-names =
1362 "chub_bus",
1363 "cmgp_usi01",
1364 "cmgp_usi03",
1365 "cmgp_i2c";
1366 os-type = "os.checked_0.bin";
1367 };
1368
1369 &pinctrl_0 {
1370 pmic_irq: pmic-irq {
1371 samsung,pins = "gpa2-0";
1372 samsung,pin-pud = <3>;
1373 samsung,pin-drv = <3>;
1374 };
1375
1376 sub_pmic_irq: sub-pmic-irq {
1377 samsung,pins = "gpa1-3";
1378 samsung,pin-function = <0>;
1379 samsung,pin-pud = <0>;
1380 samsung,pin-drv = <0>;
1381 };
1382
1383
1384 key_voldown: key-voldown {
1385 samsung,pins = "gpa1-6";
1386 samsung,pin-function = <0xf>;
1387 samsung,pin-pud = <0>;
1388 samsung,pin-drv = <0>;
1389 };
1390
1391 key_volup: key-volup {
1392 samsung,pins = "gpa1-5";
1393 samsung,pin-function = <0xf>;
1394 samsung,pin-pud = <0>;
1395 samsung,pin-drv = <0>;
1396 };
1397
1398 key_power: key-power {
1399 samsung,pins = "gpa1-7";
1400 samsung,pin-function = <0xf>;
1401 samsung,pin-pud = <0>;
1402 samsung,pin-drv = <0>;
1403 };
1404
1405 dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq {
1406 samsung,pins = "gpa0-7";
1407 samsung,pin-function = <0xf>;
1408 samsung,pin-pud = <0>;
1409 samsung,pin-drv = <3>;
1410 };
1411
1412 attn_irq: attn-irq {
1413 samsung,pins = "gpa2-4";
1414 samsung,pin-function = <0xf>;
1415 samsung,pin-pud = <0>;
1416 samsung,pin-drv = <0>;
1417 };
1418
1419 attn_input: attn-input {
1420 samsung,pins = "gpa2-4";
1421 samsung,pin-function = <0>;
1422 samsung,pin-pud = <1>;
1423 };
1424
1425 if_pmic_irq: if-pmic-irq {
1426 samsung,pins = "gpa2-1";
1427 samsung,pin-function = <0>;
1428 samsung,pin-pud = <0>;
1429 samsung,pin-drv = <0>;
1430 };
1431
1432 fuel_irq: fuel-irq {
1433 samsung,pins = "gpa2-3";
1434 samsung,pin-function = <0>;
1435 samsung,pin-pud = <0>;
1436 samsung,pin-drv = <0>;
1437 };
1438
1439 usbpd_irq: usbpd-irq {
1440 samsung,pins = "gpa2-2";
1441 samsung,pin-function = <0xf>;
1442 samsung,pin-pud = <3>;
1443 samsung,pin-drv = <3>;
1444 };
1445 /* TODO: Need to check pin number
1446 small_charger_irq: small-charger-irq {
1447 samsung,pins = "gpa2-5";
1448 samsung,pin-function = <0>;
1449 samsung,pin-pud = <0>;
1450 samsung,pin-drv = <0>;
1451 };
1452 */
1453 cap_int_status: cap_int_status {
1454 samsung,pins = "gpa2-6";
1455 samsung,pin-function = <0>;
1456 samsung,pin-val = <1>;
1457 samsung,pin-pud = <1>;
1458 };
1459 };
1460
1461 &pinctrl_4 {
1462 /* Warm reset information from AP */
1463 pm_wrsti: pm-wrsti {
1464 samsung,pins = "gpg0-7";
1465 samsung,pin-con-pdn = <3>;
1466 };
1467
1468 motor_pwm: motor_pwm {
1469 samsung,pins = "gpg4-2";
1470 samsung,pin-function = <2>;
1471 samsung,pin-pud = <1>;
1472 samsung,pin-drv = <0>;
1473 };
1474
1475 vdd_on: vdd-on {
1476 samsung,pins ="gpg3-4";
1477 samsung,pin-function = <1>;
1478 samsung,pin-val = <1>;
1479 samsung,pin-pud = <3>;
1480 };
1481
1482 vdd_off: vdd-off {
1483 samsung,pins ="gpg3-4";
1484 samsung,pin-function = <0>;
1485 samsung,pin-val = <0>;
1486 samsung,pin-pud = <1>;
1487 };
1488
1489 lcd_reset: lcd_reset {
1490 samsung,pins = "gpg1-4";
1491 samsung,pin-function = <1>;
1492 samsung,pin-pud = <3>;
1493 samsung,pin-val = <1>;
1494 samsung,pin-con-pdn =<3>;
1495 samsung,pin-pud-pdn = <3>;
1496 };
1497
1498 codec_reset: codec-reset {
1499 samsung,pins ="gpg3-2";
1500 samsung,pin-pud = <0>;
1501 samsung,pin-con-pdn =<3>;
1502 samsung,pin-pud-pdn = <0>;
1503 };
1504
1505 codec_en: codec_en {
1506 samsung,pins = "gpg1-1";
1507 samsung,pin-function = <1>;
1508 samsung,pin-pud = <3>;
1509 samsung,pin-val = <1>;
1510 samsung,pin-con-pdn =<3>;
1511 samsung,pin-pud-pdn = <3>;
1512 };
1513
1514 pa_reset: pa-reset {
1515 samsung,pins ="gpg3-3";
1516 samsung,pin-con-pdn =<3>;
1517 samsung,pin-pud-pdn = <3>;
1518 };
1519 };
1520
1521 &udc {
1522 status = "okay";
1523 };
1524
1525 &usbdrd_dwc3 {
1526 dr_mode = "otg";
1527 maximum-speed = "high-speed";
1528 };
1529
1530 &usbdrd_phy {
1531 status = "okay";
1532 usb3phy-isolation = <1>;
1533
1534 hs_tune_param = <&usb_hs_tune>;
1535 };
1536
1537 &usbdrd3_phy {
1538 status = "okay";
1539 usb3phy-isolation = <1>;
1540
1541 hs_tune_param = <&usb3_hs_tune>;
1542 ss_tune_param = <&usb3_ss_tune>;
1543 };
1544
1545 &serial_0 {
1546 status = "okay";
1547 };
1548
1549 &dsim_0 {
1550 lcd_info = <&nt36672a>;
1551 /* reset, lcd_bias_enp, lcd_bias_enn, lcd_bl_en*/
1552 gpios = <&gpg1 4 0x1>, <&gpg3 1 0x1>, <&gpg3 0 0x1>, <&gpg2 1 0x1>;
1553 pinctrl-names = "lcd_reset";
1554 pinctrl-0 = <&lcd_reset>;
1555 };
1556
1557 /* USI_0_SHUB */
1558 &usi_0_shub {
1559 usi_v2_mode = "spi";
1560 status = "okay";
1561 };
1562
1563 /* USI_SHUB_0_I2C */
1564 &usi_0_shub_i2c {
1565 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1566 status = "disabled";
1567 };
1568
1569 /* USI_0_CMGP */
1570 &usi_0_cmgp {
1571 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1572 usi_v2_mode = "i2c";
1573 status = "okay";
1574 };
1575
1576 /* USI_0_CMGP_I2C */
1577 &usi_0_cmgp_i2c {
1578 usi_v2_mode = "i2c";
1579 status = "okay";
1580 };
1581
1582 /* USI_1_CMGP */
1583 &usi_1_cmgp {
1584 usi_v2_mode = "i2c";
1585 status = "okay";
1586 };
1587
1588 /* USI_1_CMGP_I2C */
1589 &usi_1_cmgp_i2c {
1590 usi_v2_mode = "i2c";
1591 status = "okay";
1592 };
1593
1594 /* USI_2_CMGP */
1595 &usi_2_cmgp {
1596 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1597 usi_v2_mode = "i2c";
1598 status = "okay";
1599 };
1600
1601 /* USI_2_CMGP_I2C */
1602 &usi_2_cmgp_i2c {
1603 usi_v2_mode = "i2c";
1604 status = "okay";
1605 };
1606
1607 /* USI_3_CMGP */
1608 &usi_3_cmgp {
1609 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1610 status = "disabled";
1611 };
1612
1613 /* USI_3_CMGP_I2C */
1614 &usi_3_cmgp_i2c {
1615 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1616 status = "disabled";
1617 };
1618
1619 /* USI_4_CMGP */
1620 &usi_4_cmgp {
1621 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1622 status = "disabled";
1623 };
1624
1625 /* USI_4_CMGP_I2C */
1626 &usi_4_cmgp_i2c {
1627 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1628 status = "disabled";
1629 };
1630
1631 /* USI_PERI_UART */
1632 &usi_peri_uart {
1633 usi_v2_mode = "uart";
1634 status = "okay";
1635 };
1636
1637 /* USI_PERI_CAMI2C_0 */
1638 &usi_peri_cami2c_0 {
1639 usi_v2_mode = "i2c";
1640 status = "okay";
1641 };
1642
1643 /* USI_PERI_CAMI2C_1 */
1644 &usi_peri_cami2c_1 {
1645 usi_v2_mode = "i2c";
1646 status = "okay";
1647 };
1648
1649 /* USI_PERI_CAMI2C_2 */
1650 &usi_peri_cami2c_2 {
1651 usi_v2_mode = "i2c";
1652 status = "okay";
1653 };
1654
1655 /* USI_PERI_CAMI2C_3 */
1656 &usi_peri_cami2c_3 {
1657 usi_v2_mode = "i2c";
1658 status = "okay";
1659 };
1660
1661 /* USI_PERI_SPI_0 */
1662 &usi_peri_spi_0 {
1663 usi_v2_mode = "spi";
1664 status = "okay";
1665 };
1666
1667 /* USI_PERI_SPI_1 */
1668 &usi_peri_spi_1 {
1669 usi_v2_mode = "spi";
1670 status = "okay";
1671 };
1672
1673 /* USI_PERI_USI_0 */
1674 &usi_peri_usi_0 {
1675 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1676 status = "disabled";
1677 };
1678
1679 /* USI_PERI_USI_0_I2C */
1680 &usi_peri_usi_0_i2c {
1681 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1682 status = "disabled";
1683 };
1684
1685 /* USI_PERI_SPI_2 */
1686 &usi_peri_spi_2 {
1687 usi_v2_mode = "spi";
1688 status = "okay";
1689 };
1690
1691 &spi_6 {
1692 status = "okay";
1693 pinctrl-names = "default";
1694 pinctrl-0 = <&spi6_bus &spi6_cs_func &pa_reset>;
1695 /*cs-gpios = <&gpp2 3 0>;*/
1696 /*gpp2[3]*/
1697 /*num-cs = <1>;*/
1698 #address-cells = <1>;
1699 #size-cells = <0>;
1700 cs35l41_left: cs35l41@0 {
1701 compatible = "cirrus,cs35l41";
1702 reg = <0x0>;
1703
1704 spi-max-frequency = <9600000>;
1705
1706 interrupts = <2 0 0>;
1707 interrupt-controller;
1708 interrupt-parent = <&gpa0>;
1709 reset-gpios = <&gpg3 3 0>;
1710 #sound-dai-cells = <1>;
1711
1712 VA-supply = <&l42_reg>;
1713 VP-supply = <&V_SYS>;
1714
1715 cirrus,boost-peak-milliamp = <4500>;
1716 cirrus,boost-ind-nanohenry = <1000>;
1717 cirrus,boost-cap-microfarad = <15>;
1718 cirrus,asp-sdout-hiz = <0x1>;
1719 cirrus,gpio-config2 {
1720 cirrus,gpio-src-select = <0x4>;
1721 cirrus,gpio-output-enable;
1722 };
1723
1724 adsps {
1725 #address-cells = <1>;
1726 #size-cells = <0>;
1727 prince_l_dsp: adsp@2b80000 {
1728 reg = <0x2b80000>;
1729 firmware {
1730 protectionsp_default {
1731 cirrus,full-name;
1732 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1733 cirrus,bin-file = "cs35l41-dsp1-spk-prot-music-aac.bin";
1734 };
1735 protectionsp_music_aac {
1736 cirrus,full-name;
1737 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1738 cirrus,bin-file = "cs35l41-dsp1-spk-prot-music-aac.bin";
1739 };
1740 protectionsp_voice_aac {
1741 cirrus,full-name;
1742 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1743 cirrus,bin-file = "cs35l41-dsp1-spk-prot-voice-aac.bin";
1744 };
1745 protectionsp_ringtone_aac {
1746 cirrus,full-name;
1747 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1748 cirrus,bin-file = "cs35l41-dsp1-spk-prot-ringtone-aac.bin";
1749 };
1750 protectionsp_notification_aac {
1751 cirrus,full-name;
1752 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1753 cirrus,bin-file = "cs35l41-dsp1-spk-prot-notification-aac.bin";
1754 };
1755 protectionsp_music_qisheng {
1756 cirrus,full-name;
1757 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1758 cirrus,bin-file = "cs35l41-dsp1-spk-prot-music-qisheng.bin";
1759 };
1760 protectionsp_voice_qisheng {
1761 cirrus,full-name;
1762 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1763 cirrus,bin-file = "cs35l41-dsp1-spk-prot-voice-qisheng.bin";
1764 };
1765 protectionsp_ringtone_qisheng{
1766 cirrus,full-name;
1767 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1768 cirrus,bin-file = "cs35l41-dsp1-spk-prot-ringtone-qisheng.bin";
1769 };
1770 protectionsp_notification_qisheng {
1771 cirrus,full-name;
1772 cirrus,wmfw-file = "cs35l41-dsp1-prot.wmfw";
1773 cirrus,bin-file = "cs35l41-dsp1-spk-prot-notification-qisheng.bin";
1774 };
1775 calibration_aac {
1776 cirrus,full-name;
1777 cirrus,wmfw-file = "cs35l41-dsp1-diag.wmfw";
1778 cirrus,bin-file = "cs35l41-dsp1-aac-cali.bin";
1779 };
1780 calibration_qisheng{
1781 cirrus,full-name;
1782 cirrus,wmfw-file = "cs35l41-dsp1-diag.wmfw";
1783 cirrus,bin-file = "cs35l41-dsp1-qissheng-cali.bin";
1784 };
1785 };
1786 };
1787 };
1788 controller-data {
1789 /*cs-gpio = <gpm8 0 0>*/
1790 /*cs-gpios = <&gpp2 3 0>;*/
1791 samsung,spi-feedback-delay = <1>;
1792 samsung,spi-chip-select-mode = <0>;
1793 };
1794 };
1795 };
1796
1797 &spi_9 {
1798 pinctrl-names = "default";
1799 pinctrl-0 = <&spi9_bus &spi9_cs_func &codec_en>;
1800 status = "okay";
1801 #address-cells = <1>;
1802 #size-cells = <0>;
1803 cs47l35: cs47l35@0 {
1804 compatible = "cirrus,cs47l35";
1805 reg = <0x0>;
1806
1807 spi-max-frequency = <11000000>;
1808
1809 interrupts = <6 8 0>;
1810 interrupt-controller;
1811 #interrupt-cells = <2>;
1812 interrupt-parent = <&gpa0>;
1813 gpio-controller;
1814 #gpio-cells = <2>;
1815 #sound-dai-cells = <1>;
1816
1817 AVDD-supply = <&l42_reg>;
1818 DBVDD1-supply = <&l42_reg>;
1819 DBVDD2-supply = <&l42_reg>;
1820 CPVDD1-supply = <&l42_reg>;
1821 /*Not used LDO44*/
1822 /*CPVDD2-supply = <&l44_reg>;*/
1823 /*DCVDD-supply = <&l44_reg>;*/
1824 SPKVDD-supply = <&V_SYS>;
1825
1826 reset-gpios = <&gpg3 2 0>;
1827
1828 cirrus,dmic-ref = <0 0 0>;
1829 cirrus,inmode = <
1830 0 0 0 0 /* IN1 */
1831 0 0 0 0 /* IN2 */
1832 >;
1833
1834 cirrus,gpsw = <1 0>;
1835
1836 pinctrl-names = "probe", "active";
1837 pinctrl-0 = <&codec_reset>;
1838 pinctrl-1 = <&codec_reset &cs47l35_defaults>;
1839
1840 madera_pinctrl: madera-pinctrl {
1841 compatible = "cirrus,madera-pinctrl";
1842 cs47l35_defaults: cs47l35-gpio-defaults {
1843 aif1 {
1844 groups = "aif1";
1845 function = "aif1";
1846 bias-bus-hold;
1847 };
1848
1849 aif2 {
1850 groups = "aif2";
1851 function = "aif2";
1852 bias-bus-hold;
1853 };
1854
1855 aif3 {
1856 groups = "aif3";
1857 function = "aif3";
1858 bias-bus-hold;
1859 };
1860
1861 gpio6 { /* Amp Clock */
1862 groups = "gpio6";
1863 function = "opclk";
1864 bias-pull-up;
1865 output-low;
1866 };
1867
1868 gpio5 { /* Mic Polarity Flip */
1869 groups = "gpio5";
1870 function = "io";
1871 };
1872 };
1873 };
1874
1875
1876 micvdd {
1877 regulator-min-microvolt = <3000000>;
1878 regulator-max-microvolt = <3000000>;
1879 };
1880
1881 MICBIAS1 {
1882 regulator-min-microvolt = <2800000>;
1883 regulator-max-microvolt = <2800000>;
1884 cirrus,ext-cap = <1>;
1885 };
1886 MICBIAS1A {
1887 regulator-active-discharge = <1>;
1888 };
1889 MICBIAS1B {
1890 regulator-active-discharge = <1>;
1891 };
1892
1893 MICBIAS2 {
1894 regulator-min-microvolt = <2800000>;
1895 regulator-max-microvolt = <2800000>;
1896 cirrus,ext-cap = <1>;
1897 };
1898
1899 MICBIAS2A {
1900 regulator-active-discharge = <1>;
1901 };
1902 MICBIAS2B {
1903 regulator-active-discharge = <1>;
1904 };
1905
1906 cirrus,accdet {
1907 #address-cells = <1>;
1908 #size-cells = <0>;
1909
1910 acc@1 {
1911 reg = <1>;
1912
1913 cirrus,micd-configs = <
1914 0 0 2 0 0
1915 >;
1916 cirrus,micd-bias-start-time = <8>;
1917 cirrus,micd-rate = <6>;
1918 /*cirrus,micd-pol-gpios = <&cs47l35 4 0>;*/
1919 cirrus,micd-detect-debounce-ms = <500>;
1920 /*cirrus,jd-use-jd2;*/
1921 /*cirrus,micd-clamp-mode = <0x8>;*/
1922 };
1923 };
1924
1925 adsps {
1926 #address-cells = <1>;
1927 #size-cells = <0>;
1928 adsp@17fe00 {
1929 reg = <0x17fe00>;
1930 firmware {
1931 frontend {
1932 wlf,wmfw-file = "marley-dsp2-aov-frontend.wmfw";
1933 wlf,bin-file = "marley-dsp2-aov-vrgain.bin";
1934 };
1935 };
1936 };
1937 adsp@1ffe00 {
1938 reg = <0x1ffe00>;
1939 firmware {
1940 aov {
1941 wlf,wmfw-file = "marley-dsp3-aov-control.wmfw";
1942 wlf,bin-file = "marley-dsp3-aov-model.bin";
1943 };
1944 };
1945 };
1946 };
1947
1948 controller-data {
1949 samsung,spi-feedback-delay = <1>;
1950 samsung,spi-chip-select-mode = <0>;
1951 };
1952 };
1953 };