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USB: otg: add otg_put_transceiver()
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / arch / arm / plat-omap / usb.c
1 /*
2 * arch/arm/plat-omap/usb.c -- platform level USB initialization
3 *
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #undef DEBUG
22
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/platform_device.h>
29 #include <linux/usb/otg.h>
30 #include <linux/io.h>
31
32 #include <asm/irq.h>
33 #include <asm/system.h>
34 #include <mach/hardware.h>
35
36 #include <mach/control.h>
37 #include <mach/mux.h>
38 #include <mach/usb.h>
39 #include <mach/board.h>
40
41 #ifdef CONFIG_ARCH_OMAP1
42
43 #define INT_USB_IRQ_GEN IH2_BASE + 20
44 #define INT_USB_IRQ_NISO IH2_BASE + 30
45 #define INT_USB_IRQ_ISO IH2_BASE + 29
46 #define INT_USB_IRQ_HGEN INT_USB_HHC_1
47 #define INT_USB_IRQ_OTG IH2_BASE + 8
48
49 #else
50
51 #define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
52 #define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
53 #define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
54 #define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
55 #define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
56
57 #endif
58
59
60 /* These routines should handle the standard chip-specific modes
61 * for usb0/1/2 ports, covering basic mux and transceiver setup.
62 *
63 * Some board-*.c files will need to set up additional mux options,
64 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
65 */
66
67 /* TESTED ON:
68 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
69 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
70 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
71 * - 1510 Innovator UDC with bundled usb0 cable
72 * - 1510 Innovator OHCI with bundled usb1/usb2 cable
73 * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
74 * - 1710 custom development board using alternate pin group
75 * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
76 */
77
78 /*-------------------------------------------------------------------------*/
79
80 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
81
82 static struct otg_transceiver *xceiv;
83
84 /**
85 * otg_get_transceiver - find the (single) OTG transceiver driver
86 *
87 * Returns the transceiver driver, after getting a refcount to it; or
88 * null if there is no such transceiver. The caller is responsible for
89 * releasing that count.
90 */
91 struct otg_transceiver *otg_get_transceiver(void)
92 {
93 if (xceiv)
94 get_device(xceiv->dev);
95 return xceiv;
96 }
97 EXPORT_SYMBOL(otg_get_transceiver);
98
99 void otg_put_transceiver(struct otg_transceiver *x)
100 {
101 put_device(x->dev);
102 }
103 EXPORT_SYMBOL(otg_put_transceiver);
104
105 int otg_set_transceiver(struct otg_transceiver *x)
106 {
107 if (xceiv && x)
108 return -EBUSY;
109 xceiv = x;
110 return 0;
111 }
112 EXPORT_SYMBOL(otg_set_transceiver);
113
114 #endif
115
116 /*-------------------------------------------------------------------------*/
117
118 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
119
120 static void omap2_usb_devconf_clear(u8 port, u32 mask)
121 {
122 u32 r;
123
124 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
125 r &= ~USBTXWRMODEI(port, mask);
126 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
127 }
128
129 static void omap2_usb_devconf_set(u8 port, u32 mask)
130 {
131 u32 r;
132
133 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
134 r |= USBTXWRMODEI(port, mask);
135 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
136 }
137
138 static void omap2_usb2_disable_5pinbitll(void)
139 {
140 u32 r;
141
142 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
143 r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
144 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
145 }
146
147 static void omap2_usb2_enable_5pinunitll(void)
148 {
149 u32 r;
150
151 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
152 r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
153 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
154 }
155
156 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
157 {
158 u32 syscon1 = 0;
159
160 if (cpu_is_omap24xx())
161 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
162
163 if (nwires == 0) {
164 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
165 u32 l;
166
167 /* pulldown D+/D- */
168 l = omap_readl(USB_TRANSCEIVER_CTRL);
169 l &= ~(3 << 1);
170 omap_writel(l, USB_TRANSCEIVER_CTRL);
171 }
172 return 0;
173 }
174
175 if (is_device) {
176 if (cpu_is_omap24xx())
177 omap_cfg_reg(J20_24XX_USB0_PUEN);
178 else
179 omap_cfg_reg(W4_USB_PUEN);
180 }
181
182 /* internal transceiver (unavailable on 17xx, 24xx) */
183 if (!cpu_class_is_omap2() && nwires == 2) {
184 u32 l;
185
186 // omap_cfg_reg(P9_USB_DP);
187 // omap_cfg_reg(R8_USB_DM);
188
189 if (cpu_is_omap15xx()) {
190 /* This works on 1510-Innovator */
191 return 0;
192 }
193
194 /* NOTES:
195 * - peripheral should configure VBUS detection!
196 * - only peripherals may use the internal D+/D- pulldowns
197 * - OTG support on this port not yet written
198 */
199
200 l = omap_readl(USB_TRANSCEIVER_CTRL);
201 l &= ~(7 << 4);
202 if (!is_device)
203 l |= (3 << 1);
204 omap_writel(l, USB_TRANSCEIVER_CTRL);
205
206 return 3 << 16;
207 }
208
209 /* alternate pin config, external transceiver */
210 if (cpu_is_omap15xx()) {
211 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
212 return 0;
213 }
214
215 if (cpu_is_omap24xx()) {
216 omap_cfg_reg(K18_24XX_USB0_DAT);
217 omap_cfg_reg(K19_24XX_USB0_TXEN);
218 omap_cfg_reg(J14_24XX_USB0_SE0);
219 if (nwires != 3)
220 omap_cfg_reg(J18_24XX_USB0_RCV);
221 } else {
222 omap_cfg_reg(V6_USB0_TXD);
223 omap_cfg_reg(W9_USB0_TXEN);
224 omap_cfg_reg(W5_USB0_SE0);
225 if (nwires != 3)
226 omap_cfg_reg(Y5_USB0_RCV);
227 }
228
229 /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
230 * may be able to use I2C requests to set those bits along
231 * with VBUS switching and overcurrent detection.
232 */
233
234 if (cpu_class_is_omap1() && nwires != 6) {
235 u32 l;
236
237 l = omap_readl(USB_TRANSCEIVER_CTRL);
238 l &= ~CONF_USB2_UNI_R;
239 omap_writel(l, USB_TRANSCEIVER_CTRL);
240 }
241
242 switch (nwires) {
243 case 3:
244 syscon1 = 2;
245 if (cpu_is_omap24xx())
246 omap2_usb_devconf_set(0, USB_BIDIR);
247 break;
248 case 4:
249 syscon1 = 1;
250 if (cpu_is_omap24xx())
251 omap2_usb_devconf_set(0, USB_BIDIR);
252 break;
253 case 6:
254 syscon1 = 3;
255 if (cpu_is_omap24xx()) {
256 omap_cfg_reg(J19_24XX_USB0_VP);
257 omap_cfg_reg(K20_24XX_USB0_VM);
258 omap2_usb_devconf_set(0, USB_UNIDIR);
259 } else {
260 u32 l;
261
262 omap_cfg_reg(AA9_USB0_VP);
263 omap_cfg_reg(R9_USB0_VM);
264 l = omap_readl(USB_TRANSCEIVER_CTRL);
265 l |= CONF_USB2_UNI_R;
266 omap_writel(l, USB_TRANSCEIVER_CTRL);
267 }
268 break;
269 default:
270 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
271 0, nwires);
272 }
273 return syscon1 << 16;
274 }
275
276 static u32 __init omap_usb1_init(unsigned nwires)
277 {
278 u32 syscon1 = 0;
279
280 if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
281 u32 l;
282
283 l = omap_readl(USB_TRANSCEIVER_CTRL);
284 l &= ~CONF_USB1_UNI_R;
285 omap_writel(l, USB_TRANSCEIVER_CTRL);
286 }
287 if (cpu_is_omap24xx())
288 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
289
290 if (nwires == 0)
291 return 0;
292
293 /* external transceiver */
294 if (cpu_class_is_omap1()) {
295 omap_cfg_reg(USB1_TXD);
296 omap_cfg_reg(USB1_TXEN);
297 if (nwires != 3)
298 omap_cfg_reg(USB1_RCV);
299 }
300
301 if (cpu_is_omap15xx()) {
302 omap_cfg_reg(USB1_SEO);
303 omap_cfg_reg(USB1_SPEED);
304 // SUSP
305 } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
306 omap_cfg_reg(W13_1610_USB1_SE0);
307 omap_cfg_reg(R13_1610_USB1_SPEED);
308 // SUSP
309 } else if (cpu_is_omap1710()) {
310 omap_cfg_reg(R13_1710_USB1_SE0);
311 // SUSP
312 } else if (cpu_is_omap24xx()) {
313 /* NOTE: board-specific code must set up pin muxing for usb1,
314 * since each signal could come out on either of two balls.
315 */
316 } else {
317 pr_debug("usb%d cpu unrecognized\n", 1);
318 return 0;
319 }
320
321 switch (nwires) {
322 case 2:
323 if (!cpu_is_omap24xx())
324 goto bad;
325 /* NOTE: board-specific code must override this setting if
326 * this TLL link is not using DP/DM
327 */
328 syscon1 = 1;
329 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
330 break;
331 case 3:
332 syscon1 = 2;
333 if (cpu_is_omap24xx())
334 omap2_usb_devconf_set(1, USB_BIDIR);
335 break;
336 case 4:
337 syscon1 = 1;
338 if (cpu_is_omap24xx())
339 omap2_usb_devconf_set(1, USB_BIDIR);
340 break;
341 case 6:
342 if (cpu_is_omap24xx())
343 goto bad;
344 syscon1 = 3;
345 omap_cfg_reg(USB1_VP);
346 omap_cfg_reg(USB1_VM);
347 if (!cpu_is_omap15xx()) {
348 u32 l;
349
350 l = omap_readl(USB_TRANSCEIVER_CTRL);
351 l |= CONF_USB1_UNI_R;
352 omap_writel(l, USB_TRANSCEIVER_CTRL);
353 }
354 break;
355 default:
356 bad:
357 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
358 1, nwires);
359 }
360 return syscon1 << 20;
361 }
362
363 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
364 {
365 u32 syscon1 = 0;
366
367 if (cpu_is_omap24xx()) {
368 omap2_usb2_disable_5pinbitll();
369 alt_pingroup = 0;
370 }
371
372 /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
373 if (alt_pingroup || nwires == 0)
374 return 0;
375
376 if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
377 u32 l;
378
379 l = omap_readl(USB_TRANSCEIVER_CTRL);
380 l &= ~CONF_USB2_UNI_R;
381 omap_writel(l, USB_TRANSCEIVER_CTRL);
382 }
383
384 /* external transceiver */
385 if (cpu_is_omap15xx()) {
386 omap_cfg_reg(USB2_TXD);
387 omap_cfg_reg(USB2_TXEN);
388 omap_cfg_reg(USB2_SEO);
389 if (nwires != 3)
390 omap_cfg_reg(USB2_RCV);
391 /* there is no USB2_SPEED */
392 } else if (cpu_is_omap16xx()) {
393 omap_cfg_reg(V6_USB2_TXD);
394 omap_cfg_reg(W9_USB2_TXEN);
395 omap_cfg_reg(W5_USB2_SE0);
396 if (nwires != 3)
397 omap_cfg_reg(Y5_USB2_RCV);
398 // FIXME omap_cfg_reg(USB2_SPEED);
399 } else if (cpu_is_omap24xx()) {
400 omap_cfg_reg(Y11_24XX_USB2_DAT);
401 omap_cfg_reg(AA10_24XX_USB2_SE0);
402 if (nwires > 2)
403 omap_cfg_reg(AA12_24XX_USB2_TXEN);
404 if (nwires > 3)
405 omap_cfg_reg(AA6_24XX_USB2_RCV);
406 } else {
407 pr_debug("usb%d cpu unrecognized\n", 1);
408 return 0;
409 }
410 // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
411
412 switch (nwires) {
413 case 2:
414 if (!cpu_is_omap24xx())
415 goto bad;
416 /* NOTE: board-specific code must override this setting if
417 * this TLL link is not using DP/DM
418 */
419 syscon1 = 1;
420 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
421 break;
422 case 3:
423 syscon1 = 2;
424 if (cpu_is_omap24xx())
425 omap2_usb_devconf_set(2, USB_BIDIR);
426 break;
427 case 4:
428 syscon1 = 1;
429 if (cpu_is_omap24xx())
430 omap2_usb_devconf_set(2, USB_BIDIR);
431 break;
432 case 5:
433 if (!cpu_is_omap24xx())
434 goto bad;
435 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
436 /* NOTE: board-specific code must override this setting if
437 * this TLL link is not using DP/DM. Something must also
438 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
439 */
440 syscon1 = 3;
441 omap2_usb2_enable_5pinunitll();
442 break;
443 case 6:
444 if (cpu_is_omap24xx())
445 goto bad;
446 syscon1 = 3;
447 if (cpu_is_omap15xx()) {
448 omap_cfg_reg(USB2_VP);
449 omap_cfg_reg(USB2_VM);
450 } else {
451 u32 l;
452
453 omap_cfg_reg(AA9_USB2_VP);
454 omap_cfg_reg(R9_USB2_VM);
455 l = omap_readl(USB_TRANSCEIVER_CTRL);
456 l |= CONF_USB2_UNI_R;
457 omap_writel(l, USB_TRANSCEIVER_CTRL);
458 }
459 break;
460 default:
461 bad:
462 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
463 2, nwires);
464 }
465 return syscon1 << 24;
466 }
467
468 #endif
469
470 /*-------------------------------------------------------------------------*/
471
472 #if defined(CONFIG_USB_GADGET_OMAP) || \
473 defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
474 (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
475 static void usb_release(struct device *dev)
476 {
477 /* normally not freed */
478 }
479 #endif
480
481 #ifdef CONFIG_USB_GADGET_OMAP
482
483 static struct resource udc_resources[] = {
484 /* order is significant! */
485 { /* registers */
486 .start = UDC_BASE,
487 .end = UDC_BASE + 0xff,
488 .flags = IORESOURCE_MEM,
489 }, { /* general IRQ */
490 .start = INT_USB_IRQ_GEN,
491 .flags = IORESOURCE_IRQ,
492 }, { /* PIO IRQ */
493 .start = INT_USB_IRQ_NISO,
494 .flags = IORESOURCE_IRQ,
495 }, { /* SOF IRQ */
496 .start = INT_USB_IRQ_ISO,
497 .flags = IORESOURCE_IRQ,
498 },
499 };
500
501 static u64 udc_dmamask = ~(u32)0;
502
503 static struct platform_device udc_device = {
504 .name = "omap_udc",
505 .id = -1,
506 .dev = {
507 .release = usb_release,
508 .dma_mask = &udc_dmamask,
509 .coherent_dma_mask = 0xffffffff,
510 },
511 .num_resources = ARRAY_SIZE(udc_resources),
512 .resource = udc_resources,
513 };
514
515 #endif
516
517 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
518
519 /* The dmamask must be set for OHCI to work */
520 static u64 ohci_dmamask = ~(u32)0;
521
522 static struct resource ohci_resources[] = {
523 {
524 .start = OMAP_OHCI_BASE,
525 .end = OMAP_OHCI_BASE + 0xff,
526 .flags = IORESOURCE_MEM,
527 },
528 {
529 .start = INT_USB_IRQ_HGEN,
530 .flags = IORESOURCE_IRQ,
531 },
532 };
533
534 static struct platform_device ohci_device = {
535 .name = "ohci",
536 .id = -1,
537 .dev = {
538 .release = usb_release,
539 .dma_mask = &ohci_dmamask,
540 .coherent_dma_mask = 0xffffffff,
541 },
542 .num_resources = ARRAY_SIZE(ohci_resources),
543 .resource = ohci_resources,
544 };
545
546 #endif
547
548 #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
549
550 static struct resource otg_resources[] = {
551 /* order is significant! */
552 {
553 .start = OTG_BASE,
554 .end = OTG_BASE + 0xff,
555 .flags = IORESOURCE_MEM,
556 }, {
557 .start = INT_USB_IRQ_OTG,
558 .flags = IORESOURCE_IRQ,
559 },
560 };
561
562 static struct platform_device otg_device = {
563 .name = "omap_otg",
564 .id = -1,
565 .dev = {
566 .release = usb_release,
567 },
568 .num_resources = ARRAY_SIZE(otg_resources),
569 .resource = otg_resources,
570 };
571
572 #endif
573
574 /*-------------------------------------------------------------------------*/
575
576 // FIXME correct answer depends on hmc_mode,
577 // as does (on omap1) any nonzero value for config->otg port number
578 #ifdef CONFIG_USB_GADGET_OMAP
579 #define is_usb0_device(config) 1
580 #else
581 #define is_usb0_device(config) 0
582 #endif
583
584 /*-------------------------------------------------------------------------*/
585
586 #ifdef CONFIG_ARCH_OMAP_OTG
587
588 void __init
589 omap_otg_init(struct omap_usb_config *config)
590 {
591 u32 syscon;
592 int status;
593 int alt_pingroup = 0;
594
595 /* NOTE: no bus or clock setup (yet?) */
596
597 syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
598 if (!(syscon & OTG_RESET_DONE))
599 pr_debug("USB resets not complete?\n");
600
601 //omap_writew(0, OTG_IRQ_EN);
602
603 /* pin muxing and transceiver pinouts */
604 if (config->pins[0] > 2) /* alt pingroup 2 */
605 alt_pingroup = 1;
606 syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
607 syscon |= omap_usb1_init(config->pins[1]);
608 syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
609 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
610 omap_writel(syscon, OTG_SYSCON_1);
611
612 syscon = config->hmc_mode;
613 syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
614 #ifdef CONFIG_USB_OTG
615 if (config->otg)
616 syscon |= OTG_EN;
617 #endif
618 if (cpu_class_is_omap1())
619 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
620 omap_readl(USB_TRANSCEIVER_CTRL));
621 pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
622 omap_writel(syscon, OTG_SYSCON_2);
623
624 printk("USB: hmc %d", config->hmc_mode);
625 if (!alt_pingroup)
626 printk(", usb2 alt %d wires", config->pins[2]);
627 else if (config->pins[0])
628 printk(", usb0 %d wires%s", config->pins[0],
629 is_usb0_device(config) ? " (dev)" : "");
630 if (config->pins[1])
631 printk(", usb1 %d wires", config->pins[1]);
632 if (!alt_pingroup && config->pins[2])
633 printk(", usb2 %d wires", config->pins[2]);
634 if (config->otg)
635 printk(", Mini-AB on usb%d", config->otg - 1);
636 printk("\n");
637
638 if (cpu_class_is_omap1()) {
639 u16 w;
640
641 /* leave USB clocks/controllers off until needed */
642 w = omap_readw(ULPD_SOFT_REQ);
643 w &= ~SOFT_USB_CLK_REQ;
644 omap_writew(w, ULPD_SOFT_REQ);
645
646 w = omap_readw(ULPD_CLOCK_CTRL);
647 w &= ~USB_MCLK_EN;
648 w |= DIS_USB_PVCI_CLK;
649 omap_writew(w, ULPD_CLOCK_CTRL);
650 }
651 syscon = omap_readl(OTG_SYSCON_1);
652 syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
653
654 #ifdef CONFIG_USB_GADGET_OMAP
655 if (config->otg || config->register_dev) {
656 syscon &= ~DEV_IDLE_EN;
657 udc_device.dev.platform_data = config;
658 /* FIXME patch IRQ numbers for omap730 */
659 status = platform_device_register(&udc_device);
660 if (status)
661 pr_debug("can't register UDC device, %d\n", status);
662 }
663 #endif
664
665 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
666 if (config->otg || config->register_host) {
667 syscon &= ~HST_IDLE_EN;
668 ohci_device.dev.platform_data = config;
669 if (cpu_is_omap730())
670 ohci_resources[1].start = INT_730_USB_HHC_1;
671 status = platform_device_register(&ohci_device);
672 if (status)
673 pr_debug("can't register OHCI device, %d\n", status);
674 }
675 #endif
676
677 #ifdef CONFIG_USB_OTG
678 if (config->otg) {
679 syscon &= ~OTG_IDLE_EN;
680 otg_device.dev.platform_data = config;
681 if (cpu_is_omap730())
682 otg_resources[1].start = INT_730_USB_OTG;
683 status = platform_device_register(&otg_device);
684 if (status)
685 pr_debug("can't register OTG device, %d\n", status);
686 }
687 #endif
688 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
689 omap_writel(syscon, OTG_SYSCON_1);
690
691 status = 0;
692 }
693
694 #else
695 static inline void omap_otg_init(struct omap_usb_config *config) {}
696 #endif
697
698 /*-------------------------------------------------------------------------*/
699
700 #ifdef CONFIG_ARCH_OMAP15XX
701
702 /* ULPD_DPLL_CTRL */
703 #define DPLL_IOB (1 << 13)
704 #define DPLL_PLL_ENABLE (1 << 4)
705 #define DPLL_LOCK (1 << 0)
706
707 /* ULPD_APLL_CTRL */
708 #define APLL_NDPLL_SWITCH (1 << 0)
709
710
711 static void __init omap_1510_usb_init(struct omap_usb_config *config)
712 {
713 unsigned int val;
714 u16 w;
715
716 omap_usb0_init(config->pins[0], is_usb0_device(config));
717 omap_usb1_init(config->pins[1]);
718 omap_usb2_init(config->pins[2], 0);
719
720 val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
721 val |= (config->hmc_mode << 1);
722 omap_writel(val, MOD_CONF_CTRL_0);
723
724 printk("USB: hmc %d", config->hmc_mode);
725 if (config->pins[0])
726 printk(", usb0 %d wires%s", config->pins[0],
727 is_usb0_device(config) ? " (dev)" : "");
728 if (config->pins[1])
729 printk(", usb1 %d wires", config->pins[1]);
730 if (config->pins[2])
731 printk(", usb2 %d wires", config->pins[2]);
732 printk("\n");
733
734 /* use DPLL for 48 MHz function clock */
735 pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
736 omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
737
738 w = omap_readw(ULPD_APLL_CTRL);
739 w &= ~APLL_NDPLL_SWITCH;
740 omap_writew(w, ULPD_APLL_CTRL);
741
742 w = omap_readw(ULPD_DPLL_CTRL);
743 w |= DPLL_IOB | DPLL_PLL_ENABLE;
744 omap_writew(w, ULPD_DPLL_CTRL);
745
746 w = omap_readw(ULPD_SOFT_REQ);
747 w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
748 omap_writew(w, ULPD_SOFT_REQ);
749
750 while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
751 cpu_relax();
752
753 #ifdef CONFIG_USB_GADGET_OMAP
754 if (config->register_dev) {
755 int status;
756
757 udc_device.dev.platform_data = config;
758 status = platform_device_register(&udc_device);
759 if (status)
760 pr_debug("can't register UDC device, %d\n", status);
761 /* udc driver gates 48MHz by D+ pullup */
762 }
763 #endif
764
765 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
766 if (config->register_host) {
767 int status;
768
769 ohci_device.dev.platform_data = config;
770 status = platform_device_register(&ohci_device);
771 if (status)
772 pr_debug("can't register OHCI device, %d\n", status);
773 /* hcd explicitly gates 48MHz */
774 }
775 #endif
776 }
777
778 #else
779 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
780 #endif
781
782 /*-------------------------------------------------------------------------*/
783
784 static struct omap_usb_config platform_data;
785
786 static int __init
787 omap_usb_init(void)
788 {
789 const struct omap_usb_config *config;
790
791 config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
792 if (config == NULL) {
793 printk(KERN_ERR "USB: No board-specific "
794 "platform config found\n");
795 return -ENODEV;
796 }
797 platform_data = *config;
798
799 if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
800 omap_otg_init(&platform_data);
801 else if (cpu_is_omap15xx())
802 omap_1510_usb_init(&platform_data);
803 else {
804 printk(KERN_ERR "USB: No init for your chip yet\n");
805 return -ENODEV;
806 }
807 return 0;
808 }
809
810 subsys_initcall(omap_usb_init);