ARM: 6149/1: nomadik-gpio: add function to configure sleep mode behaviour
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-nomadik / gpio.c
1 /*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
17 #include <linux/io.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/spinlock.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/slab.h>
25
26 #include <mach/hardware.h>
27 #include <mach/gpio.h>
28
29 /*
30 * The GPIO module in the Nomadik family of Systems-on-Chip is an
31 * AMBA device, managing 32 pins and alternate functions. The logic block
32 * is currently only used in the Nomadik.
33 *
34 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
35 */
36
37 #define NMK_GPIO_PER_CHIP 32
38 struct nmk_gpio_chip {
39 struct gpio_chip chip;
40 void __iomem *addr;
41 struct clk *clk;
42 unsigned int parent_irq;
43 spinlock_t lock;
44 /* Keep track of configured edges */
45 u32 edge_rising;
46 u32 edge_falling;
47 };
48
49 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
50 unsigned offset, enum nmk_gpio_slpm mode)
51 {
52 u32 bit = 1 << offset;
53 u32 slpm;
54
55 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
56 if (mode == NMK_GPIO_SLPM_NOCHANGE)
57 slpm |= bit;
58 else
59 slpm &= ~bit;
60 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
61 }
62
63 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
64 unsigned offset, enum nmk_gpio_pull pull)
65 {
66 u32 bit = 1 << offset;
67 u32 pdis;
68
69 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
70 if (pull == NMK_GPIO_PULL_NONE)
71 pdis |= bit;
72 else
73 pdis &= ~bit;
74 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
75
76 if (pull == NMK_GPIO_PULL_UP)
77 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
78 else if (pull == NMK_GPIO_PULL_DOWN)
79 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
80 }
81
82 /**
83 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
84 * @gpio: pin number
85 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
86 *
87 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
88 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
89 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
90 * configured even when in sleep and deep sleep.
91 */
92 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
93 {
94 struct nmk_gpio_chip *nmk_chip;
95 unsigned long flags;
96
97 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
98 if (!nmk_chip)
99 return -EINVAL;
100
101 spin_lock_irqsave(&nmk_chip->lock, flags);
102 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
103 spin_unlock_irqrestore(&nmk_chip->lock, flags);
104
105 return 0;
106 }
107
108 /**
109 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
110 * @gpio: pin number
111 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
112 *
113 * Enables/disables pull up/down on a specified pin. This only takes effect if
114 * the pin is configured as an input (either explicitly or by the alternate
115 * function).
116 *
117 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
118 * configured as an input. Otherwise, due to the way the controller registers
119 * work, this function will change the value output on the pin.
120 */
121 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
122 {
123 struct nmk_gpio_chip *nmk_chip;
124 unsigned long flags;
125
126 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
127 if (!nmk_chip)
128 return -EINVAL;
129
130 spin_lock_irqsave(&nmk_chip->lock, flags);
131 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
132 spin_unlock_irqrestore(&nmk_chip->lock, flags);
133
134 return 0;
135 }
136
137 /* Mode functions */
138 int nmk_gpio_set_mode(int gpio, int gpio_mode)
139 {
140 struct nmk_gpio_chip *nmk_chip;
141 unsigned long flags;
142 u32 afunc, bfunc, bit;
143
144 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
145 if (!nmk_chip)
146 return -EINVAL;
147
148 bit = 1 << (gpio - nmk_chip->chip.base);
149
150 spin_lock_irqsave(&nmk_chip->lock, flags);
151 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
152 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
153 if (gpio_mode & NMK_GPIO_ALT_A)
154 afunc |= bit;
155 if (gpio_mode & NMK_GPIO_ALT_B)
156 bfunc |= bit;
157 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
158 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
159 spin_unlock_irqrestore(&nmk_chip->lock, flags);
160
161 return 0;
162 }
163 EXPORT_SYMBOL(nmk_gpio_set_mode);
164
165 int nmk_gpio_get_mode(int gpio)
166 {
167 struct nmk_gpio_chip *nmk_chip;
168 u32 afunc, bfunc, bit;
169
170 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
171 if (!nmk_chip)
172 return -EINVAL;
173
174 bit = 1 << (gpio - nmk_chip->chip.base);
175
176 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
177 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
178
179 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
180 }
181 EXPORT_SYMBOL(nmk_gpio_get_mode);
182
183
184 /* IRQ functions */
185 static inline int nmk_gpio_get_bitmask(int gpio)
186 {
187 return 1 << (gpio % 32);
188 }
189
190 static void nmk_gpio_irq_ack(unsigned int irq)
191 {
192 int gpio;
193 struct nmk_gpio_chip *nmk_chip;
194
195 gpio = NOMADIK_IRQ_TO_GPIO(irq);
196 nmk_chip = get_irq_chip_data(irq);
197 if (!nmk_chip)
198 return;
199 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
200 }
201
202 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
203 int gpio, bool enable)
204 {
205 u32 bitmask = nmk_gpio_get_bitmask(gpio);
206 u32 reg;
207
208 /* we must individually set/clear the two edges */
209 if (nmk_chip->edge_rising & bitmask) {
210 reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
211 if (enable)
212 reg |= bitmask;
213 else
214 reg &= ~bitmask;
215 writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
216 }
217 if (nmk_chip->edge_falling & bitmask) {
218 reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
219 if (enable)
220 reg |= bitmask;
221 else
222 reg &= ~bitmask;
223 writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
224 }
225 }
226
227 static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
228 {
229 int gpio;
230 struct nmk_gpio_chip *nmk_chip;
231 unsigned long flags;
232 u32 bitmask;
233
234 gpio = NOMADIK_IRQ_TO_GPIO(irq);
235 nmk_chip = get_irq_chip_data(irq);
236 bitmask = nmk_gpio_get_bitmask(gpio);
237 if (!nmk_chip)
238 return;
239
240 spin_lock_irqsave(&nmk_chip->lock, flags);
241 __nmk_gpio_irq_modify(nmk_chip, gpio, enable);
242 spin_unlock_irqrestore(&nmk_chip->lock, flags);
243 }
244
245 static void nmk_gpio_irq_mask(unsigned int irq)
246 {
247 nmk_gpio_irq_modify(irq, false);
248 };
249
250 static void nmk_gpio_irq_unmask(unsigned int irq)
251 {
252 nmk_gpio_irq_modify(irq, true);
253 }
254
255 static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
256 {
257 bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
258 int gpio;
259 struct nmk_gpio_chip *nmk_chip;
260 unsigned long flags;
261 u32 bitmask;
262
263 gpio = NOMADIK_IRQ_TO_GPIO(irq);
264 nmk_chip = get_irq_chip_data(irq);
265 bitmask = nmk_gpio_get_bitmask(gpio);
266 if (!nmk_chip)
267 return -EINVAL;
268
269 if (type & IRQ_TYPE_LEVEL_HIGH)
270 return -EINVAL;
271 if (type & IRQ_TYPE_LEVEL_LOW)
272 return -EINVAL;
273
274 spin_lock_irqsave(&nmk_chip->lock, flags);
275
276 if (enabled)
277 __nmk_gpio_irq_modify(nmk_chip, gpio, false);
278
279 nmk_chip->edge_rising &= ~bitmask;
280 if (type & IRQ_TYPE_EDGE_RISING)
281 nmk_chip->edge_rising |= bitmask;
282
283 nmk_chip->edge_falling &= ~bitmask;
284 if (type & IRQ_TYPE_EDGE_FALLING)
285 nmk_chip->edge_falling |= bitmask;
286
287 if (enabled)
288 __nmk_gpio_irq_modify(nmk_chip, gpio, true);
289
290 spin_unlock_irqrestore(&nmk_chip->lock, flags);
291
292 return 0;
293 }
294
295 static struct irq_chip nmk_gpio_irq_chip = {
296 .name = "Nomadik-GPIO",
297 .ack = nmk_gpio_irq_ack,
298 .mask = nmk_gpio_irq_mask,
299 .unmask = nmk_gpio_irq_unmask,
300 .set_type = nmk_gpio_irq_set_type,
301 };
302
303 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
304 {
305 struct nmk_gpio_chip *nmk_chip;
306 struct irq_chip *host_chip = get_irq_chip(irq);
307 unsigned int gpio_irq;
308 u32 pending;
309 unsigned int first_irq;
310
311 if (host_chip->mask_ack)
312 host_chip->mask_ack(irq);
313 else {
314 host_chip->mask(irq);
315 if (host_chip->ack)
316 host_chip->ack(irq);
317 }
318
319 nmk_chip = get_irq_data(irq);
320 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
321 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
322 gpio_irq = first_irq + __ffs(pending);
323 generic_handle_irq(gpio_irq);
324 }
325
326 host_chip->unmask(irq);
327 }
328
329 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
330 {
331 unsigned int first_irq;
332 int i;
333
334 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
335 for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
336 set_irq_chip(i, &nmk_gpio_irq_chip);
337 set_irq_handler(i, handle_edge_irq);
338 set_irq_flags(i, IRQF_VALID);
339 set_irq_chip_data(i, nmk_chip);
340 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
341 }
342 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
343 set_irq_data(nmk_chip->parent_irq, nmk_chip);
344 return 0;
345 }
346
347 /* I/O Functions */
348 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
349 {
350 struct nmk_gpio_chip *nmk_chip =
351 container_of(chip, struct nmk_gpio_chip, chip);
352
353 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
354 return 0;
355 }
356
357 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
358 {
359 struct nmk_gpio_chip *nmk_chip =
360 container_of(chip, struct nmk_gpio_chip, chip);
361 u32 bit = 1 << offset;
362
363 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
364 }
365
366 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
367 int val)
368 {
369 struct nmk_gpio_chip *nmk_chip =
370 container_of(chip, struct nmk_gpio_chip, chip);
371 u32 bit = 1 << offset;
372
373 if (val)
374 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
375 else
376 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
377 }
378
379 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
380 int val)
381 {
382 struct nmk_gpio_chip *nmk_chip =
383 container_of(chip, struct nmk_gpio_chip, chip);
384
385 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
386 nmk_gpio_set_output(chip, offset, val);
387
388 return 0;
389 }
390
391 /* This structure is replicated for each GPIO block allocated at probe time */
392 static struct gpio_chip nmk_gpio_template = {
393 .direction_input = nmk_gpio_make_input,
394 .get = nmk_gpio_get_input,
395 .direction_output = nmk_gpio_make_output,
396 .set = nmk_gpio_set_output,
397 .ngpio = NMK_GPIO_PER_CHIP,
398 .can_sleep = 0,
399 };
400
401 static int __init nmk_gpio_probe(struct platform_device *dev)
402 {
403 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
404 struct nmk_gpio_chip *nmk_chip;
405 struct gpio_chip *chip;
406 struct resource *res;
407 struct clk *clk;
408 int irq;
409 int ret;
410
411 if (!pdata)
412 return -ENODEV;
413
414 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
415 if (!res) {
416 ret = -ENOENT;
417 goto out;
418 }
419
420 irq = platform_get_irq(dev, 0);
421 if (irq < 0) {
422 ret = irq;
423 goto out;
424 }
425
426 if (request_mem_region(res->start, resource_size(res),
427 dev_name(&dev->dev)) == NULL) {
428 ret = -EBUSY;
429 goto out;
430 }
431
432 clk = clk_get(&dev->dev, NULL);
433 if (IS_ERR(clk)) {
434 ret = PTR_ERR(clk);
435 goto out_release;
436 }
437
438 clk_enable(clk);
439
440 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
441 if (!nmk_chip) {
442 ret = -ENOMEM;
443 goto out_clk;
444 }
445 /*
446 * The virt address in nmk_chip->addr is in the nomadik register space,
447 * so we can simply convert the resource address, without remapping
448 */
449 nmk_chip->clk = clk;
450 nmk_chip->addr = io_p2v(res->start);
451 nmk_chip->chip = nmk_gpio_template;
452 nmk_chip->parent_irq = irq;
453 spin_lock_init(&nmk_chip->lock);
454
455 chip = &nmk_chip->chip;
456 chip->base = pdata->first_gpio;
457 chip->label = pdata->name;
458 chip->dev = &dev->dev;
459 chip->owner = THIS_MODULE;
460
461 ret = gpiochip_add(&nmk_chip->chip);
462 if (ret)
463 goto out_free;
464
465 platform_set_drvdata(dev, nmk_chip);
466
467 nmk_gpio_init_irq(nmk_chip);
468
469 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
470 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
471 return 0;
472
473 out_free:
474 kfree(nmk_chip);
475 out_clk:
476 clk_disable(clk);
477 clk_put(clk);
478 out_release:
479 release_mem_region(res->start, resource_size(res));
480 out:
481 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
482 pdata->first_gpio, pdata->first_gpio+31);
483 return ret;
484 }
485
486 static int __exit nmk_gpio_remove(struct platform_device *dev)
487 {
488 struct nmk_gpio_chip *nmk_chip;
489 struct resource *res;
490
491 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
492
493 nmk_chip = platform_get_drvdata(dev);
494 gpiochip_remove(&nmk_chip->chip);
495 clk_disable(nmk_chip->clk);
496 clk_put(nmk_chip->clk);
497 kfree(nmk_chip);
498 release_mem_region(res->start, resource_size(res));
499 return 0;
500 }
501
502
503 static struct platform_driver nmk_gpio_driver = {
504 .driver = {
505 .owner = THIS_MODULE,
506 .name = "gpio",
507 },
508 .probe = nmk_gpio_probe,
509 .remove = __exit_p(nmk_gpio_remove),
510 .suspend = NULL, /* to be done */
511 .resume = NULL,
512 };
513
514 static int __init nmk_gpio_init(void)
515 {
516 return platform_driver_register(&nmk_gpio_driver);
517 }
518
519 arch_initcall(nmk_gpio_init);
520
521 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
522 MODULE_DESCRIPTION("Nomadik GPIO Driver");
523 MODULE_LICENSE("GPL");
524
525