arch/arm/nwfpe/entry.S

   1 /*
   2     NetWinder Floating Point Emulator
   3     (c) Rebel.COM, 1998
   4     (c) 1998, 1999 Philip Blundell
   5
   6     Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /* This is the kernel's entry point into the floating point emulator.
  24 It is called from the kernel with code similar to this:
  25
  26         sub     r4, r5, #4
  27         ldrt    r0, [r4]                        @ r0  = instruction
  28         adrsvc  al, r9, ret_from_exception      @ r9  = normal FP return
  29         adrsvc  al, lr, fpundefinstr            @ lr  = undefined instr return
  30
  31         get_current_task r10
  32         mov     r8, #1
  33         strb    r8, [r10, #TSK_USED_MATH]       @ set current->used_math
  34         add     r10, r10, #TSS_FPESAVE          @ r10 = workspace
  35         ldr     r4, .LC2
  36         ldr     pc, [r4]                        @ Call FP emulator entry point
  37
  38 The kernel expects the emulator to return via one of two possible
  39 points of return it passes to the emulator.  The emulator, if
  40 successful in its emulation, jumps to ret_from_exception (passed in
  41 r9) and the kernel takes care of returning control from the trap to
  42 the user code.  If the emulator is unable to emulate the instruction,
  43 it returns via _fpundefinstr (passed via lr) and the kernel halts the
  44 user program with a core dump.
  45
  46 On entry to the emulator r10 points to an area of private FP workspace
  47 reserved in the thread structure for this process.  This is where the
  48 emulator saves its registers across calls.  The first word of this area
  49 is used as a flag to detect the first time a process uses floating point,
  50 so that the emulator startup cost can be avoided for tasks that don't
  51 want it.
  52
  53 This routine does three things:
  54
  55 1) The kernel has created a struct pt_regs on the stack and saved the
  56 user registers into it.  See /usr/include/asm/proc/ptrace.h for details.
  57
  58 2) It calls EmulateAll to emulate a floating point instruction.
  59 EmulateAll returns 1 if the emulation was successful, or 0 if not.
  60
  61 3) If an instruction has been emulated successfully, it looks ahead at
  62 the next instruction.  If it is a floating point instruction, it
  63 executes the instruction, without returning to user space.  In this
  64 way it repeatedly looks ahead and executes floating point instructions
  65 until it encounters a non floating point instruction, at which time it
  66 returns via _fpreturn.
  67
  68 This is done to reduce the effect of the trap overhead on each
  69 floating point instructions.  GCC attempts to group floating point
  70 instructions to allow the emulator to spread the cost of the trap over
  71 several floating point instructions.  */
  72
  73 #include <asm/asm-offsets.h>
  74
  75         .globl  nwfpe_enter
  76 nwfpe_enter:
  77         mov     r4, lr                  @ save the failure-return addresses
  78         mov     sl, sp                  @ we access the registers via 'sl'
  79
  80         ldr     r5, [sp, #S_PC]         @ get contents of PC;
  81         mov     r6, r0                  @ save the opcode
  82 emulate:
  83         ldr     r1, [sp, #S_PSR]        @ fetch the PSR
  84         bl      checkCondition          @ check the condition
  85         cmp     r0, #0                  @ r0 = 0 ==> condition failed
  86
  87         @ if condition code failed to match, next insn
  88         beq     next                    @ get the next instruction;
  89
  90         mov     r0, r6                  @ prepare for EmulateAll()
  91         bl      EmulateAll              @ emulate the instruction
  92         cmp     r0, #0                  @ was emulation successful
  93         moveq   pc, r4                  @ no, return failure
  94
  95 next:
  96 .Lx1:   ldrt    r6, [r5], #4            @ get the next instruction and
  97                                         @ increment PC
  98
  99         and     r2, r6, #0x0F000000     @ test for FP insns
 100         teq     r2, #0x0C000000
 101         teqne   r2, #0x0D000000
 102         teqne   r2, #0x0E000000
 103         movne   pc, r9                  @ return ok if not a fp insn
 104
 105         str     r5, [sp, #S_PC]         @ update PC copy in regs
 106
 107         mov     r0, r6                  @ save a copy
 108         b       emulate                 @ check condition and emulate
 109
 110         @ We need to be prepared for the instructions at .Lx1 and .Lx2
 111         @ to fault.  Emit the appropriate exception gunk to fix things up.
 112         @ ??? For some reason, faults can happen at .Lx2 even with a
 113         @ plain LDR instruction.  Weird, but it seems harmless.
 114         .pushsection .fixup,"ax"
 115         .align  2
 116 .Lfix:  mov     pc, r9                  @ let the user eat segfaults
 117         .popsection
 118
 119         .pushsection __ex_table,"a"
 120         .align  3
 121         .long   .Lx1, .Lfix
 122         .popsection