2 * arch/arm/mm/highmem.c -- ARM highmem support
4 * Author: Nicolas Pitre
5 * Created: september 8, 2008
6 * Copyright: Marvell Semiconductors Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/highmem.h>
15 #include <linux/interrupt.h>
16 #include <asm/fixmap.h>
17 #include <asm/cacheflush.h>
18 #include <asm/tlbflush.h>
21 void *kmap(struct page
*page
)
24 if (!PageHighMem(page
))
25 return page_address(page
);
26 return kmap_high(page
);
30 void kunmap(struct page
*page
)
32 BUG_ON(in_interrupt());
33 if (!PageHighMem(page
))
37 EXPORT_SYMBOL(kunmap
);
39 void *kmap_atomic(struct page
*page
, enum km_type type
)
46 if (!PageHighMem(page
))
47 return page_address(page
);
49 debug_kmap_atomic(type
);
51 kmap
= kmap_high_get(page
);
55 idx
= type
+ KM_TYPE_NR
* smp_processor_id();
56 vaddr
= __fix_to_virt(FIX_KMAP_BEGIN
+ idx
);
57 #ifdef CONFIG_DEBUG_HIGHMEM
59 * With debugging enabled, kunmap_atomic forces that entry to 0.
60 * Make sure it was indeed properly unmapped.
62 BUG_ON(!pte_none(*(TOP_PTE(vaddr
))));
64 set_pte_ext(TOP_PTE(vaddr
), mk_pte(page
, kmap_prot
), 0);
66 * When debugging is off, kunmap_atomic leaves the previous mapping
67 * in place, so this TLB flush ensures the TLB is updated with the
70 local_flush_tlb_kernel_page(vaddr
);
74 EXPORT_SYMBOL(kmap_atomic
);
76 void kunmap_atomic(void *kvaddr
, enum km_type type
)
78 unsigned long vaddr
= (unsigned long) kvaddr
& PAGE_MASK
;
79 unsigned int idx
= type
+ KM_TYPE_NR
* smp_processor_id();
81 if (kvaddr
>= (void *)FIXADDR_START
) {
83 __cpuc_flush_dcache_area((void *)vaddr
, PAGE_SIZE
);
84 #ifdef CONFIG_DEBUG_HIGHMEM
85 BUG_ON(vaddr
!= __fix_to_virt(FIX_KMAP_BEGIN
+ idx
));
86 set_pte_ext(TOP_PTE(vaddr
), __pte(0), 0);
87 local_flush_tlb_kernel_page(vaddr
);
89 (void) idx
; /* to kill a warning */
91 } else if (vaddr
>= PKMAP_ADDR(0) && vaddr
< PKMAP_ADDR(LAST_PKMAP
)) {
92 /* this address was obtained through kmap_high_get() */
93 kunmap_high(pte_page(pkmap_page_table
[PKMAP_NR(vaddr
)]));
97 EXPORT_SYMBOL(kunmap_atomic
);
99 void *kmap_atomic_pfn(unsigned long pfn
, enum km_type type
)
106 idx
= type
+ KM_TYPE_NR
* smp_processor_id();
107 vaddr
= __fix_to_virt(FIX_KMAP_BEGIN
+ idx
);
108 #ifdef CONFIG_DEBUG_HIGHMEM
109 BUG_ON(!pte_none(*(TOP_PTE(vaddr
))));
111 set_pte_ext(TOP_PTE(vaddr
), pfn_pte(pfn
, kmap_prot
), 0);
112 local_flush_tlb_kernel_page(vaddr
);
114 return (void *)vaddr
;
117 struct page
*kmap_atomic_to_page(const void *ptr
)
119 unsigned long vaddr
= (unsigned long)ptr
;
122 if (vaddr
< FIXADDR_START
)
123 return virt_to_page(ptr
);
125 pte
= TOP_PTE(vaddr
);
126 return pte_page(*pte
);
129 #ifdef CONFIG_CPU_CACHE_VIPT
131 #include <linux/percpu.h>
134 * The VIVT cache of a highmem page is always flushed before the page
135 * is unmapped. Hence unmapped highmem pages need no cache maintenance
138 * However unmapped pages may still be cached with a VIPT cache, and
139 * it is not possible to perform cache maintenance on them using physical
140 * addresses unfortunately. So we have no choice but to set up a temporary
141 * virtual mapping for that purpose.
143 * Yet this VIPT cache maintenance may be triggered from DMA support
144 * functions which are possibly called from interrupt context. As we don't
145 * want to keep interrupt disabled all the time when such maintenance is
146 * taking place, we therefore allow for some reentrancy by preserving and
147 * restoring the previous fixmap entry before the interrupted context is
148 * resumed. If the reentrancy depth is 0 then there is no need to restore
149 * the previous fixmap, and leaving the current one in place allow it to
150 * be reused the next time without a TLB flush (common with DMA).
153 static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth
);
155 void *kmap_high_l1_vipt(struct page
*page
, pte_t
*saved_pte
)
157 unsigned int idx
, cpu
= smp_processor_id();
158 int *depth
= &per_cpu(kmap_high_l1_vipt_depth
, cpu
);
159 unsigned long vaddr
, flags
;
162 idx
= KM_L1_CACHE
+ KM_TYPE_NR
* cpu
;
163 vaddr
= __fix_to_virt(FIX_KMAP_BEGIN
+ idx
);
164 ptep
= TOP_PTE(vaddr
);
165 pte
= mk_pte(page
, kmap_prot
);
170 raw_local_irq_save(flags
);
172 if (pte_val(*ptep
) == pte_val(pte
)) {
176 set_pte_ext(ptep
, pte
, 0);
177 local_flush_tlb_kernel_page(vaddr
);
179 raw_local_irq_restore(flags
);
181 return (void *)vaddr
;
184 void kunmap_high_l1_vipt(struct page
*page
, pte_t saved_pte
)
186 unsigned int idx
, cpu
= smp_processor_id();
187 int *depth
= &per_cpu(kmap_high_l1_vipt_depth
, cpu
);
188 unsigned long vaddr
, flags
;
191 idx
= KM_L1_CACHE
+ KM_TYPE_NR
* cpu
;
192 vaddr
= __fix_to_virt(FIX_KMAP_BEGIN
+ idx
);
193 ptep
= TOP_PTE(vaddr
);
194 pte
= mk_pte(page
, kmap_prot
);
196 BUG_ON(pte_val(*ptep
) != pte_val(pte
));
199 raw_local_irq_save(flags
);
201 if (*depth
!= 0 && pte_val(pte
) != pte_val(saved_pte
)) {
202 set_pte_ext(ptep
, saved_pte
, 0);
203 local_flush_tlb_kernel_page(vaddr
);
205 raw_local_irq_restore(flags
);
211 #endif /* CONFIG_CPU_CACHE_VIPT */