Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-versatile / versatile_pb.c
1 /*
2 * linux/arch/arm/mach-versatile/versatile_pb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <linux/init.h>
23 #include <linux/device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/io.h>
29
30 #include <mach/hardware.h>
31 #include <asm/irq.h>
32 #include <asm/mach-types.h>
33
34 #include <asm/mach/arch.h>
35
36 #include "core.h"
37
38 #if 1
39 #define IRQ_MMCI1A IRQ_VICSOURCE23
40 #else
41 #define IRQ_MMCI1A IRQ_SIC_MMCI1A
42 #endif
43
44 static struct mmci_platform_data mmc1_plat_data = {
45 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
46 .status = mmc_status,
47 .gpio_wp = -1,
48 .gpio_cd = -1,
49 };
50
51 static struct pl061_platform_data gpio2_plat_data = {
52 .gpio_base = 16,
53 .irq_base = IRQ_GPIO2_START,
54 };
55
56 static struct pl061_platform_data gpio3_plat_data = {
57 .gpio_base = 24,
58 .irq_base = IRQ_GPIO3_START,
59 };
60
61 #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
62 #define UART3_DMA { 0x86, 0x87 }
63 #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
64 #define SCI1_DMA { 0x88, 0x89 }
65 #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
66 #define MMCI1_DMA { 0x85, 0 }
67
68 /*
69 * These devices are connected via the core APB bridge
70 */
71 #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
72 #define GPIO2_DMA { 0, 0 }
73 #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
74 #define GPIO3_DMA { 0, 0 }
75
76 /*
77 * These devices are connected via the DMA APB bridge
78 */
79
80 /* FPGA Primecells */
81 AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
82 AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL);
83 AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data);
84
85 /* DevChip Primecells */
86 AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
87 AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data);
88
89 static struct amba_device *amba_devs[] __initdata = {
90 &uart3_device,
91 &gpio2_device,
92 &gpio3_device,
93 &sci1_device,
94 &mmc1_device,
95 };
96
97 static void __init versatile_pb_init(void)
98 {
99 int i;
100
101 versatile_init();
102
103 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
104 struct amba_device *d = amba_devs[i];
105 amba_device_register(d, &iomem_resource);
106 }
107 }
108
109 MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
110 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
111 .phys_io = 0x101f1000,
112 .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
113 .boot_params = 0x00000100,
114 .map_io = versatile_map_io,
115 .init_irq = versatile_init_irq,
116 .timer = &versatile_timer,
117 .init_machine = versatile_pb_init,
118 MACHINE_END