e1dfa24b4fb92ac4630ae2d0df463290bdcbbec4
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-ux500 / board-mop500.c
1 /*
2 * Copyright (C) 2008-2012 ST-Ericsson
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_data/i2c-nomadik.h>
18 #include <linux/platform_data/db8500_thermal.h>
19 #include <linux/gpio.h>
20 #include <linux/amba/bus.h>
21 #include <linux/amba/pl022.h>
22 #include <linux/amba/serial.h>
23 #include <linux/spi/spi.h>
24 #include <linux/mfd/abx500/ab8500.h>
25 #include <linux/regulator/ab8500.h>
26 #include <linux/regulator/fixed.h>
27 #include <linux/mfd/tc3589x.h>
28 #include <linux/mfd/tps6105x.h>
29 #include <linux/mfd/abx500/ab8500-gpio.h>
30 #include <linux/mfd/abx500/ab8500-codec.h>
31 #include <linux/leds-lp5521.h>
32 #include <linux/input.h>
33 #include <linux/smsc911x.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/delay.h>
36 #include <linux/leds.h>
37 #include <linux/pinctrl/consumer.h>
38 #include <linux/platform_data/pinctrl-nomadik.h>
39 #include <linux/platform_data/dma-ste-dma40.h>
40
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
43 #include <asm/hardware/gic.h>
44
45 #include <mach/hardware.h>
46 #include <mach/setup.h>
47 #include <mach/devices.h>
48 #include <mach/irqs.h>
49 #include <linux/platform_data/crypto-ux500.h>
50
51 #include "ste-dma40-db8500.h"
52 #include "devices-db8500.h"
53 #include "board-mop500.h"
54 #include "board-mop500-regulators.h"
55
56 static struct gpio_led snowball_led_array[] = {
57 {
58 .name = "user_led",
59 .default_trigger = "heartbeat",
60 .gpio = 142,
61 },
62 };
63
64 static struct gpio_led_platform_data snowball_led_data = {
65 .leds = snowball_led_array,
66 .num_leds = ARRAY_SIZE(snowball_led_array),
67 };
68
69 static struct platform_device snowball_led_dev = {
70 .name = "leds-gpio",
71 .dev = {
72 .platform_data = &snowball_led_data,
73 },
74 };
75
76 static struct fixed_voltage_config snowball_gpio_en_3v3_data = {
77 .supply_name = "EN-3V3",
78 .gpio = SNOWBALL_EN_3V3_ETH_GPIO,
79 .microvolts = 3300000,
80 .enable_high = 1,
81 .init_data = &gpio_en_3v3_regulator,
82 .startup_delay = 5000, /* 1200us */
83 };
84
85 static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
86 .name = "reg-fixed-voltage",
87 .id = 1,
88 .dev = {
89 .platform_data = &snowball_gpio_en_3v3_data,
90 },
91 };
92
93 static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
94 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
95 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
96 /* config_reg is the initial configuration of ab8500 pins.
97 * The pins can be configured as GPIO or alt functions based
98 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
99 * register. This is the array of 7 configuration settings.
100 * One has to compile time decide these settings. Below is the
101 * explanation of these setting
102 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
103 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
104 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
105 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
106 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
107 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
108 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
109 * as GPIO then this register selectes the alternate fucntions
110 */
111 .config_reg = {0x00, 0x1E, 0x80, 0x01,
112 0x7A, 0x00, 0x00},
113 };
114
115 /* ab8500-codec */
116 static struct ab8500_codec_platform_data ab8500_codec_pdata = {
117 .amics = {
118 .mic1_type = AMIC_TYPE_DIFFERENTIAL,
119 .mic2_type = AMIC_TYPE_DIFFERENTIAL,
120 .mic1a_micbias = AMIC_MICBIAS_VAMIC1,
121 .mic1b_micbias = AMIC_MICBIAS_VAMIC1,
122 .mic2_micbias = AMIC_MICBIAS_VAMIC2
123 },
124 .ear_cmv = EAR_CMV_0_95V
125 };
126
127 static struct gpio_keys_button snowball_key_array[] = {
128 {
129 .gpio = 32,
130 .type = EV_KEY,
131 .code = KEY_1,
132 .desc = "userpb",
133 .active_low = 1,
134 .debounce_interval = 50,
135 .wakeup = 1,
136 },
137 {
138 .gpio = 151,
139 .type = EV_KEY,
140 .code = KEY_2,
141 .desc = "extkb1",
142 .active_low = 1,
143 .debounce_interval = 50,
144 .wakeup = 1,
145 },
146 {
147 .gpio = 152,
148 .type = EV_KEY,
149 .code = KEY_3,
150 .desc = "extkb2",
151 .active_low = 1,
152 .debounce_interval = 50,
153 .wakeup = 1,
154 },
155 {
156 .gpio = 161,
157 .type = EV_KEY,
158 .code = KEY_4,
159 .desc = "extkb3",
160 .active_low = 1,
161 .debounce_interval = 50,
162 .wakeup = 1,
163 },
164 {
165 .gpio = 162,
166 .type = EV_KEY,
167 .code = KEY_5,
168 .desc = "extkb4",
169 .active_low = 1,
170 .debounce_interval = 50,
171 .wakeup = 1,
172 },
173 };
174
175 static struct gpio_keys_platform_data snowball_key_data = {
176 .buttons = snowball_key_array,
177 .nbuttons = ARRAY_SIZE(snowball_key_array),
178 };
179
180 static struct platform_device snowball_key_dev = {
181 .name = "gpio-keys",
182 .id = -1,
183 .dev = {
184 .platform_data = &snowball_key_data,
185 }
186 };
187
188 static struct smsc911x_platform_config snowball_sbnet_cfg = {
189 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
190 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
191 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
192 .shift = 1,
193 };
194
195 static struct resource sbnet_res[] = {
196 {
197 .name = "smsc911x-memory",
198 .start = (0x5000 << 16),
199 .end = (0x5000 << 16) + 0xffff,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .start = NOMADIK_GPIO_TO_IRQ(140),
204 .end = NOMADIK_GPIO_TO_IRQ(140),
205 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
206 },
207 };
208
209 static struct platform_device snowball_sbnet_dev = {
210 .name = "smsc911x",
211 .num_resources = ARRAY_SIZE(sbnet_res),
212 .resource = sbnet_res,
213 .dev = {
214 .platform_data = &snowball_sbnet_cfg,
215 },
216 };
217
218 static struct ab8500_platform_data ab8500_platdata = {
219 .irq_base = MOP500_AB8500_IRQ_BASE,
220 .regulator_reg_init = ab8500_regulator_reg_init,
221 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
222 .regulator = ab8500_regulators,
223 .num_regulator = ARRAY_SIZE(ab8500_regulators),
224 .gpio = &ab8500_gpio_pdata,
225 .codec = &ab8500_codec_pdata,
226 };
227
228 /*
229 * Thermal Sensor
230 */
231
232 static struct resource db8500_thsens_resources[] = {
233 {
234 .name = "IRQ_HOTMON_LOW",
235 .start = IRQ_PRCMU_HOTMON_LOW,
236 .end = IRQ_PRCMU_HOTMON_LOW,
237 .flags = IORESOURCE_IRQ,
238 },
239 {
240 .name = "IRQ_HOTMON_HIGH",
241 .start = IRQ_PRCMU_HOTMON_HIGH,
242 .end = IRQ_PRCMU_HOTMON_HIGH,
243 .flags = IORESOURCE_IRQ,
244 },
245 };
246
247 static struct db8500_thsens_platform_data db8500_thsens_data = {
248 .trip_points[0] = {
249 .temp = 70000,
250 .type = THERMAL_TRIP_ACTIVE,
251 .cdev_name = {
252 [0] = "thermal-cpufreq-0",
253 },
254 },
255 .trip_points[1] = {
256 .temp = 75000,
257 .type = THERMAL_TRIP_ACTIVE,
258 .cdev_name = {
259 [0] = "thermal-cpufreq-0",
260 },
261 },
262 .trip_points[2] = {
263 .temp = 80000,
264 .type = THERMAL_TRIP_ACTIVE,
265 .cdev_name = {
266 [0] = "thermal-cpufreq-0",
267 },
268 },
269 .trip_points[3] = {
270 .temp = 85000,
271 .type = THERMAL_TRIP_CRITICAL,
272 },
273 .num_trips = 4,
274 };
275
276 static struct platform_device u8500_thsens_device = {
277 .name = "db8500-thermal",
278 .resource = db8500_thsens_resources,
279 .num_resources = ARRAY_SIZE(db8500_thsens_resources),
280 .dev = {
281 .platform_data = &db8500_thsens_data,
282 },
283 };
284
285 static struct platform_device u8500_cpufreq_cooling_device = {
286 .name = "db8500-cpufreq-cooling",
287 };
288
289 /*
290 * TPS61052
291 */
292
293 static struct tps6105x_platform_data mop500_tps61052_data = {
294 .mode = TPS6105X_MODE_VOLTAGE,
295 .regulator_data = &tps61052_regulator,
296 };
297
298 /*
299 * TC35892
300 */
301
302 static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
303 {
304 struct device *parent = NULL;
305 #if 0
306 /* FIXME: Is the sdi actually part of tc3589x? */
307 parent = tc3589x->dev;
308 #endif
309 mop500_sdi_tc35892_init(parent);
310 }
311
312 static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
313 .gpio_base = MOP500_EGPIO(0),
314 .setup = mop500_tc35892_init,
315 };
316
317 static struct tc3589x_platform_data mop500_tc35892_data = {
318 .block = TC3589x_BLOCK_GPIO,
319 .gpio = &mop500_tc35892_gpio_data,
320 .irq_base = MOP500_EGPIO_IRQ_BASE,
321 };
322
323 static struct lp5521_led_config lp5521_pri_led[] = {
324 [0] = {
325 .chan_nr = 0,
326 .led_current = 0x2f,
327 .max_current = 0x5f,
328 },
329 [1] = {
330 .chan_nr = 1,
331 .led_current = 0x2f,
332 .max_current = 0x5f,
333 },
334 [2] = {
335 .chan_nr = 2,
336 .led_current = 0x2f,
337 .max_current = 0x5f,
338 },
339 };
340
341 static struct lp5521_platform_data __initdata lp5521_pri_data = {
342 .label = "lp5521_pri",
343 .led_config = &lp5521_pri_led[0],
344 .num_channels = 3,
345 .clock_mode = LP5521_CLOCK_EXT,
346 };
347
348 static struct lp5521_led_config lp5521_sec_led[] = {
349 [0] = {
350 .chan_nr = 0,
351 .led_current = 0x2f,
352 .max_current = 0x5f,
353 },
354 [1] = {
355 .chan_nr = 1,
356 .led_current = 0x2f,
357 .max_current = 0x5f,
358 },
359 [2] = {
360 .chan_nr = 2,
361 .led_current = 0x2f,
362 .max_current = 0x5f,
363 },
364 };
365
366 static struct lp5521_platform_data __initdata lp5521_sec_data = {
367 .label = "lp5521_sec",
368 .led_config = &lp5521_sec_led[0],
369 .num_channels = 3,
370 .clock_mode = LP5521_CLOCK_EXT,
371 };
372
373 static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
374 {
375 I2C_BOARD_INFO("tc3589x", 0x42),
376 .irq = NOMADIK_GPIO_TO_IRQ(217),
377 .platform_data = &mop500_tc35892_data,
378 },
379 /* I2C0 devices only available prior to HREFv60 */
380 {
381 I2C_BOARD_INFO("tps61052", 0x33),
382 .platform_data = &mop500_tps61052_data,
383 },
384 };
385
386 #define NUM_PRE_V60_I2C0_DEVICES 1
387
388 static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
389 {
390 /* lp5521 LED driver, 1st device */
391 I2C_BOARD_INFO("lp5521", 0x33),
392 .platform_data = &lp5521_pri_data,
393 },
394 {
395 /* lp5521 LED driver, 2st device */
396 I2C_BOARD_INFO("lp5521", 0x34),
397 .platform_data = &lp5521_sec_data,
398 },
399 {
400 /* Light sensor Rohm BH1780GLI */
401 I2C_BOARD_INFO("bh1780", 0x29),
402 },
403 };
404
405 static void __init mop500_i2c_init(struct device *parent)
406 {
407 db8500_add_i2c0(parent, NULL);
408 db8500_add_i2c1(parent, NULL);
409 db8500_add_i2c2(parent, NULL);
410 db8500_add_i2c3(parent, NULL);
411 }
412
413 static struct gpio_keys_button mop500_gpio_keys[] = {
414 {
415 .desc = "SFH7741 Proximity Sensor",
416 .type = EV_SW,
417 .code = SW_FRONT_PROXIMITY,
418 .active_low = 0,
419 .can_disable = 1,
420 }
421 };
422
423 static struct regulator *prox_regulator;
424 static int mop500_prox_activate(struct device *dev);
425 static void mop500_prox_deactivate(struct device *dev);
426
427 static struct gpio_keys_platform_data mop500_gpio_keys_data = {
428 .buttons = mop500_gpio_keys,
429 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
430 .enable = mop500_prox_activate,
431 .disable = mop500_prox_deactivate,
432 };
433
434 static struct platform_device mop500_gpio_keys_device = {
435 .name = "gpio-keys",
436 .id = 0,
437 .dev = {
438 .platform_data = &mop500_gpio_keys_data,
439 },
440 };
441
442 static int mop500_prox_activate(struct device *dev)
443 {
444 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
445 "vcc");
446 if (IS_ERR(prox_regulator)) {
447 dev_err(&mop500_gpio_keys_device.dev,
448 "no regulator\n");
449 return PTR_ERR(prox_regulator);
450 }
451 regulator_enable(prox_regulator);
452 return 0;
453 }
454
455 static void mop500_prox_deactivate(struct device *dev)
456 {
457 regulator_disable(prox_regulator);
458 regulator_put(prox_regulator);
459 }
460
461 static struct cryp_platform_data u8500_cryp1_platform_data = {
462 .mem_to_engine = {
463 .dir = STEDMA40_MEM_TO_PERIPH,
464 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
465 .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,
466 .src_info.data_width = STEDMA40_WORD_WIDTH,
467 .dst_info.data_width = STEDMA40_WORD_WIDTH,
468 .mode = STEDMA40_MODE_LOGICAL,
469 .src_info.psize = STEDMA40_PSIZE_LOG_4,
470 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
471 },
472 .engine_to_mem = {
473 .dir = STEDMA40_PERIPH_TO_MEM,
474 .src_dev_type = DB8500_DMA_DEV48_CAC1_RX,
475 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
476 .src_info.data_width = STEDMA40_WORD_WIDTH,
477 .dst_info.data_width = STEDMA40_WORD_WIDTH,
478 .mode = STEDMA40_MODE_LOGICAL,
479 .src_info.psize = STEDMA40_PSIZE_LOG_4,
480 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
481 }
482 };
483
484 static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
485 .dir = STEDMA40_MEM_TO_PERIPH,
486 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
487 .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,
488 .src_info.data_width = STEDMA40_WORD_WIDTH,
489 .dst_info.data_width = STEDMA40_WORD_WIDTH,
490 .mode = STEDMA40_MODE_LOGICAL,
491 .src_info.psize = STEDMA40_PSIZE_LOG_16,
492 .dst_info.psize = STEDMA40_PSIZE_LOG_16,
493 };
494
495 static struct hash_platform_data u8500_hash1_platform_data = {
496 .mem_to_engine = &u8500_hash_dma_cfg_tx,
497 .dma_filter = stedma40_filter,
498 };
499
500 /* add any platform devices here - TODO */
501 static struct platform_device *mop500_platform_devs[] __initdata = {
502 &mop500_gpio_keys_device,
503 };
504
505 #ifdef CONFIG_STE_DMA40
506 static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
507 .mode = STEDMA40_MODE_LOGICAL,
508 .dir = STEDMA40_PERIPH_TO_MEM,
509 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
510 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
511 .src_info.data_width = STEDMA40_BYTE_WIDTH,
512 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
513 };
514
515 static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
516 .mode = STEDMA40_MODE_LOGICAL,
517 .dir = STEDMA40_MEM_TO_PERIPH,
518 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
519 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
520 .src_info.data_width = STEDMA40_BYTE_WIDTH,
521 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
522 };
523 #endif
524
525 struct pl022_ssp_controller ssp0_plat = {
526 .bus_id = 0,
527 #ifdef CONFIG_STE_DMA40
528 .enable_dma = 1,
529 .dma_filter = stedma40_filter,
530 .dma_rx_param = &ssp0_dma_cfg_rx,
531 .dma_tx_param = &ssp0_dma_cfg_tx,
532 #else
533 .enable_dma = 0,
534 #endif
535 /* on this platform, gpio 31,142,144,214 &
536 * 224 are connected as chip selects
537 */
538 .num_chipselect = 5,
539 };
540
541 static void __init mop500_spi_init(struct device *parent)
542 {
543 db8500_add_ssp0(parent, &ssp0_plat);
544 }
545
546 #ifdef CONFIG_STE_DMA40
547 static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
548 .mode = STEDMA40_MODE_LOGICAL,
549 .dir = STEDMA40_PERIPH_TO_MEM,
550 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
551 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
552 .src_info.data_width = STEDMA40_BYTE_WIDTH,
553 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
554 };
555
556 static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
557 .mode = STEDMA40_MODE_LOGICAL,
558 .dir = STEDMA40_MEM_TO_PERIPH,
559 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
560 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
561 .src_info.data_width = STEDMA40_BYTE_WIDTH,
562 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
563 };
564
565 static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
566 .mode = STEDMA40_MODE_LOGICAL,
567 .dir = STEDMA40_PERIPH_TO_MEM,
568 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
569 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
570 .src_info.data_width = STEDMA40_BYTE_WIDTH,
571 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
572 };
573
574 static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
575 .mode = STEDMA40_MODE_LOGICAL,
576 .dir = STEDMA40_MEM_TO_PERIPH,
577 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
578 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
579 .src_info.data_width = STEDMA40_BYTE_WIDTH,
580 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
581 };
582
583 static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
584 .mode = STEDMA40_MODE_LOGICAL,
585 .dir = STEDMA40_PERIPH_TO_MEM,
586 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
587 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
588 .src_info.data_width = STEDMA40_BYTE_WIDTH,
589 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
590 };
591
592 static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
593 .mode = STEDMA40_MODE_LOGICAL,
594 .dir = STEDMA40_MEM_TO_PERIPH,
595 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
596 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
597 .src_info.data_width = STEDMA40_BYTE_WIDTH,
598 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
599 };
600 #endif
601
602 struct amba_pl011_data uart0_plat = {
603 #ifdef CONFIG_STE_DMA40
604 .dma_filter = stedma40_filter,
605 .dma_rx_param = &uart0_dma_cfg_rx,
606 .dma_tx_param = &uart0_dma_cfg_tx,
607 #endif
608 };
609
610 struct amba_pl011_data uart1_plat = {
611 #ifdef CONFIG_STE_DMA40
612 .dma_filter = stedma40_filter,
613 .dma_rx_param = &uart1_dma_cfg_rx,
614 .dma_tx_param = &uart1_dma_cfg_tx,
615 #endif
616 };
617
618 struct amba_pl011_data uart2_plat = {
619 #ifdef CONFIG_STE_DMA40
620 .dma_filter = stedma40_filter,
621 .dma_rx_param = &uart2_dma_cfg_rx,
622 .dma_tx_param = &uart2_dma_cfg_tx,
623 #endif
624 };
625
626 static void __init mop500_uart_init(struct device *parent)
627 {
628 db8500_add_uart0(parent, &uart0_plat);
629 db8500_add_uart1(parent, &uart1_plat);
630 db8500_add_uart2(parent, &uart2_plat);
631 }
632
633 static void __init u8500_cryp1_hash1_init(struct device *parent)
634 {
635 db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
636 db8500_add_hash1(parent, &u8500_hash1_platform_data);
637 }
638
639 static struct platform_device *snowball_platform_devs[] __initdata = {
640 &snowball_led_dev,
641 &snowball_key_dev,
642 &snowball_sbnet_dev,
643 &snowball_gpio_en_3v3_regulator_dev,
644 &u8500_thsens_device,
645 &u8500_cpufreq_cooling_device,
646 };
647
648 static void __init mop500_init_machine(void)
649 {
650 struct device *parent = NULL;
651 int i2c0_devs;
652 int i;
653
654 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
655
656 mop500_pinmaps_init();
657 parent = u8500_init_devices(&ab8500_platdata);
658
659 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
660 mop500_platform_devs[i]->dev.parent = parent;
661
662 platform_add_devices(mop500_platform_devs,
663 ARRAY_SIZE(mop500_platform_devs));
664
665 mop500_i2c_init(parent);
666 mop500_sdi_init(parent);
667 mop500_spi_init(parent);
668 mop500_audio_init(parent);
669 mop500_uart_init(parent);
670
671 u8500_cryp1_hash1_init(parent);
672
673 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
674
675 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
676 i2c_register_board_info(2, mop500_i2c2_devices,
677 ARRAY_SIZE(mop500_i2c2_devices));
678
679 /* This board has full regulator constraints */
680 regulator_has_full_constraints();
681 }
682
683 static void __init snowball_init_machine(void)
684 {
685 struct device *parent = NULL;
686 int i;
687
688 snowball_pinmaps_init();
689 parent = u8500_init_devices(&ab8500_platdata);
690
691 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
692 snowball_platform_devs[i]->dev.parent = parent;
693
694 platform_add_devices(snowball_platform_devs,
695 ARRAY_SIZE(snowball_platform_devs));
696
697 mop500_i2c_init(parent);
698 snowball_sdi_init(parent);
699 mop500_spi_init(parent);
700 mop500_audio_init(parent);
701 mop500_uart_init(parent);
702
703 /* This board has full regulator constraints */
704 regulator_has_full_constraints();
705 }
706
707 static void __init hrefv60_init_machine(void)
708 {
709 struct device *parent = NULL;
710 int i2c0_devs;
711 int i;
712
713 /*
714 * The HREFv60 board removed a GPIO expander and routed
715 * all these GPIO pins to the internal GPIO controller
716 * instead.
717 */
718 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
719
720 hrefv60_pinmaps_init();
721 parent = u8500_init_devices(&ab8500_platdata);
722
723 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
724 mop500_platform_devs[i]->dev.parent = parent;
725
726 platform_add_devices(mop500_platform_devs,
727 ARRAY_SIZE(mop500_platform_devs));
728
729 mop500_i2c_init(parent);
730 hrefv60_sdi_init(parent);
731 mop500_spi_init(parent);
732 mop500_audio_init(parent);
733 mop500_uart_init(parent);
734
735 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
736
737 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
738
739 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
740 i2c_register_board_info(2, mop500_i2c2_devices,
741 ARRAY_SIZE(mop500_i2c2_devices));
742
743 /* This board has full regulator constraints */
744 regulator_has_full_constraints();
745 }
746
747 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
748 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
749 .atag_offset = 0x100,
750 .smp = smp_ops(ux500_smp_ops),
751 .map_io = u8500_map_io,
752 .init_irq = ux500_init_irq,
753 /* we re-use nomadik timer here */
754 .init_time = ux500_timer_init,
755 .handle_irq = gic_handle_irq,
756 .init_machine = mop500_init_machine,
757 .init_late = ux500_init_late,
758 MACHINE_END
759
760 MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
761 .atag_offset = 0x100,
762 .map_io = u8500_map_io,
763 .init_irq = ux500_init_irq,
764 .init_time = ux500_timer_init,
765 .handle_irq = gic_handle_irq,
766 .init_machine = mop500_init_machine,
767 .init_late = ux500_init_late,
768 MACHINE_END
769
770 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
771 .atag_offset = 0x100,
772 .smp = smp_ops(ux500_smp_ops),
773 .map_io = u8500_map_io,
774 .init_irq = ux500_init_irq,
775 .init_time = ux500_timer_init,
776 .handle_irq = gic_handle_irq,
777 .init_machine = hrefv60_init_machine,
778 .init_late = ux500_init_late,
779 MACHINE_END
780
781 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
782 .atag_offset = 0x100,
783 .smp = smp_ops(ux500_smp_ops),
784 .map_io = u8500_map_io,
785 .init_irq = ux500_init_irq,
786 /* we re-use nomadik timer here */
787 .init_time = ux500_timer_init,
788 .handle_irq = gic_handle_irq,
789 .init_machine = snowball_init_machine,
790 .init_late = NULL,
791 MACHINE_END