arch/arm/mach-ux500/board-mop500-sdi.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
   5  * License terms: GNU General Public License (GPL) version 2
   6  */
   7
   8 #include <linux/kernel.h>
   9 #include <linux/gpio.h>
  10 #include <linux/amba/bus.h>
  11 #include <linux/amba/mmci.h>
  12 #include <linux/mmc/host.h>
  13 #include <linux/platform_device.h>
  14
  15 #include <asm/mach-types.h>
  16 #include <plat/ste_dma40.h>
  17 #include <mach/devices.h>
  18 #include <mach/hardware.h>
  19
  20 #include "devices-db8500.h"
  21 #include "board-mop500.h"
  22 #include "ste-dma40-db8500.h"
  23
  24 /*
  25  * v2 has a new version of this block that need to be forced, the number found
  26  * in hardware is incorrect
  27  */
  28 #define U8500_SDI_V2_PERIPHID 0x10480180
  29
  30 /*
  31  * SDI 0 (MicroSD slot)
  32  */
  33
  34 /* MMCIPOWER bits */
  35 #define MCI_DATA2DIREN          (1 << 2)
  36 #define MCI_CMDDIREN            (1 << 3)
  37 #define MCI_DATA0DIREN          (1 << 4)
  38 #define MCI_DATA31DIREN         (1 << 5)
  39 #define MCI_FBCLKEN             (1 << 7)
  40
  41 /* GPIO pins used by the sdi0 level shifter */
  42 static int sdi0_en = -1;
  43 static int sdi0_vsel = -1;
  44
  45 static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd,
  46                                    unsigned char power_mode)
  47 {
  48         switch (power_mode) {
  49         case MMC_POWER_UP:
  50         case MMC_POWER_ON:
  51                 /*
  52                  * Level shifter voltage should depend on vdd to when deciding
  53                  * on either 1.8V or 2.9V. Once the decision has been made the
  54                  * level shifter must be disabled and re-enabled with a changed
  55                  * select signal in order to switch the voltage. Since there is
  56                  * no framework support yet for indicating 1.8V in vdd, use the
  57                  * default 2.9V.
  58                  */
  59                 gpio_direction_output(sdi0_vsel, 0);
  60                 gpio_direction_output(sdi0_en, 1);
  61                 break;
  62         case MMC_POWER_OFF:
  63                 gpio_direction_output(sdi0_vsel, 0);
  64                 gpio_direction_output(sdi0_en, 0);
  65                 break;
  66         }
  67
  68         return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN |
  69                MCI_DATA2DIREN | MCI_DATA31DIREN;
  70 }
  71
  72 #ifdef CONFIG_STE_DMA40
  73 struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
  74         .mode = STEDMA40_MODE_LOGICAL,
  75         .dir = STEDMA40_PERIPH_TO_MEM,
  76         .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,
  77         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  78         .src_info.data_width = STEDMA40_WORD_WIDTH,
  79         .dst_info.data_width = STEDMA40_WORD_WIDTH,
  80 };
  81
  82 static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
  83         .mode = STEDMA40_MODE_LOGICAL,
  84         .dir = STEDMA40_MEM_TO_PERIPH,
  85         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  86         .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,
  87         .src_info.data_width = STEDMA40_WORD_WIDTH,
  88         .dst_info.data_width = STEDMA40_WORD_WIDTH,
  89 };
  90 #endif
  91
  92 static struct mmci_platform_data mop500_sdi0_data = {
  93         .vdd_handler    = mop500_sdi0_vdd_handler,
  94         .ocr_mask       = MMC_VDD_29_30,
  95         .f_max          = 50000000,
  96         .capabilities   = MMC_CAP_4_BIT_DATA |
  97                                 MMC_CAP_SD_HIGHSPEED |
  98                                 MMC_CAP_MMC_HIGHSPEED,
  99         .gpio_wp        = -1,
 100 #ifdef CONFIG_STE_DMA40
 101         .dma_filter     = stedma40_filter,
 102         .dma_rx_param   = &mop500_sdi0_dma_cfg_rx,
 103         .dma_tx_param   = &mop500_sdi0_dma_cfg_tx,
 104 #endif
 105 };
 106
 107 static void sdi0_configure(void)
 108 {
 109         int ret;
 110
 111         ret = gpio_request(sdi0_en, "level shifter enable");
 112         if (!ret)
 113                 ret = gpio_request(sdi0_vsel,
 114                                    "level shifter 1v8-3v select");
 115
 116         if (ret) {
 117                 pr_warning("unable to config sdi0 gpios for level shifter.\n");
 118                 return;
 119         }
 120
 121         /* Select the default 2.9V and enable level shifter */
 122         gpio_direction_output(sdi0_vsel, 0);
 123         gpio_direction_output(sdi0_en, 1);
 124
 125         /* Add the device, force v2 to subrevision 1 */
 126         db8500_add_sdi0(&mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
 127 }
 128
 129 void mop500_sdi_tc35892_init(void)
 130 {
 131         mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
 132         sdi0_en = GPIO_SDMMC_EN;
 133         sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL;
 134         sdi0_configure();
 135 }
 136
 137 /*
 138  * SDI1 (SDIO WLAN)
 139  */
 140 #ifdef CONFIG_STE_DMA40
 141 static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
 142         .mode = STEDMA40_MODE_LOGICAL,
 143         .dir = STEDMA40_PERIPH_TO_MEM,
 144         .src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
 145         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
 146         .src_info.data_width = STEDMA40_WORD_WIDTH,
 147         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 148 };
 149
 150 static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
 151         .mode = STEDMA40_MODE_LOGICAL,
 152         .dir = STEDMA40_MEM_TO_PERIPH,
 153         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 154         .dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
 155         .src_info.data_width = STEDMA40_WORD_WIDTH,
 156         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 157 };
 158 #endif
 159
 160 static struct mmci_platform_data mop500_sdi1_data = {
 161         .ocr_mask       = MMC_VDD_29_30,
 162         .f_max          = 50000000,
 163         .capabilities   = MMC_CAP_4_BIT_DATA,
 164         .gpio_cd        = -1,
 165         .gpio_wp        = -1,
 166 #ifdef CONFIG_STE_DMA40
 167         .dma_filter     = stedma40_filter,
 168         .dma_rx_param   = &sdi1_dma_cfg_rx,
 169         .dma_tx_param   = &sdi1_dma_cfg_tx,
 170 #endif
 171 };
 172
 173 /*
 174  * SDI 2 (POP eMMC, not on DB8500ed)
 175  */
 176
 177 #ifdef CONFIG_STE_DMA40
 178 struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
 179         .mode = STEDMA40_MODE_LOGICAL,
 180         .dir = STEDMA40_PERIPH_TO_MEM,
 181         .src_dev_type =  DB8500_DMA_DEV28_SD_MM2_RX,
 182         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
 183         .src_info.data_width = STEDMA40_WORD_WIDTH,
 184         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 185 };
 186
 187 static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
 188         .mode = STEDMA40_MODE_LOGICAL,
 189         .dir = STEDMA40_MEM_TO_PERIPH,
 190         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 191         .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,
 192         .src_info.data_width = STEDMA40_WORD_WIDTH,
 193         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 194 };
 195 #endif
 196
 197 static struct mmci_platform_data mop500_sdi2_data = {
 198         .ocr_mask       = MMC_VDD_165_195,
 199         .f_max          = 50000000,
 200         .capabilities   = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
 201                           MMC_CAP_MMC_HIGHSPEED,
 202         .gpio_cd        = -1,
 203         .gpio_wp        = -1,
 204 #ifdef CONFIG_STE_DMA40
 205         .dma_filter     = stedma40_filter,
 206         .dma_rx_param   = &mop500_sdi2_dma_cfg_rx,
 207         .dma_tx_param   = &mop500_sdi2_dma_cfg_tx,
 208 #endif
 209 };
 210
 211 /*
 212  * SDI 4 (on-board eMMC)
 213  */
 214
 215 #ifdef CONFIG_STE_DMA40
 216 struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
 217         .mode = STEDMA40_MODE_LOGICAL,
 218         .dir = STEDMA40_PERIPH_TO_MEM,
 219         .src_dev_type =  DB8500_DMA_DEV42_SD_MM4_RX,
 220         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
 221         .src_info.data_width = STEDMA40_WORD_WIDTH,
 222         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 223 };
 224
 225 static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
 226         .mode = STEDMA40_MODE_LOGICAL,
 227         .dir = STEDMA40_MEM_TO_PERIPH,
 228         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 229         .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,
 230         .src_info.data_width = STEDMA40_WORD_WIDTH,
 231         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 232 };
 233 #endif
 234
 235 static struct mmci_platform_data mop500_sdi4_data = {
 236         .ocr_mask       = MMC_VDD_29_30,
 237         .f_max          = 50000000,
 238         .capabilities   = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
 239                           MMC_CAP_MMC_HIGHSPEED,
 240         .gpio_cd        = -1,
 241         .gpio_wp        = -1,
 242 #ifdef CONFIG_STE_DMA40
 243         .dma_filter     = stedma40_filter,
 244         .dma_rx_param   = &mop500_sdi4_dma_cfg_rx,
 245         .dma_tx_param   = &mop500_sdi4_dma_cfg_tx,
 246 #endif
 247 };
 248
 249 void __init mop500_sdi_init(void)
 250 {
 251         /* PoP:ed eMMC */
 252         db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
 253         /* On-board eMMC */
 254         db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 255         /*
 256          * On boards with the TC35892 GPIO expander, sdi0 will finally
 257          * be added when the TC35892 initializes and calls
 258          * mop500_sdi_tc35892_init() above.
 259          */
 260 }
 261
 262 void __init snowball_sdi_init(void)
 263 {
 264         /* On-board eMMC */
 265         db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 266         /* External Micro SD slot */
 267         mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
 268         mop500_sdi0_data.cd_invert = true;
 269         sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
 270         sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
 271         sdi0_configure();
 272 }
 273
 274 void __init hrefv60_sdi_init(void)
 275 {
 276         /* PoP:ed eMMC */
 277         db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
 278         /* On-board eMMC */
 279         db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 280         /* External Micro SD slot */
 281         mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
 282         sdi0_en = HREFV60_SDMMC_EN_GPIO;
 283         sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
 284         sdi0_configure();
 285         /* WLAN SDIO channel */
 286         db8500_add_sdi1(&mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
 287 }