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63498fbdfd121cc2331fd98e2cf8cf8e374331af
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-shmobile / board-ap4evb.c
1 /*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/clk.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/mfd/tmio.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sh_mobile_sdhi.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/mmc/sh_mmcif.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c/tsc2007.h>
36 #include <linux/io.h>
37 #include <linux/smsc911x.h>
38 #include <linux/sh_intc.h>
39 #include <linux/sh_clk.h>
40 #include <linux/gpio.h>
41 #include <linux/input.h>
42 #include <linux/leds.h>
43 #include <linux/input/sh_keysc.h>
44 #include <linux/usb/r8a66597.h>
45 #include <linux/pm_clock.h>
46 #include <linux/dma-mapping.h>
47
48 #include <media/sh_mobile_ceu.h>
49 #include <media/sh_mobile_csi2.h>
50 #include <media/soc_camera.h>
51
52 #include <sound/sh_fsi.h>
53
54 #include <video/sh_mobile_hdmi.h>
55 #include <video/sh_mobile_lcdc.h>
56 #include <video/sh_mipi_dsi.h>
57
58 #include <mach/common.h>
59 #include <mach/irqs.h>
60 #include <mach/sh7372.h>
61
62 #include <asm/mach-types.h>
63 #include <asm/mach/arch.h>
64 #include <asm/mach/map.h>
65 #include <asm/mach/time.h>
66 #include <asm/setup.h>
67
68 /*
69 * Address Interface BusWidth note
70 * ------------------------------------------------------------------
71 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
72 * 0x0800_0000 user area -
73 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
74 * 0x1400_0000 Ether (LAN9220) 16bit
75 * 0x1600_0000 user area - cannot use with NAND
76 * 0x1800_0000 user area -
77 * 0x1A00_0000 -
78 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
79 */
80
81 /*
82 * NOR Flash ROM
83 *
84 * SW1 | SW2 | SW7 | NOR Flash ROM
85 * bit1 | bit1 bit2 | bit1 | Memory allocation
86 * ------+------------+------+------------------
87 * OFF | ON OFF | ON | Area 0
88 * OFF | ON OFF | OFF | Area 4
89 */
90
91 /*
92 * NAND Flash ROM
93 *
94 * SW1 | SW2 | SW7 | NAND Flash ROM
95 * bit1 | bit1 bit2 | bit2 | Memory allocation
96 * ------+------------+------+------------------
97 * OFF | ON OFF | ON | FCE 0
98 * OFF | ON OFF | OFF | FCE 1
99 */
100
101 /*
102 * SMSC 9220
103 *
104 * SW1 SMSC 9220
105 * -----------------------
106 * ON access disable
107 * OFF access enable
108 */
109
110 /*
111 * LCD / IRQ / KEYSC / IrDA
112 *
113 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
114 * LCD = 2nd LCDC (WVGA)
115 *
116 * | SW43 |
117 * SW3 | ON | OFF |
118 * -------------+-----------------------+---------------+
119 * ON | KEY / IrDA | LCD |
120 * OFF | KEY / IrDA / IRQ | IRQ |
121 *
122 *
123 * QHD / WVGA display
124 *
125 * You can choice display type on menuconfig.
126 * Then, check above dip-switch.
127 */
128
129 /*
130 * USB
131 *
132 * J7 : 1-2 MAX3355E VBUS
133 * 2-3 DC 5.0V
134 *
135 * S39: bit2: off
136 */
137
138 /*
139 * FSI/FSMI
140 *
141 * SW41 : ON : SH-Mobile AP4 Audio Mode
142 * : OFF : Bluetooth Audio Mode
143 */
144
145 /*
146 * MMC0/SDHI1 (CN7)
147 *
148 * J22 : select card voltage
149 * 1-2 pin : 1.8v
150 * 2-3 pin : 3.3v
151 *
152 * SW1 | SW33
153 * | bit1 | bit2 | bit3 | bit4
154 * ------------+------+------+------+-------
155 * MMC0 OFF | OFF | ON | ON | X
156 * SDHI1 OFF | ON | X | OFF | ON
157 *
158 * voltage lebel
159 * CN7 : 1.8v
160 * CN12: 3.3v
161 */
162
163 /* MTD */
164 static struct mtd_partition nor_flash_partitions[] = {
165 {
166 .name = "loader",
167 .offset = 0x00000000,
168 .size = 512 * 1024,
169 .mask_flags = MTD_WRITEABLE,
170 },
171 {
172 .name = "bootenv",
173 .offset = MTDPART_OFS_APPEND,
174 .size = 512 * 1024,
175 .mask_flags = MTD_WRITEABLE,
176 },
177 {
178 .name = "kernel_ro",
179 .offset = MTDPART_OFS_APPEND,
180 .size = 8 * 1024 * 1024,
181 .mask_flags = MTD_WRITEABLE,
182 },
183 {
184 .name = "kernel",
185 .offset = MTDPART_OFS_APPEND,
186 .size = 8 * 1024 * 1024,
187 },
188 {
189 .name = "data",
190 .offset = MTDPART_OFS_APPEND,
191 .size = MTDPART_SIZ_FULL,
192 },
193 };
194
195 static struct physmap_flash_data nor_flash_data = {
196 .width = 2,
197 .parts = nor_flash_partitions,
198 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
199 };
200
201 static struct resource nor_flash_resources[] = {
202 [0] = {
203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
205 .flags = IORESOURCE_MEM,
206 }
207 };
208
209 static struct platform_device nor_flash_device = {
210 .name = "physmap-flash",
211 .dev = {
212 .platform_data = &nor_flash_data,
213 },
214 .num_resources = ARRAY_SIZE(nor_flash_resources),
215 .resource = nor_flash_resources,
216 };
217
218 /* SMSC 9220 */
219 static struct resource smc911x_resources[] = {
220 {
221 .start = 0x14000000,
222 .end = 0x16000000 - 1,
223 .flags = IORESOURCE_MEM,
224 }, {
225 .start = evt2irq(0x02c0) /* IRQ6A */,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
227 },
228 };
229
230 static struct smsc911x_platform_config smsc911x_info = {
231 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
232 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
233 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
234 };
235
236 static struct platform_device smc911x_device = {
237 .name = "smsc911x",
238 .id = -1,
239 .num_resources = ARRAY_SIZE(smc911x_resources),
240 .resource = smc911x_resources,
241 .dev = {
242 .platform_data = &smsc911x_info,
243 },
244 };
245
246 /*
247 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
248 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
249 */
250 static int slot_cn7_get_cd(struct platform_device *pdev)
251 {
252 return !gpio_get_value(GPIO_PORT41);
253 }
254 /* MERAM */
255 static struct sh_mobile_meram_info meram_info = {
256 .addr_mode = SH_MOBILE_MERAM_MODE1,
257 };
258
259 static struct resource meram_resources[] = {
260 [0] = {
261 .name = "regs",
262 .start = 0xe8000000,
263 .end = 0xe807ffff,
264 .flags = IORESOURCE_MEM,
265 },
266 [1] = {
267 .name = "meram",
268 .start = 0xe8080000,
269 .end = 0xe81fffff,
270 .flags = IORESOURCE_MEM,
271 },
272 };
273
274 static struct platform_device meram_device = {
275 .name = "sh_mobile_meram",
276 .id = 0,
277 .num_resources = ARRAY_SIZE(meram_resources),
278 .resource = meram_resources,
279 .dev = {
280 .platform_data = &meram_info,
281 },
282 };
283
284 /* SH_MMCIF */
285 static struct resource sh_mmcif_resources[] = {
286 [0] = {
287 .name = "MMCIF",
288 .start = 0xE6BD0000,
289 .end = 0xE6BD00FF,
290 .flags = IORESOURCE_MEM,
291 },
292 [1] = {
293 /* MMC ERR */
294 .start = evt2irq(0x1ac0),
295 .flags = IORESOURCE_IRQ,
296 },
297 [2] = {
298 /* MMC NOR */
299 .start = evt2irq(0x1ae0),
300 .flags = IORESOURCE_IRQ,
301 },
302 };
303
304 static struct sh_mmcif_plat_data sh_mmcif_plat = {
305 .sup_pclk = 0,
306 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
307 .caps = MMC_CAP_4_BIT_DATA |
308 MMC_CAP_8_BIT_DATA |
309 MMC_CAP_NEEDS_POLL,
310 .get_cd = slot_cn7_get_cd,
311 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
312 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
313 };
314
315 static struct platform_device sh_mmcif_device = {
316 .name = "sh_mmcif",
317 .id = 0,
318 .dev = {
319 .dma_mask = NULL,
320 .coherent_dma_mask = 0xffffffff,
321 .platform_data = &sh_mmcif_plat,
322 },
323 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
324 .resource = sh_mmcif_resources,
325 };
326
327 /* SDHI0 */
328 static struct sh_mobile_sdhi_info sdhi0_info = {
329 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
330 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
331 .tmio_caps = MMC_CAP_SDIO_IRQ,
332 };
333
334 static struct resource sdhi0_resources[] = {
335 [0] = {
336 .name = "SDHI0",
337 .start = 0xe6850000,
338 .end = 0xe68500ff,
339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
342 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
343 .flags = IORESOURCE_IRQ,
344 },
345 [2] = {
346 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
347 .flags = IORESOURCE_IRQ,
348 },
349 [3] = {
350 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
351 .flags = IORESOURCE_IRQ,
352 },
353 };
354
355 static struct platform_device sdhi0_device = {
356 .name = "sh_mobile_sdhi",
357 .num_resources = ARRAY_SIZE(sdhi0_resources),
358 .resource = sdhi0_resources,
359 .id = 0,
360 .dev = {
361 .platform_data = &sdhi0_info,
362 },
363 };
364
365 /* SDHI1 */
366 static struct sh_mobile_sdhi_info sdhi1_info = {
367 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
368 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
369 .tmio_ocr_mask = MMC_VDD_165_195,
370 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
371 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
372 .get_cd = slot_cn7_get_cd,
373 };
374
375 static struct resource sdhi1_resources[] = {
376 [0] = {
377 .name = "SDHI1",
378 .start = 0xe6860000,
379 .end = 0xe68600ff,
380 .flags = IORESOURCE_MEM,
381 },
382 [1] = {
383 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
384 .flags = IORESOURCE_IRQ,
385 },
386 [2] = {
387 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
388 .flags = IORESOURCE_IRQ,
389 },
390 [3] = {
391 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
392 .flags = IORESOURCE_IRQ,
393 },
394 };
395
396 static struct platform_device sdhi1_device = {
397 .name = "sh_mobile_sdhi",
398 .num_resources = ARRAY_SIZE(sdhi1_resources),
399 .resource = sdhi1_resources,
400 .id = 1,
401 .dev = {
402 .platform_data = &sdhi1_info,
403 },
404 };
405
406 /* USB1 */
407 static void usb1_host_port_power(int port, int power)
408 {
409 if (!power) /* only power-on supported for now */
410 return;
411
412 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
413 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
414 }
415
416 static struct r8a66597_platdata usb1_host_data = {
417 .on_chip = 1,
418 .port_power = usb1_host_port_power,
419 };
420
421 static struct resource usb1_host_resources[] = {
422 [0] = {
423 .name = "USBHS",
424 .start = 0xE68B0000,
425 .end = 0xE68B00E6 - 1,
426 .flags = IORESOURCE_MEM,
427 },
428 [1] = {
429 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
430 .flags = IORESOURCE_IRQ,
431 },
432 };
433
434 static struct platform_device usb1_host_device = {
435 .name = "r8a66597_hcd",
436 .id = 1,
437 .dev = {
438 .dma_mask = NULL, /* not use dma */
439 .coherent_dma_mask = 0xffffffff,
440 .platform_data = &usb1_host_data,
441 },
442 .num_resources = ARRAY_SIZE(usb1_host_resources),
443 .resource = usb1_host_resources,
444 };
445
446 /*
447 * QHD display
448 */
449 #ifdef CONFIG_AP4EVB_QHD
450
451 /* KEYSC (Needs SW43 set to ON) */
452 static struct sh_keysc_info keysc_info = {
453 .mode = SH_KEYSC_MODE_1,
454 .scan_timing = 3,
455 .delay = 2500,
456 .keycodes = {
457 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
458 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
459 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
460 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
461 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
462 },
463 };
464
465 static struct resource keysc_resources[] = {
466 [0] = {
467 .name = "KEYSC",
468 .start = 0xe61b0000,
469 .end = 0xe61b0063,
470 .flags = IORESOURCE_MEM,
471 },
472 [1] = {
473 .start = evt2irq(0x0be0), /* KEYSC_KEY */
474 .flags = IORESOURCE_IRQ,
475 },
476 };
477
478 static struct platform_device keysc_device = {
479 .name = "sh_keysc",
480 .id = 0, /* "keysc0" clock */
481 .num_resources = ARRAY_SIZE(keysc_resources),
482 .resource = keysc_resources,
483 .dev = {
484 .platform_data = &keysc_info,
485 },
486 };
487
488 /* MIPI-DSI */
489 #define PHYCTRL 0x0070
490 static int sh_mipi_set_dot_clock(struct platform_device *pdev,
491 void __iomem *base,
492 int enable)
493 {
494 struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
495 void __iomem *phy = base + PHYCTRL;
496
497 if (IS_ERR(pck))
498 return PTR_ERR(pck);
499
500 if (enable) {
501 clk_set_rate(pck, clk_round_rate(pck, 24000000));
502 iowrite32(ioread32(phy) | (0xb << 8), phy);
503 clk_enable(pck);
504 } else {
505 clk_disable(pck);
506 }
507
508 clk_put(pck);
509
510 return 0;
511 }
512
513 static struct resource mipidsi0_resources[] = {
514 [0] = {
515 .start = 0xffc60000,
516 .end = 0xffc63073,
517 .flags = IORESOURCE_MEM,
518 },
519 [1] = {
520 .start = 0xffc68000,
521 .end = 0xffc680ef,
522 .flags = IORESOURCE_MEM,
523 },
524 };
525
526 static struct sh_mobile_lcdc_info lcdc_info;
527
528 static struct sh_mipi_dsi_info mipidsi0_info = {
529 .data_format = MIPI_RGB888,
530 .lcd_chan = &lcdc_info.ch[0],
531 .lane = 2,
532 .vsynw_offset = 17,
533 .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
534 SH_MIPI_DSI_HSbyteCLK,
535 .set_dot_clock = sh_mipi_set_dot_clock,
536 };
537
538 static struct platform_device mipidsi0_device = {
539 .name = "sh-mipi-dsi",
540 .num_resources = ARRAY_SIZE(mipidsi0_resources),
541 .resource = mipidsi0_resources,
542 .id = 0,
543 .dev = {
544 .platform_data = &mipidsi0_info,
545 },
546 };
547
548 static struct platform_device *qhd_devices[] __initdata = {
549 &mipidsi0_device,
550 &keysc_device,
551 };
552 #endif /* CONFIG_AP4EVB_QHD */
553
554 /* LCDC0 */
555 static const struct fb_videomode ap4evb_lcdc_modes[] = {
556 {
557 #ifdef CONFIG_AP4EVB_QHD
558 .name = "R63302(QHD)",
559 .xres = 544,
560 .yres = 961,
561 .left_margin = 72,
562 .right_margin = 600,
563 .hsync_len = 16,
564 .upper_margin = 8,
565 .lower_margin = 8,
566 .vsync_len = 2,
567 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
568 #else
569 .name = "WVGA Panel",
570 .xres = 800,
571 .yres = 480,
572 .left_margin = 220,
573 .right_margin = 110,
574 .hsync_len = 70,
575 .upper_margin = 20,
576 .lower_margin = 5,
577 .vsync_len = 5,
578 .sync = 0,
579 #endif
580 },
581 };
582 static struct sh_mobile_meram_cfg lcd_meram_cfg = {
583 .icb[0] = {
584 .marker_icb = 28,
585 .cache_icb = 24,
586 .meram_offset = 0x0,
587 .meram_size = 0x40,
588 },
589 .icb[1] = {
590 .marker_icb = 29,
591 .cache_icb = 25,
592 .meram_offset = 0x40,
593 .meram_size = 0x40,
594 },
595 };
596
597 static struct sh_mobile_lcdc_info lcdc_info = {
598 .meram_dev = &meram_info,
599 .ch[0] = {
600 .chan = LCDC_CHAN_MAINLCD,
601 .fourcc = V4L2_PIX_FMT_RGB565,
602 .lcd_modes = ap4evb_lcdc_modes,
603 .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
604 .meram_cfg = &lcd_meram_cfg,
605 #ifdef CONFIG_AP4EVB_QHD
606 .tx_dev = &mipidsi0_device,
607 #endif
608 }
609 };
610
611 static struct resource lcdc_resources[] = {
612 [0] = {
613 .name = "LCDC",
614 .start = 0xfe940000, /* P4-only space */
615 .end = 0xfe943fff,
616 .flags = IORESOURCE_MEM,
617 },
618 [1] = {
619 .start = intcs_evt2irq(0x580),
620 .flags = IORESOURCE_IRQ,
621 },
622 };
623
624 static struct platform_device lcdc_device = {
625 .name = "sh_mobile_lcdc_fb",
626 .num_resources = ARRAY_SIZE(lcdc_resources),
627 .resource = lcdc_resources,
628 .dev = {
629 .platform_data = &lcdc_info,
630 .coherent_dma_mask = ~0,
631 },
632 };
633
634 /* FSI */
635 #define IRQ_FSI evt2irq(0x1840)
636 static int __fsi_set_rate(struct clk *clk, long rate, int enable)
637 {
638 int ret = 0;
639
640 if (rate <= 0)
641 return ret;
642
643 if (enable) {
644 ret = clk_set_rate(clk, rate);
645 if (0 == ret)
646 ret = clk_enable(clk);
647 } else {
648 clk_disable(clk);
649 }
650
651 return ret;
652 }
653
654 static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
655 {
656 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
657 }
658
659 static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
660 {
661 struct clk *fsia_ick;
662 struct clk *fsiack;
663 int ret = -EIO;
664
665 fsia_ick = clk_get(dev, "icka");
666 if (IS_ERR(fsia_ick))
667 return PTR_ERR(fsia_ick);
668
669 /*
670 * FSIACK is connected to AK4642,
671 * and use external clock pin from it.
672 * it is parent of fsia_ick now.
673 */
674 fsiack = clk_get_parent(fsia_ick);
675 if (!fsiack)
676 goto fsia_ick_out;
677
678 /*
679 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
680 *
681 ** FIXME **
682 * Because the freq_table of external clk (fsiack) are all 0,
683 * the return value of clk_round_rate became 0.
684 * So, it use __fsi_set_rate here.
685 */
686 ret = __fsi_set_rate(fsiack, rate, enable);
687 if (ret < 0)
688 goto fsiack_out;
689
690 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
691 if ((ret < 0) && enable)
692 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
693
694 fsiack_out:
695 clk_put(fsiack);
696
697 fsia_ick_out:
698 clk_put(fsia_ick);
699
700 return 0;
701 }
702
703 static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
704 {
705 struct clk *fsib_clk;
706 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
707 long fsib_rate = 0;
708 long fdiv_rate = 0;
709 int ackmd_bpfmd;
710 int ret;
711
712 switch (rate) {
713 case 44100:
714 fsib_rate = rate * 256;
715 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
716 break;
717 case 48000:
718 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
719 fdiv_rate = rate * 256;
720 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
721 break;
722 default:
723 pr_err("unsupported rate in FSI2 port B\n");
724 return -EINVAL;
725 }
726
727 /* FSI B setting */
728 fsib_clk = clk_get(dev, "ickb");
729 if (IS_ERR(fsib_clk))
730 return -EIO;
731
732 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
733 if (ret < 0)
734 goto fsi_set_rate_end;
735
736 /* FSI DIV setting */
737 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
738 if (ret < 0) {
739 /* disable FSI B */
740 if (enable)
741 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
742 goto fsi_set_rate_end;
743 }
744
745 ret = ackmd_bpfmd;
746
747 fsi_set_rate_end:
748 clk_put(fsib_clk);
749 return ret;
750 }
751
752 static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
753 {
754 int ret;
755
756 if (is_porta)
757 ret = fsi_ak4642_set_rate(dev, rate, enable);
758 else
759 ret = fsi_hdmi_set_rate(dev, rate, enable);
760
761 return ret;
762 }
763
764 static struct sh_fsi_platform_info fsi_info = {
765 .porta_flags = SH_FSI_BRS_INV,
766
767 .portb_flags = SH_FSI_BRS_INV |
768 SH_FSI_BRM_INV |
769 SH_FSI_LRS_INV |
770 SH_FSI_FMT_SPDIF,
771 .set_rate = fsi_set_rate,
772 };
773
774 static struct resource fsi_resources[] = {
775 [0] = {
776 .name = "FSI",
777 .start = 0xFE3C0000,
778 .end = 0xFE3C0400 - 1,
779 .flags = IORESOURCE_MEM,
780 },
781 [1] = {
782 .start = IRQ_FSI,
783 .flags = IORESOURCE_IRQ,
784 },
785 };
786
787 static struct platform_device fsi_device = {
788 .name = "sh_fsi2",
789 .id = -1,
790 .num_resources = ARRAY_SIZE(fsi_resources),
791 .resource = fsi_resources,
792 .dev = {
793 .platform_data = &fsi_info,
794 },
795 };
796
797 static struct fsi_ak4642_info fsi2_ak4643_info = {
798 .name = "AK4643",
799 .card = "FSI2A-AK4643",
800 .cpu_dai = "fsia-dai",
801 .codec = "ak4642-codec.0-0013",
802 .platform = "sh_fsi2",
803 .id = FSI_PORT_A,
804 };
805
806 static struct platform_device fsi_ak4643_device = {
807 .name = "fsi-ak4642-audio",
808 .dev = {
809 .platform_data = &fsi_info,
810 },
811 };
812
813 /* LCDC1 */
814 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
815 unsigned long *parent_freq);
816
817 static struct sh_mobile_hdmi_info hdmi_info = {
818 .flags = HDMI_SND_SRC_SPDIF,
819 .clk_optimize_parent = ap4evb_clk_optimize,
820 };
821
822 static struct resource hdmi_resources[] = {
823 [0] = {
824 .name = "HDMI",
825 .start = 0xe6be0000,
826 .end = 0xe6be00ff,
827 .flags = IORESOURCE_MEM,
828 },
829 [1] = {
830 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
831 .start = evt2irq(0x17e0),
832 .flags = IORESOURCE_IRQ,
833 },
834 };
835
836 static struct platform_device hdmi_device = {
837 .name = "sh-mobile-hdmi",
838 .num_resources = ARRAY_SIZE(hdmi_resources),
839 .resource = hdmi_resources,
840 .id = -1,
841 .dev = {
842 .platform_data = &hdmi_info,
843 },
844 };
845
846 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
847 unsigned long *parent_freq)
848 {
849 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
850 long error;
851
852 if (IS_ERR(hdmi_ick)) {
853 int ret = PTR_ERR(hdmi_ick);
854 pr_err("Cannot get HDMI ICK: %d\n", ret);
855 return ret;
856 }
857
858 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
859
860 clk_put(hdmi_ick);
861
862 return error;
863 }
864
865 static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
866 .icb[0] = {
867 .marker_icb = 30,
868 .cache_icb = 26,
869 .meram_offset = 0x80,
870 .meram_size = 0x100,
871 },
872 .icb[1] = {
873 .marker_icb = 31,
874 .cache_icb = 27,
875 .meram_offset = 0x180,
876 .meram_size = 0x100,
877 },
878 };
879
880 static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
881 .clock_source = LCDC_CLK_EXTERNAL,
882 .meram_dev = &meram_info,
883 .ch[0] = {
884 .chan = LCDC_CHAN_MAINLCD,
885 .fourcc = V4L2_PIX_FMT_RGB565,
886 .interface_type = RGB24,
887 .clock_divider = 1,
888 .flags = LCDC_FLAGS_DWPOL,
889 .meram_cfg = &hdmi_meram_cfg,
890 .tx_dev = &hdmi_device,
891 }
892 };
893
894 static struct resource lcdc1_resources[] = {
895 [0] = {
896 .name = "LCDC1",
897 .start = 0xfe944000,
898 .end = 0xfe947fff,
899 .flags = IORESOURCE_MEM,
900 },
901 [1] = {
902 .start = intcs_evt2irq(0x1780),
903 .flags = IORESOURCE_IRQ,
904 },
905 };
906
907 static struct platform_device lcdc1_device = {
908 .name = "sh_mobile_lcdc_fb",
909 .num_resources = ARRAY_SIZE(lcdc1_resources),
910 .resource = lcdc1_resources,
911 .id = 1,
912 .dev = {
913 .platform_data = &sh_mobile_lcdc1_info,
914 .coherent_dma_mask = ~0,
915 },
916 };
917
918 static struct platform_device fsi_hdmi_device = {
919 .name = "sh_fsi2_b_hdmi",
920 };
921
922 static struct gpio_led ap4evb_leds[] = {
923 {
924 .name = "led4",
925 .gpio = GPIO_PORT185,
926 .default_state = LEDS_GPIO_DEFSTATE_ON,
927 },
928 {
929 .name = "led2",
930 .gpio = GPIO_PORT186,
931 .default_state = LEDS_GPIO_DEFSTATE_ON,
932 },
933 {
934 .name = "led3",
935 .gpio = GPIO_PORT187,
936 .default_state = LEDS_GPIO_DEFSTATE_ON,
937 },
938 {
939 .name = "led1",
940 .gpio = GPIO_PORT188,
941 .default_state = LEDS_GPIO_DEFSTATE_ON,
942 }
943 };
944
945 static struct gpio_led_platform_data ap4evb_leds_pdata = {
946 .num_leds = ARRAY_SIZE(ap4evb_leds),
947 .leds = ap4evb_leds,
948 };
949
950 static struct platform_device leds_device = {
951 .name = "leds-gpio",
952 .id = 0,
953 .dev = {
954 .platform_data = &ap4evb_leds_pdata,
955 },
956 };
957
958 static struct i2c_board_info imx074_info = {
959 I2C_BOARD_INFO("imx074", 0x1a),
960 };
961
962 static struct soc_camera_link imx074_link = {
963 .bus_id = 0,
964 .board_info = &imx074_info,
965 .i2c_adapter_id = 0,
966 .module_name = "imx074",
967 };
968
969 static struct platform_device ap4evb_camera = {
970 .name = "soc-camera-pdrv",
971 .id = 0,
972 .dev = {
973 .platform_data = &imx074_link,
974 },
975 };
976
977 static struct sh_csi2_client_config csi2_clients[] = {
978 {
979 .phy = SH_CSI2_PHY_MAIN,
980 .lanes = 0, /* default: 2 lanes */
981 .channel = 0,
982 .pdev = &ap4evb_camera,
983 },
984 };
985
986 static struct sh_csi2_pdata csi2_info = {
987 .type = SH_CSI2C,
988 .clients = csi2_clients,
989 .num_clients = ARRAY_SIZE(csi2_clients),
990 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
991 };
992
993 static struct resource csi2_resources[] = {
994 [0] = {
995 .name = "CSI2",
996 .start = 0xffc90000,
997 .end = 0xffc90fff,
998 .flags = IORESOURCE_MEM,
999 },
1000 [1] = {
1001 .start = intcs_evt2irq(0x17a0),
1002 .flags = IORESOURCE_IRQ,
1003 },
1004 };
1005
1006 static struct sh_mobile_ceu_companion csi2 = {
1007 .id = 0,
1008 .num_resources = ARRAY_SIZE(csi2_resources),
1009 .resource = csi2_resources,
1010 .platform_data = &csi2_info,
1011 };
1012
1013 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1014 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1015 .csi2 = &csi2,
1016 };
1017
1018 static struct resource ceu_resources[] = {
1019 [0] = {
1020 .name = "CEU",
1021 .start = 0xfe910000,
1022 .end = 0xfe91009f,
1023 .flags = IORESOURCE_MEM,
1024 },
1025 [1] = {
1026 .start = intcs_evt2irq(0x880),
1027 .flags = IORESOURCE_IRQ,
1028 },
1029 [2] = {
1030 /* place holder for contiguous memory */
1031 },
1032 };
1033
1034 static struct platform_device ceu_device = {
1035 .name = "sh_mobile_ceu",
1036 .id = 0, /* "ceu0" clock */
1037 .num_resources = ARRAY_SIZE(ceu_resources),
1038 .resource = ceu_resources,
1039 .dev = {
1040 .platform_data = &sh_mobile_ceu_info,
1041 .coherent_dma_mask = 0xffffffff,
1042 },
1043 };
1044
1045 static struct platform_device *ap4evb_devices[] __initdata = {
1046 &leds_device,
1047 &nor_flash_device,
1048 &smc911x_device,
1049 &sdhi0_device,
1050 &sdhi1_device,
1051 &usb1_host_device,
1052 &fsi_device,
1053 &fsi_ak4643_device,
1054 &fsi_hdmi_device,
1055 &sh_mmcif_device,
1056 &hdmi_device,
1057 &lcdc_device,
1058 &lcdc1_device,
1059 &ceu_device,
1060 &ap4evb_camera,
1061 &meram_device,
1062 };
1063
1064 static void __init hdmi_init_pm_clock(void)
1065 {
1066 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1067 int ret;
1068 long rate;
1069
1070 if (IS_ERR(hdmi_ick)) {
1071 ret = PTR_ERR(hdmi_ick);
1072 pr_err("Cannot get HDMI ICK: %d\n", ret);
1073 goto out;
1074 }
1075
1076 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
1077 if (ret < 0) {
1078 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1079 goto out;
1080 }
1081
1082 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1083
1084 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1085 if (rate < 0) {
1086 pr_err("Cannot get suitable rate: %ld\n", rate);
1087 ret = rate;
1088 goto out;
1089 }
1090
1091 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1092 if (ret < 0) {
1093 pr_err("Cannot set rate %ld: %d\n", rate, ret);
1094 goto out;
1095 }
1096
1097 pr_debug("PLLC2 set frequency %lu\n", rate);
1098
1099 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1100 if (ret < 0)
1101 pr_err("Cannot set HDMI parent: %d\n", ret);
1102
1103 out:
1104 if (!IS_ERR(hdmi_ick))
1105 clk_put(hdmi_ick);
1106 }
1107
1108 static void __init fsi_init_pm_clock(void)
1109 {
1110 struct clk *fsia_ick;
1111 int ret;
1112
1113 fsia_ick = clk_get(&fsi_device.dev, "icka");
1114 if (IS_ERR(fsia_ick)) {
1115 ret = PTR_ERR(fsia_ick);
1116 pr_err("Cannot get FSI ICK: %d\n", ret);
1117 return;
1118 }
1119
1120 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1121 if (ret < 0)
1122 pr_err("Cannot set FSI-A parent: %d\n", ret);
1123
1124 clk_put(fsia_ick);
1125 }
1126
1127 /*
1128 * FIXME !!
1129 *
1130 * gpio_no_direction
1131 * are quick_hack.
1132 *
1133 * current gpio frame work doesn't have
1134 * the method to control only pull up/down/free.
1135 * this function should be replaced by correct gpio function
1136 */
1137 static void __init gpio_no_direction(u32 addr)
1138 {
1139 __raw_writeb(0x00, addr);
1140 }
1141
1142 /* TouchScreen */
1143 #ifdef CONFIG_AP4EVB_QHD
1144 # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1145 # define GPIO_TSC_PORT GPIO_PORT123
1146 #else /* WVGA */
1147 # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1148 # define GPIO_TSC_PORT GPIO_PORT40
1149 #endif
1150
1151 #define IRQ28 evt2irq(0x3380) /* IRQ28A */
1152 #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1153 static int ts_get_pendown_state(void)
1154 {
1155 int val;
1156
1157 gpio_free(GPIO_TSC_IRQ);
1158
1159 gpio_request(GPIO_TSC_PORT, NULL);
1160
1161 gpio_direction_input(GPIO_TSC_PORT);
1162
1163 val = gpio_get_value(GPIO_TSC_PORT);
1164
1165 gpio_request(GPIO_TSC_IRQ, NULL);
1166
1167 return !val;
1168 }
1169
1170 static int ts_init(void)
1171 {
1172 gpio_request(GPIO_TSC_IRQ, NULL);
1173
1174 return 0;
1175 }
1176
1177 static struct tsc2007_platform_data tsc2007_info = {
1178 .model = 2007,
1179 .x_plate_ohms = 180,
1180 .get_pendown_state = ts_get_pendown_state,
1181 .init_platform_hw = ts_init,
1182 };
1183
1184 static struct i2c_board_info tsc_device = {
1185 I2C_BOARD_INFO("tsc2007", 0x48),
1186 .type = "tsc2007",
1187 .platform_data = &tsc2007_info,
1188 /*.irq is selected on ap4evb_init */
1189 };
1190
1191 /* I2C */
1192 static struct i2c_board_info i2c0_devices[] = {
1193 {
1194 I2C_BOARD_INFO("ak4643", 0x13),
1195 },
1196 };
1197
1198 static struct i2c_board_info i2c1_devices[] = {
1199 {
1200 I2C_BOARD_INFO("r2025sd", 0x32),
1201 },
1202 };
1203
1204 static struct map_desc ap4evb_io_desc[] __initdata = {
1205 /* create a 1:1 entity map for 0xe6xxxxxx
1206 * used by CPGA, INTC and PFC.
1207 */
1208 {
1209 .virtual = 0xe6000000,
1210 .pfn = __phys_to_pfn(0xe6000000),
1211 .length = 256 << 20,
1212 .type = MT_DEVICE_NONSHARED
1213 },
1214 };
1215
1216 static void __init ap4evb_map_io(void)
1217 {
1218 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1219
1220 /* setup early devices and console here as well */
1221 sh7372_add_early_devices();
1222 shmobile_setup_console();
1223 }
1224
1225 #define GPIO_PORT9CR 0xE6051009
1226 #define GPIO_PORT10CR 0xE605100A
1227 #define USCCR1 0xE6058144
1228 static void __init ap4evb_init(void)
1229 {
1230 u32 srcr4;
1231 struct clk *clk;
1232
1233 sh7372_pinmux_init();
1234
1235 /* enable SCIFA0 */
1236 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1237 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1238
1239 /* enable SMSC911X */
1240 gpio_request(GPIO_FN_CS5A, NULL);
1241 gpio_request(GPIO_FN_IRQ6_39, NULL);
1242
1243 /* enable Debug switch (S6) */
1244 gpio_request(GPIO_PORT32, NULL);
1245 gpio_request(GPIO_PORT33, NULL);
1246 gpio_request(GPIO_PORT34, NULL);
1247 gpio_request(GPIO_PORT35, NULL);
1248 gpio_direction_input(GPIO_PORT32);
1249 gpio_direction_input(GPIO_PORT33);
1250 gpio_direction_input(GPIO_PORT34);
1251 gpio_direction_input(GPIO_PORT35);
1252 gpio_export(GPIO_PORT32, 0);
1253 gpio_export(GPIO_PORT33, 0);
1254 gpio_export(GPIO_PORT34, 0);
1255 gpio_export(GPIO_PORT35, 0);
1256
1257 /* SDHI0 */
1258 gpio_request(GPIO_FN_SDHICD0, NULL);
1259 gpio_request(GPIO_FN_SDHIWP0, NULL);
1260 gpio_request(GPIO_FN_SDHICMD0, NULL);
1261 gpio_request(GPIO_FN_SDHICLK0, NULL);
1262 gpio_request(GPIO_FN_SDHID0_3, NULL);
1263 gpio_request(GPIO_FN_SDHID0_2, NULL);
1264 gpio_request(GPIO_FN_SDHID0_1, NULL);
1265 gpio_request(GPIO_FN_SDHID0_0, NULL);
1266
1267 /* SDHI1 */
1268 gpio_request(GPIO_FN_SDHICMD1, NULL);
1269 gpio_request(GPIO_FN_SDHICLK1, NULL);
1270 gpio_request(GPIO_FN_SDHID1_3, NULL);
1271 gpio_request(GPIO_FN_SDHID1_2, NULL);
1272 gpio_request(GPIO_FN_SDHID1_1, NULL);
1273 gpio_request(GPIO_FN_SDHID1_0, NULL);
1274
1275 /* MMCIF */
1276 gpio_request(GPIO_FN_MMCD0_0, NULL);
1277 gpio_request(GPIO_FN_MMCD0_1, NULL);
1278 gpio_request(GPIO_FN_MMCD0_2, NULL);
1279 gpio_request(GPIO_FN_MMCD0_3, NULL);
1280 gpio_request(GPIO_FN_MMCD0_4, NULL);
1281 gpio_request(GPIO_FN_MMCD0_5, NULL);
1282 gpio_request(GPIO_FN_MMCD0_6, NULL);
1283 gpio_request(GPIO_FN_MMCD0_7, NULL);
1284 gpio_request(GPIO_FN_MMCCMD0, NULL);
1285 gpio_request(GPIO_FN_MMCCLK0, NULL);
1286
1287 /* USB enable */
1288 gpio_request(GPIO_FN_VBUS0_1, NULL);
1289 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1290 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1291 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1292 gpio_request(GPIO_FN_EXTLP_1, NULL);
1293 gpio_request(GPIO_FN_OVCN2_1, NULL);
1294
1295 /* setup USB phy */
1296 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
1297
1298 /* enable FSI2 port A (ak4643) */
1299 gpio_request(GPIO_FN_FSIAIBT, NULL);
1300 gpio_request(GPIO_FN_FSIAILR, NULL);
1301 gpio_request(GPIO_FN_FSIAISLD, NULL);
1302 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1303 gpio_request(GPIO_PORT161, NULL);
1304 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1305
1306 gpio_request(GPIO_PORT9, NULL);
1307 gpio_request(GPIO_PORT10, NULL);
1308 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1309 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1310
1311 /* card detect pin for MMC slot (CN7) */
1312 gpio_request(GPIO_PORT41, NULL);
1313 gpio_direction_input(GPIO_PORT41);
1314
1315 /* setup FSI2 port B (HDMI) */
1316 gpio_request(GPIO_FN_FSIBCK, NULL);
1317 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1318
1319 /* set SPU2 clock to 119.6 MHz */
1320 clk = clk_get(NULL, "spu_clk");
1321 if (!IS_ERR(clk)) {
1322 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1323 clk_put(clk);
1324 }
1325
1326 /*
1327 * set irq priority, to avoid sound chopping
1328 * when NFS rootfs is used
1329 * FSI(3) > SMSC911X(2)
1330 */
1331 intc_set_priority(IRQ_FSI, 3);
1332
1333 i2c_register_board_info(0, i2c0_devices,
1334 ARRAY_SIZE(i2c0_devices));
1335
1336 i2c_register_board_info(1, i2c1_devices,
1337 ARRAY_SIZE(i2c1_devices));
1338
1339 #ifdef CONFIG_AP4EVB_QHD
1340
1341 /*
1342 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1343 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1344 */
1345
1346 /* enable KEYSC */
1347 gpio_request(GPIO_FN_KEYOUT0, NULL);
1348 gpio_request(GPIO_FN_KEYOUT1, NULL);
1349 gpio_request(GPIO_FN_KEYOUT2, NULL);
1350 gpio_request(GPIO_FN_KEYOUT3, NULL);
1351 gpio_request(GPIO_FN_KEYOUT4, NULL);
1352 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1353 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1354 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1355 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1356 gpio_request(GPIO_FN_KEYIN4, NULL);
1357
1358 /* enable TouchScreen */
1359 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1360
1361 tsc_device.irq = IRQ28;
1362 i2c_register_board_info(1, &tsc_device, 1);
1363
1364 /* LCDC0 */
1365 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1366 lcdc_info.ch[0].interface_type = RGB24;
1367 lcdc_info.ch[0].clock_divider = 1;
1368 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1369 lcdc_info.ch[0].panel_cfg.width = 44;
1370 lcdc_info.ch[0].panel_cfg.height = 79;
1371
1372 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1373
1374 #else
1375 /*
1376 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1377 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1378 */
1379
1380 gpio_request(GPIO_FN_LCDD17, NULL);
1381 gpio_request(GPIO_FN_LCDD16, NULL);
1382 gpio_request(GPIO_FN_LCDD15, NULL);
1383 gpio_request(GPIO_FN_LCDD14, NULL);
1384 gpio_request(GPIO_FN_LCDD13, NULL);
1385 gpio_request(GPIO_FN_LCDD12, NULL);
1386 gpio_request(GPIO_FN_LCDD11, NULL);
1387 gpio_request(GPIO_FN_LCDD10, NULL);
1388 gpio_request(GPIO_FN_LCDD9, NULL);
1389 gpio_request(GPIO_FN_LCDD8, NULL);
1390 gpio_request(GPIO_FN_LCDD7, NULL);
1391 gpio_request(GPIO_FN_LCDD6, NULL);
1392 gpio_request(GPIO_FN_LCDD5, NULL);
1393 gpio_request(GPIO_FN_LCDD4, NULL);
1394 gpio_request(GPIO_FN_LCDD3, NULL);
1395 gpio_request(GPIO_FN_LCDD2, NULL);
1396 gpio_request(GPIO_FN_LCDD1, NULL);
1397 gpio_request(GPIO_FN_LCDD0, NULL);
1398 gpio_request(GPIO_FN_LCDDISP, NULL);
1399 gpio_request(GPIO_FN_LCDDCK, NULL);
1400
1401 gpio_request(GPIO_PORT189, NULL); /* backlight */
1402 gpio_direction_output(GPIO_PORT189, 1);
1403
1404 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1405 gpio_direction_output(GPIO_PORT151, 1);
1406
1407 lcdc_info.clock_source = LCDC_CLK_BUS;
1408 lcdc_info.ch[0].interface_type = RGB18;
1409 lcdc_info.ch[0].clock_divider = 3;
1410 lcdc_info.ch[0].flags = 0;
1411 lcdc_info.ch[0].panel_cfg.width = 152;
1412 lcdc_info.ch[0].panel_cfg.height = 91;
1413
1414 /* enable TouchScreen */
1415 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1416
1417 tsc_device.irq = IRQ7;
1418 i2c_register_board_info(0, &tsc_device, 1);
1419 #endif /* CONFIG_AP4EVB_QHD */
1420
1421 /* CEU */
1422
1423 /*
1424 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1425 * becomes available
1426 */
1427
1428 /* MIPI-CSI stuff */
1429 gpio_request(GPIO_FN_VIO_CKO, NULL);
1430
1431 clk = clk_get(NULL, "vck1_clk");
1432 if (!IS_ERR(clk)) {
1433 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1434 clk_enable(clk);
1435 clk_put(clk);
1436 }
1437
1438 sh7372_add_standard_devices();
1439
1440 /* HDMI */
1441 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1442 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1443
1444 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1445 #define SRCR4 0xe61580bc
1446 srcr4 = __raw_readl(SRCR4);
1447 __raw_writel(srcr4 | (1 << 13), SRCR4);
1448 udelay(50);
1449 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1450
1451 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1452
1453 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
1454 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1455 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
1456
1457 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1458 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1459 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1460 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
1461
1462 hdmi_init_pm_clock();
1463 fsi_init_pm_clock();
1464 sh7372_pm_init();
1465 pm_clk_add(&fsi_device.dev, "spu2");
1466 pm_clk_add(&lcdc1_device.dev, "hdmi");
1467 }
1468
1469 static void __init ap4evb_timer_init(void)
1470 {
1471 sh7372_clock_init();
1472 shmobile_timer.init();
1473
1474 /* External clock source */
1475 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1476 }
1477
1478 static struct sys_timer ap4evb_timer = {
1479 .init = ap4evb_timer_init,
1480 };
1481
1482 MACHINE_START(AP4EVB, "ap4evb")
1483 .map_io = ap4evb_map_io,
1484 .init_irq = sh7372_init_irq,
1485 .handle_irq = shmobile_handle_irq_intc,
1486 .init_machine = ap4evb_init,
1487 .timer = &ap4evb_timer,
1488 MACHINE_END
kernel source for telekom puls (alcatel/mediatek)