arch/arm/mach-sa1100/time.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/time.c
   3  *
   4  * Copyright (C) 1998 Deborah Wallach.
   5  * Twiddles  (C) 1999 Hugo Fiennes <hugo@empeg.com>
   6  *
   7  * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
   8  *      Rewritten: big cleanup, much simpler, better HZ accuracy.
   9  *
  10  */
  11 #include <linux/init.h>
  12 #include <linux/errno.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/irq.h>
  15 #include <linux/timex.h>
  16 #include <linux/clockchips.h>
  17
  18 #include <asm/mach/time.h>
  19 #include <mach/hardware.h>
  20
  21 #define MIN_OSCR_DELTA 2
  22
  23 static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
  24 {
  25         struct clock_event_device *c = dev_id;
  26
  27         /* Disarm the compare/match, signal the event. */
  28         OIER &= ~OIER_E0;
  29         OSSR = OSSR_M0;
  30         c->event_handler(c);
  31
  32         return IRQ_HANDLED;
  33 }
  34
  35 static int
  36 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
  37 {
  38         unsigned long next, oscr;
  39
  40         OIER |= OIER_E0;
  41         next = OSCR + delta;
  42         OSMR0 = next;
  43         oscr = OSCR;
  44
  45         return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
  46 }
  47
  48 static void
  49 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
  50 {
  51         switch (mode) {
  52         case CLOCK_EVT_MODE_ONESHOT:
  53         case CLOCK_EVT_MODE_UNUSED:
  54         case CLOCK_EVT_MODE_SHUTDOWN:
  55                 OIER &= ~OIER_E0;
  56                 OSSR = OSSR_M0;
  57                 break;
  58
  59         case CLOCK_EVT_MODE_RESUME:
  60         case CLOCK_EVT_MODE_PERIODIC:
  61                 break;
  62         }
  63 }
  64
  65 static struct clock_event_device ckevt_sa1100_osmr0 = {
  66         .name           = "osmr0",
  67         .features       = CLOCK_EVT_FEAT_ONESHOT,
  68         .shift          = 32,
  69         .rating         = 200,
  70         .set_next_event = sa1100_osmr0_set_next_event,
  71         .set_mode       = sa1100_osmr0_set_mode,
  72 };
  73
  74 static cycle_t sa1100_read_oscr(struct clocksource *s)
  75 {
  76         return OSCR;
  77 }
  78
  79 static struct clocksource cksrc_sa1100_oscr = {
  80         .name           = "oscr",
  81         .rating         = 200,
  82         .read           = sa1100_read_oscr,
  83         .mask           = CLOCKSOURCE_MASK(32),
  84         .shift          = 20,
  85         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
  86 };
  87
  88 static struct irqaction sa1100_timer_irq = {
  89         .name           = "ost0",
  90         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  91         .handler        = sa1100_ost0_interrupt,
  92         .dev_id         = &ckevt_sa1100_osmr0,
  93 };
  94
  95 static void __init sa1100_timer_init(void)
  96 {
  97         OIER = 0;               /* disable any timer interrupts */
  98         OSSR = 0xf;             /* clear status on all timers */
  99
 100         ckevt_sa1100_osmr0.mult =
 101                 div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
 102         ckevt_sa1100_osmr0.max_delta_ns =
 103                 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
 104         ckevt_sa1100_osmr0.min_delta_ns =
 105                 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
 106         ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
 107
 108         cksrc_sa1100_oscr.mult =
 109                 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
 110
 111         setup_irq(IRQ_OST0, &sa1100_timer_irq);
 112
 113         clocksource_register(&cksrc_sa1100_oscr);
 114         clockevents_register_device(&ckevt_sa1100_osmr0);
 115 }
 116
 117 #ifdef CONFIG_PM
 118 unsigned long osmr[4], oier;
 119
 120 static void sa1100_timer_suspend(void)
 121 {
 122         osmr[0] = OSMR0;
 123         osmr[1] = OSMR1;
 124         osmr[2] = OSMR2;
 125         osmr[3] = OSMR3;
 126         oier = OIER;
 127 }
 128
 129 static void sa1100_timer_resume(void)
 130 {
 131         OSSR = 0x0f;
 132         OSMR0 = osmr[0];
 133         OSMR1 = osmr[1];
 134         OSMR2 = osmr[2];
 135         OSMR3 = osmr[3];
 136         OIER = oier;
 137
 138         /*
 139          * OSMR0 is the system timer: make sure OSCR is sufficiently behind
 140          */
 141         OSCR = OSMR0 - LATCH;
 142 }
 143 #else
 144 #define sa1100_timer_suspend NULL
 145 #define sa1100_timer_resume NULL
 146 #endif
 147
 148 struct sys_timer sa1100_timer = {
 149         .init           = sa1100_timer_init,
 150         .suspend        = sa1100_timer_suspend,
 151         .resume         = sa1100_timer_resume,
 152 };