2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/gpio.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
19 #include <linux/cpufreq.h>
20 #include <linux/ioport.h>
21 #include <linux/platform_device.h>
23 #include <video/sa1100fb.h>
25 #include <asm/div64.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach/flash.h>
29 #include <asm/system_misc.h>
31 #include <mach/hardware.h>
32 #include <mach/irqs.h>
33 #include <mach/reset.h>
37 unsigned int reset_status
;
38 EXPORT_SYMBOL(reset_status
);
43 * This table is setup for a 3.6864MHz Crystal.
45 static const unsigned short cclk_frequency_100khz
[NR_FREQS
] = {
65 unsigned int sa11x0_freq_to_ppcr(unsigned int khz
)
71 for (i
= 0; i
< NR_FREQS
; i
++)
72 if (cclk_frequency_100khz
[i
] >= khz
)
78 unsigned int sa11x0_ppcr_to_freq(unsigned int idx
)
80 unsigned int freq
= 0;
82 freq
= cclk_frequency_100khz
[idx
] * 100;
87 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
88 * this platform, anyway.
90 int sa11x0_verify_speed(struct cpufreq_policy
*policy
)
96 cpufreq_verify_within_limits(policy
, policy
->cpuinfo
.min_freq
, policy
->cpuinfo
.max_freq
);
98 /* make sure that at least one frequency is within the policy */
99 tmp
= cclk_frequency_100khz
[sa11x0_freq_to_ppcr(policy
->min
)] * 100;
100 if (tmp
> policy
->max
)
103 cpufreq_verify_within_limits(policy
, policy
->cpuinfo
.min_freq
, policy
->cpuinfo
.max_freq
);
108 unsigned int sa11x0_getspeed(unsigned int cpu
)
112 return cclk_frequency_100khz
[PPCR
& 0xf] * 100;
116 * Default power-off for SA1100
118 static void sa1100_power_off(void)
122 /* disable internal oscillator, float CS lines */
123 PCFR
= (PCFR_OPDE
| PCFR_FP
| PCFR_FS
);
124 /* enable wake-up on GPIO0 (Assabet...) */
125 PWER
= GFER
= GRER
= 1;
127 * set scratchpad to zero, just in case it is used as a
128 * restart address by the bootloader.
131 /* enter sleep mode */
135 void sa11x0_restart(char mode
, const char *cmd
)
137 clear_reset_status(RESET_STATUS_ALL
);
139 /* Jump into ROM at address 0 */
142 /* Use on-chip reset capability */
147 static void sa11x0_register_device(struct platform_device
*dev
, void *data
)
150 dev
->dev
.platform_data
= data
;
151 err
= platform_device_register(dev
);
153 printk(KERN_ERR
"Unable to register device %s: %d\n",
158 static struct resource sa11x0udc_resources
[] = {
159 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR
), SZ_64K
),
160 [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC
),
163 static u64 sa11x0udc_dma_mask
= 0xffffffffUL
;
165 static struct platform_device sa11x0udc_device
= {
166 .name
= "sa11x0-udc",
169 .dma_mask
= &sa11x0udc_dma_mask
,
170 .coherent_dma_mask
= 0xffffffff,
172 .num_resources
= ARRAY_SIZE(sa11x0udc_resources
),
173 .resource
= sa11x0udc_resources
,
176 static struct resource sa11x0uart1_resources
[] = {
177 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0
), SZ_64K
),
178 [1] = DEFINE_RES_IRQ(IRQ_Ser1UART
),
181 static struct platform_device sa11x0uart1_device
= {
182 .name
= "sa11x0-uart",
184 .num_resources
= ARRAY_SIZE(sa11x0uart1_resources
),
185 .resource
= sa11x0uart1_resources
,
188 static struct resource sa11x0uart3_resources
[] = {
189 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0
), SZ_64K
),
190 [1] = DEFINE_RES_IRQ(IRQ_Ser3UART
),
193 static struct platform_device sa11x0uart3_device
= {
194 .name
= "sa11x0-uart",
196 .num_resources
= ARRAY_SIZE(sa11x0uart3_resources
),
197 .resource
= sa11x0uart3_resources
,
200 static struct resource sa11x0mcp_resources
[] = {
201 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0
), SZ_64K
),
202 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1
), 4),
203 [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP
),
206 static u64 sa11x0mcp_dma_mask
= 0xffffffffUL
;
208 static struct platform_device sa11x0mcp_device
= {
209 .name
= "sa11x0-mcp",
212 .dma_mask
= &sa11x0mcp_dma_mask
,
213 .coherent_dma_mask
= 0xffffffff,
215 .num_resources
= ARRAY_SIZE(sa11x0mcp_resources
),
216 .resource
= sa11x0mcp_resources
,
219 void __init
sa11x0_ppc_configure_mcp(void)
221 /* Setup the PPC unit for the MCP */
223 PPDR
|= PPC_TXD4
| PPC_SCLK
| PPC_SFRM
;
225 PSDR
&= ~(PPC_TXD4
| PPC_SCLK
| PPC_SFRM
);
226 PPSR
&= ~(PPC_TXD4
| PPC_SCLK
| PPC_SFRM
);
229 void sa11x0_register_mcp(struct mcp_plat_data
*data
)
231 sa11x0_register_device(&sa11x0mcp_device
, data
);
234 static struct resource sa11x0ssp_resources
[] = {
235 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K
),
236 [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP
),
239 static u64 sa11x0ssp_dma_mask
= 0xffffffffUL
;
241 static struct platform_device sa11x0ssp_device
= {
242 .name
= "sa11x0-ssp",
245 .dma_mask
= &sa11x0ssp_dma_mask
,
246 .coherent_dma_mask
= 0xffffffff,
248 .num_resources
= ARRAY_SIZE(sa11x0ssp_resources
),
249 .resource
= sa11x0ssp_resources
,
252 static struct resource sa11x0fb_resources
[] = {
253 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K
),
254 [1] = DEFINE_RES_IRQ(IRQ_LCD
),
257 static struct platform_device sa11x0fb_device
= {
261 .coherent_dma_mask
= 0xffffffff,
263 .num_resources
= ARRAY_SIZE(sa11x0fb_resources
),
264 .resource
= sa11x0fb_resources
,
267 void sa11x0_register_lcd(struct sa1100fb_mach_info
*inf
)
269 sa11x0_register_device(&sa11x0fb_device
, inf
);
272 static struct platform_device sa11x0pcmcia_device
= {
273 .name
= "sa11x0-pcmcia",
277 static struct platform_device sa11x0mtd_device
= {
278 .name
= "sa1100-mtd",
282 void sa11x0_register_mtd(struct flash_platform_data
*flash
,
283 struct resource
*res
, int nr
)
285 flash
->name
= "sa1100";
286 sa11x0mtd_device
.resource
= res
;
287 sa11x0mtd_device
.num_resources
= nr
;
288 sa11x0_register_device(&sa11x0mtd_device
, flash
);
291 static struct resource sa11x0ir_resources
[] = {
292 DEFINE_RES_MEM(__PREG(Ser2UTCR0
), 0x24),
293 DEFINE_RES_MEM(__PREG(Ser2HSCR0
), 0x1c),
294 DEFINE_RES_MEM(__PREG(Ser2HSCR2
), 0x04),
295 DEFINE_RES_IRQ(IRQ_Ser2ICP
),
298 static struct platform_device sa11x0ir_device
= {
301 .num_resources
= ARRAY_SIZE(sa11x0ir_resources
),
302 .resource
= sa11x0ir_resources
,
305 void sa11x0_register_irda(struct irda_platform_data
*irda
)
307 sa11x0_register_device(&sa11x0ir_device
, irda
);
310 static struct resource sa1100_rtc_resources
[] = {
311 DEFINE_RES_MEM(0x90010000, 0x40),
312 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz
, "rtc 1Hz"),
313 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm
, "rtc alarm"),
316 static struct platform_device sa11x0rtc_device
= {
317 .name
= "sa1100-rtc",
319 .num_resources
= ARRAY_SIZE(sa1100_rtc_resources
),
320 .resource
= sa1100_rtc_resources
,
323 static struct resource sa11x0dma_resources
[] = {
324 DEFINE_RES_MEM(DMA_PHYS
, DMA_SIZE
),
325 DEFINE_RES_IRQ(IRQ_DMA0
),
326 DEFINE_RES_IRQ(IRQ_DMA1
),
327 DEFINE_RES_IRQ(IRQ_DMA2
),
328 DEFINE_RES_IRQ(IRQ_DMA3
),
329 DEFINE_RES_IRQ(IRQ_DMA4
),
330 DEFINE_RES_IRQ(IRQ_DMA5
),
333 static u64 sa11x0dma_dma_mask
= DMA_BIT_MASK(32);
335 static struct platform_device sa11x0dma_device
= {
336 .name
= "sa11x0-dma",
339 .dma_mask
= &sa11x0dma_dma_mask
,
340 .coherent_dma_mask
= 0xffffffff,
342 .num_resources
= ARRAY_SIZE(sa11x0dma_resources
),
343 .resource
= sa11x0dma_resources
,
346 static struct platform_device
*sa11x0_devices
[] __initdata
= {
351 &sa11x0pcmcia_device
,
356 static int __init
sa1100_init(void)
358 pm_power_off
= sa1100_power_off
;
359 return platform_add_devices(sa11x0_devices
, ARRAY_SIZE(sa11x0_devices
));
362 arch_initcall(sa1100_init
);
364 void __init
sa11x0_init_late(void)
370 * Common I/O mapping:
372 * Typically, static virtual address mappings are as follow:
374 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
375 * 0xf4000000-0xf4ffffff: SA-1111
376 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
377 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
378 * 0xffff0000-0xffff0fff: SA1100 exception vectors
379 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
381 * Below 0xe8000000 is reserved for vm allocation.
383 * The machine specific code must provide the extra mapping beside the
384 * default mapping provided here.
387 static struct map_desc standard_io_desc
[] __initdata
= {
389 .virtual = 0xf8000000,
390 .pfn
= __phys_to_pfn(0x80000000),
391 .length
= 0x00100000,
394 .virtual = 0xfa000000,
395 .pfn
= __phys_to_pfn(0x90000000),
396 .length
= 0x00100000,
399 .virtual = 0xfc000000,
400 .pfn
= __phys_to_pfn(0xa0000000),
401 .length
= 0x00100000,
404 .virtual = 0xfe000000,
405 .pfn
= __phys_to_pfn(0xb0000000),
406 .length
= 0x00200000,
411 void __init
sa1100_map_io(void)
413 iotable_init(standard_io_desc
, ARRAY_SIZE(standard_io_desc
));
417 * Disable the memory bus request/grant signals on the SA1110 to
418 * ensure that we don't receive spurious memory requests. We set
419 * the MBGNT signal false to ensure the SA1111 doesn't own the
422 void sa1110_mb_disable(void)
426 local_irq_save(flags
);
430 GPDR
= (GPDR
& ~GPIO_MBREQ
) | GPIO_MBGNT
;
432 GAFR
&= ~(GPIO_MBGNT
| GPIO_MBREQ
);
434 local_irq_restore(flags
);
438 * If the system is going to use the SA-1111 DMA engines, set up
439 * the memory bus request/grant pins.
441 void sa1110_mb_enable(void)
445 local_irq_save(flags
);
449 GPDR
= (GPDR
& ~GPIO_MBREQ
) | GPIO_MBGNT
;
451 GAFR
|= (GPIO_MBGNT
| GPIO_MBREQ
);
454 local_irq_restore(flags
);