Merge git://git.kernel.org/pub/scm/virt/kvm/kvm
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/list.h>
16 #include <linux/serial_core.h>
17 #include <linux/platform_device.h>
18 #include <linux/fb.h>
19 #include <linux/io.h>
20 #include <linux/init.h>
21 #include <linux/gpio.h>
22 #include <linux/leds.h>
23 #include <linux/delay.h>
24 #include <linux/mmc/host.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/fixed.h>
27 #include <linux/pwm_backlight.h>
28 #include <linux/dm9000.h>
29 #include <linux/gpio_keys.h>
30 #include <linux/basic_mmio_gpio.h>
31 #include <linux/spi/spi.h>
32
33 #include <linux/i2c/pca953x.h>
34 #include <linux/platform_data/s3c-hsotg.h>
35
36 #include <video/platform_lcd.h>
37
38 #include <linux/mfd/wm831x/core.h>
39 #include <linux/mfd/wm831x/pdata.h>
40 #include <linux/mfd/wm831x/irq.h>
41 #include <linux/mfd/wm831x/gpio.h>
42
43 #include <sound/wm1250-ev1.h>
44
45 #include <asm/hardware/vic.h>
46 #include <asm/mach/arch.h>
47 #include <asm/mach-types.h>
48
49 #include <video/samsung_fimd.h>
50 #include <mach/hardware.h>
51 #include <mach/map.h>
52
53 #include <mach/regs-sys.h>
54 #include <mach/regs-gpio.h>
55 #include <mach/regs-modem.h>
56 #include <mach/crag6410.h>
57
58 #include <mach/regs-gpio-memport.h>
59
60 #include <plat/regs-serial.h>
61 #include <plat/fb.h>
62 #include <plat/sdhci.h>
63 #include <plat/gpio-cfg.h>
64 #include <linux/platform_data/spi-s3c64xx.h>
65
66 #include <plat/keypad.h>
67 #include <plat/clock.h>
68 #include <plat/devs.h>
69 #include <plat/cpu.h>
70 #include <plat/adc.h>
71 #include <linux/platform_data/i2c-s3c2410.h>
72 #include <plat/pm.h>
73
74 #include "common.h"
75
76 /* serial port setup */
77
78 #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82 static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
84 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
89 },
90 [1] = {
91 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
96 },
97 [2] = {
98 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
103 },
104 [3] = {
105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
110 },
111 };
112
113 static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118 };
119
120 static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127 };
128
129 static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130 {
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141 }
142
143 static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150 };
151
152 /* 640x480 URT */
153 static struct s3c_fb_pd_win crag6410_fb_win0 = {
154 .max_bpp = 32,
155 .default_bpp = 16,
156 .xres = 640,
157 .yres = 480,
158 .virtual_y = 480 * 2,
159 .virtual_x = 640,
160 };
161
162 static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171 };
172
173 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
174 static struct s3c_fb_platdata crag6410_lcd_pdata = {
175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
176 .vtiming = &crag6410_lcd_timing,
177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180 };
181
182 /* 2x6 keypad */
183
184 static uint32_t crag6410_keymap[] = {
185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198 };
199
200 static struct matrix_keymap_data crag6410_keymap_data = {
201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203 };
204
205 static struct samsung_keypad_platdata crag6410_keypad_data = {
206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209 };
210
211 static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
215 .type = EV_KEY,
216 .wakeup = 1,
217 .active_low = 1,
218 },
219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
224 };
225
226 static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229 };
230
231 static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235 };
236
237 static struct resource crag6410_dm9k_resource[] = {
238 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241 | IORESOURCE_IRQ_HIGHLEVEL),
242 };
243
244 static struct dm9000_plat_data mini6410_dm9k_pdata = {
245 .flags = DM9000_PLATF_16BITONLY,
246 };
247
248 static struct platform_device crag6410_dm9k_device = {
249 .name = "dm9000",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
252 .resource = crag6410_dm9k_resource,
253 .dev.platform_data = &mini6410_dm9k_pdata,
254 };
255
256 static struct resource crag6410_mmgpio_resource[] = {
257 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
258 };
259
260 static struct platform_device crag6410_mmgpio = {
261 .name = "basic-mmio-gpio",
262 .id = -1,
263 .resource = crag6410_mmgpio_resource,
264 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
265 .dev.platform_data = &(struct bgpio_pdata) {
266 .base = MMGPIO_GPIO_BASE,
267 },
268 };
269
270 static struct platform_device speyside_device = {
271 .name = "speyside",
272 .id = -1,
273 };
274
275 static struct platform_device lowland_device = {
276 .name = "lowland",
277 .id = -1,
278 };
279
280 static struct platform_device tobermory_device = {
281 .name = "tobermory",
282 .id = -1,
283 };
284
285 static struct platform_device littlemill_device = {
286 .name = "littlemill",
287 .id = -1,
288 };
289
290 static struct platform_device bells_wm2200_device = {
291 .name = "bells",
292 .id = 0,
293 };
294
295 static struct platform_device bells_wm5102_device = {
296 .name = "bells",
297 .id = 1,
298 };
299
300 static struct platform_device bells_wm5110_device = {
301 .name = "bells",
302 .id = 2,
303 };
304
305 static struct regulator_consumer_supply wallvdd_consumers[] = {
306 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
307 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
309 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
310 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
311
312 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
313 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
314 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
315 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
316 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
317 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
318
319 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
320 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
321 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
327 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
328 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
329 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
330 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
331 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
332
333 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
334 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
335 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
336 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
341 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
342 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
343 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
344 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
345 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
346 };
347
348 static struct regulator_init_data wallvdd_data = {
349 .constraints = {
350 .always_on = 1,
351 },
352 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
353 .consumer_supplies = wallvdd_consumers,
354 };
355
356 static struct fixed_voltage_config wallvdd_pdata = {
357 .supply_name = "WALLVDD",
358 .microvolts = 5000000,
359 .init_data = &wallvdd_data,
360 .gpio = -EINVAL,
361 };
362
363 static struct platform_device wallvdd_device = {
364 .name = "reg-fixed-voltage",
365 .id = -1,
366 .dev = {
367 .platform_data = &wallvdd_pdata,
368 },
369 };
370
371 static struct platform_device *crag6410_devices[] __initdata = {
372 &s3c_device_hsmmc0,
373 &s3c_device_hsmmc2,
374 &s3c_device_i2c0,
375 &s3c_device_i2c1,
376 &s3c_device_fb,
377 &s3c_device_ohci,
378 &s3c_device_usb_hsotg,
379 &s3c_device_timer[0],
380 &s3c64xx_device_iis0,
381 &s3c64xx_device_iis1,
382 &samsung_device_keypad,
383 &crag6410_gpio_keydev,
384 &crag6410_dm9k_device,
385 &s3c64xx_device_spi0,
386 &crag6410_mmgpio,
387 &crag6410_lcd_powerdev,
388 &crag6410_backlight_device,
389 &speyside_device,
390 &tobermory_device,
391 &littlemill_device,
392 &lowland_device,
393 &bells_wm2200_device,
394 &bells_wm5102_device,
395 &bells_wm5110_device,
396 &wallvdd_device,
397 };
398
399 static struct pca953x_platform_data crag6410_pca_data = {
400 .gpio_base = PCA935X_GPIO_BASE,
401 .irq_base = -1,
402 };
403
404 /* VDDARM is controlled by DVS1 connected to GPK(0) */
405 static struct wm831x_buckv_pdata vddarm_pdata = {
406 .dvs_control_src = 1,
407 .dvs_gpio = S3C64XX_GPK(0),
408 };
409
410 static struct regulator_consumer_supply vddarm_consumers[] = {
411 REGULATOR_SUPPLY("vddarm", NULL),
412 };
413
414 static struct regulator_init_data vddarm = {
415 .constraints = {
416 .name = "VDDARM",
417 .min_uV = 1000000,
418 .max_uV = 1300000,
419 .always_on = 1,
420 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
421 },
422 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
423 .consumer_supplies = vddarm_consumers,
424 .supply_regulator = "WALLVDD",
425 .driver_data = &vddarm_pdata,
426 };
427
428 static struct regulator_consumer_supply vddint_consumers[] = {
429 REGULATOR_SUPPLY("vddint", NULL),
430 };
431
432 static struct regulator_init_data vddint = {
433 .constraints = {
434 .name = "VDDINT",
435 .min_uV = 1000000,
436 .max_uV = 1200000,
437 .always_on = 1,
438 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
439 },
440 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
441 .consumer_supplies = vddint_consumers,
442 .supply_regulator = "WALLVDD",
443 };
444
445 static struct regulator_init_data vddmem = {
446 .constraints = {
447 .name = "VDDMEM",
448 .always_on = 1,
449 },
450 };
451
452 static struct regulator_init_data vddsys = {
453 .constraints = {
454 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
455 .always_on = 1,
456 },
457 };
458
459 static struct regulator_consumer_supply vddmmc_consumers[] = {
460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
461 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
462 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
463 };
464
465 static struct regulator_init_data vddmmc = {
466 .constraints = {
467 .name = "VDDMMC,UH",
468 .always_on = 1,
469 },
470 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
471 .consumer_supplies = vddmmc_consumers,
472 .supply_regulator = "WALLVDD",
473 };
474
475 static struct regulator_init_data vddotgi = {
476 .constraints = {
477 .name = "VDDOTGi",
478 .always_on = 1,
479 },
480 .supply_regulator = "WALLVDD",
481 };
482
483 static struct regulator_init_data vddotg = {
484 .constraints = {
485 .name = "VDDOTG",
486 .always_on = 1,
487 },
488 .supply_regulator = "WALLVDD",
489 };
490
491 static struct regulator_init_data vddhi = {
492 .constraints = {
493 .name = "VDDHI",
494 .always_on = 1,
495 },
496 .supply_regulator = "WALLVDD",
497 };
498
499 static struct regulator_init_data vddadc = {
500 .constraints = {
501 .name = "VDDADC,VDDDAC",
502 .always_on = 1,
503 },
504 .supply_regulator = "WALLVDD",
505 };
506
507 static struct regulator_init_data vddmem0 = {
508 .constraints = {
509 .name = "VDDMEM0",
510 .always_on = 1,
511 },
512 .supply_regulator = "WALLVDD",
513 };
514
515 static struct regulator_init_data vddpll = {
516 .constraints = {
517 .name = "VDDPLL",
518 .always_on = 1,
519 },
520 .supply_regulator = "WALLVDD",
521 };
522
523 static struct regulator_init_data vddlcd = {
524 .constraints = {
525 .name = "VDDLCD",
526 .always_on = 1,
527 },
528 .supply_regulator = "WALLVDD",
529 };
530
531 static struct regulator_init_data vddalive = {
532 .constraints = {
533 .name = "VDDALIVE",
534 .always_on = 1,
535 },
536 .supply_regulator = "WALLVDD",
537 };
538
539 static struct wm831x_backup_pdata banff_backup_pdata = {
540 .charger_enable = 1,
541 .vlim = 2500, /* mV */
542 .ilim = 200, /* uA */
543 };
544
545 static struct wm831x_status_pdata banff_red_led = {
546 .name = "banff:red:",
547 .default_src = WM831X_STATUS_MANUAL,
548 };
549
550 static struct wm831x_status_pdata banff_green_led = {
551 .name = "banff:green:",
552 .default_src = WM831X_STATUS_MANUAL,
553 };
554
555 static struct wm831x_touch_pdata touch_pdata = {
556 .data_irq = S3C_EINT(26),
557 .pd_irq = S3C_EINT(27),
558 };
559
560 static struct wm831x_pdata crag_pmic_pdata = {
561 .wm831x_num = 1,
562 .gpio_base = BANFF_PMIC_GPIO_BASE,
563 .soft_shutdown = true,
564
565 .backup = &banff_backup_pdata,
566
567 .gpio_defaults = {
568 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
569 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
570 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
571 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
572 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
573 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
574 },
575
576 .dcdc = {
577 &vddarm, /* DCDC1 */
578 &vddint, /* DCDC2 */
579 &vddmem, /* DCDC3 */
580 },
581
582 .ldo = {
583 &vddsys, /* LDO1 */
584 &vddmmc, /* LDO2 */
585 NULL, /* LDO3 */
586 &vddotgi, /* LDO4 */
587 &vddotg, /* LDO5 */
588 &vddhi, /* LDO6 */
589 &vddadc, /* LDO7 */
590 &vddmem0, /* LDO8 */
591 &vddpll, /* LDO9 */
592 &vddlcd, /* LDO10 */
593 &vddalive, /* LDO11 */
594 },
595
596 .status = {
597 &banff_green_led,
598 &banff_red_led,
599 },
600
601 .touch = &touch_pdata,
602 };
603
604 static struct i2c_board_info i2c_devs0[] = {
605 { I2C_BOARD_INFO("24c08", 0x50), },
606 { I2C_BOARD_INFO("tca6408", 0x20),
607 .platform_data = &crag6410_pca_data,
608 },
609 { I2C_BOARD_INFO("wm8312", 0x34),
610 .platform_data = &crag_pmic_pdata,
611 .irq = S3C_EINT(23),
612 },
613 };
614
615 static struct s3c2410_platform_i2c i2c0_pdata = {
616 .frequency = 400000,
617 };
618
619 static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
620 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
621 REGULATOR_SUPPLY("AVDD", "spi0.0"),
622 REGULATOR_SUPPLY("AVDD", "spi0.1"),
623 };
624
625 static struct regulator_init_data pvdd_1v2 = {
626 .constraints = {
627 .name = "PVDD_1V2",
628 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
629 },
630
631 .consumer_supplies = pvdd_1v2_consumers,
632 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
633 };
634
635 static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
636 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
637 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
638 REGULATOR_SUPPLY("DBVDD", "1-001a"),
639 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
640 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
641 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
642 REGULATOR_SUPPLY("CPVDD", "1-001a"),
643 REGULATOR_SUPPLY("AVDD2", "1-001a"),
644 REGULATOR_SUPPLY("DCVDD", "1-001a"),
645 REGULATOR_SUPPLY("AVDD", "1-001a"),
646 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
647
648 REGULATOR_SUPPLY("DBVDD", "1-003a"),
649 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
650 REGULATOR_SUPPLY("CPVDD", "1-003a"),
651 REGULATOR_SUPPLY("AVDD", "1-003a"),
652 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
653 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
654 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
655 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
656 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
657
658 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
659 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
660 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
661
662 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
663 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
664 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
665 };
666
667 static struct regulator_init_data pvdd_1v8 = {
668 .constraints = {
669 .name = "PVDD_1V8",
670 .always_on = 1,
671 },
672
673 .consumer_supplies = pvdd_1v8_consumers,
674 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
675 };
676
677 static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
678 REGULATOR_SUPPLY("MICVDD", "1-001a"),
679 REGULATOR_SUPPLY("AVDD1", "1-001a"),
680 };
681
682 static struct regulator_init_data pvdd_3v3 = {
683 .constraints = {
684 .name = "PVDD_3V3",
685 .always_on = 1,
686 },
687
688 .consumer_supplies = pvdd_3v3_consumers,
689 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
690 };
691
692 static struct wm831x_pdata glenfarclas_pmic_pdata = {
693 .wm831x_num = 2,
694 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
695 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
696 .soft_shutdown = true,
697
698 .gpio_defaults = {
699 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
700 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
701 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
702 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
703 },
704
705 .dcdc = {
706 &pvdd_1v2, /* DCDC1 */
707 &pvdd_1v8, /* DCDC2 */
708 &pvdd_3v3, /* DCDC3 */
709 },
710
711 .disable_touch = true,
712 };
713
714 static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
715 .gpios = {
716 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
717 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
718 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
719 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
720 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
721 },
722 };
723
724 static struct i2c_board_info i2c_devs1[] = {
725 { I2C_BOARD_INFO("wm8311", 0x34),
726 .irq = S3C_EINT(0),
727 .platform_data = &glenfarclas_pmic_pdata },
728
729 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
730 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
731 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
732 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
733 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
734
735 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
736 .platform_data = &wm1250_ev1_pdata },
737 };
738
739 static struct s3c2410_platform_i2c i2c1_pdata = {
740 .frequency = 400000,
741 .bus_num = 1,
742 };
743
744 static void __init crag6410_map_io(void)
745 {
746 s3c64xx_init_io(NULL, 0);
747 s3c24xx_init_clocks(12000000);
748 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
749
750 /* LCD type and Bypass set by bootloader */
751 }
752
753 static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
754 .max_width = 4,
755 .cd_type = S3C_SDHCI_CD_PERMANENT,
756 .host_caps = MMC_CAP_POWER_OFF_CARD,
757 };
758
759 static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
760 {
761 /* Set all the necessary GPG pins to special-function 2 */
762 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
763
764 /* force card-detected for prototype 0 */
765 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
766 }
767
768 static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
769 .max_width = 4,
770 .cd_type = S3C_SDHCI_CD_INTERNAL,
771 .cfg_gpio = crag6410_cfg_sdhci0,
772 .host_caps = MMC_CAP_POWER_OFF_CARD,
773 };
774
775 static const struct gpio_led gpio_leds[] = {
776 {
777 .name = "d13:green:",
778 .gpio = MMGPIO_GPIO_BASE + 0,
779 .default_state = LEDS_GPIO_DEFSTATE_ON,
780 },
781 {
782 .name = "d14:green:",
783 .gpio = MMGPIO_GPIO_BASE + 1,
784 .default_state = LEDS_GPIO_DEFSTATE_ON,
785 },
786 {
787 .name = "d15:green:",
788 .gpio = MMGPIO_GPIO_BASE + 2,
789 .default_state = LEDS_GPIO_DEFSTATE_ON,
790 },
791 {
792 .name = "d16:green:",
793 .gpio = MMGPIO_GPIO_BASE + 3,
794 .default_state = LEDS_GPIO_DEFSTATE_ON,
795 },
796 {
797 .name = "d17:green:",
798 .gpio = MMGPIO_GPIO_BASE + 4,
799 .default_state = LEDS_GPIO_DEFSTATE_ON,
800 },
801 {
802 .name = "d18:green:",
803 .gpio = MMGPIO_GPIO_BASE + 5,
804 .default_state = LEDS_GPIO_DEFSTATE_ON,
805 },
806 {
807 .name = "d19:green:",
808 .gpio = MMGPIO_GPIO_BASE + 6,
809 .default_state = LEDS_GPIO_DEFSTATE_ON,
810 },
811 {
812 .name = "d20:green:",
813 .gpio = MMGPIO_GPIO_BASE + 7,
814 .default_state = LEDS_GPIO_DEFSTATE_ON,
815 },
816 };
817
818 static const struct gpio_led_platform_data gpio_leds_pdata = {
819 .leds = gpio_leds,
820 .num_leds = ARRAY_SIZE(gpio_leds),
821 };
822
823 static struct s3c_hsotg_plat crag6410_hsotg_pdata;
824
825 static void __init crag6410_machine_init(void)
826 {
827 /* Open drain IRQs need pullups */
828 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
829 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
830
831 gpio_request(S3C64XX_GPB(0), "LCD power");
832 gpio_direction_output(S3C64XX_GPB(0), 0);
833
834 gpio_request(S3C64XX_GPF(14), "LCD PWM");
835 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
836
837 gpio_request(S3C64XX_GPB(1), "SD power");
838 gpio_direction_output(S3C64XX_GPB(1), 0);
839
840 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
841 gpio_direction_output(S3C64XX_GPF(10), 1);
842
843 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
844 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
845
846 s3c_i2c0_set_platdata(&i2c0_pdata);
847 s3c_i2c1_set_platdata(&i2c1_pdata);
848 s3c_fb_set_platdata(&crag6410_lcd_pdata);
849 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
850
851 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
852 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
853
854 samsung_keypad_set_platdata(&crag6410_keypad_data);
855 s3c64xx_spi0_set_platdata(NULL, 0, 2);
856
857 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
858
859 gpio_led_register_device(-1, &gpio_leds_pdata);
860
861 regulator_has_full_constraints();
862
863 s3c64xx_pm_init();
864 }
865
866 MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
868 .atag_offset = 0x100,
869 .init_irq = s3c6410_init_irq,
870 .handle_irq = vic_handle_irq,
871 .map_io = crag6410_map_io,
872 .init_machine = crag6410_machine_init,
873 .init_late = s3c64xx_init_late,
874 .timer = &s3c24xx_timer,
875 .restart = s3c64xx_restart,
876 MACHINE_END