serial: Kill off Moorestown code
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-pxa / devices.c
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/spi/pxa2xx_spi.h>
7 #include <linux/i2c/pxa-i2c.h>
8
9 #include <asm/pmu.h>
10 #include <mach/udc.h>
11 #include <mach/pxa3xx-u2d.h>
12 #include <mach/pxafb.h>
13 #include <mach/mmc.h>
14 #include <mach/irda.h>
15 #include <mach/ohci.h>
16 #include <plat/pxa27x_keypad.h>
17 #include <mach/camera.h>
18 #include <mach/audio.h>
19 #include <mach/hardware.h>
20 #include <plat/pxa3xx_nand.h>
21
22 #include "devices.h"
23 #include "generic.h"
24
25 void __init pxa_register_device(struct platform_device *dev, void *data)
26 {
27 int ret;
28
29 dev->dev.platform_data = data;
30
31 ret = platform_device_register(dev);
32 if (ret)
33 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34 }
35
36 static struct resource pxa_resource_pmu = {
37 .start = IRQ_PMU,
38 .end = IRQ_PMU,
39 .flags = IORESOURCE_IRQ,
40 };
41
42 struct platform_device pxa_device_pmu = {
43 .name = "arm-pmu",
44 .id = ARM_PMU_DEVICE_CPU,
45 .resource = &pxa_resource_pmu,
46 .num_resources = 1,
47 };
48
49 static struct resource pxamci_resources[] = {
50 [0] = {
51 .start = 0x41100000,
52 .end = 0x41100fff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_MMC,
57 .end = IRQ_MMC,
58 .flags = IORESOURCE_IRQ,
59 },
60 [2] = {
61 .start = 21,
62 .end = 21,
63 .flags = IORESOURCE_DMA,
64 },
65 [3] = {
66 .start = 22,
67 .end = 22,
68 .flags = IORESOURCE_DMA,
69 },
70 };
71
72 static u64 pxamci_dmamask = 0xffffffffUL;
73
74 struct platform_device pxa_device_mci = {
75 .name = "pxa2xx-mci",
76 .id = 0,
77 .dev = {
78 .dma_mask = &pxamci_dmamask,
79 .coherent_dma_mask = 0xffffffff,
80 },
81 .num_resources = ARRAY_SIZE(pxamci_resources),
82 .resource = pxamci_resources,
83 };
84
85 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86 {
87 pxa_register_device(&pxa_device_mci, info);
88 }
89
90
91 static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1,
93 };
94
95 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96 {
97 memcpy(&pxa_udc_info, info, sizeof *info);
98 }
99
100 static struct resource pxa2xx_udc_resources[] = {
101 [0] = {
102 .start = 0x40600000,
103 .end = 0x4060ffff,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = IRQ_USB,
108 .end = IRQ_USB,
109 .flags = IORESOURCE_IRQ,
110 },
111 };
112
113 static u64 udc_dma_mask = ~(u32)0;
114
115 struct platform_device pxa25x_device_udc = {
116 .name = "pxa25x-udc",
117 .id = -1,
118 .resource = pxa2xx_udc_resources,
119 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
120 .dev = {
121 .platform_data = &pxa_udc_info,
122 .dma_mask = &udc_dma_mask,
123 }
124 };
125
126 struct platform_device pxa27x_device_udc = {
127 .name = "pxa27x-udc",
128 .id = -1,
129 .resource = pxa2xx_udc_resources,
130 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
131 .dev = {
132 .platform_data = &pxa_udc_info,
133 .dma_mask = &udc_dma_mask,
134 }
135 };
136
137 #ifdef CONFIG_PXA3xx
138 static struct resource pxa3xx_u2d_resources[] = {
139 [0] = {
140 .start = 0x54100000,
141 .end = 0x54100fff,
142 .flags = IORESOURCE_MEM,
143 },
144 [1] = {
145 .start = IRQ_USB2,
146 .end = IRQ_USB2,
147 .flags = IORESOURCE_IRQ,
148 },
149 };
150
151 struct platform_device pxa3xx_device_u2d = {
152 .name = "pxa3xx-u2d",
153 .id = -1,
154 .resource = pxa3xx_u2d_resources,
155 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
156 };
157
158 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
159 {
160 pxa_register_device(&pxa3xx_device_u2d, info);
161 }
162 #endif /* CONFIG_PXA3xx */
163
164 static struct resource pxafb_resources[] = {
165 [0] = {
166 .start = 0x44000000,
167 .end = 0x4400ffff,
168 .flags = IORESOURCE_MEM,
169 },
170 [1] = {
171 .start = IRQ_LCD,
172 .end = IRQ_LCD,
173 .flags = IORESOURCE_IRQ,
174 },
175 };
176
177 static u64 fb_dma_mask = ~(u64)0;
178
179 struct platform_device pxa_device_fb = {
180 .name = "pxa2xx-fb",
181 .id = -1,
182 .dev = {
183 .dma_mask = &fb_dma_mask,
184 .coherent_dma_mask = 0xffffffff,
185 },
186 .num_resources = ARRAY_SIZE(pxafb_resources),
187 .resource = pxafb_resources,
188 };
189
190 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
191 {
192 pxa_device_fb.dev.parent = parent;
193 pxa_register_device(&pxa_device_fb, info);
194 }
195
196 static struct resource pxa_resource_ffuart[] = {
197 {
198 .start = 0x40100000,
199 .end = 0x40100023,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = IRQ_FFUART,
203 .end = IRQ_FFUART,
204 .flags = IORESOURCE_IRQ,
205 }
206 };
207
208 struct platform_device pxa_device_ffuart = {
209 .name = "pxa2xx-uart",
210 .id = 0,
211 .resource = pxa_resource_ffuart,
212 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
213 };
214
215 void __init pxa_set_ffuart_info(void *info)
216 {
217 pxa_register_device(&pxa_device_ffuart, info);
218 }
219
220 static struct resource pxa_resource_btuart[] = {
221 {
222 .start = 0x40200000,
223 .end = 0x40200023,
224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = IRQ_BTUART,
227 .end = IRQ_BTUART,
228 .flags = IORESOURCE_IRQ,
229 }
230 };
231
232 struct platform_device pxa_device_btuart = {
233 .name = "pxa2xx-uart",
234 .id = 1,
235 .resource = pxa_resource_btuart,
236 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
237 };
238
239 void __init pxa_set_btuart_info(void *info)
240 {
241 pxa_register_device(&pxa_device_btuart, info);
242 }
243
244 static struct resource pxa_resource_stuart[] = {
245 {
246 .start = 0x40700000,
247 .end = 0x40700023,
248 .flags = IORESOURCE_MEM,
249 }, {
250 .start = IRQ_STUART,
251 .end = IRQ_STUART,
252 .flags = IORESOURCE_IRQ,
253 }
254 };
255
256 struct platform_device pxa_device_stuart = {
257 .name = "pxa2xx-uart",
258 .id = 2,
259 .resource = pxa_resource_stuart,
260 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
261 };
262
263 void __init pxa_set_stuart_info(void *info)
264 {
265 pxa_register_device(&pxa_device_stuart, info);
266 }
267
268 static struct resource pxa_resource_hwuart[] = {
269 {
270 .start = 0x41600000,
271 .end = 0x4160002F,
272 .flags = IORESOURCE_MEM,
273 }, {
274 .start = IRQ_HWUART,
275 .end = IRQ_HWUART,
276 .flags = IORESOURCE_IRQ,
277 }
278 };
279
280 struct platform_device pxa_device_hwuart = {
281 .name = "pxa2xx-uart",
282 .id = 3,
283 .resource = pxa_resource_hwuart,
284 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
285 };
286
287 void __init pxa_set_hwuart_info(void *info)
288 {
289 if (cpu_is_pxa255())
290 pxa_register_device(&pxa_device_hwuart, info);
291 else
292 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
293 }
294
295 static struct resource pxai2c_resources[] = {
296 {
297 .start = 0x40301680,
298 .end = 0x403016a3,
299 .flags = IORESOURCE_MEM,
300 }, {
301 .start = IRQ_I2C,
302 .end = IRQ_I2C,
303 .flags = IORESOURCE_IRQ,
304 },
305 };
306
307 struct platform_device pxa_device_i2c = {
308 .name = "pxa2xx-i2c",
309 .id = 0,
310 .resource = pxai2c_resources,
311 .num_resources = ARRAY_SIZE(pxai2c_resources),
312 };
313
314 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
315 {
316 pxa_register_device(&pxa_device_i2c, info);
317 }
318
319 #ifdef CONFIG_PXA27x
320 static struct resource pxa27x_resources_i2c_power[] = {
321 {
322 .start = 0x40f00180,
323 .end = 0x40f001a3,
324 .flags = IORESOURCE_MEM,
325 }, {
326 .start = IRQ_PWRI2C,
327 .end = IRQ_PWRI2C,
328 .flags = IORESOURCE_IRQ,
329 },
330 };
331
332 struct platform_device pxa27x_device_i2c_power = {
333 .name = "pxa2xx-i2c",
334 .id = 1,
335 .resource = pxa27x_resources_i2c_power,
336 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
337 };
338 #endif
339
340 static struct resource pxai2s_resources[] = {
341 {
342 .start = 0x40400000,
343 .end = 0x40400083,
344 .flags = IORESOURCE_MEM,
345 }, {
346 .start = IRQ_I2S,
347 .end = IRQ_I2S,
348 .flags = IORESOURCE_IRQ,
349 },
350 };
351
352 struct platform_device pxa_device_i2s = {
353 .name = "pxa2xx-i2s",
354 .id = -1,
355 .resource = pxai2s_resources,
356 .num_resources = ARRAY_SIZE(pxai2s_resources),
357 };
358
359 struct platform_device pxa_device_asoc_ssp1 = {
360 .name = "pxa-ssp-dai",
361 .id = 0,
362 };
363
364 struct platform_device pxa_device_asoc_ssp2= {
365 .name = "pxa-ssp-dai",
366 .id = 1,
367 };
368
369 struct platform_device pxa_device_asoc_ssp3 = {
370 .name = "pxa-ssp-dai",
371 .id = 2,
372 };
373
374 struct platform_device pxa_device_asoc_ssp4 = {
375 .name = "pxa-ssp-dai",
376 .id = 3,
377 };
378
379 struct platform_device pxa_device_asoc_platform = {
380 .name = "pxa-pcm-audio",
381 .id = -1,
382 };
383
384 static u64 pxaficp_dmamask = ~(u32)0;
385
386 struct platform_device pxa_device_ficp = {
387 .name = "pxa2xx-ir",
388 .id = -1,
389 .dev = {
390 .dma_mask = &pxaficp_dmamask,
391 .coherent_dma_mask = 0xffffffff,
392 },
393 };
394
395 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
396 {
397 pxa_register_device(&pxa_device_ficp, info);
398 }
399
400 static struct resource pxa_rtc_resources[] = {
401 [0] = {
402 .start = 0x40900000,
403 .end = 0x40900000 + 0x3b,
404 .flags = IORESOURCE_MEM,
405 },
406 [1] = {
407 .start = IRQ_RTC1Hz,
408 .end = IRQ_RTC1Hz,
409 .flags = IORESOURCE_IRQ,
410 },
411 [2] = {
412 .start = IRQ_RTCAlrm,
413 .end = IRQ_RTCAlrm,
414 .flags = IORESOURCE_IRQ,
415 },
416 };
417
418 static struct resource sa1100_rtc_resources[] = {
419 [0] = {
420 .start = 0x40900000,
421 .end = 0x409000ff,
422 .flags = IORESOURCE_MEM,
423 },
424 [1] = {
425 .start = IRQ_RTC1Hz,
426 .end = IRQ_RTC1Hz,
427 .flags = IORESOURCE_IRQ,
428 },
429 [2] = {
430 .start = IRQ_RTCAlrm,
431 .end = IRQ_RTCAlrm,
432 .flags = IORESOURCE_IRQ,
433 },
434 };
435
436 struct platform_device sa1100_device_rtc = {
437 .name = "sa1100-rtc",
438 .id = -1,
439 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
440 .resource = sa1100_rtc_resources,
441 };
442
443 struct platform_device pxa_device_rtc = {
444 .name = "pxa-rtc",
445 .id = -1,
446 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
447 .resource = pxa_rtc_resources,
448 };
449
450 static struct resource pxa_ac97_resources[] = {
451 [0] = {
452 .start = 0x40500000,
453 .end = 0x40500000 + 0xfff,
454 .flags = IORESOURCE_MEM,
455 },
456 [1] = {
457 .start = IRQ_AC97,
458 .end = IRQ_AC97,
459 .flags = IORESOURCE_IRQ,
460 },
461 };
462
463 static u64 pxa_ac97_dmamask = 0xffffffffUL;
464
465 struct platform_device pxa_device_ac97 = {
466 .name = "pxa2xx-ac97",
467 .id = -1,
468 .dev = {
469 .dma_mask = &pxa_ac97_dmamask,
470 .coherent_dma_mask = 0xffffffff,
471 },
472 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
473 .resource = pxa_ac97_resources,
474 };
475
476 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
477 {
478 pxa_register_device(&pxa_device_ac97, ops);
479 }
480
481 #ifdef CONFIG_PXA25x
482
483 static struct resource pxa25x_resource_pwm0[] = {
484 [0] = {
485 .start = 0x40b00000,
486 .end = 0x40b0000f,
487 .flags = IORESOURCE_MEM,
488 },
489 };
490
491 struct platform_device pxa25x_device_pwm0 = {
492 .name = "pxa25x-pwm",
493 .id = 0,
494 .resource = pxa25x_resource_pwm0,
495 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
496 };
497
498 static struct resource pxa25x_resource_pwm1[] = {
499 [0] = {
500 .start = 0x40c00000,
501 .end = 0x40c0000f,
502 .flags = IORESOURCE_MEM,
503 },
504 };
505
506 struct platform_device pxa25x_device_pwm1 = {
507 .name = "pxa25x-pwm",
508 .id = 1,
509 .resource = pxa25x_resource_pwm1,
510 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
511 };
512
513 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
514
515 static struct resource pxa25x_resource_ssp[] = {
516 [0] = {
517 .start = 0x41000000,
518 .end = 0x4100001f,
519 .flags = IORESOURCE_MEM,
520 },
521 [1] = {
522 .start = IRQ_SSP,
523 .end = IRQ_SSP,
524 .flags = IORESOURCE_IRQ,
525 },
526 [2] = {
527 /* DRCMR for RX */
528 .start = 13,
529 .end = 13,
530 .flags = IORESOURCE_DMA,
531 },
532 [3] = {
533 /* DRCMR for TX */
534 .start = 14,
535 .end = 14,
536 .flags = IORESOURCE_DMA,
537 },
538 };
539
540 struct platform_device pxa25x_device_ssp = {
541 .name = "pxa25x-ssp",
542 .id = 0,
543 .dev = {
544 .dma_mask = &pxa25x_ssp_dma_mask,
545 .coherent_dma_mask = DMA_BIT_MASK(32),
546 },
547 .resource = pxa25x_resource_ssp,
548 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
549 };
550
551 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
552
553 static struct resource pxa25x_resource_nssp[] = {
554 [0] = {
555 .start = 0x41400000,
556 .end = 0x4140002f,
557 .flags = IORESOURCE_MEM,
558 },
559 [1] = {
560 .start = IRQ_NSSP,
561 .end = IRQ_NSSP,
562 .flags = IORESOURCE_IRQ,
563 },
564 [2] = {
565 /* DRCMR for RX */
566 .start = 15,
567 .end = 15,
568 .flags = IORESOURCE_DMA,
569 },
570 [3] = {
571 /* DRCMR for TX */
572 .start = 16,
573 .end = 16,
574 .flags = IORESOURCE_DMA,
575 },
576 };
577
578 struct platform_device pxa25x_device_nssp = {
579 .name = "pxa25x-nssp",
580 .id = 1,
581 .dev = {
582 .dma_mask = &pxa25x_nssp_dma_mask,
583 .coherent_dma_mask = DMA_BIT_MASK(32),
584 },
585 .resource = pxa25x_resource_nssp,
586 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
587 };
588
589 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
590
591 static struct resource pxa25x_resource_assp[] = {
592 [0] = {
593 .start = 0x41500000,
594 .end = 0x4150002f,
595 .flags = IORESOURCE_MEM,
596 },
597 [1] = {
598 .start = IRQ_ASSP,
599 .end = IRQ_ASSP,
600 .flags = IORESOURCE_IRQ,
601 },
602 [2] = {
603 /* DRCMR for RX */
604 .start = 23,
605 .end = 23,
606 .flags = IORESOURCE_DMA,
607 },
608 [3] = {
609 /* DRCMR for TX */
610 .start = 24,
611 .end = 24,
612 .flags = IORESOURCE_DMA,
613 },
614 };
615
616 struct platform_device pxa25x_device_assp = {
617 /* ASSP is basically equivalent to NSSP */
618 .name = "pxa25x-nssp",
619 .id = 2,
620 .dev = {
621 .dma_mask = &pxa25x_assp_dma_mask,
622 .coherent_dma_mask = DMA_BIT_MASK(32),
623 },
624 .resource = pxa25x_resource_assp,
625 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
626 };
627 #endif /* CONFIG_PXA25x */
628
629 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
630 static struct resource pxa27x_resource_camera[] = {
631 [0] = {
632 .start = 0x50000000,
633 .end = 0x50000fff,
634 .flags = IORESOURCE_MEM,
635 },
636 [1] = {
637 .start = IRQ_CAMERA,
638 .end = IRQ_CAMERA,
639 .flags = IORESOURCE_IRQ,
640 },
641 };
642
643 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
644
645 static struct platform_device pxa27x_device_camera = {
646 .name = "pxa27x-camera",
647 .id = 0, /* This is used to put cameras on this interface */
648 .dev = {
649 .dma_mask = &pxa27x_dma_mask_camera,
650 .coherent_dma_mask = 0xffffffff,
651 },
652 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
653 .resource = pxa27x_resource_camera,
654 };
655
656 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
657 {
658 pxa_register_device(&pxa27x_device_camera, info);
659 }
660
661 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
662
663 static struct resource pxa27x_resource_ohci[] = {
664 [0] = {
665 .start = 0x4C000000,
666 .end = 0x4C00ff6f,
667 .flags = IORESOURCE_MEM,
668 },
669 [1] = {
670 .start = IRQ_USBH1,
671 .end = IRQ_USBH1,
672 .flags = IORESOURCE_IRQ,
673 },
674 };
675
676 struct platform_device pxa27x_device_ohci = {
677 .name = "pxa27x-ohci",
678 .id = -1,
679 .dev = {
680 .dma_mask = &pxa27x_ohci_dma_mask,
681 .coherent_dma_mask = DMA_BIT_MASK(32),
682 },
683 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
684 .resource = pxa27x_resource_ohci,
685 };
686
687 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
688 {
689 pxa_register_device(&pxa27x_device_ohci, info);
690 }
691 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
692
693 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
694 static struct resource pxa27x_resource_keypad[] = {
695 [0] = {
696 .start = 0x41500000,
697 .end = 0x4150004c,
698 .flags = IORESOURCE_MEM,
699 },
700 [1] = {
701 .start = IRQ_KEYPAD,
702 .end = IRQ_KEYPAD,
703 .flags = IORESOURCE_IRQ,
704 },
705 };
706
707 struct platform_device pxa27x_device_keypad = {
708 .name = "pxa27x-keypad",
709 .id = -1,
710 .resource = pxa27x_resource_keypad,
711 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
712 };
713
714 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
715 {
716 pxa_register_device(&pxa27x_device_keypad, info);
717 }
718
719 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
720
721 static struct resource pxa27x_resource_ssp1[] = {
722 [0] = {
723 .start = 0x41000000,
724 .end = 0x4100003f,
725 .flags = IORESOURCE_MEM,
726 },
727 [1] = {
728 .start = IRQ_SSP,
729 .end = IRQ_SSP,
730 .flags = IORESOURCE_IRQ,
731 },
732 [2] = {
733 /* DRCMR for RX */
734 .start = 13,
735 .end = 13,
736 .flags = IORESOURCE_DMA,
737 },
738 [3] = {
739 /* DRCMR for TX */
740 .start = 14,
741 .end = 14,
742 .flags = IORESOURCE_DMA,
743 },
744 };
745
746 struct platform_device pxa27x_device_ssp1 = {
747 .name = "pxa27x-ssp",
748 .id = 0,
749 .dev = {
750 .dma_mask = &pxa27x_ssp1_dma_mask,
751 .coherent_dma_mask = DMA_BIT_MASK(32),
752 },
753 .resource = pxa27x_resource_ssp1,
754 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
755 };
756
757 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
758
759 static struct resource pxa27x_resource_ssp2[] = {
760 [0] = {
761 .start = 0x41700000,
762 .end = 0x4170003f,
763 .flags = IORESOURCE_MEM,
764 },
765 [1] = {
766 .start = IRQ_SSP2,
767 .end = IRQ_SSP2,
768 .flags = IORESOURCE_IRQ,
769 },
770 [2] = {
771 /* DRCMR for RX */
772 .start = 15,
773 .end = 15,
774 .flags = IORESOURCE_DMA,
775 },
776 [3] = {
777 /* DRCMR for TX */
778 .start = 16,
779 .end = 16,
780 .flags = IORESOURCE_DMA,
781 },
782 };
783
784 struct platform_device pxa27x_device_ssp2 = {
785 .name = "pxa27x-ssp",
786 .id = 1,
787 .dev = {
788 .dma_mask = &pxa27x_ssp2_dma_mask,
789 .coherent_dma_mask = DMA_BIT_MASK(32),
790 },
791 .resource = pxa27x_resource_ssp2,
792 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
793 };
794
795 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
796
797 static struct resource pxa27x_resource_ssp3[] = {
798 [0] = {
799 .start = 0x41900000,
800 .end = 0x4190003f,
801 .flags = IORESOURCE_MEM,
802 },
803 [1] = {
804 .start = IRQ_SSP3,
805 .end = IRQ_SSP3,
806 .flags = IORESOURCE_IRQ,
807 },
808 [2] = {
809 /* DRCMR for RX */
810 .start = 66,
811 .end = 66,
812 .flags = IORESOURCE_DMA,
813 },
814 [3] = {
815 /* DRCMR for TX */
816 .start = 67,
817 .end = 67,
818 .flags = IORESOURCE_DMA,
819 },
820 };
821
822 struct platform_device pxa27x_device_ssp3 = {
823 .name = "pxa27x-ssp",
824 .id = 2,
825 .dev = {
826 .dma_mask = &pxa27x_ssp3_dma_mask,
827 .coherent_dma_mask = DMA_BIT_MASK(32),
828 },
829 .resource = pxa27x_resource_ssp3,
830 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
831 };
832
833 static struct resource pxa27x_resource_pwm0[] = {
834 [0] = {
835 .start = 0x40b00000,
836 .end = 0x40b0001f,
837 .flags = IORESOURCE_MEM,
838 },
839 };
840
841 struct platform_device pxa27x_device_pwm0 = {
842 .name = "pxa27x-pwm",
843 .id = 0,
844 .resource = pxa27x_resource_pwm0,
845 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
846 };
847
848 static struct resource pxa27x_resource_pwm1[] = {
849 [0] = {
850 .start = 0x40c00000,
851 .end = 0x40c0001f,
852 .flags = IORESOURCE_MEM,
853 },
854 };
855
856 struct platform_device pxa27x_device_pwm1 = {
857 .name = "pxa27x-pwm",
858 .id = 1,
859 .resource = pxa27x_resource_pwm1,
860 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
861 };
862 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
863
864 #ifdef CONFIG_PXA3xx
865 static struct resource pxa3xx_resources_mci2[] = {
866 [0] = {
867 .start = 0x42000000,
868 .end = 0x42000fff,
869 .flags = IORESOURCE_MEM,
870 },
871 [1] = {
872 .start = IRQ_MMC2,
873 .end = IRQ_MMC2,
874 .flags = IORESOURCE_IRQ,
875 },
876 [2] = {
877 .start = 93,
878 .end = 93,
879 .flags = IORESOURCE_DMA,
880 },
881 [3] = {
882 .start = 94,
883 .end = 94,
884 .flags = IORESOURCE_DMA,
885 },
886 };
887
888 struct platform_device pxa3xx_device_mci2 = {
889 .name = "pxa2xx-mci",
890 .id = 1,
891 .dev = {
892 .dma_mask = &pxamci_dmamask,
893 .coherent_dma_mask = 0xffffffff,
894 },
895 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
896 .resource = pxa3xx_resources_mci2,
897 };
898
899 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
900 {
901 pxa_register_device(&pxa3xx_device_mci2, info);
902 }
903
904 static struct resource pxa3xx_resources_mci3[] = {
905 [0] = {
906 .start = 0x42500000,
907 .end = 0x42500fff,
908 .flags = IORESOURCE_MEM,
909 },
910 [1] = {
911 .start = IRQ_MMC3,
912 .end = IRQ_MMC3,
913 .flags = IORESOURCE_IRQ,
914 },
915 [2] = {
916 .start = 100,
917 .end = 100,
918 .flags = IORESOURCE_DMA,
919 },
920 [3] = {
921 .start = 101,
922 .end = 101,
923 .flags = IORESOURCE_DMA,
924 },
925 };
926
927 struct platform_device pxa3xx_device_mci3 = {
928 .name = "pxa2xx-mci",
929 .id = 2,
930 .dev = {
931 .dma_mask = &pxamci_dmamask,
932 .coherent_dma_mask = 0xffffffff,
933 },
934 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
935 .resource = pxa3xx_resources_mci3,
936 };
937
938 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
939 {
940 pxa_register_device(&pxa3xx_device_mci3, info);
941 }
942
943 static struct resource pxa3xx_resources_gcu[] = {
944 {
945 .start = 0x54000000,
946 .end = 0x54000fff,
947 .flags = IORESOURCE_MEM,
948 },
949 {
950 .start = IRQ_GCU,
951 .end = IRQ_GCU,
952 .flags = IORESOURCE_IRQ,
953 },
954 };
955
956 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
957
958 struct platform_device pxa3xx_device_gcu = {
959 .name = "pxa3xx-gcu",
960 .id = -1,
961 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
962 .resource = pxa3xx_resources_gcu,
963 .dev = {
964 .dma_mask = &pxa3xx_gcu_dmamask,
965 .coherent_dma_mask = 0xffffffff,
966 },
967 };
968
969 #endif /* CONFIG_PXA3xx */
970
971 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
972 static struct resource pxa3xx_resources_i2c_power[] = {
973 {
974 .start = 0x40f500c0,
975 .end = 0x40f500d3,
976 .flags = IORESOURCE_MEM,
977 }, {
978 .start = IRQ_PWRI2C,
979 .end = IRQ_PWRI2C,
980 .flags = IORESOURCE_IRQ,
981 },
982 };
983
984 struct platform_device pxa3xx_device_i2c_power = {
985 .name = "pxa3xx-pwri2c",
986 .id = 1,
987 .resource = pxa3xx_resources_i2c_power,
988 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
989 };
990
991 static struct resource pxa3xx_resources_nand[] = {
992 [0] = {
993 .start = 0x43100000,
994 .end = 0x43100053,
995 .flags = IORESOURCE_MEM,
996 },
997 [1] = {
998 .start = IRQ_NAND,
999 .end = IRQ_NAND,
1000 .flags = IORESOURCE_IRQ,
1001 },
1002 [2] = {
1003 /* DRCMR for Data DMA */
1004 .start = 97,
1005 .end = 97,
1006 .flags = IORESOURCE_DMA,
1007 },
1008 [3] = {
1009 /* DRCMR for Command DMA */
1010 .start = 99,
1011 .end = 99,
1012 .flags = IORESOURCE_DMA,
1013 },
1014 };
1015
1016 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1017
1018 struct platform_device pxa3xx_device_nand = {
1019 .name = "pxa3xx-nand",
1020 .id = -1,
1021 .dev = {
1022 .dma_mask = &pxa3xx_nand_dma_mask,
1023 .coherent_dma_mask = DMA_BIT_MASK(32),
1024 },
1025 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1026 .resource = pxa3xx_resources_nand,
1027 };
1028
1029 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1030 {
1031 pxa_register_device(&pxa3xx_device_nand, info);
1032 }
1033
1034 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1035
1036 static struct resource pxa3xx_resource_ssp4[] = {
1037 [0] = {
1038 .start = 0x41a00000,
1039 .end = 0x41a0003f,
1040 .flags = IORESOURCE_MEM,
1041 },
1042 [1] = {
1043 .start = IRQ_SSP4,
1044 .end = IRQ_SSP4,
1045 .flags = IORESOURCE_IRQ,
1046 },
1047 [2] = {
1048 /* DRCMR for RX */
1049 .start = 2,
1050 .end = 2,
1051 .flags = IORESOURCE_DMA,
1052 },
1053 [3] = {
1054 /* DRCMR for TX */
1055 .start = 3,
1056 .end = 3,
1057 .flags = IORESOURCE_DMA,
1058 },
1059 };
1060
1061 struct platform_device pxa3xx_device_ssp4 = {
1062 /* PXA3xx SSP is basically equivalent to PXA27x */
1063 .name = "pxa27x-ssp",
1064 .id = 3,
1065 .dev = {
1066 .dma_mask = &pxa3xx_ssp4_dma_mask,
1067 .coherent_dma_mask = DMA_BIT_MASK(32),
1068 },
1069 .resource = pxa3xx_resource_ssp4,
1070 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1071 };
1072 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1073
1074 struct resource pxa_resource_gpio[] = {
1075 {
1076 .start = 0x40e00000,
1077 .end = 0x40e0ffff,
1078 .flags = IORESOURCE_MEM,
1079 }, {
1080 .start = IRQ_GPIO0,
1081 .end = IRQ_GPIO0,
1082 .name = "gpio0",
1083 .flags = IORESOURCE_IRQ,
1084 }, {
1085 .start = IRQ_GPIO1,
1086 .end = IRQ_GPIO1,
1087 .name = "gpio1",
1088 .flags = IORESOURCE_IRQ,
1089 }, {
1090 .start = IRQ_GPIO_2_x,
1091 .end = IRQ_GPIO_2_x,
1092 .name = "gpio_mux",
1093 .flags = IORESOURCE_IRQ,
1094 },
1095 };
1096
1097 struct platform_device pxa_device_gpio = {
1098 .name = "pxa-gpio",
1099 .id = -1,
1100 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1101 .resource = pxa_resource_gpio,
1102 };
1103
1104 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1105 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1106 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1107 {
1108 struct platform_device *pd;
1109
1110 pd = platform_device_alloc("pxa2xx-spi", id);
1111 if (pd == NULL) {
1112 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1113 id);
1114 return;
1115 }
1116
1117 pd->dev.platform_data = info;
1118 platform_device_add(pd);
1119 }