Merge branch 'next/board' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-pxa / cm-x2xx.c
1 /*
2 * linux/arch/arm/mach-pxa/cm-x2xx.c
3 *
4 * Copyright (C) 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/platform_device.h>
13 #include <linux/syscore_ops.h>
14 #include <linux/irq.h>
15 #include <linux/gpio.h>
16
17 #include <linux/dm9000.h>
18 #include <linux/leds.h>
19
20 #include <asm/mach/arch.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/map.h>
23
24 #include <mach/pxa2xx-regs.h>
25 #include <mach/audio.h>
26 #include <mach/pxafb.h>
27 #include <mach/smemc.h>
28
29 #include <asm/hardware/it8152.h>
30
31 #include "generic.h"
32 #include "cm-x2xx-pci.h"
33
34 extern void cmx255_init(void);
35 extern void cmx270_init(void);
36
37 /* reserve IRQs for IT8152 */
38 #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
39
40 /* virtual addresses for statically mapped regions */
41 #define CMX2XX_VIRT_BASE (0xe8000000)
42 #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
43
44 /* physical address if local-bus attached devices */
45 #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
46 #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
47
48 /* leds */
49 #define CMX255_GPIO_RED (27)
50 #define CMX255_GPIO_GREEN (32)
51 #define CMX270_GPIO_RED (93)
52 #define CMX270_GPIO_GREEN (94)
53
54 /* GPIO IRQ usage */
55 #define GPIO22_ETHIRQ (22)
56 #define GPIO10_ETHIRQ (10)
57 #define CMX255_GPIO_IT8152_IRQ (0)
58 #define CMX270_GPIO_IT8152_IRQ (22)
59
60 #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ)
61 #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
62
63 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
64 static struct resource cmx255_dm9000_resource[] = {
65 [0] = {
66 .start = CMX255_DM9000_PHYS_BASE,
67 .end = CMX255_DM9000_PHYS_BASE + 3,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = CMX255_DM9000_PHYS_BASE + 4,
72 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
73 .flags = IORESOURCE_MEM,
74 },
75 [2] = {
76 .start = CMX255_ETHIRQ,
77 .end = CMX255_ETHIRQ,
78 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
79 }
80 };
81
82 static struct resource cmx270_dm9000_resource[] = {
83 [0] = {
84 .start = CMX270_DM9000_PHYS_BASE,
85 .end = CMX270_DM9000_PHYS_BASE + 3,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = CMX270_DM9000_PHYS_BASE + 8,
90 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
91 .flags = IORESOURCE_MEM,
92 },
93 [2] = {
94 .start = CMX270_ETHIRQ,
95 .end = CMX270_ETHIRQ,
96 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
97 }
98 };
99
100 static struct dm9000_plat_data cmx270_dm9000_platdata = {
101 .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
102 };
103
104 static struct platform_device cmx2xx_dm9000_device = {
105 .name = "dm9000",
106 .id = 0,
107 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
108 .dev = {
109 .platform_data = &cmx270_dm9000_platdata,
110 }
111 };
112
113 static void __init cmx2xx_init_dm9000(void)
114 {
115 if (cpu_is_pxa25x())
116 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
117 else
118 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
119 platform_device_register(&cmx2xx_dm9000_device);
120 }
121 #else
122 static inline void cmx2xx_init_dm9000(void) {}
123 #endif
124
125 /* UCB1400 touchscreen controller */
126 #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
127 static struct platform_device cmx2xx_ts_device = {
128 .name = "ucb1400_core",
129 .id = -1,
130 };
131
132 static void __init cmx2xx_init_touchscreen(void)
133 {
134 platform_device_register(&cmx2xx_ts_device);
135 }
136 #else
137 static inline void cmx2xx_init_touchscreen(void) {}
138 #endif
139
140 /* CM-X270 LEDs */
141 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
142 static struct gpio_led cmx2xx_leds[] = {
143 [0] = {
144 .name = "cm-x2xx:red",
145 .default_trigger = "nand-disk",
146 .active_low = 1,
147 },
148 [1] = {
149 .name = "cm-x2xx:green",
150 .default_trigger = "heartbeat",
151 .active_low = 1,
152 },
153 };
154
155 static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
156 .num_leds = ARRAY_SIZE(cmx2xx_leds),
157 .leds = cmx2xx_leds,
158 };
159
160 static struct platform_device cmx2xx_led_device = {
161 .name = "leds-gpio",
162 .id = -1,
163 .dev = {
164 .platform_data = &cmx2xx_gpio_led_pdata,
165 },
166 };
167
168 static void __init cmx2xx_init_leds(void)
169 {
170 if (cpu_is_pxa25x()) {
171 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
172 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
173 } else {
174 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
175 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
176 }
177 platform_device_register(&cmx2xx_led_device);
178 }
179 #else
180 static inline void cmx2xx_init_leds(void) {}
181 #endif
182
183 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
184 /*
185 Display definitions
186 keep these for backwards compatibility, although symbolic names (as
187 e.g. in lpd270.c) looks better
188 */
189 #define MTYPE_STN320x240 0
190 #define MTYPE_TFT640x480 1
191 #define MTYPE_CRT640x480 2
192 #define MTYPE_CRT800x600 3
193 #define MTYPE_TFT320x240 6
194 #define MTYPE_STN640x480 7
195
196 static struct pxafb_mode_info generic_stn_320x240_mode = {
197 .pixclock = 76923,
198 .bpp = 8,
199 .xres = 320,
200 .yres = 240,
201 .hsync_len = 3,
202 .vsync_len = 2,
203 .left_margin = 3,
204 .upper_margin = 0,
205 .right_margin = 3,
206 .lower_margin = 0,
207 .sync = (FB_SYNC_HOR_HIGH_ACT |
208 FB_SYNC_VERT_HIGH_ACT),
209 .cmap_greyscale = 0,
210 };
211
212 static struct pxafb_mach_info generic_stn_320x240 = {
213 .modes = &generic_stn_320x240_mode,
214 .num_modes = 1,
215 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
216 LCD_AC_BIAS_FREQ(0xff),
217 .cmap_inverse = 0,
218 .cmap_static = 0,
219 };
220
221 static struct pxafb_mode_info generic_tft_640x480_mode = {
222 .pixclock = 38461,
223 .bpp = 8,
224 .xres = 640,
225 .yres = 480,
226 .hsync_len = 60,
227 .vsync_len = 2,
228 .left_margin = 70,
229 .upper_margin = 10,
230 .right_margin = 70,
231 .lower_margin = 5,
232 .sync = 0,
233 .cmap_greyscale = 0,
234 };
235
236 static struct pxafb_mach_info generic_tft_640x480 = {
237 .modes = &generic_tft_640x480_mode,
238 .num_modes = 1,
239 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
240 LCD_AC_BIAS_FREQ(0xff),
241 .cmap_inverse = 0,
242 .cmap_static = 0,
243 };
244
245 static struct pxafb_mode_info generic_crt_640x480_mode = {
246 .pixclock = 38461,
247 .bpp = 8,
248 .xres = 640,
249 .yres = 480,
250 .hsync_len = 63,
251 .vsync_len = 2,
252 .left_margin = 81,
253 .upper_margin = 33,
254 .right_margin = 16,
255 .lower_margin = 10,
256 .sync = (FB_SYNC_HOR_HIGH_ACT |
257 FB_SYNC_VERT_HIGH_ACT),
258 .cmap_greyscale = 0,
259 };
260
261 static struct pxafb_mach_info generic_crt_640x480 = {
262 .modes = &generic_crt_640x480_mode,
263 .num_modes = 1,
264 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
265 .cmap_inverse = 0,
266 .cmap_static = 0,
267 };
268
269 static struct pxafb_mode_info generic_crt_800x600_mode = {
270 .pixclock = 28846,
271 .bpp = 8,
272 .xres = 800,
273 .yres = 600,
274 .hsync_len = 63,
275 .vsync_len = 2,
276 .left_margin = 26,
277 .upper_margin = 21,
278 .right_margin = 26,
279 .lower_margin = 11,
280 .sync = (FB_SYNC_HOR_HIGH_ACT |
281 FB_SYNC_VERT_HIGH_ACT),
282 .cmap_greyscale = 0,
283 };
284
285 static struct pxafb_mach_info generic_crt_800x600 = {
286 .modes = &generic_crt_800x600_mode,
287 .num_modes = 1,
288 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
289 .cmap_inverse = 0,
290 .cmap_static = 0,
291 };
292
293 static struct pxafb_mode_info generic_tft_320x240_mode = {
294 .pixclock = 134615,
295 .bpp = 16,
296 .xres = 320,
297 .yres = 240,
298 .hsync_len = 63,
299 .vsync_len = 7,
300 .left_margin = 75,
301 .upper_margin = 0,
302 .right_margin = 15,
303 .lower_margin = 15,
304 .sync = 0,
305 .cmap_greyscale = 0,
306 };
307
308 static struct pxafb_mach_info generic_tft_320x240 = {
309 .modes = &generic_tft_320x240_mode,
310 .num_modes = 1,
311 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
312 .cmap_inverse = 0,
313 .cmap_static = 0,
314 };
315
316 static struct pxafb_mode_info generic_stn_640x480_mode = {
317 .pixclock = 57692,
318 .bpp = 8,
319 .xres = 640,
320 .yres = 480,
321 .hsync_len = 4,
322 .vsync_len = 2,
323 .left_margin = 10,
324 .upper_margin = 5,
325 .right_margin = 10,
326 .lower_margin = 5,
327 .sync = (FB_SYNC_HOR_HIGH_ACT |
328 FB_SYNC_VERT_HIGH_ACT),
329 .cmap_greyscale = 0,
330 };
331
332 static struct pxafb_mach_info generic_stn_640x480 = {
333 .modes = &generic_stn_640x480_mode,
334 .num_modes = 1,
335 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
336 .cmap_inverse = 0,
337 .cmap_static = 0,
338 };
339
340 static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
341
342 static int __init cmx2xx_set_display(char *str)
343 {
344 int disp_type = simple_strtol(str, NULL, 0);
345 switch (disp_type) {
346 case MTYPE_STN320x240:
347 cmx2xx_display = &generic_stn_320x240;
348 break;
349 case MTYPE_TFT640x480:
350 cmx2xx_display = &generic_tft_640x480;
351 break;
352 case MTYPE_CRT640x480:
353 cmx2xx_display = &generic_crt_640x480;
354 break;
355 case MTYPE_CRT800x600:
356 cmx2xx_display = &generic_crt_800x600;
357 break;
358 case MTYPE_TFT320x240:
359 cmx2xx_display = &generic_tft_320x240;
360 break;
361 case MTYPE_STN640x480:
362 cmx2xx_display = &generic_stn_640x480;
363 break;
364 default: /* fallback to CRT 640x480 */
365 cmx2xx_display = &generic_crt_640x480;
366 break;
367 }
368 return 1;
369 }
370
371 /*
372 This should be done really early to get proper configuration for
373 frame buffer.
374 Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
375 has limitied line length for kernel command line, and also it will
376 break compatibitlty with proprietary releases already in field.
377 */
378 __setup("monitor=", cmx2xx_set_display);
379
380 static void __init cmx2xx_init_display(void)
381 {
382 pxa_set_fb_info(NULL, cmx2xx_display);
383 }
384 #else
385 static inline void cmx2xx_init_display(void) {}
386 #endif
387
388 #ifdef CONFIG_PM
389 static unsigned long sleep_save_msc[10];
390
391 static int cmx2xx_suspend(void)
392 {
393 cmx2xx_pci_suspend();
394
395 /* save MSC registers */
396 sleep_save_msc[0] = __raw_readl(MSC0);
397 sleep_save_msc[1] = __raw_readl(MSC1);
398 sleep_save_msc[2] = __raw_readl(MSC2);
399
400 /* setup power saving mode registers */
401 PCFR = 0x0;
402 PSLR = 0xff400000;
403 PMCR = 0x00000005;
404 PWER = 0x80000000;
405 PFER = 0x00000000;
406 PRER = 0x00000000;
407 PGSR0 = 0xC0018800;
408 PGSR1 = 0x004F0002;
409 PGSR2 = 0x6021C000;
410 PGSR3 = 0x00020000;
411
412 return 0;
413 }
414
415 static void cmx2xx_resume(void)
416 {
417 cmx2xx_pci_resume();
418
419 /* restore MSC registers */
420 __raw_writel(sleep_save_msc[0], MSC0);
421 __raw_writel(sleep_save_msc[1], MSC1);
422 __raw_writel(sleep_save_msc[2], MSC2);
423 }
424
425 static struct syscore_ops cmx2xx_pm_syscore_ops = {
426 .resume = cmx2xx_resume,
427 .suspend = cmx2xx_suspend,
428 };
429
430 static int __init cmx2xx_pm_init(void)
431 {
432 register_syscore_ops(&cmx2xx_pm_syscore_ops);
433
434 return 0;
435 }
436 #else
437 static int __init cmx2xx_pm_init(void) { return 0; }
438 #endif
439
440 #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
441 static void __init cmx2xx_init_ac97(void)
442 {
443 pxa_set_ac97_info(NULL);
444 }
445 #else
446 static inline void cmx2xx_init_ac97(void) {}
447 #endif
448
449 static void __init cmx2xx_init(void)
450 {
451 pxa_set_ffuart_info(NULL);
452 pxa_set_btuart_info(NULL);
453 pxa_set_stuart_info(NULL);
454
455 cmx2xx_pm_init();
456
457 if (cpu_is_pxa25x())
458 cmx255_init();
459 else
460 cmx270_init();
461
462 cmx2xx_init_dm9000();
463 cmx2xx_init_display();
464 cmx2xx_init_ac97();
465 cmx2xx_init_touchscreen();
466 cmx2xx_init_leds();
467 }
468
469 static void __init cmx2xx_init_irq(void)
470 {
471 if (cpu_is_pxa25x()) {
472 pxa25x_init_irq();
473 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
474 } else {
475 pxa27x_init_irq();
476 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
477 }
478 }
479
480 #ifdef CONFIG_PCI
481 /* Map PCI companion statically */
482 static struct map_desc cmx2xx_io_desc[] __initdata = {
483 [0] = { /* PCI bridge */
484 .virtual = CMX2XX_IT8152_VIRT,
485 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
486 .length = SZ_64M,
487 .type = MT_DEVICE
488 },
489 };
490
491 static void __init cmx2xx_map_io(void)
492 {
493 if (cpu_is_pxa25x())
494 pxa25x_map_io();
495
496 if (cpu_is_pxa27x())
497 pxa27x_map_io();
498
499 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
500
501 it8152_base_address = CMX2XX_IT8152_VIRT;
502 }
503 #else
504 static void __init cmx2xx_map_io(void)
505 {
506 if (cpu_is_pxa25x())
507 pxa25x_map_io();
508
509 if (cpu_is_pxa27x())
510 pxa27x_map_io();
511 }
512 #endif
513
514 MACHINE_START(ARMCORE, "Compulab CM-X2XX")
515 .boot_params = 0xa0000100,
516 .map_io = cmx2xx_map_io,
517 .nr_irqs = CMX2XX_NR_IRQS,
518 .init_irq = cmx2xx_init_irq,
519 .timer = &pxa_timer,
520 .init_machine = cmx2xx_init,
521 #ifdef CONFIG_PCI
522 .dma_zone_size = SZ_64M,
523 #endif
524 MACHINE_END