Merge branch 'dm814x-soc' into omap-for-v4.3/soc
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk-provider.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144
145 #include <asm/system_misc.h>
146
147 #include "clock.h"
148 #include "omap_hwmod.h"
149
150 #include "soc.h"
151 #include "common.h"
152 #include "clockdomain.h"
153 #include "powerdomain.h"
154 #include "cm2xxx.h"
155 #include "cm3xxx.h"
156 #include "cm33xx.h"
157 #include "prm.h"
158 #include "prm3xxx.h"
159 #include "prm44xx.h"
160 #include "prm33xx.h"
161 #include "prminst44xx.h"
162 #include "mux.h"
163 #include "pm.h"
164
165 /* Name of the OMAP hwmod for the MPU */
166 #define MPU_INITIATOR_NAME "mpu"
167
168 /*
169 * Number of struct omap_hwmod_link records per struct
170 * omap_hwmod_ocp_if record (master->slave and slave->master)
171 */
172 #define LINKS_PER_OCP_IF 2
173
174 /*
175 * Address offset (in bytes) between the reset control and the reset
176 * status registers: 4 bytes on OMAP4
177 */
178 #define OMAP4_RST_CTRL_ST_OFFSET 4
179
180 /**
181 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
182 * @enable_module: function to enable a module (via MODULEMODE)
183 * @disable_module: function to disable a module (via MODULEMODE)
184 *
185 * XXX Eventually this functionality will be hidden inside the PRM/CM
186 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
187 * conditionals in this code.
188 */
189 struct omap_hwmod_soc_ops {
190 void (*enable_module)(struct omap_hwmod *oh);
191 int (*disable_module)(struct omap_hwmod *oh);
192 int (*wait_target_ready)(struct omap_hwmod *oh);
193 int (*assert_hardreset)(struct omap_hwmod *oh,
194 struct omap_hwmod_rst_info *ohri);
195 int (*deassert_hardreset)(struct omap_hwmod *oh,
196 struct omap_hwmod_rst_info *ohri);
197 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
198 struct omap_hwmod_rst_info *ohri);
199 int (*init_clkdm)(struct omap_hwmod *oh);
200 void (*update_context_lost)(struct omap_hwmod *oh);
201 int (*get_context_lost)(struct omap_hwmod *oh);
202 };
203
204 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
205 static struct omap_hwmod_soc_ops soc_ops;
206
207 /* omap_hwmod_list contains all registered struct omap_hwmods */
208 static LIST_HEAD(omap_hwmod_list);
209
210 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
211 static struct omap_hwmod *mpu_oh;
212
213 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
214 static DEFINE_SPINLOCK(io_chain_lock);
215
216 /*
217 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
218 * allocated from - used to reduce the number of small memory
219 * allocations, which has a significant impact on performance
220 */
221 static struct omap_hwmod_link *linkspace;
222
223 /*
224 * free_ls, max_ls: array indexes into linkspace; representing the
225 * next free struct omap_hwmod_link index, and the maximum number of
226 * struct omap_hwmod_link records allocated (respectively)
227 */
228 static unsigned short free_ls, max_ls, ls_supp;
229
230 /* inited: set to true once the hwmod code is initialized */
231 static bool inited;
232
233 /* Private functions */
234
235 /**
236 * _fetch_next_ocp_if - return the next OCP interface in a list
237 * @p: ptr to a ptr to the list_head inside the ocp_if to return
238 * @i: pointer to the index of the element pointed to by @p in the list
239 *
240 * Return a pointer to the struct omap_hwmod_ocp_if record
241 * containing the struct list_head pointed to by @p, and increment
242 * @p such that a future call to this routine will return the next
243 * record.
244 */
245 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
246 int *i)
247 {
248 struct omap_hwmod_ocp_if *oi;
249
250 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
251 *p = (*p)->next;
252
253 *i = *i + 1;
254
255 return oi;
256 }
257
258 /**
259 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
260 * @oh: struct omap_hwmod *
261 *
262 * Load the current value of the hwmod OCP_SYSCONFIG register into the
263 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
264 * OCP_SYSCONFIG register or 0 upon success.
265 */
266 static int _update_sysc_cache(struct omap_hwmod *oh)
267 {
268 if (!oh->class->sysc) {
269 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
270 return -EINVAL;
271 }
272
273 /* XXX ensure module interface clock is up */
274
275 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
276
277 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
278 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
279
280 return 0;
281 }
282
283 /**
284 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
285 * @v: OCP_SYSCONFIG value to write
286 * @oh: struct omap_hwmod *
287 *
288 * Write @v into the module class' OCP_SYSCONFIG register, if it has
289 * one. No return value.
290 */
291 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
292 {
293 if (!oh->class->sysc) {
294 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
295 return;
296 }
297
298 /* XXX ensure module interface clock is up */
299
300 /* Module might have lost context, always update cache and register */
301 oh->_sysc_cache = v;
302
303 /*
304 * Some IP blocks (such as RTC) require unlocking of IP before
305 * accessing its registers. If a function pointer is present
306 * to unlock, then call it before accessing sysconfig and
307 * call lock after writing sysconfig.
308 */
309 if (oh->class->unlock)
310 oh->class->unlock(oh);
311
312 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
313
314 if (oh->class->lock)
315 oh->class->lock(oh);
316 }
317
318 /**
319 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
320 * @oh: struct omap_hwmod *
321 * @standbymode: MIDLEMODE field bits
322 * @v: pointer to register contents to modify
323 *
324 * Update the master standby mode bits in @v to be @standbymode for
325 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
326 * upon error or 0 upon success.
327 */
328 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
329 u32 *v)
330 {
331 u32 mstandby_mask;
332 u8 mstandby_shift;
333
334 if (!oh->class->sysc ||
335 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
336 return -EINVAL;
337
338 if (!oh->class->sysc->sysc_fields) {
339 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
340 return -EINVAL;
341 }
342
343 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
344 mstandby_mask = (0x3 << mstandby_shift);
345
346 *v &= ~mstandby_mask;
347 *v |= __ffs(standbymode) << mstandby_shift;
348
349 return 0;
350 }
351
352 /**
353 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
354 * @oh: struct omap_hwmod *
355 * @idlemode: SIDLEMODE field bits
356 * @v: pointer to register contents to modify
357 *
358 * Update the slave idle mode bits in @v to be @idlemode for the @oh
359 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
360 * or 0 upon success.
361 */
362 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
363 {
364 u32 sidle_mask;
365 u8 sidle_shift;
366
367 if (!oh->class->sysc ||
368 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
369 return -EINVAL;
370
371 if (!oh->class->sysc->sysc_fields) {
372 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
373 return -EINVAL;
374 }
375
376 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
377 sidle_mask = (0x3 << sidle_shift);
378
379 *v &= ~sidle_mask;
380 *v |= __ffs(idlemode) << sidle_shift;
381
382 return 0;
383 }
384
385 /**
386 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
387 * @oh: struct omap_hwmod *
388 * @clockact: CLOCKACTIVITY field bits
389 * @v: pointer to register contents to modify
390 *
391 * Update the clockactivity mode bits in @v to be @clockact for the
392 * @oh hwmod. Used for additional powersaving on some modules. Does
393 * not write to the hardware. Returns -EINVAL upon error or 0 upon
394 * success.
395 */
396 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
397 {
398 u32 clkact_mask;
399 u8 clkact_shift;
400
401 if (!oh->class->sysc ||
402 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
403 return -EINVAL;
404
405 if (!oh->class->sysc->sysc_fields) {
406 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
407 return -EINVAL;
408 }
409
410 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
411 clkact_mask = (0x3 << clkact_shift);
412
413 *v &= ~clkact_mask;
414 *v |= clockact << clkact_shift;
415
416 return 0;
417 }
418
419 /**
420 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
421 * @oh: struct omap_hwmod *
422 * @v: pointer to register contents to modify
423 *
424 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
425 * error or 0 upon success.
426 */
427 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
428 {
429 u32 softrst_mask;
430
431 if (!oh->class->sysc ||
432 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
433 return -EINVAL;
434
435 if (!oh->class->sysc->sysc_fields) {
436 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
437 return -EINVAL;
438 }
439
440 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
441
442 *v |= softrst_mask;
443
444 return 0;
445 }
446
447 /**
448 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
449 * @oh: struct omap_hwmod *
450 * @v: pointer to register contents to modify
451 *
452 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
453 * error or 0 upon success.
454 */
455 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
456 {
457 u32 softrst_mask;
458
459 if (!oh->class->sysc ||
460 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
461 return -EINVAL;
462
463 if (!oh->class->sysc->sysc_fields) {
464 WARN(1,
465 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
466 oh->name);
467 return -EINVAL;
468 }
469
470 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
471
472 *v &= ~softrst_mask;
473
474 return 0;
475 }
476
477 /**
478 * _wait_softreset_complete - wait for an OCP softreset to complete
479 * @oh: struct omap_hwmod * to wait on
480 *
481 * Wait until the IP block represented by @oh reports that its OCP
482 * softreset is complete. This can be triggered by software (see
483 * _ocp_softreset()) or by hardware upon returning from off-mode (one
484 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
485 * microseconds. Returns the number of microseconds waited.
486 */
487 static int _wait_softreset_complete(struct omap_hwmod *oh)
488 {
489 struct omap_hwmod_class_sysconfig *sysc;
490 u32 softrst_mask;
491 int c = 0;
492
493 sysc = oh->class->sysc;
494
495 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
496 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
497 & SYSS_RESETDONE_MASK),
498 MAX_MODULE_SOFTRESET_WAIT, c);
499 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
500 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
501 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
502 & softrst_mask),
503 MAX_MODULE_SOFTRESET_WAIT, c);
504 }
505
506 return c;
507 }
508
509 /**
510 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
511 * @oh: struct omap_hwmod *
512 *
513 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
514 * of some modules. When the DMA must perform read/write accesses, the
515 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
516 * for power management, software must set the DMADISABLE bit back to 1.
517 *
518 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
519 * error or 0 upon success.
520 */
521 static int _set_dmadisable(struct omap_hwmod *oh)
522 {
523 u32 v;
524 u32 dmadisable_mask;
525
526 if (!oh->class->sysc ||
527 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
528 return -EINVAL;
529
530 if (!oh->class->sysc->sysc_fields) {
531 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
532 return -EINVAL;
533 }
534
535 /* clocks must be on for this operation */
536 if (oh->_state != _HWMOD_STATE_ENABLED) {
537 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
538 return -EINVAL;
539 }
540
541 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
542
543 v = oh->_sysc_cache;
544 dmadisable_mask =
545 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
546 v |= dmadisable_mask;
547 _write_sysconfig(v, oh);
548
549 return 0;
550 }
551
552 /**
553 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
554 * @oh: struct omap_hwmod *
555 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
556 * @v: pointer to register contents to modify
557 *
558 * Update the module autoidle bit in @v to be @autoidle for the @oh
559 * hwmod. The autoidle bit controls whether the module can gate
560 * internal clocks automatically when it isn't doing anything; the
561 * exact function of this bit varies on a per-module basis. This
562 * function does not write to the hardware. Returns -EINVAL upon
563 * error or 0 upon success.
564 */
565 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
566 u32 *v)
567 {
568 u32 autoidle_mask;
569 u8 autoidle_shift;
570
571 if (!oh->class->sysc ||
572 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
573 return -EINVAL;
574
575 if (!oh->class->sysc->sysc_fields) {
576 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
577 return -EINVAL;
578 }
579
580 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
581 autoidle_mask = (0x1 << autoidle_shift);
582
583 *v &= ~autoidle_mask;
584 *v |= autoidle << autoidle_shift;
585
586 return 0;
587 }
588
589 /**
590 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
591 * @oh: struct omap_hwmod *
592 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
593 *
594 * Set or clear the I/O pad wakeup flag in the mux entries for the
595 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
596 * in memory. If the hwmod is currently idled, and the new idle
597 * values don't match the previous ones, this function will also
598 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
599 * currently idled, this function won't touch the hardware: the new
600 * mux settings are written to the SCM PADCTRL registers when the
601 * hwmod is idled. No return value.
602 */
603 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
604 {
605 struct omap_device_pad *pad;
606 bool change = false;
607 u16 prev_idle;
608 int j;
609
610 if (!oh->mux || !oh->mux->enabled)
611 return;
612
613 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
614 pad = oh->mux->pads_dynamic[j];
615
616 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
617 continue;
618
619 prev_idle = pad->idle;
620
621 if (set_wake)
622 pad->idle |= OMAP_WAKEUP_EN;
623 else
624 pad->idle &= ~OMAP_WAKEUP_EN;
625
626 if (prev_idle != pad->idle)
627 change = true;
628 }
629
630 if (change && oh->_state == _HWMOD_STATE_IDLE)
631 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
632 }
633
634 /**
635 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
636 * @oh: struct omap_hwmod *
637 *
638 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
639 * upon error or 0 upon success.
640 */
641 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
642 {
643 if (!oh->class->sysc ||
644 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
645 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
646 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
647 return -EINVAL;
648
649 if (!oh->class->sysc->sysc_fields) {
650 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
651 return -EINVAL;
652 }
653
654 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
655 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
656
657 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
658 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
659 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
660 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
661
662 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
663
664 return 0;
665 }
666
667 /**
668 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
669 * @oh: struct omap_hwmod *
670 *
671 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
672 * upon error or 0 upon success.
673 */
674 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
675 {
676 if (!oh->class->sysc ||
677 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
678 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
679 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
680 return -EINVAL;
681
682 if (!oh->class->sysc->sysc_fields) {
683 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
684 return -EINVAL;
685 }
686
687 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
688 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
689
690 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
691 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
692 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
693 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
694
695 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
696
697 return 0;
698 }
699
700 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
701 {
702 struct clk_hw_omap *clk;
703
704 if (oh->clkdm) {
705 return oh->clkdm;
706 } else if (oh->_clk) {
707 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
708 return NULL;
709 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
710 return clk->clkdm;
711 }
712 return NULL;
713 }
714
715 /**
716 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
717 * @oh: struct omap_hwmod *
718 *
719 * Prevent the hardware module @oh from entering idle while the
720 * hardare module initiator @init_oh is active. Useful when a module
721 * will be accessed by a particular initiator (e.g., if a module will
722 * be accessed by the IVA, there should be a sleepdep between the IVA
723 * initiator and the module). Only applies to modules in smart-idle
724 * mode. If the clockdomain is marked as not needing autodeps, return
725 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
726 * passes along clkdm_add_sleepdep() value upon success.
727 */
728 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
729 {
730 struct clockdomain *clkdm, *init_clkdm;
731
732 clkdm = _get_clkdm(oh);
733 init_clkdm = _get_clkdm(init_oh);
734
735 if (!clkdm || !init_clkdm)
736 return -EINVAL;
737
738 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
739 return 0;
740
741 return clkdm_add_sleepdep(clkdm, init_clkdm);
742 }
743
744 /**
745 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
746 * @oh: struct omap_hwmod *
747 *
748 * Allow the hardware module @oh to enter idle while the hardare
749 * module initiator @init_oh is active. Useful when a module will not
750 * be accessed by a particular initiator (e.g., if a module will not
751 * be accessed by the IVA, there should be no sleepdep between the IVA
752 * initiator and the module). Only applies to modules in smart-idle
753 * mode. If the clockdomain is marked as not needing autodeps, return
754 * 0 without doing anything. Returns -EINVAL upon error or passes
755 * along clkdm_del_sleepdep() value upon success.
756 */
757 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
758 {
759 struct clockdomain *clkdm, *init_clkdm;
760
761 clkdm = _get_clkdm(oh);
762 init_clkdm = _get_clkdm(init_oh);
763
764 if (!clkdm || !init_clkdm)
765 return -EINVAL;
766
767 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
768 return 0;
769
770 return clkdm_del_sleepdep(clkdm, init_clkdm);
771 }
772
773 /**
774 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
775 * @oh: struct omap_hwmod *
776 *
777 * Called from _init_clocks(). Populates the @oh _clk (main
778 * functional clock pointer) if a main_clk is present. Returns 0 on
779 * success or -EINVAL on error.
780 */
781 static int _init_main_clk(struct omap_hwmod *oh)
782 {
783 int ret = 0;
784
785 if (!oh->main_clk)
786 return 0;
787
788 oh->_clk = clk_get(NULL, oh->main_clk);
789 if (IS_ERR(oh->_clk)) {
790 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
791 oh->name, oh->main_clk);
792 return -EINVAL;
793 }
794 /*
795 * HACK: This needs a re-visit once clk_prepare() is implemented
796 * to do something meaningful. Today its just a no-op.
797 * If clk_prepare() is used at some point to do things like
798 * voltage scaling etc, then this would have to be moved to
799 * some point where subsystems like i2c and pmic become
800 * available.
801 */
802 clk_prepare(oh->_clk);
803
804 if (!_get_clkdm(oh))
805 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
806 oh->name, oh->main_clk);
807
808 return ret;
809 }
810
811 /**
812 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
813 * @oh: struct omap_hwmod *
814 *
815 * Called from _init_clocks(). Populates the @oh OCP slave interface
816 * clock pointers. Returns 0 on success or -EINVAL on error.
817 */
818 static int _init_interface_clks(struct omap_hwmod *oh)
819 {
820 struct omap_hwmod_ocp_if *os;
821 struct list_head *p;
822 struct clk *c;
823 int i = 0;
824 int ret = 0;
825
826 p = oh->slave_ports.next;
827
828 while (i < oh->slaves_cnt) {
829 os = _fetch_next_ocp_if(&p, &i);
830 if (!os->clk)
831 continue;
832
833 c = clk_get(NULL, os->clk);
834 if (IS_ERR(c)) {
835 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
836 oh->name, os->clk);
837 ret = -EINVAL;
838 continue;
839 }
840 os->_clk = c;
841 /*
842 * HACK: This needs a re-visit once clk_prepare() is implemented
843 * to do something meaningful. Today its just a no-op.
844 * If clk_prepare() is used at some point to do things like
845 * voltage scaling etc, then this would have to be moved to
846 * some point where subsystems like i2c and pmic become
847 * available.
848 */
849 clk_prepare(os->_clk);
850 }
851
852 return ret;
853 }
854
855 /**
856 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
857 * @oh: struct omap_hwmod *
858 *
859 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
860 * clock pointers. Returns 0 on success or -EINVAL on error.
861 */
862 static int _init_opt_clks(struct omap_hwmod *oh)
863 {
864 struct omap_hwmod_opt_clk *oc;
865 struct clk *c;
866 int i;
867 int ret = 0;
868
869 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
870 c = clk_get(NULL, oc->clk);
871 if (IS_ERR(c)) {
872 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
873 oh->name, oc->clk);
874 ret = -EINVAL;
875 continue;
876 }
877 oc->_clk = c;
878 /*
879 * HACK: This needs a re-visit once clk_prepare() is implemented
880 * to do something meaningful. Today its just a no-op.
881 * If clk_prepare() is used at some point to do things like
882 * voltage scaling etc, then this would have to be moved to
883 * some point where subsystems like i2c and pmic become
884 * available.
885 */
886 clk_prepare(oc->_clk);
887 }
888
889 return ret;
890 }
891
892 /**
893 * _enable_clocks - enable hwmod main clock and interface clocks
894 * @oh: struct omap_hwmod *
895 *
896 * Enables all clocks necessary for register reads and writes to succeed
897 * on the hwmod @oh. Returns 0.
898 */
899 static int _enable_clocks(struct omap_hwmod *oh)
900 {
901 struct omap_hwmod_ocp_if *os;
902 struct list_head *p;
903 int i = 0;
904
905 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
906
907 if (oh->_clk)
908 clk_enable(oh->_clk);
909
910 p = oh->slave_ports.next;
911
912 while (i < oh->slaves_cnt) {
913 os = _fetch_next_ocp_if(&p, &i);
914
915 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
916 clk_enable(os->_clk);
917 }
918
919 /* The opt clocks are controlled by the device driver. */
920
921 return 0;
922 }
923
924 /**
925 * _disable_clocks - disable hwmod main clock and interface clocks
926 * @oh: struct omap_hwmod *
927 *
928 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
929 */
930 static int _disable_clocks(struct omap_hwmod *oh)
931 {
932 struct omap_hwmod_ocp_if *os;
933 struct list_head *p;
934 int i = 0;
935
936 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
937
938 if (oh->_clk)
939 clk_disable(oh->_clk);
940
941 p = oh->slave_ports.next;
942
943 while (i < oh->slaves_cnt) {
944 os = _fetch_next_ocp_if(&p, &i);
945
946 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
947 clk_disable(os->_clk);
948 }
949
950 /* The opt clocks are controlled by the device driver. */
951
952 return 0;
953 }
954
955 static void _enable_optional_clocks(struct omap_hwmod *oh)
956 {
957 struct omap_hwmod_opt_clk *oc;
958 int i;
959
960 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
961
962 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
963 if (oc->_clk) {
964 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
965 __clk_get_name(oc->_clk));
966 clk_enable(oc->_clk);
967 }
968 }
969
970 static void _disable_optional_clocks(struct omap_hwmod *oh)
971 {
972 struct omap_hwmod_opt_clk *oc;
973 int i;
974
975 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
976
977 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
978 if (oc->_clk) {
979 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
980 __clk_get_name(oc->_clk));
981 clk_disable(oc->_clk);
982 }
983 }
984
985 /**
986 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
987 * @oh: struct omap_hwmod *
988 *
989 * Enables the PRCM module mode related to the hwmod @oh.
990 * No return value.
991 */
992 static void _omap4_enable_module(struct omap_hwmod *oh)
993 {
994 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
995 return;
996
997 pr_debug("omap_hwmod: %s: %s: %d\n",
998 oh->name, __func__, oh->prcm.omap4.modulemode);
999
1000 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1001 oh->clkdm->prcm_partition,
1002 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1003 }
1004
1005 /**
1006 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1007 * @oh: struct omap_hwmod *
1008 *
1009 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1010 * does not have an IDLEST bit or if the module successfully enters
1011 * slave idle; otherwise, pass along the return value of the
1012 * appropriate *_cm*_wait_module_idle() function.
1013 */
1014 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1015 {
1016 if (!oh)
1017 return -EINVAL;
1018
1019 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1020 return 0;
1021
1022 if (oh->flags & HWMOD_NO_IDLEST)
1023 return 0;
1024
1025 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1026 oh->clkdm->cm_inst,
1027 oh->prcm.omap4.clkctrl_offs, 0);
1028 }
1029
1030 /**
1031 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1032 * @oh: struct omap_hwmod *oh
1033 *
1034 * Count and return the number of MPU IRQs associated with the hwmod
1035 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1036 * NULL.
1037 */
1038 static int _count_mpu_irqs(struct omap_hwmod *oh)
1039 {
1040 struct omap_hwmod_irq_info *ohii;
1041 int i = 0;
1042
1043 if (!oh || !oh->mpu_irqs)
1044 return 0;
1045
1046 do {
1047 ohii = &oh->mpu_irqs[i++];
1048 } while (ohii->irq != -1);
1049
1050 return i-1;
1051 }
1052
1053 /**
1054 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1055 * @oh: struct omap_hwmod *oh
1056 *
1057 * Count and return the number of SDMA request lines associated with
1058 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1059 * if @oh is NULL.
1060 */
1061 static int _count_sdma_reqs(struct omap_hwmod *oh)
1062 {
1063 struct omap_hwmod_dma_info *ohdi;
1064 int i = 0;
1065
1066 if (!oh || !oh->sdma_reqs)
1067 return 0;
1068
1069 do {
1070 ohdi = &oh->sdma_reqs[i++];
1071 } while (ohdi->dma_req != -1);
1072
1073 return i-1;
1074 }
1075
1076 /**
1077 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1078 * @oh: struct omap_hwmod *oh
1079 *
1080 * Count and return the number of address space ranges associated with
1081 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1082 * if @oh is NULL.
1083 */
1084 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1085 {
1086 struct omap_hwmod_addr_space *mem;
1087 int i = 0;
1088
1089 if (!os || !os->addr)
1090 return 0;
1091
1092 do {
1093 mem = &os->addr[i++];
1094 } while (mem->pa_start != mem->pa_end);
1095
1096 return i-1;
1097 }
1098
1099 /**
1100 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1101 * @oh: struct omap_hwmod * to operate on
1102 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1103 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1104 *
1105 * Retrieve a MPU hardware IRQ line number named by @name associated
1106 * with the IP block pointed to by @oh. The IRQ number will be filled
1107 * into the address pointed to by @dma. When @name is non-null, the
1108 * IRQ line number associated with the named entry will be returned.
1109 * If @name is null, the first matching entry will be returned. Data
1110 * order is not meaningful in hwmod data, so callers are strongly
1111 * encouraged to use a non-null @name whenever possible to avoid
1112 * unpredictable effects if hwmod data is later added that causes data
1113 * ordering to change. Returns 0 upon success or a negative error
1114 * code upon error.
1115 */
1116 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1117 unsigned int *irq)
1118 {
1119 int i;
1120 bool found = false;
1121
1122 if (!oh->mpu_irqs)
1123 return -ENOENT;
1124
1125 i = 0;
1126 while (oh->mpu_irqs[i].irq != -1) {
1127 if (name == oh->mpu_irqs[i].name ||
1128 !strcmp(name, oh->mpu_irqs[i].name)) {
1129 found = true;
1130 break;
1131 }
1132 i++;
1133 }
1134
1135 if (!found)
1136 return -ENOENT;
1137
1138 *irq = oh->mpu_irqs[i].irq;
1139
1140 return 0;
1141 }
1142
1143 /**
1144 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1145 * @oh: struct omap_hwmod * to operate on
1146 * @name: pointer to the name of the SDMA request line to fetch (optional)
1147 * @dma: pointer to an unsigned int to store the request line ID to
1148 *
1149 * Retrieve an SDMA request line ID named by @name on the IP block
1150 * pointed to by @oh. The ID will be filled into the address pointed
1151 * to by @dma. When @name is non-null, the request line ID associated
1152 * with the named entry will be returned. If @name is null, the first
1153 * matching entry will be returned. Data order is not meaningful in
1154 * hwmod data, so callers are strongly encouraged to use a non-null
1155 * @name whenever possible to avoid unpredictable effects if hwmod
1156 * data is later added that causes data ordering to change. Returns 0
1157 * upon success or a negative error code upon error.
1158 */
1159 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1160 unsigned int *dma)
1161 {
1162 int i;
1163 bool found = false;
1164
1165 if (!oh->sdma_reqs)
1166 return -ENOENT;
1167
1168 i = 0;
1169 while (oh->sdma_reqs[i].dma_req != -1) {
1170 if (name == oh->sdma_reqs[i].name ||
1171 !strcmp(name, oh->sdma_reqs[i].name)) {
1172 found = true;
1173 break;
1174 }
1175 i++;
1176 }
1177
1178 if (!found)
1179 return -ENOENT;
1180
1181 *dma = oh->sdma_reqs[i].dma_req;
1182
1183 return 0;
1184 }
1185
1186 /**
1187 * _get_addr_space_by_name - fetch address space start & end by name
1188 * @oh: struct omap_hwmod * to operate on
1189 * @name: pointer to the name of the address space to fetch (optional)
1190 * @pa_start: pointer to a u32 to store the starting address to
1191 * @pa_end: pointer to a u32 to store the ending address to
1192 *
1193 * Retrieve address space start and end addresses for the IP block
1194 * pointed to by @oh. The data will be filled into the addresses
1195 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1196 * address space data associated with the named entry will be
1197 * returned. If @name is null, the first matching entry will be
1198 * returned. Data order is not meaningful in hwmod data, so callers
1199 * are strongly encouraged to use a non-null @name whenever possible
1200 * to avoid unpredictable effects if hwmod data is later added that
1201 * causes data ordering to change. Returns 0 upon success or a
1202 * negative error code upon error.
1203 */
1204 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1205 u32 *pa_start, u32 *pa_end)
1206 {
1207 int i, j;
1208 struct omap_hwmod_ocp_if *os;
1209 struct list_head *p = NULL;
1210 bool found = false;
1211
1212 p = oh->slave_ports.next;
1213
1214 i = 0;
1215 while (i < oh->slaves_cnt) {
1216 os = _fetch_next_ocp_if(&p, &i);
1217
1218 if (!os->addr)
1219 return -ENOENT;
1220
1221 j = 0;
1222 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1223 if (name == os->addr[j].name ||
1224 !strcmp(name, os->addr[j].name)) {
1225 found = true;
1226 break;
1227 }
1228 j++;
1229 }
1230
1231 if (found)
1232 break;
1233 }
1234
1235 if (!found)
1236 return -ENOENT;
1237
1238 *pa_start = os->addr[j].pa_start;
1239 *pa_end = os->addr[j].pa_end;
1240
1241 return 0;
1242 }
1243
1244 /**
1245 * _save_mpu_port_index - find and save the index to @oh's MPU port
1246 * @oh: struct omap_hwmod *
1247 *
1248 * Determines the array index of the OCP slave port that the MPU uses
1249 * to address the device, and saves it into the struct omap_hwmod.
1250 * Intended to be called during hwmod registration only. No return
1251 * value.
1252 */
1253 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1254 {
1255 struct omap_hwmod_ocp_if *os = NULL;
1256 struct list_head *p;
1257 int i = 0;
1258
1259 if (!oh)
1260 return;
1261
1262 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1263
1264 p = oh->slave_ports.next;
1265
1266 while (i < oh->slaves_cnt) {
1267 os = _fetch_next_ocp_if(&p, &i);
1268 if (os->user & OCP_USER_MPU) {
1269 oh->_mpu_port = os;
1270 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1271 break;
1272 }
1273 }
1274
1275 return;
1276 }
1277
1278 /**
1279 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1280 * @oh: struct omap_hwmod *
1281 *
1282 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1283 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1284 * communicate with the IP block. This interface need not be directly
1285 * connected to the MPU (and almost certainly is not), but is directly
1286 * connected to the IP block represented by @oh. Returns a pointer
1287 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1288 * error or if there does not appear to be a path from the MPU to this
1289 * IP block.
1290 */
1291 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1292 {
1293 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1294 return NULL;
1295
1296 return oh->_mpu_port;
1297 };
1298
1299 /**
1300 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1301 * @oh: struct omap_hwmod *
1302 *
1303 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1304 * the register target MPU address space; or returns NULL upon error.
1305 */
1306 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1307 {
1308 struct omap_hwmod_ocp_if *os;
1309 struct omap_hwmod_addr_space *mem;
1310 int found = 0, i = 0;
1311
1312 os = _find_mpu_rt_port(oh);
1313 if (!os || !os->addr)
1314 return NULL;
1315
1316 do {
1317 mem = &os->addr[i++];
1318 if (mem->flags & ADDR_TYPE_RT)
1319 found = 1;
1320 } while (!found && mem->pa_start != mem->pa_end);
1321
1322 return (found) ? mem : NULL;
1323 }
1324
1325 /**
1326 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1327 * @oh: struct omap_hwmod *
1328 *
1329 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1330 * by @oh is set to indicate to the PRCM that the IP block is active.
1331 * Usually this means placing the module into smart-idle mode and
1332 * smart-standby, but if there is a bug in the automatic idle handling
1333 * for the IP block, it may need to be placed into the force-idle or
1334 * no-idle variants of these modes. No return value.
1335 */
1336 static void _enable_sysc(struct omap_hwmod *oh)
1337 {
1338 u8 idlemode, sf;
1339 u32 v;
1340 bool clkdm_act;
1341 struct clockdomain *clkdm;
1342
1343 if (!oh->class->sysc)
1344 return;
1345
1346 /*
1347 * Wait until reset has completed, this is needed as the IP
1348 * block is reset automatically by hardware in some cases
1349 * (off-mode for example), and the drivers require the
1350 * IP to be ready when they access it
1351 */
1352 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1353 _enable_optional_clocks(oh);
1354 _wait_softreset_complete(oh);
1355 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1356 _disable_optional_clocks(oh);
1357
1358 v = oh->_sysc_cache;
1359 sf = oh->class->sysc->sysc_flags;
1360
1361 clkdm = _get_clkdm(oh);
1362 if (sf & SYSC_HAS_SIDLEMODE) {
1363 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1364 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1365 idlemode = HWMOD_IDLEMODE_NO;
1366 } else {
1367 if (sf & SYSC_HAS_ENAWAKEUP)
1368 _enable_wakeup(oh, &v);
1369 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1370 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1371 else
1372 idlemode = HWMOD_IDLEMODE_SMART;
1373 }
1374
1375 /*
1376 * This is special handling for some IPs like
1377 * 32k sync timer. Force them to idle!
1378 */
1379 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1380 if (clkdm_act && !(oh->class->sysc->idlemodes &
1381 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1382 idlemode = HWMOD_IDLEMODE_FORCE;
1383
1384 _set_slave_idlemode(oh, idlemode, &v);
1385 }
1386
1387 if (sf & SYSC_HAS_MIDLEMODE) {
1388 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1389 idlemode = HWMOD_IDLEMODE_FORCE;
1390 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1391 idlemode = HWMOD_IDLEMODE_NO;
1392 } else {
1393 if (sf & SYSC_HAS_ENAWAKEUP)
1394 _enable_wakeup(oh, &v);
1395 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1396 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1397 else
1398 idlemode = HWMOD_IDLEMODE_SMART;
1399 }
1400 _set_master_standbymode(oh, idlemode, &v);
1401 }
1402
1403 /*
1404 * XXX The clock framework should handle this, by
1405 * calling into this code. But this must wait until the
1406 * clock structures are tagged with omap_hwmod entries
1407 */
1408 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1409 (sf & SYSC_HAS_CLOCKACTIVITY))
1410 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1411
1412 /* If the cached value is the same as the new value, skip the write */
1413 if (oh->_sysc_cache != v)
1414 _write_sysconfig(v, oh);
1415
1416 /*
1417 * Set the autoidle bit only after setting the smartidle bit
1418 * Setting this will not have any impact on the other modules.
1419 */
1420 if (sf & SYSC_HAS_AUTOIDLE) {
1421 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1422 0 : 1;
1423 _set_module_autoidle(oh, idlemode, &v);
1424 _write_sysconfig(v, oh);
1425 }
1426 }
1427
1428 /**
1429 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1430 * @oh: struct omap_hwmod *
1431 *
1432 * If module is marked as SWSUP_SIDLE, force the module into slave
1433 * idle; otherwise, configure it for smart-idle. If module is marked
1434 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1435 * configure it for smart-standby. No return value.
1436 */
1437 static void _idle_sysc(struct omap_hwmod *oh)
1438 {
1439 u8 idlemode, sf;
1440 u32 v;
1441
1442 if (!oh->class->sysc)
1443 return;
1444
1445 v = oh->_sysc_cache;
1446 sf = oh->class->sysc->sysc_flags;
1447
1448 if (sf & SYSC_HAS_SIDLEMODE) {
1449 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1450 idlemode = HWMOD_IDLEMODE_FORCE;
1451 } else {
1452 if (sf & SYSC_HAS_ENAWAKEUP)
1453 _enable_wakeup(oh, &v);
1454 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1455 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1456 else
1457 idlemode = HWMOD_IDLEMODE_SMART;
1458 }
1459 _set_slave_idlemode(oh, idlemode, &v);
1460 }
1461
1462 if (sf & SYSC_HAS_MIDLEMODE) {
1463 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1464 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1465 idlemode = HWMOD_IDLEMODE_FORCE;
1466 } else {
1467 if (sf & SYSC_HAS_ENAWAKEUP)
1468 _enable_wakeup(oh, &v);
1469 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1470 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1471 else
1472 idlemode = HWMOD_IDLEMODE_SMART;
1473 }
1474 _set_master_standbymode(oh, idlemode, &v);
1475 }
1476
1477 _write_sysconfig(v, oh);
1478 }
1479
1480 /**
1481 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1482 * @oh: struct omap_hwmod *
1483 *
1484 * Force the module into slave idle and master suspend. No return
1485 * value.
1486 */
1487 static void _shutdown_sysc(struct omap_hwmod *oh)
1488 {
1489 u32 v;
1490 u8 sf;
1491
1492 if (!oh->class->sysc)
1493 return;
1494
1495 v = oh->_sysc_cache;
1496 sf = oh->class->sysc->sysc_flags;
1497
1498 if (sf & SYSC_HAS_SIDLEMODE)
1499 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1500
1501 if (sf & SYSC_HAS_MIDLEMODE)
1502 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1503
1504 if (sf & SYSC_HAS_AUTOIDLE)
1505 _set_module_autoidle(oh, 1, &v);
1506
1507 _write_sysconfig(v, oh);
1508 }
1509
1510 /**
1511 * _lookup - find an omap_hwmod by name
1512 * @name: find an omap_hwmod by name
1513 *
1514 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1515 */
1516 static struct omap_hwmod *_lookup(const char *name)
1517 {
1518 struct omap_hwmod *oh, *temp_oh;
1519
1520 oh = NULL;
1521
1522 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1523 if (!strcmp(name, temp_oh->name)) {
1524 oh = temp_oh;
1525 break;
1526 }
1527 }
1528
1529 return oh;
1530 }
1531
1532 /**
1533 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1534 * @oh: struct omap_hwmod *
1535 *
1536 * Convert a clockdomain name stored in a struct omap_hwmod into a
1537 * clockdomain pointer, and save it into the struct omap_hwmod.
1538 * Return -EINVAL if the clkdm_name lookup failed.
1539 */
1540 static int _init_clkdm(struct omap_hwmod *oh)
1541 {
1542 if (!oh->clkdm_name) {
1543 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1544 return 0;
1545 }
1546
1547 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1548 if (!oh->clkdm) {
1549 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1550 oh->name, oh->clkdm_name);
1551 return 0;
1552 }
1553
1554 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1555 oh->name, oh->clkdm_name);
1556
1557 return 0;
1558 }
1559
1560 /**
1561 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1562 * well the clockdomain.
1563 * @oh: struct omap_hwmod *
1564 * @data: not used; pass NULL
1565 *
1566 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1567 * Resolves all clock names embedded in the hwmod. Returns 0 on
1568 * success, or a negative error code on failure.
1569 */
1570 static int _init_clocks(struct omap_hwmod *oh, void *data)
1571 {
1572 int ret = 0;
1573
1574 if (oh->_state != _HWMOD_STATE_REGISTERED)
1575 return 0;
1576
1577 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1578
1579 if (soc_ops.init_clkdm)
1580 ret |= soc_ops.init_clkdm(oh);
1581
1582 ret |= _init_main_clk(oh);
1583 ret |= _init_interface_clks(oh);
1584 ret |= _init_opt_clks(oh);
1585
1586 if (!ret)
1587 oh->_state = _HWMOD_STATE_CLKS_INITED;
1588 else
1589 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1590
1591 return ret;
1592 }
1593
1594 /**
1595 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1596 * @oh: struct omap_hwmod *
1597 * @name: name of the reset line in the context of this hwmod
1598 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1599 *
1600 * Return the bit position of the reset line that match the
1601 * input name. Return -ENOENT if not found.
1602 */
1603 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1604 struct omap_hwmod_rst_info *ohri)
1605 {
1606 int i;
1607
1608 for (i = 0; i < oh->rst_lines_cnt; i++) {
1609 const char *rst_line = oh->rst_lines[i].name;
1610 if (!strcmp(rst_line, name)) {
1611 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1612 ohri->st_shift = oh->rst_lines[i].st_shift;
1613 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1614 oh->name, __func__, rst_line, ohri->rst_shift,
1615 ohri->st_shift);
1616
1617 return 0;
1618 }
1619 }
1620
1621 return -ENOENT;
1622 }
1623
1624 /**
1625 * _assert_hardreset - assert the HW reset line of submodules
1626 * contained in the hwmod module.
1627 * @oh: struct omap_hwmod *
1628 * @name: name of the reset line to lookup and assert
1629 *
1630 * Some IP like dsp, ipu or iva contain processor that require an HW
1631 * reset line to be assert / deassert in order to enable fully the IP.
1632 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1633 * asserting the hardreset line on the currently-booted SoC, or passes
1634 * along the return value from _lookup_hardreset() or the SoC's
1635 * assert_hardreset code.
1636 */
1637 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1638 {
1639 struct omap_hwmod_rst_info ohri;
1640 int ret = -EINVAL;
1641
1642 if (!oh)
1643 return -EINVAL;
1644
1645 if (!soc_ops.assert_hardreset)
1646 return -ENOSYS;
1647
1648 ret = _lookup_hardreset(oh, name, &ohri);
1649 if (ret < 0)
1650 return ret;
1651
1652 ret = soc_ops.assert_hardreset(oh, &ohri);
1653
1654 return ret;
1655 }
1656
1657 /**
1658 * _deassert_hardreset - deassert the HW reset line of submodules contained
1659 * in the hwmod module.
1660 * @oh: struct omap_hwmod *
1661 * @name: name of the reset line to look up and deassert
1662 *
1663 * Some IP like dsp, ipu or iva contain processor that require an HW
1664 * reset line to be assert / deassert in order to enable fully the IP.
1665 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1666 * deasserting the hardreset line on the currently-booted SoC, or passes
1667 * along the return value from _lookup_hardreset() or the SoC's
1668 * deassert_hardreset code.
1669 */
1670 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1671 {
1672 struct omap_hwmod_rst_info ohri;
1673 int ret = -EINVAL;
1674 int hwsup = 0;
1675
1676 if (!oh)
1677 return -EINVAL;
1678
1679 if (!soc_ops.deassert_hardreset)
1680 return -ENOSYS;
1681
1682 ret = _lookup_hardreset(oh, name, &ohri);
1683 if (ret < 0)
1684 return ret;
1685
1686 if (oh->clkdm) {
1687 /*
1688 * A clockdomain must be in SW_SUP otherwise reset
1689 * might not be completed. The clockdomain can be set
1690 * in HW_AUTO only when the module become ready.
1691 */
1692 hwsup = clkdm_in_hwsup(oh->clkdm);
1693 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1694 if (ret) {
1695 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1696 oh->name, oh->clkdm->name, ret);
1697 return ret;
1698 }
1699 }
1700
1701 _enable_clocks(oh);
1702 if (soc_ops.enable_module)
1703 soc_ops.enable_module(oh);
1704
1705 ret = soc_ops.deassert_hardreset(oh, &ohri);
1706
1707 if (soc_ops.disable_module)
1708 soc_ops.disable_module(oh);
1709 _disable_clocks(oh);
1710
1711 if (ret == -EBUSY)
1712 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1713
1714 if (oh->clkdm) {
1715 /*
1716 * Set the clockdomain to HW_AUTO, assuming that the
1717 * previous state was HW_AUTO.
1718 */
1719 if (hwsup)
1720 clkdm_allow_idle(oh->clkdm);
1721
1722 clkdm_hwmod_disable(oh->clkdm, oh);
1723 }
1724
1725 return ret;
1726 }
1727
1728 /**
1729 * _read_hardreset - read the HW reset line state of submodules
1730 * contained in the hwmod module
1731 * @oh: struct omap_hwmod *
1732 * @name: name of the reset line to look up and read
1733 *
1734 * Return the state of the reset line. Returns -EINVAL if @oh is
1735 * null, -ENOSYS if we have no way of reading the hardreset line
1736 * status on the currently-booted SoC, or passes along the return
1737 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1738 * code.
1739 */
1740 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1741 {
1742 struct omap_hwmod_rst_info ohri;
1743 int ret = -EINVAL;
1744
1745 if (!oh)
1746 return -EINVAL;
1747
1748 if (!soc_ops.is_hardreset_asserted)
1749 return -ENOSYS;
1750
1751 ret = _lookup_hardreset(oh, name, &ohri);
1752 if (ret < 0)
1753 return ret;
1754
1755 return soc_ops.is_hardreset_asserted(oh, &ohri);
1756 }
1757
1758 /**
1759 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1760 * @oh: struct omap_hwmod *
1761 *
1762 * If all hardreset lines associated with @oh are asserted, then return true.
1763 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1764 * associated with @oh are asserted, then return false.
1765 * This function is used to avoid executing some parts of the IP block
1766 * enable/disable sequence if its hardreset line is set.
1767 */
1768 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1769 {
1770 int i, rst_cnt = 0;
1771
1772 if (oh->rst_lines_cnt == 0)
1773 return false;
1774
1775 for (i = 0; i < oh->rst_lines_cnt; i++)
1776 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1777 rst_cnt++;
1778
1779 if (oh->rst_lines_cnt == rst_cnt)
1780 return true;
1781
1782 return false;
1783 }
1784
1785 /**
1786 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1787 * hard-reset
1788 * @oh: struct omap_hwmod *
1789 *
1790 * If any hardreset lines associated with @oh are asserted, then
1791 * return true. Otherwise, if no hardreset lines associated with @oh
1792 * are asserted, or if @oh has no hardreset lines, then return false.
1793 * This function is used to avoid executing some parts of the IP block
1794 * enable/disable sequence if any hardreset line is set.
1795 */
1796 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1797 {
1798 int rst_cnt = 0;
1799 int i;
1800
1801 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1802 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1803 rst_cnt++;
1804
1805 return (rst_cnt) ? true : false;
1806 }
1807
1808 /**
1809 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1810 * @oh: struct omap_hwmod *
1811 *
1812 * Disable the PRCM module mode related to the hwmod @oh.
1813 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1814 */
1815 static int _omap4_disable_module(struct omap_hwmod *oh)
1816 {
1817 int v;
1818
1819 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1820 return -EINVAL;
1821
1822 /*
1823 * Since integration code might still be doing something, only
1824 * disable if all lines are under hardreset.
1825 */
1826 if (_are_any_hardreset_lines_asserted(oh))
1827 return 0;
1828
1829 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1830
1831 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1832 oh->prcm.omap4.clkctrl_offs);
1833
1834 v = _omap4_wait_target_disable(oh);
1835 if (v)
1836 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1837 oh->name);
1838
1839 return 0;
1840 }
1841
1842 /**
1843 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1844 * @oh: struct omap_hwmod *
1845 *
1846 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1847 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1848 * reset this way, -EINVAL if the hwmod is in the wrong state,
1849 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1850 *
1851 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1852 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1853 * use the SYSCONFIG softreset bit to provide the status.
1854 *
1855 * Note that some IP like McBSP do have reset control but don't have
1856 * reset status.
1857 */
1858 static int _ocp_softreset(struct omap_hwmod *oh)
1859 {
1860 u32 v;
1861 int c = 0;
1862 int ret = 0;
1863
1864 if (!oh->class->sysc ||
1865 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1866 return -ENOENT;
1867
1868 /* clocks must be on for this operation */
1869 if (oh->_state != _HWMOD_STATE_ENABLED) {
1870 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1871 oh->name);
1872 return -EINVAL;
1873 }
1874
1875 /* For some modules, all optionnal clocks need to be enabled as well */
1876 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1877 _enable_optional_clocks(oh);
1878
1879 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1880
1881 v = oh->_sysc_cache;
1882 ret = _set_softreset(oh, &v);
1883 if (ret)
1884 goto dis_opt_clks;
1885
1886 _write_sysconfig(v, oh);
1887
1888 if (oh->class->sysc->srst_udelay)
1889 udelay(oh->class->sysc->srst_udelay);
1890
1891 c = _wait_softreset_complete(oh);
1892 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1893 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1894 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1895 ret = -ETIMEDOUT;
1896 goto dis_opt_clks;
1897 } else {
1898 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1899 }
1900
1901 ret = _clear_softreset(oh, &v);
1902 if (ret)
1903 goto dis_opt_clks;
1904
1905 _write_sysconfig(v, oh);
1906
1907 /*
1908 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1909 * _wait_target_ready() or _reset()
1910 */
1911
1912 dis_opt_clks:
1913 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1914 _disable_optional_clocks(oh);
1915
1916 return ret;
1917 }
1918
1919 /**
1920 * _reset - reset an omap_hwmod
1921 * @oh: struct omap_hwmod *
1922 *
1923 * Resets an omap_hwmod @oh. If the module has a custom reset
1924 * function pointer defined, then call it to reset the IP block, and
1925 * pass along its return value to the caller. Otherwise, if the IP
1926 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1927 * associated with it, call a function to reset the IP block via that
1928 * method, and pass along the return value to the caller. Finally, if
1929 * the IP block has some hardreset lines associated with it, assert
1930 * all of those, but do _not_ deassert them. (This is because driver
1931 * authors have expressed an apparent requirement to control the
1932 * deassertion of the hardreset lines themselves.)
1933 *
1934 * The default software reset mechanism for most OMAP IP blocks is
1935 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1936 * hwmods cannot be reset via this method. Some are not targets and
1937 * therefore have no OCP header registers to access. Others (like the
1938 * IVA) have idiosyncratic reset sequences. So for these relatively
1939 * rare cases, custom reset code can be supplied in the struct
1940 * omap_hwmod_class .reset function pointer.
1941 *
1942 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1943 * does not prevent idling of the system. This is necessary for cases
1944 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1945 * kernel without disabling dma.
1946 *
1947 * Passes along the return value from either _ocp_softreset() or the
1948 * custom reset function - these must return -EINVAL if the hwmod
1949 * cannot be reset this way or if the hwmod is in the wrong state,
1950 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1951 */
1952 static int _reset(struct omap_hwmod *oh)
1953 {
1954 int i, r;
1955
1956 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1957
1958 if (oh->class->reset) {
1959 r = oh->class->reset(oh);
1960 } else {
1961 if (oh->rst_lines_cnt > 0) {
1962 for (i = 0; i < oh->rst_lines_cnt; i++)
1963 _assert_hardreset(oh, oh->rst_lines[i].name);
1964 return 0;
1965 } else {
1966 r = _ocp_softreset(oh);
1967 if (r == -ENOENT)
1968 r = 0;
1969 }
1970 }
1971
1972 _set_dmadisable(oh);
1973
1974 /*
1975 * OCP_SYSCONFIG bits need to be reprogrammed after a
1976 * softreset. The _enable() function should be split to avoid
1977 * the rewrite of the OCP_SYSCONFIG register.
1978 */
1979 if (oh->class->sysc) {
1980 _update_sysc_cache(oh);
1981 _enable_sysc(oh);
1982 }
1983
1984 return r;
1985 }
1986
1987 /**
1988 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1989 *
1990 * Call the appropriate PRM function to clear any logged I/O chain
1991 * wakeups and to reconfigure the chain. This apparently needs to be
1992 * done upon every mux change. Since hwmods can be concurrently
1993 * enabled and idled, hold a spinlock around the I/O chain
1994 * reconfiguration sequence. No return value.
1995 *
1996 * XXX When the PRM code is moved to drivers, this function can be removed,
1997 * as the PRM infrastructure should abstract this.
1998 */
1999 static void _reconfigure_io_chain(void)
2000 {
2001 unsigned long flags;
2002
2003 spin_lock_irqsave(&io_chain_lock, flags);
2004
2005 omap_prm_reconfigure_io_chain();
2006
2007 spin_unlock_irqrestore(&io_chain_lock, flags);
2008 }
2009
2010 /**
2011 * _omap4_update_context_lost - increment hwmod context loss counter if
2012 * hwmod context was lost, and clear hardware context loss reg
2013 * @oh: hwmod to check for context loss
2014 *
2015 * If the PRCM indicates that the hwmod @oh lost context, increment
2016 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2017 * bits. No return value.
2018 */
2019 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2020 {
2021 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2022 return;
2023
2024 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2025 oh->clkdm->pwrdm.ptr->prcm_offs,
2026 oh->prcm.omap4.context_offs))
2027 return;
2028
2029 oh->prcm.omap4.context_lost_counter++;
2030 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2031 oh->clkdm->pwrdm.ptr->prcm_offs,
2032 oh->prcm.omap4.context_offs);
2033 }
2034
2035 /**
2036 * _omap4_get_context_lost - get context loss counter for a hwmod
2037 * @oh: hwmod to get context loss counter for
2038 *
2039 * Returns the in-memory context loss counter for a hwmod.
2040 */
2041 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2042 {
2043 return oh->prcm.omap4.context_lost_counter;
2044 }
2045
2046 /**
2047 * _enable_preprogram - Pre-program an IP block during the _enable() process
2048 * @oh: struct omap_hwmod *
2049 *
2050 * Some IP blocks (such as AESS) require some additional programming
2051 * after enable before they can enter idle. If a function pointer to
2052 * do so is present in the hwmod data, then call it and pass along the
2053 * return value; otherwise, return 0.
2054 */
2055 static int _enable_preprogram(struct omap_hwmod *oh)
2056 {
2057 if (!oh->class->enable_preprogram)
2058 return 0;
2059
2060 return oh->class->enable_preprogram(oh);
2061 }
2062
2063 /**
2064 * _enable - enable an omap_hwmod
2065 * @oh: struct omap_hwmod *
2066 *
2067 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2068 * register target. Returns -EINVAL if the hwmod is in the wrong
2069 * state or passes along the return value of _wait_target_ready().
2070 */
2071 static int _enable(struct omap_hwmod *oh)
2072 {
2073 int r;
2074 int hwsup = 0;
2075
2076 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2077
2078 /*
2079 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2080 * state at init. Now that someone is really trying to enable
2081 * them, just ensure that the hwmod mux is set.
2082 */
2083 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2084 /*
2085 * If the caller has mux data populated, do the mux'ing
2086 * which wouldn't have been done as part of the _enable()
2087 * done during setup.
2088 */
2089 if (oh->mux)
2090 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2091
2092 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2093 return 0;
2094 }
2095
2096 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2097 oh->_state != _HWMOD_STATE_IDLE &&
2098 oh->_state != _HWMOD_STATE_DISABLED) {
2099 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2100 oh->name);
2101 return -EINVAL;
2102 }
2103
2104 /*
2105 * If an IP block contains HW reset lines and all of them are
2106 * asserted, we let integration code associated with that
2107 * block handle the enable. We've received very little
2108 * information on what those driver authors need, and until
2109 * detailed information is provided and the driver code is
2110 * posted to the public lists, this is probably the best we
2111 * can do.
2112 */
2113 if (_are_all_hardreset_lines_asserted(oh))
2114 return 0;
2115
2116 /* Mux pins for device runtime if populated */
2117 if (oh->mux && (!oh->mux->enabled ||
2118 ((oh->_state == _HWMOD_STATE_IDLE) &&
2119 oh->mux->pads_dynamic))) {
2120 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2121 _reconfigure_io_chain();
2122 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
2123 _reconfigure_io_chain();
2124 }
2125
2126 _add_initiator_dep(oh, mpu_oh);
2127
2128 if (oh->clkdm) {
2129 /*
2130 * A clockdomain must be in SW_SUP before enabling
2131 * completely the module. The clockdomain can be set
2132 * in HW_AUTO only when the module become ready.
2133 */
2134 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2135 !clkdm_missing_idle_reporting(oh->clkdm);
2136 r = clkdm_hwmod_enable(oh->clkdm, oh);
2137 if (r) {
2138 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2139 oh->name, oh->clkdm->name, r);
2140 return r;
2141 }
2142 }
2143
2144 _enable_clocks(oh);
2145 if (soc_ops.enable_module)
2146 soc_ops.enable_module(oh);
2147 if (oh->flags & HWMOD_BLOCK_WFI)
2148 cpu_idle_poll_ctrl(true);
2149
2150 if (soc_ops.update_context_lost)
2151 soc_ops.update_context_lost(oh);
2152
2153 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2154 -EINVAL;
2155 if (!r) {
2156 /*
2157 * Set the clockdomain to HW_AUTO only if the target is ready,
2158 * assuming that the previous state was HW_AUTO
2159 */
2160 if (oh->clkdm && hwsup)
2161 clkdm_allow_idle(oh->clkdm);
2162
2163 oh->_state = _HWMOD_STATE_ENABLED;
2164
2165 /* Access the sysconfig only if the target is ready */
2166 if (oh->class->sysc) {
2167 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2168 _update_sysc_cache(oh);
2169 _enable_sysc(oh);
2170 }
2171 r = _enable_preprogram(oh);
2172 } else {
2173 if (soc_ops.disable_module)
2174 soc_ops.disable_module(oh);
2175 _disable_clocks(oh);
2176 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
2177 oh->name, r);
2178
2179 if (oh->clkdm)
2180 clkdm_hwmod_disable(oh->clkdm, oh);
2181 }
2182
2183 return r;
2184 }
2185
2186 /**
2187 * _idle - idle an omap_hwmod
2188 * @oh: struct omap_hwmod *
2189 *
2190 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2191 * no further work. Returns -EINVAL if the hwmod is in the wrong
2192 * state or returns 0.
2193 */
2194 static int _idle(struct omap_hwmod *oh)
2195 {
2196 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2197
2198 if (oh->_state != _HWMOD_STATE_ENABLED) {
2199 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2200 oh->name);
2201 return -EINVAL;
2202 }
2203
2204 if (_are_all_hardreset_lines_asserted(oh))
2205 return 0;
2206
2207 if (oh->class->sysc)
2208 _idle_sysc(oh);
2209 _del_initiator_dep(oh, mpu_oh);
2210
2211 if (oh->flags & HWMOD_BLOCK_WFI)
2212 cpu_idle_poll_ctrl(false);
2213 if (soc_ops.disable_module)
2214 soc_ops.disable_module(oh);
2215
2216 /*
2217 * The module must be in idle mode before disabling any parents
2218 * clocks. Otherwise, the parent clock might be disabled before
2219 * the module transition is done, and thus will prevent the
2220 * transition to complete properly.
2221 */
2222 _disable_clocks(oh);
2223 if (oh->clkdm)
2224 clkdm_hwmod_disable(oh->clkdm, oh);
2225
2226 /* Mux pins for device idle if populated */
2227 if (oh->mux && oh->mux->pads_dynamic) {
2228 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2229 _reconfigure_io_chain();
2230 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) {
2231 _reconfigure_io_chain();
2232 }
2233
2234 oh->_state = _HWMOD_STATE_IDLE;
2235
2236 return 0;
2237 }
2238
2239 /**
2240 * _shutdown - shutdown an omap_hwmod
2241 * @oh: struct omap_hwmod *
2242 *
2243 * Shut down an omap_hwmod @oh. This should be called when the driver
2244 * used for the hwmod is removed or unloaded or if the driver is not
2245 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2246 * state or returns 0.
2247 */
2248 static int _shutdown(struct omap_hwmod *oh)
2249 {
2250 int ret, i;
2251 u8 prev_state;
2252
2253 if (oh->_state != _HWMOD_STATE_IDLE &&
2254 oh->_state != _HWMOD_STATE_ENABLED) {
2255 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2256 oh->name);
2257 return -EINVAL;
2258 }
2259
2260 if (_are_all_hardreset_lines_asserted(oh))
2261 return 0;
2262
2263 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2264
2265 if (oh->class->pre_shutdown) {
2266 prev_state = oh->_state;
2267 if (oh->_state == _HWMOD_STATE_IDLE)
2268 _enable(oh);
2269 ret = oh->class->pre_shutdown(oh);
2270 if (ret) {
2271 if (prev_state == _HWMOD_STATE_IDLE)
2272 _idle(oh);
2273 return ret;
2274 }
2275 }
2276
2277 if (oh->class->sysc) {
2278 if (oh->_state == _HWMOD_STATE_IDLE)
2279 _enable(oh);
2280 _shutdown_sysc(oh);
2281 }
2282
2283 /* clocks and deps are already disabled in idle */
2284 if (oh->_state == _HWMOD_STATE_ENABLED) {
2285 _del_initiator_dep(oh, mpu_oh);
2286 /* XXX what about the other system initiators here? dma, dsp */
2287 if (oh->flags & HWMOD_BLOCK_WFI)
2288 cpu_idle_poll_ctrl(false);
2289 if (soc_ops.disable_module)
2290 soc_ops.disable_module(oh);
2291 _disable_clocks(oh);
2292 if (oh->clkdm)
2293 clkdm_hwmod_disable(oh->clkdm, oh);
2294 }
2295 /* XXX Should this code also force-disable the optional clocks? */
2296
2297 for (i = 0; i < oh->rst_lines_cnt; i++)
2298 _assert_hardreset(oh, oh->rst_lines[i].name);
2299
2300 /* Mux pins to safe mode or use populated off mode values */
2301 if (oh->mux)
2302 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2303
2304 oh->_state = _HWMOD_STATE_DISABLED;
2305
2306 return 0;
2307 }
2308
2309 static int of_dev_find_hwmod(struct device_node *np,
2310 struct omap_hwmod *oh)
2311 {
2312 int count, i, res;
2313 const char *p;
2314
2315 count = of_property_count_strings(np, "ti,hwmods");
2316 if (count < 1)
2317 return -ENODEV;
2318
2319 for (i = 0; i < count; i++) {
2320 res = of_property_read_string_index(np, "ti,hwmods",
2321 i, &p);
2322 if (res)
2323 continue;
2324 if (!strcmp(p, oh->name)) {
2325 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2326 np->name, i, oh->name);
2327 return i;
2328 }
2329 }
2330
2331 return -ENODEV;
2332 }
2333
2334 /**
2335 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2336 * @np: struct device_node *
2337 * @oh: struct omap_hwmod *
2338 * @index: index of the entry found
2339 * @found: struct device_node * found or NULL
2340 *
2341 * Parse the dt blob and find out needed hwmod. Recursive function is
2342 * implemented to take care hierarchical dt blob parsing.
2343 * Return: Returns 0 on success, -ENODEV when not found.
2344 */
2345 static int of_dev_hwmod_lookup(struct device_node *np,
2346 struct omap_hwmod *oh,
2347 int *index,
2348 struct device_node **found)
2349 {
2350 struct device_node *np0 = NULL;
2351 int res;
2352
2353 res = of_dev_find_hwmod(np, oh);
2354 if (res >= 0) {
2355 *found = np;
2356 *index = res;
2357 return 0;
2358 }
2359
2360 for_each_child_of_node(np, np0) {
2361 struct device_node *fc;
2362 int i;
2363
2364 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2365 if (res == 0) {
2366 *found = fc;
2367 *index = i;
2368 return 0;
2369 }
2370 }
2371
2372 *found = NULL;
2373 *index = 0;
2374
2375 return -ENODEV;
2376 }
2377
2378 /**
2379 * _init_mpu_rt_base - populate the virtual address for a hwmod
2380 * @oh: struct omap_hwmod * to locate the virtual address
2381 * @data: (unused, caller should pass NULL)
2382 * @index: index of the reg entry iospace in device tree
2383 * @np: struct device_node * of the IP block's device node in the DT data
2384 *
2385 * Cache the virtual address used by the MPU to access this IP block's
2386 * registers. This address is needed early so the OCP registers that
2387 * are part of the device's address space can be ioremapped properly.
2388 *
2389 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2390 * -ENXIO on absent or invalid register target address space.
2391 */
2392 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2393 int index, struct device_node *np)
2394 {
2395 struct omap_hwmod_addr_space *mem;
2396 void __iomem *va_start = NULL;
2397
2398 if (!oh)
2399 return -EINVAL;
2400
2401 _save_mpu_port_index(oh);
2402
2403 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2404 return -ENXIO;
2405
2406 mem = _find_mpu_rt_addr_space(oh);
2407 if (!mem) {
2408 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2409 oh->name);
2410
2411 /* Extract the IO space from device tree blob */
2412 if (!np)
2413 return -ENXIO;
2414
2415 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2416 } else {
2417 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2418 }
2419
2420 if (!va_start) {
2421 if (mem)
2422 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2423 else
2424 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2425 oh->name, index, np->full_name);
2426 return -ENXIO;
2427 }
2428
2429 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2430 oh->name, va_start);
2431
2432 oh->_mpu_rt_va = va_start;
2433 return 0;
2434 }
2435
2436 /**
2437 * _init - initialize internal data for the hwmod @oh
2438 * @oh: struct omap_hwmod *
2439 * @n: (unused)
2440 *
2441 * Look up the clocks and the address space used by the MPU to access
2442 * registers belonging to the hwmod @oh. @oh must already be
2443 * registered at this point. This is the first of two phases for
2444 * hwmod initialization. Code called here does not touch any hardware
2445 * registers, it simply prepares internal data structures. Returns 0
2446 * upon success or if the hwmod isn't registered or if the hwmod's
2447 * address space is not defined, or -EINVAL upon failure.
2448 */
2449 static int __init _init(struct omap_hwmod *oh, void *data)
2450 {
2451 int r, index;
2452 struct device_node *np = NULL;
2453
2454 if (oh->_state != _HWMOD_STATE_REGISTERED)
2455 return 0;
2456
2457 if (of_have_populated_dt()) {
2458 struct device_node *bus;
2459
2460 bus = of_find_node_by_name(NULL, "ocp");
2461 if (!bus)
2462 return -ENODEV;
2463
2464 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2465 if (r)
2466 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2467 else if (np && index)
2468 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2469 oh->name, np->name);
2470 }
2471
2472 if (oh->class->sysc) {
2473 r = _init_mpu_rt_base(oh, NULL, index, np);
2474 if (r < 0) {
2475 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2476 oh->name);
2477 return 0;
2478 }
2479 }
2480
2481 r = _init_clocks(oh, NULL);
2482 if (r < 0) {
2483 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2484 return -EINVAL;
2485 }
2486
2487 if (np) {
2488 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2489 oh->flags |= HWMOD_INIT_NO_RESET;
2490 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2491 oh->flags |= HWMOD_INIT_NO_IDLE;
2492 }
2493
2494 oh->_state = _HWMOD_STATE_INITIALIZED;
2495
2496 return 0;
2497 }
2498
2499 /**
2500 * _setup_iclk_autoidle - configure an IP block's interface clocks
2501 * @oh: struct omap_hwmod *
2502 *
2503 * Set up the module's interface clocks. XXX This function is still mostly
2504 * a stub; implementing this properly requires iclk autoidle usecounting in
2505 * the clock code. No return value.
2506 */
2507 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2508 {
2509 struct omap_hwmod_ocp_if *os;
2510 struct list_head *p;
2511 int i = 0;
2512 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2513 return;
2514
2515 p = oh->slave_ports.next;
2516
2517 while (i < oh->slaves_cnt) {
2518 os = _fetch_next_ocp_if(&p, &i);
2519 if (!os->_clk)
2520 continue;
2521
2522 if (os->flags & OCPIF_SWSUP_IDLE) {
2523 /* XXX omap_iclk_deny_idle(c); */
2524 } else {
2525 /* XXX omap_iclk_allow_idle(c); */
2526 clk_enable(os->_clk);
2527 }
2528 }
2529
2530 return;
2531 }
2532
2533 /**
2534 * _setup_reset - reset an IP block during the setup process
2535 * @oh: struct omap_hwmod *
2536 *
2537 * Reset the IP block corresponding to the hwmod @oh during the setup
2538 * process. The IP block is first enabled so it can be successfully
2539 * reset. Returns 0 upon success or a negative error code upon
2540 * failure.
2541 */
2542 static int __init _setup_reset(struct omap_hwmod *oh)
2543 {
2544 int r;
2545
2546 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2547 return -EINVAL;
2548
2549 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2550 return -EPERM;
2551
2552 if (oh->rst_lines_cnt == 0) {
2553 r = _enable(oh);
2554 if (r) {
2555 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2556 oh->name, oh->_state);
2557 return -EINVAL;
2558 }
2559 }
2560
2561 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2562 r = _reset(oh);
2563
2564 return r;
2565 }
2566
2567 /**
2568 * _setup_postsetup - transition to the appropriate state after _setup
2569 * @oh: struct omap_hwmod *
2570 *
2571 * Place an IP block represented by @oh into a "post-setup" state --
2572 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2573 * this function is called at the end of _setup().) The postsetup
2574 * state for an IP block can be changed by calling
2575 * omap_hwmod_enter_postsetup_state() early in the boot process,
2576 * before one of the omap_hwmod_setup*() functions are called for the
2577 * IP block.
2578 *
2579 * The IP block stays in this state until a PM runtime-based driver is
2580 * loaded for that IP block. A post-setup state of IDLE is
2581 * appropriate for almost all IP blocks with runtime PM-enabled
2582 * drivers, since those drivers are able to enable the IP block. A
2583 * post-setup state of ENABLED is appropriate for kernels with PM
2584 * runtime disabled. The DISABLED state is appropriate for unusual IP
2585 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2586 * included, since the WDTIMER starts running on reset and will reset
2587 * the MPU if left active.
2588 *
2589 * This post-setup mechanism is deprecated. Once all of the OMAP
2590 * drivers have been converted to use PM runtime, and all of the IP
2591 * block data and interconnect data is available to the hwmod code, it
2592 * should be possible to replace this mechanism with a "lazy reset"
2593 * arrangement. In a "lazy reset" setup, each IP block is enabled
2594 * when the driver first probes, then all remaining IP blocks without
2595 * drivers are either shut down or enabled after the drivers have
2596 * loaded. However, this cannot take place until the above
2597 * preconditions have been met, since otherwise the late reset code
2598 * has no way of knowing which IP blocks are in use by drivers, and
2599 * which ones are unused.
2600 *
2601 * No return value.
2602 */
2603 static void __init _setup_postsetup(struct omap_hwmod *oh)
2604 {
2605 u8 postsetup_state;
2606
2607 if (oh->rst_lines_cnt > 0)
2608 return;
2609
2610 postsetup_state = oh->_postsetup_state;
2611 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2612 postsetup_state = _HWMOD_STATE_ENABLED;
2613
2614 /*
2615 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2616 * it should be set by the core code as a runtime flag during startup
2617 */
2618 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2619 (postsetup_state == _HWMOD_STATE_IDLE)) {
2620 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2621 postsetup_state = _HWMOD_STATE_ENABLED;
2622 }
2623
2624 if (postsetup_state == _HWMOD_STATE_IDLE)
2625 _idle(oh);
2626 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2627 _shutdown(oh);
2628 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2629 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2630 oh->name, postsetup_state);
2631
2632 return;
2633 }
2634
2635 /**
2636 * _setup - prepare IP block hardware for use
2637 * @oh: struct omap_hwmod *
2638 * @n: (unused, pass NULL)
2639 *
2640 * Configure the IP block represented by @oh. This may include
2641 * enabling the IP block, resetting it, and placing it into a
2642 * post-setup state, depending on the type of IP block and applicable
2643 * flags. IP blocks are reset to prevent any previous configuration
2644 * by the bootloader or previous operating system from interfering
2645 * with power management or other parts of the system. The reset can
2646 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2647 * two phases for hwmod initialization. Code called here generally
2648 * affects the IP block hardware, or system integration hardware
2649 * associated with the IP block. Returns 0.
2650 */
2651 static int __init _setup(struct omap_hwmod *oh, void *data)
2652 {
2653 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2654 return 0;
2655
2656 if (oh->parent_hwmod) {
2657 int r;
2658
2659 r = _enable(oh->parent_hwmod);
2660 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2661 oh->name, oh->parent_hwmod->name);
2662 }
2663
2664 _setup_iclk_autoidle(oh);
2665
2666 if (!_setup_reset(oh))
2667 _setup_postsetup(oh);
2668
2669 if (oh->parent_hwmod) {
2670 u8 postsetup_state;
2671
2672 postsetup_state = oh->parent_hwmod->_postsetup_state;
2673
2674 if (postsetup_state == _HWMOD_STATE_IDLE)
2675 _idle(oh->parent_hwmod);
2676 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2677 _shutdown(oh->parent_hwmod);
2678 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2679 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2680 oh->parent_hwmod->name, postsetup_state);
2681 }
2682
2683 return 0;
2684 }
2685
2686 /**
2687 * _register - register a struct omap_hwmod
2688 * @oh: struct omap_hwmod *
2689 *
2690 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2691 * already has been registered by the same name; -EINVAL if the
2692 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2693 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2694 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2695 * success.
2696 *
2697 * XXX The data should be copied into bootmem, so the original data
2698 * should be marked __initdata and freed after init. This would allow
2699 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2700 * that the copy process would be relatively complex due to the large number
2701 * of substructures.
2702 */
2703 static int __init _register(struct omap_hwmod *oh)
2704 {
2705 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2706 (oh->_state != _HWMOD_STATE_UNKNOWN))
2707 return -EINVAL;
2708
2709 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2710
2711 if (_lookup(oh->name))
2712 return -EEXIST;
2713
2714 list_add_tail(&oh->node, &omap_hwmod_list);
2715
2716 INIT_LIST_HEAD(&oh->master_ports);
2717 INIT_LIST_HEAD(&oh->slave_ports);
2718 spin_lock_init(&oh->_lock);
2719 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2720
2721 oh->_state = _HWMOD_STATE_REGISTERED;
2722
2723 /*
2724 * XXX Rather than doing a strcmp(), this should test a flag
2725 * set in the hwmod data, inserted by the autogenerator code.
2726 */
2727 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2728 mpu_oh = oh;
2729
2730 return 0;
2731 }
2732
2733 /**
2734 * _alloc_links - return allocated memory for hwmod links
2735 * @ml: pointer to a struct omap_hwmod_link * for the master link
2736 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2737 *
2738 * Return pointers to two struct omap_hwmod_link records, via the
2739 * addresses pointed to by @ml and @sl. Will first attempt to return
2740 * memory allocated as part of a large initial block, but if that has
2741 * been exhausted, will allocate memory itself. Since ideally this
2742 * second allocation path will never occur, the number of these
2743 * 'supplemental' allocations will be logged when debugging is
2744 * enabled. Returns 0.
2745 */
2746 static int __init _alloc_links(struct omap_hwmod_link **ml,
2747 struct omap_hwmod_link **sl)
2748 {
2749 unsigned int sz;
2750
2751 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2752 *ml = &linkspace[free_ls++];
2753 *sl = &linkspace[free_ls++];
2754 return 0;
2755 }
2756
2757 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2758
2759 *sl = NULL;
2760 *ml = memblock_virt_alloc(sz, 0);
2761
2762 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2763
2764 ls_supp++;
2765 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2766 ls_supp * LINKS_PER_OCP_IF);
2767
2768 return 0;
2769 };
2770
2771 /**
2772 * _add_link - add an interconnect between two IP blocks
2773 * @oi: pointer to a struct omap_hwmod_ocp_if record
2774 *
2775 * Add struct omap_hwmod_link records connecting the master IP block
2776 * specified in @oi->master to @oi, and connecting the slave IP block
2777 * specified in @oi->slave to @oi. This code is assumed to run before
2778 * preemption or SMP has been enabled, thus avoiding the need for
2779 * locking in this code. Changes to this assumption will require
2780 * additional locking. Returns 0.
2781 */
2782 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2783 {
2784 struct omap_hwmod_link *ml, *sl;
2785
2786 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2787 oi->slave->name);
2788
2789 _alloc_links(&ml, &sl);
2790
2791 ml->ocp_if = oi;
2792 list_add(&ml->node, &oi->master->master_ports);
2793 oi->master->masters_cnt++;
2794
2795 sl->ocp_if = oi;
2796 list_add(&sl->node, &oi->slave->slave_ports);
2797 oi->slave->slaves_cnt++;
2798
2799 return 0;
2800 }
2801
2802 /**
2803 * _register_link - register a struct omap_hwmod_ocp_if
2804 * @oi: struct omap_hwmod_ocp_if *
2805 *
2806 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2807 * has already been registered; -EINVAL if @oi is NULL or if the
2808 * record pointed to by @oi is missing required fields; or 0 upon
2809 * success.
2810 *
2811 * XXX The data should be copied into bootmem, so the original data
2812 * should be marked __initdata and freed after init. This would allow
2813 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2814 */
2815 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2816 {
2817 if (!oi || !oi->master || !oi->slave || !oi->user)
2818 return -EINVAL;
2819
2820 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2821 return -EEXIST;
2822
2823 pr_debug("omap_hwmod: registering link from %s to %s\n",
2824 oi->master->name, oi->slave->name);
2825
2826 /*
2827 * Register the connected hwmods, if they haven't been
2828 * registered already
2829 */
2830 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2831 _register(oi->master);
2832
2833 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2834 _register(oi->slave);
2835
2836 _add_link(oi);
2837
2838 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2839
2840 return 0;
2841 }
2842
2843 /**
2844 * _alloc_linkspace - allocate large block of hwmod links
2845 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2846 *
2847 * Allocate a large block of struct omap_hwmod_link records. This
2848 * improves boot time significantly by avoiding the need to allocate
2849 * individual records one by one. If the number of records to
2850 * allocate in the block hasn't been manually specified, this function
2851 * will count the number of struct omap_hwmod_ocp_if records in @ois
2852 * and use that to determine the allocation size. For SoC families
2853 * that require multiple list registrations, such as OMAP3xxx, this
2854 * estimation process isn't optimal, so manual estimation is advised
2855 * in those cases. Returns -EEXIST if the allocation has already occurred
2856 * or 0 upon success.
2857 */
2858 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2859 {
2860 unsigned int i = 0;
2861 unsigned int sz;
2862
2863 if (linkspace) {
2864 WARN(1, "linkspace already allocated\n");
2865 return -EEXIST;
2866 }
2867
2868 if (max_ls == 0)
2869 while (ois[i++])
2870 max_ls += LINKS_PER_OCP_IF;
2871
2872 sz = sizeof(struct omap_hwmod_link) * max_ls;
2873
2874 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2875 __func__, sz, max_ls);
2876
2877 linkspace = memblock_virt_alloc(sz, 0);
2878
2879 return 0;
2880 }
2881
2882 /* Static functions intended only for use in soc_ops field function pointers */
2883
2884 /**
2885 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2886 * @oh: struct omap_hwmod *
2887 *
2888 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2889 * does not have an IDLEST bit or if the module successfully leaves
2890 * slave idle; otherwise, pass along the return value of the
2891 * appropriate *_cm*_wait_module_ready() function.
2892 */
2893 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2894 {
2895 if (!oh)
2896 return -EINVAL;
2897
2898 if (oh->flags & HWMOD_NO_IDLEST)
2899 return 0;
2900
2901 if (!_find_mpu_rt_port(oh))
2902 return 0;
2903
2904 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2905
2906 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2907 oh->prcm.omap2.idlest_reg_id,
2908 oh->prcm.omap2.idlest_idle_bit);
2909 }
2910
2911 /**
2912 * _omap4_wait_target_ready - wait for a module to leave slave idle
2913 * @oh: struct omap_hwmod *
2914 *
2915 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2916 * does not have an IDLEST bit or if the module successfully leaves
2917 * slave idle; otherwise, pass along the return value of the
2918 * appropriate *_cm*_wait_module_ready() function.
2919 */
2920 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2921 {
2922 if (!oh)
2923 return -EINVAL;
2924
2925 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2926 return 0;
2927
2928 if (!_find_mpu_rt_port(oh))
2929 return 0;
2930
2931 /* XXX check module SIDLEMODE, hardreset status */
2932
2933 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2934 oh->clkdm->cm_inst,
2935 oh->prcm.omap4.clkctrl_offs, 0);
2936 }
2937
2938 /**
2939 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2940 * @oh: struct omap_hwmod * to assert hardreset
2941 * @ohri: hardreset line data
2942 *
2943 * Call omap2_prm_assert_hardreset() with parameters extracted from
2944 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2945 * use as an soc_ops function pointer. Passes along the return value
2946 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2947 * for removal when the PRM code is moved into drivers/.
2948 */
2949 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2950 struct omap_hwmod_rst_info *ohri)
2951 {
2952 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2953 oh->prcm.omap2.module_offs, 0);
2954 }
2955
2956 /**
2957 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2958 * @oh: struct omap_hwmod * to deassert hardreset
2959 * @ohri: hardreset line data
2960 *
2961 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2962 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2963 * use as an soc_ops function pointer. Passes along the return value
2964 * from omap2_prm_deassert_hardreset(). XXX This function is
2965 * scheduled for removal when the PRM code is moved into drivers/.
2966 */
2967 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2968 struct omap_hwmod_rst_info *ohri)
2969 {
2970 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2971 oh->prcm.omap2.module_offs, 0, 0);
2972 }
2973
2974 /**
2975 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2976 * @oh: struct omap_hwmod * to test hardreset
2977 * @ohri: hardreset line data
2978 *
2979 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2980 * from the hwmod @oh and the hardreset line data @ohri. Only
2981 * intended for use as an soc_ops function pointer. Passes along the
2982 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2983 * function is scheduled for removal when the PRM code is moved into
2984 * drivers/.
2985 */
2986 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2987 struct omap_hwmod_rst_info *ohri)
2988 {
2989 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2990 oh->prcm.omap2.module_offs, 0);
2991 }
2992
2993 /**
2994 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2995 * @oh: struct omap_hwmod * to assert hardreset
2996 * @ohri: hardreset line data
2997 *
2998 * Call omap4_prminst_assert_hardreset() with parameters extracted
2999 * from the hwmod @oh and the hardreset line data @ohri. Only
3000 * intended for use as an soc_ops function pointer. Passes along the
3001 * return value from omap4_prminst_assert_hardreset(). XXX This
3002 * function is scheduled for removal when the PRM code is moved into
3003 * drivers/.
3004 */
3005 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
3006 struct omap_hwmod_rst_info *ohri)
3007 {
3008 if (!oh->clkdm)
3009 return -EINVAL;
3010
3011 return omap_prm_assert_hardreset(ohri->rst_shift,
3012 oh->clkdm->pwrdm.ptr->prcm_partition,
3013 oh->clkdm->pwrdm.ptr->prcm_offs,
3014 oh->prcm.omap4.rstctrl_offs);
3015 }
3016
3017 /**
3018 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3019 * @oh: struct omap_hwmod * to deassert hardreset
3020 * @ohri: hardreset line data
3021 *
3022 * Call omap4_prminst_deassert_hardreset() with parameters extracted
3023 * from the hwmod @oh and the hardreset line data @ohri. Only
3024 * intended for use as an soc_ops function pointer. Passes along the
3025 * return value from omap4_prminst_deassert_hardreset(). XXX This
3026 * function is scheduled for removal when the PRM code is moved into
3027 * drivers/.
3028 */
3029 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
3030 struct omap_hwmod_rst_info *ohri)
3031 {
3032 if (!oh->clkdm)
3033 return -EINVAL;
3034
3035 if (ohri->st_shift)
3036 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3037 oh->name, ohri->name);
3038 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
3039 oh->clkdm->pwrdm.ptr->prcm_partition,
3040 oh->clkdm->pwrdm.ptr->prcm_offs,
3041 oh->prcm.omap4.rstctrl_offs,
3042 oh->prcm.omap4.rstctrl_offs +
3043 OMAP4_RST_CTRL_ST_OFFSET);
3044 }
3045
3046 /**
3047 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3048 * @oh: struct omap_hwmod * to test hardreset
3049 * @ohri: hardreset line data
3050 *
3051 * Call omap4_prminst_is_hardreset_asserted() with parameters
3052 * extracted from the hwmod @oh and the hardreset line data @ohri.
3053 * Only intended for use as an soc_ops function pointer. Passes along
3054 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3055 * This function is scheduled for removal when the PRM code is moved
3056 * into drivers/.
3057 */
3058 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3059 struct omap_hwmod_rst_info *ohri)
3060 {
3061 if (!oh->clkdm)
3062 return -EINVAL;
3063
3064 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
3065 oh->clkdm->pwrdm.ptr->
3066 prcm_partition,
3067 oh->clkdm->pwrdm.ptr->prcm_offs,
3068 oh->prcm.omap4.rstctrl_offs);
3069 }
3070
3071 /**
3072 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3073 * @oh: struct omap_hwmod * to deassert hardreset
3074 * @ohri: hardreset line data
3075 *
3076 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3077 * from the hwmod @oh and the hardreset line data @ohri. Only
3078 * intended for use as an soc_ops function pointer. Passes along the
3079 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3080 * function is scheduled for removal when the PRM code is moved into
3081 * drivers/.
3082 */
3083 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3084 struct omap_hwmod_rst_info *ohri)
3085 {
3086 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
3087 oh->clkdm->pwrdm.ptr->prcm_partition,
3088 oh->clkdm->pwrdm.ptr->prcm_offs,
3089 oh->prcm.omap4.rstctrl_offs,
3090 oh->prcm.omap4.rstst_offs);
3091 }
3092
3093 /* Public functions */
3094
3095 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3096 {
3097 if (oh->flags & HWMOD_16BIT_REG)
3098 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
3099 else
3100 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
3101 }
3102
3103 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3104 {
3105 if (oh->flags & HWMOD_16BIT_REG)
3106 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
3107 else
3108 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
3109 }
3110
3111 /**
3112 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3113 * @oh: struct omap_hwmod *
3114 *
3115 * This is a public function exposed to drivers. Some drivers may need to do
3116 * some settings before and after resetting the device. Those drivers after
3117 * doing the necessary settings could use this function to start a reset by
3118 * setting the SYSCONFIG.SOFTRESET bit.
3119 */
3120 int omap_hwmod_softreset(struct omap_hwmod *oh)
3121 {
3122 u32 v;
3123 int ret;
3124
3125 if (!oh || !(oh->_sysc_cache))
3126 return -EINVAL;
3127
3128 v = oh->_sysc_cache;
3129 ret = _set_softreset(oh, &v);
3130 if (ret)
3131 goto error;
3132 _write_sysconfig(v, oh);
3133
3134 ret = _clear_softreset(oh, &v);
3135 if (ret)
3136 goto error;
3137 _write_sysconfig(v, oh);
3138
3139 error:
3140 return ret;
3141 }
3142
3143 /**
3144 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3145 * @name: name of the omap_hwmod to look up
3146 *
3147 * Given a @name of an omap_hwmod, return a pointer to the registered
3148 * struct omap_hwmod *, or NULL upon error.
3149 */
3150 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3151 {
3152 struct omap_hwmod *oh;
3153
3154 if (!name)
3155 return NULL;
3156
3157 oh = _lookup(name);
3158
3159 return oh;
3160 }
3161
3162 /**
3163 * omap_hwmod_for_each - call function for each registered omap_hwmod
3164 * @fn: pointer to a callback function
3165 * @data: void * data to pass to callback function
3166 *
3167 * Call @fn for each registered omap_hwmod, passing @data to each
3168 * function. @fn must return 0 for success or any other value for
3169 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3170 * will stop and the non-zero return value will be passed to the
3171 * caller of omap_hwmod_for_each(). @fn is called with
3172 * omap_hwmod_for_each() held.
3173 */
3174 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3175 void *data)
3176 {
3177 struct omap_hwmod *temp_oh;
3178 int ret = 0;
3179
3180 if (!fn)
3181 return -EINVAL;
3182
3183 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3184 ret = (*fn)(temp_oh, data);
3185 if (ret)
3186 break;
3187 }
3188
3189 return ret;
3190 }
3191
3192 /**
3193 * omap_hwmod_register_links - register an array of hwmod links
3194 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3195 *
3196 * Intended to be called early in boot before the clock framework is
3197 * initialized. If @ois is not null, will register all omap_hwmods
3198 * listed in @ois that are valid for this chip. Returns -EINVAL if
3199 * omap_hwmod_init() hasn't been called before calling this function,
3200 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3201 * success.
3202 */
3203 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3204 {
3205 int r, i;
3206
3207 if (!inited)
3208 return -EINVAL;
3209
3210 if (!ois)
3211 return 0;
3212
3213 if (ois[0] == NULL) /* Empty list */
3214 return 0;
3215
3216 if (!linkspace) {
3217 if (_alloc_linkspace(ois)) {
3218 pr_err("omap_hwmod: could not allocate link space\n");
3219 return -ENOMEM;
3220 }
3221 }
3222
3223 i = 0;
3224 do {
3225 r = _register_link(ois[i]);
3226 WARN(r && r != -EEXIST,
3227 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3228 ois[i]->master->name, ois[i]->slave->name, r);
3229 } while (ois[++i]);
3230
3231 return 0;
3232 }
3233
3234 /**
3235 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3236 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3237 *
3238 * If the hwmod data corresponding to the MPU subsystem IP block
3239 * hasn't been initialized and set up yet, do so now. This must be
3240 * done first since sleep dependencies may be added from other hwmods
3241 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3242 * return value.
3243 */
3244 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3245 {
3246 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3247 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3248 __func__, MPU_INITIATOR_NAME);
3249 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3250 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3251 }
3252
3253 /**
3254 * omap_hwmod_setup_one - set up a single hwmod
3255 * @oh_name: const char * name of the already-registered hwmod to set up
3256 *
3257 * Initialize and set up a single hwmod. Intended to be used for a
3258 * small number of early devices, such as the timer IP blocks used for
3259 * the scheduler clock. Must be called after omap2_clk_init().
3260 * Resolves the struct clk names to struct clk pointers for each
3261 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3262 * -EINVAL upon error or 0 upon success.
3263 */
3264 int __init omap_hwmod_setup_one(const char *oh_name)
3265 {
3266 struct omap_hwmod *oh;
3267
3268 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3269
3270 oh = _lookup(oh_name);
3271 if (!oh) {
3272 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3273 return -EINVAL;
3274 }
3275
3276 _ensure_mpu_hwmod_is_setup(oh);
3277
3278 _init(oh, NULL);
3279 _setup(oh, NULL);
3280
3281 return 0;
3282 }
3283
3284 /**
3285 * omap_hwmod_setup_all - set up all registered IP blocks
3286 *
3287 * Initialize and set up all IP blocks registered with the hwmod code.
3288 * Must be called after omap2_clk_init(). Resolves the struct clk
3289 * names to struct clk pointers for each registered omap_hwmod. Also
3290 * calls _setup() on each hwmod. Returns 0 upon success.
3291 */
3292 static int __init omap_hwmod_setup_all(void)
3293 {
3294 _ensure_mpu_hwmod_is_setup(NULL);
3295
3296 omap_hwmod_for_each(_init, NULL);
3297 omap_hwmod_for_each(_setup, NULL);
3298
3299 return 0;
3300 }
3301 omap_core_initcall(omap_hwmod_setup_all);
3302
3303 /**
3304 * omap_hwmod_enable - enable an omap_hwmod
3305 * @oh: struct omap_hwmod *
3306 *
3307 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3308 * Returns -EINVAL on error or passes along the return value from _enable().
3309 */
3310 int omap_hwmod_enable(struct omap_hwmod *oh)
3311 {
3312 int r;
3313 unsigned long flags;
3314
3315 if (!oh)
3316 return -EINVAL;
3317
3318 spin_lock_irqsave(&oh->_lock, flags);
3319 r = _enable(oh);
3320 spin_unlock_irqrestore(&oh->_lock, flags);
3321
3322 return r;
3323 }
3324
3325 /**
3326 * omap_hwmod_idle - idle an omap_hwmod
3327 * @oh: struct omap_hwmod *
3328 *
3329 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3330 * Returns -EINVAL on error or passes along the return value from _idle().
3331 */
3332 int omap_hwmod_idle(struct omap_hwmod *oh)
3333 {
3334 int r;
3335 unsigned long flags;
3336
3337 if (!oh)
3338 return -EINVAL;
3339
3340 spin_lock_irqsave(&oh->_lock, flags);
3341 r = _idle(oh);
3342 spin_unlock_irqrestore(&oh->_lock, flags);
3343
3344 return r;
3345 }
3346
3347 /**
3348 * omap_hwmod_shutdown - shutdown an omap_hwmod
3349 * @oh: struct omap_hwmod *
3350 *
3351 * Shutdown an omap_hwmod @oh. Intended to be called by
3352 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3353 * the return value from _shutdown().
3354 */
3355 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3356 {
3357 int r;
3358 unsigned long flags;
3359
3360 if (!oh)
3361 return -EINVAL;
3362
3363 spin_lock_irqsave(&oh->_lock, flags);
3364 r = _shutdown(oh);
3365 spin_unlock_irqrestore(&oh->_lock, flags);
3366
3367 return r;
3368 }
3369
3370 /*
3371 * IP block data retrieval functions
3372 */
3373
3374 /**
3375 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3376 * @oh: struct omap_hwmod *
3377 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3378 *
3379 * Count the number of struct resource array elements necessary to
3380 * contain omap_hwmod @oh resources. Intended to be called by code
3381 * that registers omap_devices. Intended to be used to determine the
3382 * size of a dynamically-allocated struct resource array, before
3383 * calling omap_hwmod_fill_resources(). Returns the number of struct
3384 * resource array elements needed.
3385 *
3386 * XXX This code is not optimized. It could attempt to merge adjacent
3387 * resource IDs.
3388 *
3389 */
3390 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3391 {
3392 int ret = 0;
3393
3394 if (flags & IORESOURCE_IRQ)
3395 ret += _count_mpu_irqs(oh);
3396
3397 if (flags & IORESOURCE_DMA)
3398 ret += _count_sdma_reqs(oh);
3399
3400 if (flags & IORESOURCE_MEM) {
3401 int i = 0;
3402 struct omap_hwmod_ocp_if *os;
3403 struct list_head *p = oh->slave_ports.next;
3404
3405 while (i < oh->slaves_cnt) {
3406 os = _fetch_next_ocp_if(&p, &i);
3407 ret += _count_ocp_if_addr_spaces(os);
3408 }
3409 }
3410
3411 return ret;
3412 }
3413
3414 /**
3415 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3416 * @oh: struct omap_hwmod *
3417 * @res: pointer to the first element of an array of struct resource to fill
3418 *
3419 * Fill the struct resource array @res with resource data from the
3420 * omap_hwmod @oh. Intended to be called by code that registers
3421 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3422 * number of array elements filled.
3423 */
3424 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3425 {
3426 struct omap_hwmod_ocp_if *os;
3427 struct list_head *p;
3428 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3429 int r = 0;
3430
3431 /* For each IRQ, DMA, memory area, fill in array.*/
3432
3433 mpu_irqs_cnt = _count_mpu_irqs(oh);
3434 for (i = 0; i < mpu_irqs_cnt; i++) {
3435 unsigned int irq;
3436
3437 if (oh->xlate_irq)
3438 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
3439 else
3440 irq = (oh->mpu_irqs + i)->irq;
3441 (res + r)->name = (oh->mpu_irqs + i)->name;
3442 (res + r)->start = irq;
3443 (res + r)->end = irq;
3444 (res + r)->flags = IORESOURCE_IRQ;
3445 r++;
3446 }
3447
3448 sdma_reqs_cnt = _count_sdma_reqs(oh);
3449 for (i = 0; i < sdma_reqs_cnt; i++) {
3450 (res + r)->name = (oh->sdma_reqs + i)->name;
3451 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3452 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3453 (res + r)->flags = IORESOURCE_DMA;
3454 r++;
3455 }
3456
3457 p = oh->slave_ports.next;
3458
3459 i = 0;
3460 while (i < oh->slaves_cnt) {
3461 os = _fetch_next_ocp_if(&p, &i);
3462 addr_cnt = _count_ocp_if_addr_spaces(os);
3463
3464 for (j = 0; j < addr_cnt; j++) {
3465 (res + r)->name = (os->addr + j)->name;
3466 (res + r)->start = (os->addr + j)->pa_start;
3467 (res + r)->end = (os->addr + j)->pa_end;
3468 (res + r)->flags = IORESOURCE_MEM;
3469 r++;
3470 }
3471 }
3472
3473 return r;
3474 }
3475
3476 /**
3477 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3478 * @oh: struct omap_hwmod *
3479 * @res: pointer to the array of struct resource to fill
3480 *
3481 * Fill the struct resource array @res with dma resource data from the
3482 * omap_hwmod @oh. Intended to be called by code that registers
3483 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3484 * number of array elements filled.
3485 */
3486 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3487 {
3488 int i, sdma_reqs_cnt;
3489 int r = 0;
3490
3491 sdma_reqs_cnt = _count_sdma_reqs(oh);
3492 for (i = 0; i < sdma_reqs_cnt; i++) {
3493 (res + r)->name = (oh->sdma_reqs + i)->name;
3494 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3495 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3496 (res + r)->flags = IORESOURCE_DMA;
3497 r++;
3498 }
3499
3500 return r;
3501 }
3502
3503 /**
3504 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3505 * @oh: struct omap_hwmod * to operate on
3506 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3507 * @name: pointer to the name of the data to fetch (optional)
3508 * @rsrc: pointer to a struct resource, allocated by the caller
3509 *
3510 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3511 * data for the IP block pointed to by @oh. The data will be filled
3512 * into a struct resource record pointed to by @rsrc. The struct
3513 * resource must be allocated by the caller. When @name is non-null,
3514 * the data associated with the matching entry in the IRQ/SDMA/address
3515 * space hwmod data arrays will be returned. If @name is null, the
3516 * first array entry will be returned. Data order is not meaningful
3517 * in hwmod data, so callers are strongly encouraged to use a non-null
3518 * @name whenever possible to avoid unpredictable effects if hwmod
3519 * data is later added that causes data ordering to change. This
3520 * function is only intended for use by OMAP core code. Device
3521 * drivers should not call this function - the appropriate bus-related
3522 * data accessor functions should be used instead. Returns 0 upon
3523 * success or a negative error code upon error.
3524 */
3525 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3526 const char *name, struct resource *rsrc)
3527 {
3528 int r;
3529 unsigned int irq, dma;
3530 u32 pa_start, pa_end;
3531
3532 if (!oh || !rsrc)
3533 return -EINVAL;
3534
3535 if (type == IORESOURCE_IRQ) {
3536 r = _get_mpu_irq_by_name(oh, name, &irq);
3537 if (r)
3538 return r;
3539
3540 rsrc->start = irq;
3541 rsrc->end = irq;
3542 } else if (type == IORESOURCE_DMA) {
3543 r = _get_sdma_req_by_name(oh, name, &dma);
3544 if (r)
3545 return r;
3546
3547 rsrc->start = dma;
3548 rsrc->end = dma;
3549 } else if (type == IORESOURCE_MEM) {
3550 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3551 if (r)
3552 return r;
3553
3554 rsrc->start = pa_start;
3555 rsrc->end = pa_end;
3556 } else {
3557 return -EINVAL;
3558 }
3559
3560 rsrc->flags = type;
3561 rsrc->name = name;
3562
3563 return 0;
3564 }
3565
3566 /**
3567 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3568 * @oh: struct omap_hwmod *
3569 *
3570 * Return the powerdomain pointer associated with the OMAP module
3571 * @oh's main clock. If @oh does not have a main clk, return the
3572 * powerdomain associated with the interface clock associated with the
3573 * module's MPU port. (XXX Perhaps this should use the SDMA port
3574 * instead?) Returns NULL on error, or a struct powerdomain * on
3575 * success.
3576 */
3577 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3578 {
3579 struct clk *c;
3580 struct omap_hwmod_ocp_if *oi;
3581 struct clockdomain *clkdm;
3582 struct clk_hw_omap *clk;
3583
3584 if (!oh)
3585 return NULL;
3586
3587 if (oh->clkdm)
3588 return oh->clkdm->pwrdm.ptr;
3589
3590 if (oh->_clk) {
3591 c = oh->_clk;
3592 } else {
3593 oi = _find_mpu_rt_port(oh);
3594 if (!oi)
3595 return NULL;
3596 c = oi->_clk;
3597 }
3598
3599 clk = to_clk_hw_omap(__clk_get_hw(c));
3600 clkdm = clk->clkdm;
3601 if (!clkdm)
3602 return NULL;
3603
3604 return clkdm->pwrdm.ptr;
3605 }
3606
3607 /**
3608 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3609 * @oh: struct omap_hwmod *
3610 *
3611 * Returns the virtual address corresponding to the beginning of the
3612 * module's register target, in the address range that is intended to
3613 * be used by the MPU. Returns the virtual address upon success or NULL
3614 * upon error.
3615 */
3616 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3617 {
3618 if (!oh)
3619 return NULL;
3620
3621 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3622 return NULL;
3623
3624 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3625 return NULL;
3626
3627 return oh->_mpu_rt_va;
3628 }
3629
3630 /*
3631 * XXX what about functions for drivers to save/restore ocp_sysconfig
3632 * for context save/restore operations?
3633 */
3634
3635 /**
3636 * omap_hwmod_enable_wakeup - allow device to wake up the system
3637 * @oh: struct omap_hwmod *
3638 *
3639 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3640 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3641 * this IP block if it has dynamic mux entries. Eventually this
3642 * should set PRCM wakeup registers to cause the PRCM to receive
3643 * wakeup events from the module. Does not set any wakeup routing
3644 * registers beyond this point - if the module is to wake up any other
3645 * module or subsystem, that must be set separately. Called by
3646 * omap_device code. Returns -EINVAL on error or 0 upon success.
3647 */
3648 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3649 {
3650 unsigned long flags;
3651 u32 v;
3652
3653 spin_lock_irqsave(&oh->_lock, flags);
3654
3655 if (oh->class->sysc &&
3656 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3657 v = oh->_sysc_cache;
3658 _enable_wakeup(oh, &v);
3659 _write_sysconfig(v, oh);
3660 }
3661
3662 _set_idle_ioring_wakeup(oh, true);
3663 spin_unlock_irqrestore(&oh->_lock, flags);
3664
3665 return 0;
3666 }
3667
3668 /**
3669 * omap_hwmod_disable_wakeup - prevent device from waking the system
3670 * @oh: struct omap_hwmod *
3671 *
3672 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3673 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3674 * events for this IP block if it has dynamic mux entries. Eventually
3675 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3676 * wakeup events from the module. Does not set any wakeup routing
3677 * registers beyond this point - if the module is to wake up any other
3678 * module or subsystem, that must be set separately. Called by
3679 * omap_device code. Returns -EINVAL on error or 0 upon success.
3680 */
3681 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3682 {
3683 unsigned long flags;
3684 u32 v;
3685
3686 spin_lock_irqsave(&oh->_lock, flags);
3687
3688 if (oh->class->sysc &&
3689 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3690 v = oh->_sysc_cache;
3691 _disable_wakeup(oh, &v);
3692 _write_sysconfig(v, oh);
3693 }
3694
3695 _set_idle_ioring_wakeup(oh, false);
3696 spin_unlock_irqrestore(&oh->_lock, flags);
3697
3698 return 0;
3699 }
3700
3701 /**
3702 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3703 * contained in the hwmod module.
3704 * @oh: struct omap_hwmod *
3705 * @name: name of the reset line to lookup and assert
3706 *
3707 * Some IP like dsp, ipu or iva contain processor that require
3708 * an HW reset line to be assert / deassert in order to enable fully
3709 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3710 * yet supported on this OMAP; otherwise, passes along the return value
3711 * from _assert_hardreset().
3712 */
3713 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3714 {
3715 int ret;
3716 unsigned long flags;
3717
3718 if (!oh)
3719 return -EINVAL;
3720
3721 spin_lock_irqsave(&oh->_lock, flags);
3722 ret = _assert_hardreset(oh, name);
3723 spin_unlock_irqrestore(&oh->_lock, flags);
3724
3725 return ret;
3726 }
3727
3728 /**
3729 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3730 * contained in the hwmod module.
3731 * @oh: struct omap_hwmod *
3732 * @name: name of the reset line to look up and deassert
3733 *
3734 * Some IP like dsp, ipu or iva contain processor that require
3735 * an HW reset line to be assert / deassert in order to enable fully
3736 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3737 * yet supported on this OMAP; otherwise, passes along the return value
3738 * from _deassert_hardreset().
3739 */
3740 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3741 {
3742 int ret;
3743 unsigned long flags;
3744
3745 if (!oh)
3746 return -EINVAL;
3747
3748 spin_lock_irqsave(&oh->_lock, flags);
3749 ret = _deassert_hardreset(oh, name);
3750 spin_unlock_irqrestore(&oh->_lock, flags);
3751
3752 return ret;
3753 }
3754
3755 /**
3756 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3757 * @classname: struct omap_hwmod_class name to search for
3758 * @fn: callback function pointer to call for each hwmod in class @classname
3759 * @user: arbitrary context data to pass to the callback function
3760 *
3761 * For each omap_hwmod of class @classname, call @fn.
3762 * If the callback function returns something other than
3763 * zero, the iterator is terminated, and the callback function's return
3764 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3765 * if @classname or @fn are NULL, or passes back the error code from @fn.
3766 */
3767 int omap_hwmod_for_each_by_class(const char *classname,
3768 int (*fn)(struct omap_hwmod *oh,
3769 void *user),
3770 void *user)
3771 {
3772 struct omap_hwmod *temp_oh;
3773 int ret = 0;
3774
3775 if (!classname || !fn)
3776 return -EINVAL;
3777
3778 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3779 __func__, classname);
3780
3781 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3782 if (!strcmp(temp_oh->class->name, classname)) {
3783 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3784 __func__, temp_oh->name);
3785 ret = (*fn)(temp_oh, user);
3786 if (ret)
3787 break;
3788 }
3789 }
3790
3791 if (ret)
3792 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3793 __func__, ret);
3794
3795 return ret;
3796 }
3797
3798 /**
3799 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3800 * @oh: struct omap_hwmod *
3801 * @state: state that _setup() should leave the hwmod in
3802 *
3803 * Sets the hwmod state that @oh will enter at the end of _setup()
3804 * (called by omap_hwmod_setup_*()). See also the documentation
3805 * for _setup_postsetup(), above. Returns 0 upon success or
3806 * -EINVAL if there is a problem with the arguments or if the hwmod is
3807 * in the wrong state.
3808 */
3809 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3810 {
3811 int ret;
3812 unsigned long flags;
3813
3814 if (!oh)
3815 return -EINVAL;
3816
3817 if (state != _HWMOD_STATE_DISABLED &&
3818 state != _HWMOD_STATE_ENABLED &&
3819 state != _HWMOD_STATE_IDLE)
3820 return -EINVAL;
3821
3822 spin_lock_irqsave(&oh->_lock, flags);
3823
3824 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3825 ret = -EINVAL;
3826 goto ohsps_unlock;
3827 }
3828
3829 oh->_postsetup_state = state;
3830 ret = 0;
3831
3832 ohsps_unlock:
3833 spin_unlock_irqrestore(&oh->_lock, flags);
3834
3835 return ret;
3836 }
3837
3838 /**
3839 * omap_hwmod_get_context_loss_count - get lost context count
3840 * @oh: struct omap_hwmod *
3841 *
3842 * Returns the context loss count of associated @oh
3843 * upon success, or zero if no context loss data is available.
3844 *
3845 * On OMAP4, this queries the per-hwmod context loss register,
3846 * assuming one exists. If not, or on OMAP2/3, this queries the
3847 * enclosing powerdomain context loss count.
3848 */
3849 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3850 {
3851 struct powerdomain *pwrdm;
3852 int ret = 0;
3853
3854 if (soc_ops.get_context_lost)
3855 return soc_ops.get_context_lost(oh);
3856
3857 pwrdm = omap_hwmod_get_pwrdm(oh);
3858 if (pwrdm)
3859 ret = pwrdm_get_context_loss_count(pwrdm);
3860
3861 return ret;
3862 }
3863
3864 /**
3865 * omap_hwmod_init - initialize the hwmod code
3866 *
3867 * Sets up some function pointers needed by the hwmod code to operate on the
3868 * currently-booted SoC. Intended to be called once during kernel init
3869 * before any hwmods are registered. No return value.
3870 */
3871 void __init omap_hwmod_init(void)
3872 {
3873 if (cpu_is_omap24xx()) {
3874 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3875 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3876 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3877 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3878 } else if (cpu_is_omap34xx()) {
3879 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3880 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3881 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3882 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3883 soc_ops.init_clkdm = _init_clkdm;
3884 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3885 soc_ops.enable_module = _omap4_enable_module;
3886 soc_ops.disable_module = _omap4_disable_module;
3887 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3888 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3889 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3890 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3891 soc_ops.init_clkdm = _init_clkdm;
3892 soc_ops.update_context_lost = _omap4_update_context_lost;
3893 soc_ops.get_context_lost = _omap4_get_context_lost;
3894 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3895 soc_is_am43xx()) {
3896 soc_ops.enable_module = _omap4_enable_module;
3897 soc_ops.disable_module = _omap4_disable_module;
3898 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3899 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3900 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3901 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3902 soc_ops.init_clkdm = _init_clkdm;
3903 } else {
3904 WARN(1, "omap_hwmod: unknown SoC type\n");
3905 }
3906
3907 inited = true;
3908 }
3909
3910 /**
3911 * omap_hwmod_get_main_clk - get pointer to main clock name
3912 * @oh: struct omap_hwmod *
3913 *
3914 * Returns the main clock name assocated with @oh upon success,
3915 * or NULL if @oh is NULL.
3916 */
3917 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3918 {
3919 if (!oh)
3920 return NULL;
3921
3922 return oh->main_clk;
3923 }