ARM: OMAP3: hwmod data: Correct clock domains for USB modules
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / board-zoom.c
1 /*
2 * Copyright (C) 2009-2010 Texas Instruments Inc.
3 * Mikkel Christensen <mlc@ti.com>
4 * Felipe Balbi <balbi@ti.com>
5 *
6 * Modified from mach-omap2/board-ldp.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/input.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c/twl.h>
19 #include <linux/mtd/nand.h>
20
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23
24 #include "common.h"
25
26 #include "board-zoom.h"
27
28 #include "board-flash.h"
29 #include "mux.h"
30 #include "sdram-micron-mt46h32m32lf-6.h"
31 #include "sdram-hynix-h8mbx00u0mer-0em.h"
32
33 #define ZOOM3_EHCI_RESET_GPIO 64
34
35 #ifdef CONFIG_OMAP_MUX
36 static struct omap_board_mux board_mux[] __initdata = {
37 /* WLAN IRQ - GPIO 162 */
38 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
39 /* WLAN POWER ENABLE - GPIO 101 */
40 OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
41 /* WLAN SDIO: MMC3 CMD */
42 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
43 /* WLAN SDIO: MMC3 CLK */
44 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
45 /* WLAN SDIO: MMC3 DAT[0-3] */
46 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
47 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
48 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
49 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
50 { .reg_offset = OMAP_MUX_TERMINATOR },
51 };
52 #endif
53
54 static struct mtd_partition zoom_nand_partitions[] = {
55 /* All the partition sizes are listed in terms of NAND block size */
56 {
57 .name = "X-Loader-NAND",
58 .offset = 0,
59 .size = 4 * (64 * 2048), /* 512KB, 0x80000 */
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
61 },
62 {
63 .name = "U-Boot-NAND",
64 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
65 .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */
66 .mask_flags = MTD_WRITEABLE, /* force read-only */
67 },
68 {
69 .name = "Boot Env-NAND",
70 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
71 .size = 2 * (64 * 2048), /* 256KB, 0x40000 */
72 },
73 {
74 .name = "Kernel-NAND",
75 .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/
76 .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */
77 },
78 {
79 .name = "system",
80 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */
81 .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */
82 },
83 {
84 .name = "userdata",
85 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/
86 .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
87 },
88 {
89 .name = "cache",
90 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/
91 .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
92 },
93 };
94
95 static struct usbhs_phy_data phy_data[] __initdata = {
96 {
97 .port = 2,
98 .reset_gpio = ZOOM3_EHCI_RESET_GPIO,
99 .vcc_gpio = -EINVAL,
100 },
101 };
102
103 static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
104 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
105 };
106
107 static void __init omap_zoom_init(void)
108 {
109 if (machine_is_omap_zoom2()) {
110 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
111 } else if (machine_is_omap_zoom3()) {
112 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
113 omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
114
115 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
116 usbhs_init(&usbhs_bdata);
117 }
118
119 board_nand_init(zoom_nand_partitions,
120 ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
121 NAND_BUSWIDTH_16, nand_default_timings);
122 zoom_debugboard_init();
123 zoom_peripherals_init();
124
125 if (machine_is_omap_zoom2())
126 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
127 mt46h32m32lf6_sdrc_params);
128 else if (machine_is_omap_zoom3())
129 omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
130 h8mbx00u0mer0em_sdrc_params);
131
132 zoom_display_init();
133 }
134
135 MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
136 .atag_offset = 0x100,
137 .reserve = omap_reserve,
138 .map_io = omap3_map_io,
139 .init_early = omap3430_init_early,
140 .init_irq = omap3_init_irq,
141 .handle_irq = omap3_intc_handle_irq,
142 .init_machine = omap_zoom_init,
143 .init_late = omap3430_init_late,
144 .init_time = omap3_sync32k_timer_init,
145 .restart = omap3xxx_restart,
146 MACHINE_END
147
148 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
149 .atag_offset = 0x100,
150 .reserve = omap_reserve,
151 .map_io = omap3_map_io,
152 .init_early = omap3630_init_early,
153 .init_irq = omap3_init_irq,
154 .handle_irq = omap3_intc_handle_irq,
155 .init_machine = omap_zoom_init,
156 .init_late = omap3630_init_late,
157 .init_time = omap3_sync32k_timer_init,
158 .restart = omap3xxx_restart,
159 MACHINE_END