ARM: OMAP3: hwmod data: Correct clock domains for USB modules
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / board-3630sdp.c
1 /*
2 * Copyright (C) 2009 Texas Instruments Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/input.h>
13 #include <linux/gpio.h>
14 #include <linux/mtd/nand.h>
15
16 #include <asm/mach-types.h>
17 #include <asm/mach/arch.h>
18
19 #include "common.h"
20 #include "gpmc-smc91x.h"
21
22 #include "board-zoom.h"
23
24 #include "board-flash.h"
25 #include "mux.h"
26 #include "sdram-hynix-h8mbx00u0mer-0em.h"
27
28 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
29
30 static struct omap_smc91x_platform_data board_smc91x_data = {
31 .cs = 3,
32 .flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
33 };
34
35 static void __init board_smc91x_init(void)
36 {
37 board_smc91x_data.gpio_irq = 158;
38 gpmc_smc91x_init(&board_smc91x_data);
39 }
40
41 #else
42
43 static inline void board_smc91x_init(void)
44 {
45 }
46
47 #endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */
48
49 static void enable_board_wakeup_source(void)
50 {
51 /* T2 interrupt line (keypad) */
52 omap_mux_init_signal("sys_nirq",
53 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
54 }
55
56 static struct usbhs_phy_data phy_data[] __initdata = {
57 {
58 .port = 1,
59 .reset_gpio = 126,
60 .vcc_gpio = -EINVAL,
61 },
62 {
63 .port = 2,
64 .reset_gpio = 61,
65 .vcc_gpio = -EINVAL,
66 },
67 };
68
69 static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
70
71 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
72 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
73 };
74
75 #ifdef CONFIG_OMAP_MUX
76 static struct omap_board_mux board_mux[] __initdata = {
77 { .reg_offset = OMAP_MUX_TERMINATOR },
78 };
79 #endif
80
81 /*
82 * SDP3630 CS organization
83 * See also the Switch S8 settings in the comments.
84 */
85 static char chip_sel_sdp[][GPMC_CS_NUM] = {
86 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
87 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
88 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
89 };
90
91 static struct mtd_partition sdp_nor_partitions[] = {
92 /* bootloader (U-Boot, etc) in first sector */
93 {
94 .name = "Bootloader-NOR",
95 .offset = 0,
96 .size = SZ_256K,
97 .mask_flags = MTD_WRITEABLE, /* force read-only */
98 },
99 /* bootloader params in the next sector */
100 {
101 .name = "Params-NOR",
102 .offset = MTDPART_OFS_APPEND,
103 .size = SZ_256K,
104 .mask_flags = 0,
105 },
106 /* kernel */
107 {
108 .name = "Kernel-NOR",
109 .offset = MTDPART_OFS_APPEND,
110 .size = SZ_2M,
111 .mask_flags = 0
112 },
113 /* file system */
114 {
115 .name = "Filesystem-NOR",
116 .offset = MTDPART_OFS_APPEND,
117 .size = MTDPART_SIZ_FULL,
118 .mask_flags = 0
119 }
120 };
121
122 static struct mtd_partition sdp_onenand_partitions[] = {
123 {
124 .name = "X-Loader-OneNAND",
125 .offset = 0,
126 .size = 4 * (64 * 2048),
127 .mask_flags = MTD_WRITEABLE /* force read-only */
128 },
129 {
130 .name = "U-Boot-OneNAND",
131 .offset = MTDPART_OFS_APPEND,
132 .size = 2 * (64 * 2048),
133 .mask_flags = MTD_WRITEABLE /* force read-only */
134 },
135 {
136 .name = "U-Boot Environment-OneNAND",
137 .offset = MTDPART_OFS_APPEND,
138 .size = 1 * (64 * 2048),
139 },
140 {
141 .name = "Kernel-OneNAND",
142 .offset = MTDPART_OFS_APPEND,
143 .size = 16 * (64 * 2048),
144 },
145 {
146 .name = "File System-OneNAND",
147 .offset = MTDPART_OFS_APPEND,
148 .size = MTDPART_SIZ_FULL,
149 },
150 };
151
152 static struct mtd_partition sdp_nand_partitions[] = {
153 /* All the partition sizes are listed in terms of NAND block size */
154 {
155 .name = "X-Loader-NAND",
156 .offset = 0,
157 .size = 4 * (64 * 2048),
158 .mask_flags = MTD_WRITEABLE, /* force read-only */
159 },
160 {
161 .name = "U-Boot-NAND",
162 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
163 .size = 10 * (64 * 2048),
164 .mask_flags = MTD_WRITEABLE, /* force read-only */
165 },
166 {
167 .name = "Boot Env-NAND",
168
169 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
170 .size = 6 * (64 * 2048),
171 },
172 {
173 .name = "Kernel-NAND",
174 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
175 .size = 40 * (64 * 2048),
176 },
177 {
178 .name = "File System - NAND",
179 .size = MTDPART_SIZ_FULL,
180 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
181 },
182 };
183
184 static struct flash_partitions sdp_flash_partitions[] = {
185 {
186 .parts = sdp_nor_partitions,
187 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
188 },
189 {
190 .parts = sdp_onenand_partitions,
191 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
192 },
193 {
194 .parts = sdp_nand_partitions,
195 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
196 },
197 };
198
199 static void __init omap_sdp_init(void)
200 {
201 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
202 zoom_peripherals_init();
203 omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
204 h8mbx00u0mer0em_sdrc_params);
205 zoom_display_init();
206 board_smc91x_init();
207 board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
208 enable_board_wakeup_source();
209
210 usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
211 usbhs_init(&usbhs_bdata);
212 }
213
214 MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
215 .atag_offset = 0x100,
216 .reserve = omap_reserve,
217 .map_io = omap3_map_io,
218 .init_early = omap3630_init_early,
219 .init_irq = omap3_init_irq,
220 .handle_irq = omap3_intc_handle_irq,
221 .init_machine = omap_sdp_init,
222 .init_late = omap3630_init_late,
223 .init_time = omap3_sync32k_timer_init,
224 .restart = omap3xxx_restart,
225 MACHINE_END