arch/arm/mach-msm/board-msm8x60.c

   1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15  * 02110-1301, USA.
  16  *
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/irq.h>
  23
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/hardware/gic.h>
  27
  28 #include <mach/board.h>
  29 #include <mach/msm_iomap.h>
  30
  31 unsigned long clk_get_max_axi_khz(void)
  32 {
  33         return 0;
  34 }
  35
  36 static void __init msm8x60_map_io(void)
  37 {
  38         msm_map_msm8x60_io();
  39 }
  40
  41 static void __init msm8x60_init_irq(void)
  42 {
  43         unsigned int i;
  44
  45         gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
  46                  (void *)MSM_QGIC_CPU_BASE);
  47
  48         /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
  49         writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
  50
  51         /* RUMI does not adhere to GIC spec by enabling STIs by default.
  52          * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
  53          */
  54         if (!machine_is_msm8x60_sim())
  55                 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
  56
  57         /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
  58          * as they are configured as level, which does not play nice with
  59          * handle_percpu_irq.
  60          */
  61         for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
  62                 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
  63                         set_irq_handler(i, handle_percpu_irq);
  64         }
  65 }
  66
  67 static void __init msm8x60_init(void)
  68 {
  69 }
  70
  71 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
  72         .map_io = msm8x60_map_io,
  73         .init_irq = msm8x60_init_irq,
  74         .init_machine = msm8x60_init,
  75         .timer = &msm_timer,
  76 MACHINE_END
  77
  78 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
  79         .map_io = msm8x60_map_io,
  80         .init_irq = msm8x60_init_irq,
  81         .init_machine = msm8x60_init,
  82         .timer = &msm_timer,
  83 MACHINE_END
  84
  85 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
  86         .map_io = msm8x60_map_io,
  87         .init_irq = msm8x60_init_irq,
  88         .init_machine = msm8x60_init,
  89         .timer = &msm_timer,
  90 MACHINE_END
  91
  92 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
  93         .map_io = msm8x60_map_io,
  94         .init_irq = msm8x60_init_irq,
  95         .init_machine = msm8x60_init,
  96         .timer = &msm_timer,
  97 MACHINE_END