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Merge branch 'for-usb-linus' of git.kernel.org/pub/scm/linux/kernel/git/sarah/xhci...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-at91 / at91sam9263_devices.c
1 /*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/fb.h>
21 #include <video/atmel_lcdc.h>
22
23 #include <mach/board.h>
24 #include <mach/at91sam9263.h>
25 #include <mach/at91sam9263_matrix.h>
26 #include <mach/at91sam9_smc.h>
27
28 #include "generic.h"
29
30
31 /* --------------------------------------------------------------------
32 * USB Host
33 * -------------------------------------------------------------------- */
34
35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
36 static u64 ohci_dmamask = DMA_BIT_MASK(32);
37 static struct at91_usbh_data usbh_data;
38
39 static struct resource usbh_resources[] = {
40 [0] = {
41 .start = AT91SAM9263_UHP_BASE,
42 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .start = AT91SAM9263_ID_UHP,
47 .end = AT91SAM9263_ID_UHP,
48 .flags = IORESOURCE_IRQ,
49 },
50 };
51
52 static struct platform_device at91_usbh_device = {
53 .name = "at91_ohci",
54 .id = -1,
55 .dev = {
56 .dma_mask = &ohci_dmamask,
57 .coherent_dma_mask = DMA_BIT_MASK(32),
58 .platform_data = &usbh_data,
59 },
60 .resource = usbh_resources,
61 .num_resources = ARRAY_SIZE(usbh_resources),
62 };
63
64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
65 {
66 int i;
67
68 if (!data)
69 return;
70
71 /* Enable VBus control for UHP ports */
72 for (i = 0; i < data->ports; i++) {
73 if (data->vbus_pin[i])
74 at91_set_gpio_output(data->vbus_pin[i], 0);
75 }
76
77 /* Enable overcurrent notification */
78 for (i = 0; i < data->ports; i++) {
79 if (data->overcurrent_pin[i])
80 at91_set_gpio_input(data->overcurrent_pin[i], 1);
81 }
82
83 usbh_data = *data;
84 platform_device_register(&at91_usbh_device);
85 }
86 #else
87 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
88 #endif
89
90
91 /* --------------------------------------------------------------------
92 * USB Device (Gadget)
93 * -------------------------------------------------------------------- */
94
95 #ifdef CONFIG_USB_GADGET_AT91
96 static struct at91_udc_data udc_data;
97
98 static struct resource udc_resources[] = {
99 [0] = {
100 .start = AT91SAM9263_BASE_UDP,
101 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
102 .flags = IORESOURCE_MEM,
103 },
104 [1] = {
105 .start = AT91SAM9263_ID_UDP,
106 .end = AT91SAM9263_ID_UDP,
107 .flags = IORESOURCE_IRQ,
108 },
109 };
110
111 static struct platform_device at91_udc_device = {
112 .name = "at91_udc",
113 .id = -1,
114 .dev = {
115 .platform_data = &udc_data,
116 },
117 .resource = udc_resources,
118 .num_resources = ARRAY_SIZE(udc_resources),
119 };
120
121 void __init at91_add_device_udc(struct at91_udc_data *data)
122 {
123 if (!data)
124 return;
125
126 if (data->vbus_pin) {
127 at91_set_gpio_input(data->vbus_pin, 0);
128 at91_set_deglitch(data->vbus_pin, 1);
129 }
130
131 /* Pullup pin is handled internally by USB device peripheral */
132
133 udc_data = *data;
134 platform_device_register(&at91_udc_device);
135 }
136 #else
137 void __init at91_add_device_udc(struct at91_udc_data *data) {}
138 #endif
139
140
141 /* --------------------------------------------------------------------
142 * Ethernet
143 * -------------------------------------------------------------------- */
144
145 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
146 static u64 eth_dmamask = DMA_BIT_MASK(32);
147 static struct at91_eth_data eth_data;
148
149 static struct resource eth_resources[] = {
150 [0] = {
151 .start = AT91SAM9263_BASE_EMAC,
152 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
156 .start = AT91SAM9263_ID_EMAC,
157 .end = AT91SAM9263_ID_EMAC,
158 .flags = IORESOURCE_IRQ,
159 },
160 };
161
162 static struct platform_device at91sam9263_eth_device = {
163 .name = "macb",
164 .id = -1,
165 .dev = {
166 .dma_mask = &eth_dmamask,
167 .coherent_dma_mask = DMA_BIT_MASK(32),
168 .platform_data = &eth_data,
169 },
170 .resource = eth_resources,
171 .num_resources = ARRAY_SIZE(eth_resources),
172 };
173
174 void __init at91_add_device_eth(struct at91_eth_data *data)
175 {
176 if (!data)
177 return;
178
179 if (data->phy_irq_pin) {
180 at91_set_gpio_input(data->phy_irq_pin, 0);
181 at91_set_deglitch(data->phy_irq_pin, 1);
182 }
183
184 /* Pins used for MII and RMII */
185 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
186 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
187 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
188 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
189 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
190 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
191 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
192 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
193 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
194 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
195
196 if (!data->is_rmii) {
197 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
198 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
199 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
200 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
201 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
202 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
203 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
204 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
205 }
206
207 eth_data = *data;
208 platform_device_register(&at91sam9263_eth_device);
209 }
210 #else
211 void __init at91_add_device_eth(struct at91_eth_data *data) {}
212 #endif
213
214
215 /* --------------------------------------------------------------------
216 * MMC / SD
217 * -------------------------------------------------------------------- */
218
219 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
220 static u64 mmc_dmamask = DMA_BIT_MASK(32);
221 static struct at91_mmc_data mmc0_data, mmc1_data;
222
223 static struct resource mmc0_resources[] = {
224 [0] = {
225 .start = AT91SAM9263_BASE_MCI0,
226 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
227 .flags = IORESOURCE_MEM,
228 },
229 [1] = {
230 .start = AT91SAM9263_ID_MCI0,
231 .end = AT91SAM9263_ID_MCI0,
232 .flags = IORESOURCE_IRQ,
233 },
234 };
235
236 static struct platform_device at91sam9263_mmc0_device = {
237 .name = "at91_mci",
238 .id = 0,
239 .dev = {
240 .dma_mask = &mmc_dmamask,
241 .coherent_dma_mask = DMA_BIT_MASK(32),
242 .platform_data = &mmc0_data,
243 },
244 .resource = mmc0_resources,
245 .num_resources = ARRAY_SIZE(mmc0_resources),
246 };
247
248 static struct resource mmc1_resources[] = {
249 [0] = {
250 .start = AT91SAM9263_BASE_MCI1,
251 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
252 .flags = IORESOURCE_MEM,
253 },
254 [1] = {
255 .start = AT91SAM9263_ID_MCI1,
256 .end = AT91SAM9263_ID_MCI1,
257 .flags = IORESOURCE_IRQ,
258 },
259 };
260
261 static struct platform_device at91sam9263_mmc1_device = {
262 .name = "at91_mci",
263 .id = 1,
264 .dev = {
265 .dma_mask = &mmc_dmamask,
266 .coherent_dma_mask = DMA_BIT_MASK(32),
267 .platform_data = &mmc1_data,
268 },
269 .resource = mmc1_resources,
270 .num_resources = ARRAY_SIZE(mmc1_resources),
271 };
272
273 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
274 {
275 if (!data)
276 return;
277
278 /* input/irq */
279 if (data->det_pin) {
280 at91_set_gpio_input(data->det_pin, 1);
281 at91_set_deglitch(data->det_pin, 1);
282 }
283 if (data->wp_pin)
284 at91_set_gpio_input(data->wp_pin, 1);
285 if (data->vcc_pin)
286 at91_set_gpio_output(data->vcc_pin, 0);
287
288 if (mmc_id == 0) { /* MCI0 */
289 /* CLK */
290 at91_set_A_periph(AT91_PIN_PA12, 0);
291
292 if (data->slot_b) {
293 /* CMD */
294 at91_set_A_periph(AT91_PIN_PA16, 1);
295
296 /* DAT0, maybe DAT1..DAT3 */
297 at91_set_A_periph(AT91_PIN_PA17, 1);
298 if (data->wire4) {
299 at91_set_A_periph(AT91_PIN_PA18, 1);
300 at91_set_A_periph(AT91_PIN_PA19, 1);
301 at91_set_A_periph(AT91_PIN_PA20, 1);
302 }
303 } else {
304 /* CMD */
305 at91_set_A_periph(AT91_PIN_PA1, 1);
306
307 /* DAT0, maybe DAT1..DAT3 */
308 at91_set_A_periph(AT91_PIN_PA0, 1);
309 if (data->wire4) {
310 at91_set_A_periph(AT91_PIN_PA3, 1);
311 at91_set_A_periph(AT91_PIN_PA4, 1);
312 at91_set_A_periph(AT91_PIN_PA5, 1);
313 }
314 }
315
316 mmc0_data = *data;
317 platform_device_register(&at91sam9263_mmc0_device);
318 } else { /* MCI1 */
319 /* CLK */
320 at91_set_A_periph(AT91_PIN_PA6, 0);
321
322 if (data->slot_b) {
323 /* CMD */
324 at91_set_A_periph(AT91_PIN_PA21, 1);
325
326 /* DAT0, maybe DAT1..DAT3 */
327 at91_set_A_periph(AT91_PIN_PA22, 1);
328 if (data->wire4) {
329 at91_set_A_periph(AT91_PIN_PA23, 1);
330 at91_set_A_periph(AT91_PIN_PA24, 1);
331 at91_set_A_periph(AT91_PIN_PA25, 1);
332 }
333 } else {
334 /* CMD */
335 at91_set_A_periph(AT91_PIN_PA7, 1);
336
337 /* DAT0, maybe DAT1..DAT3 */
338 at91_set_A_periph(AT91_PIN_PA8, 1);
339 if (data->wire4) {
340 at91_set_A_periph(AT91_PIN_PA9, 1);
341 at91_set_A_periph(AT91_PIN_PA10, 1);
342 at91_set_A_periph(AT91_PIN_PA11, 1);
343 }
344 }
345
346 mmc1_data = *data;
347 platform_device_register(&at91sam9263_mmc1_device);
348 }
349 }
350 #else
351 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
352 #endif
353
354 /* --------------------------------------------------------------------
355 * Compact Flash (PCMCIA or IDE)
356 * -------------------------------------------------------------------- */
357
358 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
359 defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
360
361 static struct at91_cf_data cf0_data;
362
363 static struct resource cf0_resources[] = {
364 [0] = {
365 .start = AT91_CHIPSELECT_4,
366 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
367 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
368 }
369 };
370
371 static struct platform_device cf0_device = {
372 .id = 0,
373 .dev = {
374 .platform_data = &cf0_data,
375 },
376 .resource = cf0_resources,
377 .num_resources = ARRAY_SIZE(cf0_resources),
378 };
379
380 static struct at91_cf_data cf1_data;
381
382 static struct resource cf1_resources[] = {
383 [0] = {
384 .start = AT91_CHIPSELECT_5,
385 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
386 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
387 }
388 };
389
390 static struct platform_device cf1_device = {
391 .id = 1,
392 .dev = {
393 .platform_data = &cf1_data,
394 },
395 .resource = cf1_resources,
396 .num_resources = ARRAY_SIZE(cf1_resources),
397 };
398
399 void __init at91_add_device_cf(struct at91_cf_data *data)
400 {
401 unsigned long ebi0_csa;
402 struct platform_device *pdev;
403
404 if (!data)
405 return;
406
407 /*
408 * assign CS4 or CS5 to SMC with Compact Flash logic support,
409 * we assume SMC timings are configured by board code,
410 * except True IDE where timings are controlled by driver
411 */
412 ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
413 switch (data->chipselect) {
414 case 4:
415 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
416 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
417 cf0_data = *data;
418 pdev = &cf0_device;
419 break;
420 case 5:
421 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
422 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
423 cf1_data = *data;
424 pdev = &cf1_device;
425 break;
426 default:
427 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
428 data->chipselect);
429 return;
430 }
431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
432
433 if (data->det_pin) {
434 at91_set_gpio_input(data->det_pin, 1);
435 at91_set_deglitch(data->det_pin, 1);
436 }
437
438 if (data->irq_pin) {
439 at91_set_gpio_input(data->irq_pin, 1);
440 at91_set_deglitch(data->irq_pin, 1);
441 }
442
443 if (data->vcc_pin)
444 /* initially off */
445 at91_set_gpio_output(data->vcc_pin, 0);
446
447 /* enable EBI controlled pins */
448 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
449 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
450 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
451 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
452
453 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
454 platform_device_register(pdev);
455 }
456 #else
457 void __init at91_add_device_cf(struct at91_cf_data *data) {}
458 #endif
459
460 /* --------------------------------------------------------------------
461 * NAND / SmartMedia
462 * -------------------------------------------------------------------- */
463
464 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
465 static struct atmel_nand_data nand_data;
466
467 #define NAND_BASE AT91_CHIPSELECT_3
468
469 static struct resource nand_resources[] = {
470 [0] = {
471 .start = NAND_BASE,
472 .end = NAND_BASE + SZ_256M - 1,
473 .flags = IORESOURCE_MEM,
474 },
475 [1] = {
476 .start = AT91_BASE_SYS + AT91_ECC0,
477 .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
478 .flags = IORESOURCE_MEM,
479 }
480 };
481
482 static struct platform_device at91sam9263_nand_device = {
483 .name = "atmel_nand",
484 .id = -1,
485 .dev = {
486 .platform_data = &nand_data,
487 },
488 .resource = nand_resources,
489 .num_resources = ARRAY_SIZE(nand_resources),
490 };
491
492 void __init at91_add_device_nand(struct atmel_nand_data *data)
493 {
494 unsigned long csa;
495
496 if (!data)
497 return;
498
499 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
501
502 /* enable pin */
503 if (data->enable_pin)
504 at91_set_gpio_output(data->enable_pin, 1);
505
506 /* ready/busy pin */
507 if (data->rdy_pin)
508 at91_set_gpio_input(data->rdy_pin, 1);
509
510 /* card detect pin */
511 if (data->det_pin)
512 at91_set_gpio_input(data->det_pin, 1);
513
514 nand_data = *data;
515 platform_device_register(&at91sam9263_nand_device);
516 }
517 #else
518 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
519 #endif
520
521
522 /* --------------------------------------------------------------------
523 * TWI (i2c)
524 * -------------------------------------------------------------------- */
525
526 /*
527 * Prefer the GPIO code since the TWI controller isn't robust
528 * (gets overruns and underruns under load) and can only issue
529 * repeated STARTs in one scenario (the driver doesn't yet handle them).
530 */
531 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
532
533 static struct i2c_gpio_platform_data pdata = {
534 .sda_pin = AT91_PIN_PB4,
535 .sda_is_open_drain = 1,
536 .scl_pin = AT91_PIN_PB5,
537 .scl_is_open_drain = 1,
538 .udelay = 2, /* ~100 kHz */
539 };
540
541 static struct platform_device at91sam9263_twi_device = {
542 .name = "i2c-gpio",
543 .id = -1,
544 .dev.platform_data = &pdata,
545 };
546
547 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
548 {
549 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
550 at91_set_multi_drive(AT91_PIN_PB4, 1);
551
552 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
553 at91_set_multi_drive(AT91_PIN_PB5, 1);
554
555 i2c_register_board_info(0, devices, nr_devices);
556 platform_device_register(&at91sam9263_twi_device);
557 }
558
559 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
560
561 static struct resource twi_resources[] = {
562 [0] = {
563 .start = AT91SAM9263_BASE_TWI,
564 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
565 .flags = IORESOURCE_MEM,
566 },
567 [1] = {
568 .start = AT91SAM9263_ID_TWI,
569 .end = AT91SAM9263_ID_TWI,
570 .flags = IORESOURCE_IRQ,
571 },
572 };
573
574 static struct platform_device at91sam9263_twi_device = {
575 .name = "at91_i2c",
576 .id = -1,
577 .resource = twi_resources,
578 .num_resources = ARRAY_SIZE(twi_resources),
579 };
580
581 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
582 {
583 /* pins used for TWI interface */
584 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
585 at91_set_multi_drive(AT91_PIN_PB4, 1);
586
587 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
588 at91_set_multi_drive(AT91_PIN_PB5, 1);
589
590 i2c_register_board_info(0, devices, nr_devices);
591 platform_device_register(&at91sam9263_twi_device);
592 }
593 #else
594 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
595 #endif
596
597
598 /* --------------------------------------------------------------------
599 * SPI
600 * -------------------------------------------------------------------- */
601
602 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
603 static u64 spi_dmamask = DMA_BIT_MASK(32);
604
605 static struct resource spi0_resources[] = {
606 [0] = {
607 .start = AT91SAM9263_BASE_SPI0,
608 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
609 .flags = IORESOURCE_MEM,
610 },
611 [1] = {
612 .start = AT91SAM9263_ID_SPI0,
613 .end = AT91SAM9263_ID_SPI0,
614 .flags = IORESOURCE_IRQ,
615 },
616 };
617
618 static struct platform_device at91sam9263_spi0_device = {
619 .name = "atmel_spi",
620 .id = 0,
621 .dev = {
622 .dma_mask = &spi_dmamask,
623 .coherent_dma_mask = DMA_BIT_MASK(32),
624 },
625 .resource = spi0_resources,
626 .num_resources = ARRAY_SIZE(spi0_resources),
627 };
628
629 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
630
631 static struct resource spi1_resources[] = {
632 [0] = {
633 .start = AT91SAM9263_BASE_SPI1,
634 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
635 .flags = IORESOURCE_MEM,
636 },
637 [1] = {
638 .start = AT91SAM9263_ID_SPI1,
639 .end = AT91SAM9263_ID_SPI1,
640 .flags = IORESOURCE_IRQ,
641 },
642 };
643
644 static struct platform_device at91sam9263_spi1_device = {
645 .name = "atmel_spi",
646 .id = 1,
647 .dev = {
648 .dma_mask = &spi_dmamask,
649 .coherent_dma_mask = DMA_BIT_MASK(32),
650 },
651 .resource = spi1_resources,
652 .num_resources = ARRAY_SIZE(spi1_resources),
653 };
654
655 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
656
657 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
658 {
659 int i;
660 unsigned long cs_pin;
661 short enable_spi0 = 0;
662 short enable_spi1 = 0;
663
664 /* Choose SPI chip-selects */
665 for (i = 0; i < nr_devices; i++) {
666 if (devices[i].controller_data)
667 cs_pin = (unsigned long) devices[i].controller_data;
668 else if (devices[i].bus_num == 0)
669 cs_pin = spi0_standard_cs[devices[i].chip_select];
670 else
671 cs_pin = spi1_standard_cs[devices[i].chip_select];
672
673 if (devices[i].bus_num == 0)
674 enable_spi0 = 1;
675 else
676 enable_spi1 = 1;
677
678 /* enable chip-select pin */
679 at91_set_gpio_output(cs_pin, 1);
680
681 /* pass chip-select pin to driver */
682 devices[i].controller_data = (void *) cs_pin;
683 }
684
685 spi_register_board_info(devices, nr_devices);
686
687 /* Configure SPI bus(es) */
688 if (enable_spi0) {
689 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
690 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
691 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
692
693 platform_device_register(&at91sam9263_spi0_device);
694 }
695 if (enable_spi1) {
696 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
697 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
698 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
699
700 platform_device_register(&at91sam9263_spi1_device);
701 }
702 }
703 #else
704 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
705 #endif
706
707
708 /* --------------------------------------------------------------------
709 * AC97
710 * -------------------------------------------------------------------- */
711
712 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
713 static u64 ac97_dmamask = DMA_BIT_MASK(32);
714 static struct ac97c_platform_data ac97_data;
715
716 static struct resource ac97_resources[] = {
717 [0] = {
718 .start = AT91SAM9263_BASE_AC97C,
719 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
720 .flags = IORESOURCE_MEM,
721 },
722 [1] = {
723 .start = AT91SAM9263_ID_AC97C,
724 .end = AT91SAM9263_ID_AC97C,
725 .flags = IORESOURCE_IRQ,
726 },
727 };
728
729 static struct platform_device at91sam9263_ac97_device = {
730 .name = "atmel_ac97c",
731 .id = 0,
732 .dev = {
733 .dma_mask = &ac97_dmamask,
734 .coherent_dma_mask = DMA_BIT_MASK(32),
735 .platform_data = &ac97_data,
736 },
737 .resource = ac97_resources,
738 .num_resources = ARRAY_SIZE(ac97_resources),
739 };
740
741 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
742 {
743 if (!data)
744 return;
745
746 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
747 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
748 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
750
751 /* reset */
752 if (data->reset_pin)
753 at91_set_gpio_output(data->reset_pin, 0);
754
755 ac97_data = *data;
756 platform_device_register(&at91sam9263_ac97_device);
757 }
758 #else
759 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
760 #endif
761
762 /* --------------------------------------------------------------------
763 * CAN Controller
764 * -------------------------------------------------------------------- */
765
766 #if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
767 static struct resource can_resources[] = {
768 [0] = {
769 .start = AT91SAM9263_BASE_CAN,
770 .end = AT91SAM9263_BASE_CAN + SZ_16K - 1,
771 .flags = IORESOURCE_MEM,
772 },
773 [1] = {
774 .start = AT91SAM9263_ID_CAN,
775 .end = AT91SAM9263_ID_CAN,
776 .flags = IORESOURCE_IRQ,
777 },
778 };
779
780 static struct platform_device at91sam9263_can_device = {
781 .name = "at91_can",
782 .id = -1,
783 .resource = can_resources,
784 .num_resources = ARRAY_SIZE(can_resources),
785 };
786
787 void __init at91_add_device_can(struct at91_can_data *data)
788 {
789 at91_set_A_periph(AT91_PIN_PA13, 0); /* CANTX */
790 at91_set_A_periph(AT91_PIN_PA14, 0); /* CANRX */
791 at91sam9263_can_device.dev.platform_data = data;
792
793 platform_device_register(&at91sam9263_can_device);
794 }
795 #else
796 void __init at91_add_device_can(struct at91_can_data *data) {}
797 #endif
798
799 /* --------------------------------------------------------------------
800 * LCD Controller
801 * -------------------------------------------------------------------- */
802
803 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
804 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
805 static struct atmel_lcdfb_info lcdc_data;
806
807 static struct resource lcdc_resources[] = {
808 [0] = {
809 .start = AT91SAM9263_LCDC_BASE,
810 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
811 .flags = IORESOURCE_MEM,
812 },
813 [1] = {
814 .start = AT91SAM9263_ID_LCDC,
815 .end = AT91SAM9263_ID_LCDC,
816 .flags = IORESOURCE_IRQ,
817 },
818 };
819
820 static struct platform_device at91_lcdc_device = {
821 .name = "atmel_lcdfb",
822 .id = 0,
823 .dev = {
824 .dma_mask = &lcdc_dmamask,
825 .coherent_dma_mask = DMA_BIT_MASK(32),
826 .platform_data = &lcdc_data,
827 },
828 .resource = lcdc_resources,
829 .num_resources = ARRAY_SIZE(lcdc_resources),
830 };
831
832 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
833 {
834 if (!data)
835 return;
836
837 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
838 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
839 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
840 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
841 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
842 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
843 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
844 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
845 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
846 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
847 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
848 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
849 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
850 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
851 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
852 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
853 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
854 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
855 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
856 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
857 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
858 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
859
860 lcdc_data = *data;
861 platform_device_register(&at91_lcdc_device);
862 }
863 #else
864 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
865 #endif
866
867
868 /* --------------------------------------------------------------------
869 * Image Sensor Interface
870 * -------------------------------------------------------------------- */
871
872 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
873
874 struct resource isi_resources[] = {
875 [0] = {
876 .start = AT91SAM9263_BASE_ISI,
877 .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
878 .flags = IORESOURCE_MEM,
879 },
880 [1] = {
881 .start = AT91SAM9263_ID_ISI,
882 .end = AT91SAM9263_ID_ISI,
883 .flags = IORESOURCE_IRQ,
884 },
885 };
886
887 static struct platform_device at91sam9263_isi_device = {
888 .name = "at91_isi",
889 .id = -1,
890 .resource = isi_resources,
891 .num_resources = ARRAY_SIZE(isi_resources),
892 };
893
894 void __init at91_add_device_isi(void)
895 {
896 at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
897 at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
898 at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
899 at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
900 at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
901 at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
902 at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
903 at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
904 at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
905 at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
906 at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
907 at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
908 at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
909 at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
910 at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
911 at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
912 }
913 #else
914 void __init at91_add_device_isi(void) {}
915 #endif
916
917
918 /* --------------------------------------------------------------------
919 * Timer/Counter block
920 * -------------------------------------------------------------------- */
921
922 #ifdef CONFIG_ATMEL_TCLIB
923
924 static struct resource tcb_resources[] = {
925 [0] = {
926 .start = AT91SAM9263_BASE_TCB0,
927 .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
928 .flags = IORESOURCE_MEM,
929 },
930 [1] = {
931 .start = AT91SAM9263_ID_TCB,
932 .end = AT91SAM9263_ID_TCB,
933 .flags = IORESOURCE_IRQ,
934 },
935 };
936
937 static struct platform_device at91sam9263_tcb_device = {
938 .name = "atmel_tcb",
939 .id = 0,
940 .resource = tcb_resources,
941 .num_resources = ARRAY_SIZE(tcb_resources),
942 };
943
944 static void __init at91_add_device_tc(void)
945 {
946 platform_device_register(&at91sam9263_tcb_device);
947 }
948 #else
949 static void __init at91_add_device_tc(void) { }
950 #endif
951
952
953 /* --------------------------------------------------------------------
954 * RTT
955 * -------------------------------------------------------------------- */
956
957 static struct resource rtt0_resources[] = {
958 {
959 .start = AT91_BASE_SYS + AT91_RTT0,
960 .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
961 .flags = IORESOURCE_MEM,
962 }
963 };
964
965 static struct platform_device at91sam9263_rtt0_device = {
966 .name = "at91_rtt",
967 .id = 0,
968 .resource = rtt0_resources,
969 .num_resources = ARRAY_SIZE(rtt0_resources),
970 };
971
972 static struct resource rtt1_resources[] = {
973 {
974 .start = AT91_BASE_SYS + AT91_RTT1,
975 .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
976 .flags = IORESOURCE_MEM,
977 }
978 };
979
980 static struct platform_device at91sam9263_rtt1_device = {
981 .name = "at91_rtt",
982 .id = 1,
983 .resource = rtt1_resources,
984 .num_resources = ARRAY_SIZE(rtt1_resources),
985 };
986
987 static void __init at91_add_device_rtt(void)
988 {
989 platform_device_register(&at91sam9263_rtt0_device);
990 platform_device_register(&at91sam9263_rtt1_device);
991 }
992
993
994 /* --------------------------------------------------------------------
995 * Watchdog
996 * -------------------------------------------------------------------- */
997
998 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
999 static struct platform_device at91sam9263_wdt_device = {
1000 .name = "at91_wdt",
1001 .id = -1,
1002 .num_resources = 0,
1003 };
1004
1005 static void __init at91_add_device_watchdog(void)
1006 {
1007 platform_device_register(&at91sam9263_wdt_device);
1008 }
1009 #else
1010 static void __init at91_add_device_watchdog(void) {}
1011 #endif
1012
1013
1014 /* --------------------------------------------------------------------
1015 * PWM
1016 * --------------------------------------------------------------------*/
1017
1018 #if defined(CONFIG_ATMEL_PWM)
1019 static u32 pwm_mask;
1020
1021 static struct resource pwm_resources[] = {
1022 [0] = {
1023 .start = AT91SAM9263_BASE_PWMC,
1024 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1025 .flags = IORESOURCE_MEM,
1026 },
1027 [1] = {
1028 .start = AT91SAM9263_ID_PWMC,
1029 .end = AT91SAM9263_ID_PWMC,
1030 .flags = IORESOURCE_IRQ,
1031 },
1032 };
1033
1034 static struct platform_device at91sam9263_pwm0_device = {
1035 .name = "atmel_pwm",
1036 .id = -1,
1037 .dev = {
1038 .platform_data = &pwm_mask,
1039 },
1040 .resource = pwm_resources,
1041 .num_resources = ARRAY_SIZE(pwm_resources),
1042 };
1043
1044 void __init at91_add_device_pwm(u32 mask)
1045 {
1046 if (mask & (1 << AT91_PWM0))
1047 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
1048
1049 if (mask & (1 << AT91_PWM1))
1050 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
1051
1052 if (mask & (1 << AT91_PWM2))
1053 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
1054
1055 if (mask & (1 << AT91_PWM3))
1056 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
1057
1058 pwm_mask = mask;
1059
1060 platform_device_register(&at91sam9263_pwm0_device);
1061 }
1062 #else
1063 void __init at91_add_device_pwm(u32 mask) {}
1064 #endif
1065
1066
1067 /* --------------------------------------------------------------------
1068 * SSC -- Synchronous Serial Controller
1069 * -------------------------------------------------------------------- */
1070
1071 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1072 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1073
1074 static struct resource ssc0_resources[] = {
1075 [0] = {
1076 .start = AT91SAM9263_BASE_SSC0,
1077 .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1078 .flags = IORESOURCE_MEM,
1079 },
1080 [1] = {
1081 .start = AT91SAM9263_ID_SSC0,
1082 .end = AT91SAM9263_ID_SSC0,
1083 .flags = IORESOURCE_IRQ,
1084 },
1085 };
1086
1087 static struct platform_device at91sam9263_ssc0_device = {
1088 .name = "ssc",
1089 .id = 0,
1090 .dev = {
1091 .dma_mask = &ssc0_dmamask,
1092 .coherent_dma_mask = DMA_BIT_MASK(32),
1093 },
1094 .resource = ssc0_resources,
1095 .num_resources = ARRAY_SIZE(ssc0_resources),
1096 };
1097
1098 static inline void configure_ssc0_pins(unsigned pins)
1099 {
1100 if (pins & ATMEL_SSC_TF)
1101 at91_set_B_periph(AT91_PIN_PB0, 1);
1102 if (pins & ATMEL_SSC_TK)
1103 at91_set_B_periph(AT91_PIN_PB1, 1);
1104 if (pins & ATMEL_SSC_TD)
1105 at91_set_B_periph(AT91_PIN_PB2, 1);
1106 if (pins & ATMEL_SSC_RD)
1107 at91_set_B_periph(AT91_PIN_PB3, 1);
1108 if (pins & ATMEL_SSC_RK)
1109 at91_set_B_periph(AT91_PIN_PB4, 1);
1110 if (pins & ATMEL_SSC_RF)
1111 at91_set_B_periph(AT91_PIN_PB5, 1);
1112 }
1113
1114 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1115
1116 static struct resource ssc1_resources[] = {
1117 [0] = {
1118 .start = AT91SAM9263_BASE_SSC1,
1119 .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1120 .flags = IORESOURCE_MEM,
1121 },
1122 [1] = {
1123 .start = AT91SAM9263_ID_SSC1,
1124 .end = AT91SAM9263_ID_SSC1,
1125 .flags = IORESOURCE_IRQ,
1126 },
1127 };
1128
1129 static struct platform_device at91sam9263_ssc1_device = {
1130 .name = "ssc",
1131 .id = 1,
1132 .dev = {
1133 .dma_mask = &ssc1_dmamask,
1134 .coherent_dma_mask = DMA_BIT_MASK(32),
1135 },
1136 .resource = ssc1_resources,
1137 .num_resources = ARRAY_SIZE(ssc1_resources),
1138 };
1139
1140 static inline void configure_ssc1_pins(unsigned pins)
1141 {
1142 if (pins & ATMEL_SSC_TF)
1143 at91_set_A_periph(AT91_PIN_PB6, 1);
1144 if (pins & ATMEL_SSC_TK)
1145 at91_set_A_periph(AT91_PIN_PB7, 1);
1146 if (pins & ATMEL_SSC_TD)
1147 at91_set_A_periph(AT91_PIN_PB8, 1);
1148 if (pins & ATMEL_SSC_RD)
1149 at91_set_A_periph(AT91_PIN_PB9, 1);
1150 if (pins & ATMEL_SSC_RK)
1151 at91_set_A_periph(AT91_PIN_PB10, 1);
1152 if (pins & ATMEL_SSC_RF)
1153 at91_set_A_periph(AT91_PIN_PB11, 1);
1154 }
1155
1156 /*
1157 * SSC controllers are accessed through library code, instead of any
1158 * kind of all-singing/all-dancing driver. For example one could be
1159 * used by a particular I2S audio codec's driver, while another one
1160 * on the same system might be used by a custom data capture driver.
1161 */
1162 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1163 {
1164 struct platform_device *pdev;
1165
1166 /*
1167 * NOTE: caller is responsible for passing information matching
1168 * "pins" to whatever will be using each particular controller.
1169 */
1170 switch (id) {
1171 case AT91SAM9263_ID_SSC0:
1172 pdev = &at91sam9263_ssc0_device;
1173 configure_ssc0_pins(pins);
1174 break;
1175 case AT91SAM9263_ID_SSC1:
1176 pdev = &at91sam9263_ssc1_device;
1177 configure_ssc1_pins(pins);
1178 break;
1179 default:
1180 return;
1181 }
1182
1183 platform_device_register(pdev);
1184 }
1185
1186 #else
1187 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1188 #endif
1189
1190
1191 /* --------------------------------------------------------------------
1192 * UART
1193 * -------------------------------------------------------------------- */
1194
1195 #if defined(CONFIG_SERIAL_ATMEL)
1196
1197 static struct resource dbgu_resources[] = {
1198 [0] = {
1199 .start = AT91_VA_BASE_SYS + AT91_DBGU,
1200 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM,
1202 },
1203 [1] = {
1204 .start = AT91_ID_SYS,
1205 .end = AT91_ID_SYS,
1206 .flags = IORESOURCE_IRQ,
1207 },
1208 };
1209
1210 static struct atmel_uart_data dbgu_data = {
1211 .use_dma_tx = 0,
1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1213 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1214 };
1215
1216 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1217
1218 static struct platform_device at91sam9263_dbgu_device = {
1219 .name = "atmel_usart",
1220 .id = 0,
1221 .dev = {
1222 .dma_mask = &dbgu_dmamask,
1223 .coherent_dma_mask = DMA_BIT_MASK(32),
1224 .platform_data = &dbgu_data,
1225 },
1226 .resource = dbgu_resources,
1227 .num_resources = ARRAY_SIZE(dbgu_resources),
1228 };
1229
1230 static inline void configure_dbgu_pins(void)
1231 {
1232 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1233 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1234 }
1235
1236 static struct resource uart0_resources[] = {
1237 [0] = {
1238 .start = AT91SAM9263_BASE_US0,
1239 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1240 .flags = IORESOURCE_MEM,
1241 },
1242 [1] = {
1243 .start = AT91SAM9263_ID_US0,
1244 .end = AT91SAM9263_ID_US0,
1245 .flags = IORESOURCE_IRQ,
1246 },
1247 };
1248
1249 static struct atmel_uart_data uart0_data = {
1250 .use_dma_tx = 1,
1251 .use_dma_rx = 1,
1252 };
1253
1254 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1255
1256 static struct platform_device at91sam9263_uart0_device = {
1257 .name = "atmel_usart",
1258 .id = 1,
1259 .dev = {
1260 .dma_mask = &uart0_dmamask,
1261 .coherent_dma_mask = DMA_BIT_MASK(32),
1262 .platform_data = &uart0_data,
1263 },
1264 .resource = uart0_resources,
1265 .num_resources = ARRAY_SIZE(uart0_resources),
1266 };
1267
1268 static inline void configure_usart0_pins(unsigned pins)
1269 {
1270 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
1271 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
1272
1273 if (pins & ATMEL_UART_RTS)
1274 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
1275 if (pins & ATMEL_UART_CTS)
1276 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
1277 }
1278
1279 static struct resource uart1_resources[] = {
1280 [0] = {
1281 .start = AT91SAM9263_BASE_US1,
1282 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1283 .flags = IORESOURCE_MEM,
1284 },
1285 [1] = {
1286 .start = AT91SAM9263_ID_US1,
1287 .end = AT91SAM9263_ID_US1,
1288 .flags = IORESOURCE_IRQ,
1289 },
1290 };
1291
1292 static struct atmel_uart_data uart1_data = {
1293 .use_dma_tx = 1,
1294 .use_dma_rx = 1,
1295 };
1296
1297 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1298
1299 static struct platform_device at91sam9263_uart1_device = {
1300 .name = "atmel_usart",
1301 .id = 2,
1302 .dev = {
1303 .dma_mask = &uart1_dmamask,
1304 .coherent_dma_mask = DMA_BIT_MASK(32),
1305 .platform_data = &uart1_data,
1306 },
1307 .resource = uart1_resources,
1308 .num_resources = ARRAY_SIZE(uart1_resources),
1309 };
1310
1311 static inline void configure_usart1_pins(unsigned pins)
1312 {
1313 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1314 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1315
1316 if (pins & ATMEL_UART_RTS)
1317 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1318 if (pins & ATMEL_UART_CTS)
1319 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1320 }
1321
1322 static struct resource uart2_resources[] = {
1323 [0] = {
1324 .start = AT91SAM9263_BASE_US2,
1325 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1326 .flags = IORESOURCE_MEM,
1327 },
1328 [1] = {
1329 .start = AT91SAM9263_ID_US2,
1330 .end = AT91SAM9263_ID_US2,
1331 .flags = IORESOURCE_IRQ,
1332 },
1333 };
1334
1335 static struct atmel_uart_data uart2_data = {
1336 .use_dma_tx = 1,
1337 .use_dma_rx = 1,
1338 };
1339
1340 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1341
1342 static struct platform_device at91sam9263_uart2_device = {
1343 .name = "atmel_usart",
1344 .id = 3,
1345 .dev = {
1346 .dma_mask = &uart2_dmamask,
1347 .coherent_dma_mask = DMA_BIT_MASK(32),
1348 .platform_data = &uart2_data,
1349 },
1350 .resource = uart2_resources,
1351 .num_resources = ARRAY_SIZE(uart2_resources),
1352 };
1353
1354 static inline void configure_usart2_pins(unsigned pins)
1355 {
1356 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1357 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1358
1359 if (pins & ATMEL_UART_RTS)
1360 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1361 if (pins & ATMEL_UART_CTS)
1362 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1363 }
1364
1365 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1366 struct platform_device *atmel_default_console_device; /* the serial console device */
1367
1368 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1369 {
1370 struct platform_device *pdev;
1371 struct atmel_uart_data *pdata;
1372
1373 switch (id) {
1374 case 0: /* DBGU */
1375 pdev = &at91sam9263_dbgu_device;
1376 configure_dbgu_pins();
1377 break;
1378 case AT91SAM9263_ID_US0:
1379 pdev = &at91sam9263_uart0_device;
1380 configure_usart0_pins(pins);
1381 break;
1382 case AT91SAM9263_ID_US1:
1383 pdev = &at91sam9263_uart1_device;
1384 configure_usart1_pins(pins);
1385 break;
1386 case AT91SAM9263_ID_US2:
1387 pdev = &at91sam9263_uart2_device;
1388 configure_usart2_pins(pins);
1389 break;
1390 default:
1391 return;
1392 }
1393 pdata = pdev->dev.platform_data;
1394 pdata->num = portnr; /* update to mapped ID */
1395
1396 if (portnr < ATMEL_MAX_UART)
1397 at91_uarts[portnr] = pdev;
1398 }
1399
1400 void __init at91_set_serial_console(unsigned portnr)
1401 {
1402 if (portnr < ATMEL_MAX_UART) {
1403 atmel_default_console_device = at91_uarts[portnr];
1404 at91sam9263_set_console_clock(at91_uarts[portnr]->id);
1405 }
1406 }
1407
1408 void __init at91_add_device_serial(void)
1409 {
1410 int i;
1411
1412 for (i = 0; i < ATMEL_MAX_UART; i++) {
1413 if (at91_uarts[i])
1414 platform_device_register(at91_uarts[i]);
1415 }
1416
1417 if (!atmel_default_console_device)
1418 printk(KERN_INFO "AT91: No default serial console defined.\n");
1419 }
1420 #else
1421 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1422 void __init at91_set_serial_console(unsigned portnr) {}
1423 void __init at91_add_device_serial(void) {}
1424 #endif
1425
1426
1427 /* -------------------------------------------------------------------- */
1428 /*
1429 * These devices are always present and don't need any board-specific
1430 * setup.
1431 */
1432 static int __init at91_add_standard_devices(void)
1433 {
1434 at91_add_device_rtt();
1435 at91_add_device_watchdog();
1436 at91_add_device_tc();
1437 return 0;
1438 }
1439
1440 arch_initcall(at91_add_standard_devices);
kernel source for telekom puls (alcatel/mediatek)