arch/arm/mach-at91/at91sam9261.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9261.c
   3  *
   4  *  Copyright (C) 2005 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pm.h>
  15
  16 #include <asm/irq.h>
  17 #include <asm/mach/arch.h>
  18 #include <asm/mach/map.h>
  19 #include <mach/cpu.h>
  20 #include <mach/at91sam9261.h>
  21 #include <mach/at91_pmc.h>
  22 #include <mach/at91_rstc.h>
  23 #include <mach/at91_shdwc.h>
  24
  25 #include "generic.h"
  26 #include "clock.h"
  27
  28 static struct map_desc at91sam9261_io_desc[] __initdata = {
  29         {
  30                 .virtual        = AT91_VA_BASE_SYS,
  31                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  32                 .length         = SZ_16K,
  33                 .type           = MT_DEVICE,
  34         },
  35 };
  36
  37 static struct map_desc at91sam9261_sram_desc[] __initdata = {
  38         {
  39                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
  40                 .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
  41                 .length         = AT91SAM9261_SRAM_SIZE,
  42                 .type           = MT_DEVICE,
  43         },
  44 };
  45
  46 static struct map_desc at91sam9g10_sram_desc[] __initdata = {
  47         {
  48                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9G10_SRAM_SIZE,
  49                 .pfn            = __phys_to_pfn(AT91SAM9G10_SRAM_BASE),
  50                 .length         = AT91SAM9G10_SRAM_SIZE,
  51                 .type           = MT_DEVICE,
  52         },
  53 };
  54
  55 /* --------------------------------------------------------------------
  56  *  Clocks
  57  * -------------------------------------------------------------------- */
  58
  59 /*
  60  * The peripheral clocks.
  61  */
  62 static struct clk pioA_clk = {
  63         .name           = "pioA_clk",
  64         .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
  65         .type           = CLK_TYPE_PERIPHERAL,
  66 };
  67 static struct clk pioB_clk = {
  68         .name           = "pioB_clk",
  69         .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
  70         .type           = CLK_TYPE_PERIPHERAL,
  71 };
  72 static struct clk pioC_clk = {
  73         .name           = "pioC_clk",
  74         .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
  75         .type           = CLK_TYPE_PERIPHERAL,
  76 };
  77 static struct clk usart0_clk = {
  78         .name           = "usart0_clk",
  79         .pmc_mask       = 1 << AT91SAM9261_ID_US0,
  80         .type           = CLK_TYPE_PERIPHERAL,
  81 };
  82 static struct clk usart1_clk = {
  83         .name           = "usart1_clk",
  84         .pmc_mask       = 1 << AT91SAM9261_ID_US1,
  85         .type           = CLK_TYPE_PERIPHERAL,
  86 };
  87 static struct clk usart2_clk = {
  88         .name           = "usart2_clk",
  89         .pmc_mask       = 1 << AT91SAM9261_ID_US2,
  90         .type           = CLK_TYPE_PERIPHERAL,
  91 };
  92 static struct clk mmc_clk = {
  93         .name           = "mci_clk",
  94         .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
  95         .type           = CLK_TYPE_PERIPHERAL,
  96 };
  97 static struct clk udc_clk = {
  98         .name           = "udc_clk",
  99         .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
 100         .type           = CLK_TYPE_PERIPHERAL,
 101 };
 102 static struct clk twi_clk = {
 103         .name           = "twi_clk",
 104         .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
 105         .type           = CLK_TYPE_PERIPHERAL,
 106 };
 107 static struct clk spi0_clk = {
 108         .name           = "spi0_clk",
 109         .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
 110         .type           = CLK_TYPE_PERIPHERAL,
 111 };
 112 static struct clk spi1_clk = {
 113         .name           = "spi1_clk",
 114         .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
 115         .type           = CLK_TYPE_PERIPHERAL,
 116 };
 117 static struct clk ssc0_clk = {
 118         .name           = "ssc0_clk",
 119         .pmc_mask       = 1 << AT91SAM9261_ID_SSC0,
 120         .type           = CLK_TYPE_PERIPHERAL,
 121 };
 122 static struct clk ssc1_clk = {
 123         .name           = "ssc1_clk",
 124         .pmc_mask       = 1 << AT91SAM9261_ID_SSC1,
 125         .type           = CLK_TYPE_PERIPHERAL,
 126 };
 127 static struct clk ssc2_clk = {
 128         .name           = "ssc2_clk",
 129         .pmc_mask       = 1 << AT91SAM9261_ID_SSC2,
 130         .type           = CLK_TYPE_PERIPHERAL,
 131 };
 132 static struct clk tc0_clk = {
 133         .name           = "tc0_clk",
 134         .pmc_mask       = 1 << AT91SAM9261_ID_TC0,
 135         .type           = CLK_TYPE_PERIPHERAL,
 136 };
 137 static struct clk tc1_clk = {
 138         .name           = "tc1_clk",
 139         .pmc_mask       = 1 << AT91SAM9261_ID_TC1,
 140         .type           = CLK_TYPE_PERIPHERAL,
 141 };
 142 static struct clk tc2_clk = {
 143         .name           = "tc2_clk",
 144         .pmc_mask       = 1 << AT91SAM9261_ID_TC2,
 145         .type           = CLK_TYPE_PERIPHERAL,
 146 };
 147 static struct clk ohci_clk = {
 148         .name           = "ohci_clk",
 149         .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
 150         .type           = CLK_TYPE_PERIPHERAL,
 151 };
 152 static struct clk lcdc_clk = {
 153         .name           = "lcdc_clk",
 154         .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
 155         .type           = CLK_TYPE_PERIPHERAL,
 156 };
 157
 158 static struct clk *periph_clocks[] __initdata = {
 159         &pioA_clk,
 160         &pioB_clk,
 161         &pioC_clk,
 162         &usart0_clk,
 163         &usart1_clk,
 164         &usart2_clk,
 165         &mmc_clk,
 166         &udc_clk,
 167         &twi_clk,
 168         &spi0_clk,
 169         &spi1_clk,
 170         &ssc0_clk,
 171         &ssc1_clk,
 172         &ssc2_clk,
 173         &tc0_clk,
 174         &tc1_clk,
 175         &tc2_clk,
 176         &ohci_clk,
 177         &lcdc_clk,
 178         // irq0 .. irq2
 179 };
 180
 181 /*
 182  * The four programmable clocks.
 183  * You must configure pin multiplexing to bring these signals out.
 184  */
 185 static struct clk pck0 = {
 186         .name           = "pck0",
 187         .pmc_mask       = AT91_PMC_PCK0,
 188         .type           = CLK_TYPE_PROGRAMMABLE,
 189         .id             = 0,
 190 };
 191 static struct clk pck1 = {
 192         .name           = "pck1",
 193         .pmc_mask       = AT91_PMC_PCK1,
 194         .type           = CLK_TYPE_PROGRAMMABLE,
 195         .id             = 1,
 196 };
 197 static struct clk pck2 = {
 198         .name           = "pck2",
 199         .pmc_mask       = AT91_PMC_PCK2,
 200         .type           = CLK_TYPE_PROGRAMMABLE,
 201         .id             = 2,
 202 };
 203 static struct clk pck3 = {
 204         .name           = "pck3",
 205         .pmc_mask       = AT91_PMC_PCK3,
 206         .type           = CLK_TYPE_PROGRAMMABLE,
 207         .id             = 3,
 208 };
 209
 210 /* HClocks */
 211 static struct clk hck0 = {
 212         .name           = "hck0",
 213         .pmc_mask       = AT91_PMC_HCK0,
 214         .type           = CLK_TYPE_SYSTEM,
 215         .id             = 0,
 216 };
 217 static struct clk hck1 = {
 218         .name           = "hck1",
 219         .pmc_mask       = AT91_PMC_HCK1,
 220         .type           = CLK_TYPE_SYSTEM,
 221         .id             = 1,
 222 };
 223
 224 static void __init at91sam9261_register_clocks(void)
 225 {
 226         int i;
 227
 228         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 229                 clk_register(periph_clocks[i]);
 230
 231         clk_register(&pck0);
 232         clk_register(&pck1);
 233         clk_register(&pck2);
 234         clk_register(&pck3);
 235
 236         clk_register(&hck0);
 237         clk_register(&hck1);
 238 }
 239
 240 /* --------------------------------------------------------------------
 241  *  GPIO
 242  * -------------------------------------------------------------------- */
 243
 244 static struct at91_gpio_bank at91sam9261_gpio[] = {
 245         {
 246                 .id             = AT91SAM9261_ID_PIOA,
 247                 .offset         = AT91_PIOA,
 248                 .clock          = &pioA_clk,
 249         }, {
 250                 .id             = AT91SAM9261_ID_PIOB,
 251                 .offset         = AT91_PIOB,
 252                 .clock          = &pioB_clk,
 253         }, {
 254                 .id             = AT91SAM9261_ID_PIOC,
 255                 .offset         = AT91_PIOC,
 256                 .clock          = &pioC_clk,
 257         }
 258 };
 259
 260 static void at91sam9261_poweroff(void)
 261 {
 262         at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
 263 }
 264
 265
 266 /* --------------------------------------------------------------------
 267  *  AT91SAM9261 processor initialization
 268  * -------------------------------------------------------------------- */
 269
 270 void __init at91sam9261_initialize(unsigned long main_clock)
 271 {
 272         /* Map peripherals */
 273         iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
 274
 275         if (cpu_is_at91sam9g10())
 276                 iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
 277         else
 278                 iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
 279
 280
 281         at91_arch_reset = at91sam9_alt_reset;
 282         pm_power_off = at91sam9261_poweroff;
 283         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
 284                         | (1 << AT91SAM9261_ID_IRQ2);
 285
 286         /* Init clock subsystem */
 287         at91_clock_init(main_clock);
 288
 289         /* Register the processor-specific clocks */
 290         at91sam9261_register_clocks();
 291
 292         /* Register GPIO subsystem */
 293         at91_gpio_init(at91sam9261_gpio, 3);
 294 }
 295
 296 /* --------------------------------------------------------------------
 297  *  Interrupt initialization
 298  * -------------------------------------------------------------------- */
 299
 300 /*
 301  * The default interrupt priority levels (0 = lowest, 7 = highest).
 302  */
 303 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
 304         7,      /* Advanced Interrupt Controller */
 305         7,      /* System Peripherals */
 306         1,      /* Parallel IO Controller A */
 307         1,      /* Parallel IO Controller B */
 308         1,      /* Parallel IO Controller C */
 309         0,
 310         5,      /* USART 0 */
 311         5,      /* USART 1 */
 312         5,      /* USART 2 */
 313         0,      /* Multimedia Card Interface */
 314         2,      /* USB Device Port */
 315         6,      /* Two-Wire Interface */
 316         5,      /* Serial Peripheral Interface 0 */
 317         5,      /* Serial Peripheral Interface 1 */
 318         4,      /* Serial Synchronous Controller 0 */
 319         4,      /* Serial Synchronous Controller 1 */
 320         4,      /* Serial Synchronous Controller 2 */
 321         0,      /* Timer Counter 0 */
 322         0,      /* Timer Counter 1 */
 323         0,      /* Timer Counter 2 */
 324         2,      /* USB Host port */
 325         3,      /* LCD Controller */
 326         0,
 327         0,
 328         0,
 329         0,
 330         0,
 331         0,
 332         0,
 333         0,      /* Advanced Interrupt Controller */
 334         0,      /* Advanced Interrupt Controller */
 335         0,      /* Advanced Interrupt Controller */
 336 };
 337
 338 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 339 {
 340         if (!priority)
 341                 priority = at91sam9261_default_irq_priority;
 342
 343         /* Initialize the AIC interrupt controller */
 344         at91_aic_init(priority);
 345
 346         /* Enable GPIO interrupts */
 347         at91_gpio_irq_setup();
 348 }