2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
29 asic: asic-interrupt-controller@68000000 {
30 compatible = "fsl,imx25-asic", "fsl,avic";
32 #interrupt-cells = <1>;
33 reg = <0x68000000 0x8000000>;
41 compatible = "fsl,imx-osc", "fixed-clock";
42 clock-frequency = <24000000>;
49 compatible = "simple-bus";
50 interrupt-parent = <&asic>;
53 aips@43f00000 { /* AIPS1 */
54 compatible = "fsl,aips-bus", "simple-bus";
57 reg = <0x43f00000 0x100000>;
63 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
64 reg = <0x43f80000 0x4000>;
74 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
75 reg = <0x43f84000 0x4000>;
83 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
84 reg = <0x43f88000 0x4000>;
86 clocks = <&clks 75>, <&clks 75>;
87 clock-names = "ipg", "per";
92 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
93 reg = <0x43f8c000 0x4000>;
95 clocks = <&clks 76>, <&clks 76>;
96 clock-names = "ipg", "per";
100 uart1: serial@43f90000 {
101 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
102 reg = <0x43f90000 0x4000>;
104 clocks = <&clks 120>, <&clks 57>;
105 clock-names = "ipg", "per";
109 uart2: serial@43f94000 {
110 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
111 reg = <0x43f94000 0x4000>;
113 clocks = <&clks 121>, <&clks 57>;
114 clock-names = "ipg", "per";
119 #address-cells = <1>;
121 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
122 reg = <0x43f98000 0x4000>;
130 #address-cells = <1>;
132 reg = <0x43f9c000 0x4000>;
139 spi1: cspi@43fa4000 {
140 #address-cells = <1>;
142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 78>, <&clks 78>;
145 clock-names = "ipg", "per";
151 #address-cells = <1>;
153 reg = <0x43fa8000 0x4000>;
154 clocks = <&clks 102>;
161 compatible = "fsl,imx25-iomuxc";
162 reg = <0x43fac000 0x4000>;
166 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
167 reg = <0x43fb0000 0x4000>;
173 compatible = "fsl,spba-bus", "simple-bus";
174 #address-cells = <1>;
176 reg = <0x50000000 0x40000>;
179 spi3: cspi@50004000 {
180 #address-cells = <1>;
182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x50004000 0x4000>;
185 clocks = <&clks 80>, <&clks 80>;
186 clock-names = "ipg", "per";
190 uart4: serial@50008000 {
191 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
192 reg = <0x50008000 0x4000>;
194 clocks = <&clks 123>, <&clks 57>;
195 clock-names = "ipg", "per";
199 uart3: serial@5000c000 {
200 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
201 reg = <0x5000c000 0x4000>;
203 clocks = <&clks 122>, <&clks 57>;
204 clock-names = "ipg", "per";
208 spi2: cspi@50010000 {
209 #address-cells = <1>;
211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
212 reg = <0x50010000 0x4000>;
213 clocks = <&clks 79>, <&clks 79>;
214 clock-names = "ipg", "per";
220 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
221 reg = <0x50014000 0x4000>;
227 reg = <0x50018000 0x4000>;
231 uart5: serial@5002c000 {
232 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
233 reg = <0x5002c000 0x4000>;
235 clocks = <&clks 124>, <&clks 57>;
236 clock-names = "ipg", "per";
241 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
242 reg = <0x50030000 0x4000>;
244 clocks = <&clks 119>;
250 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
251 reg = <0x50034000 0x4000>;
256 fec: ethernet@50038000 {
257 compatible = "fsl,imx25-fec";
258 reg = <0x50038000 0x4000>;
260 clocks = <&clks 88>, <&clks 65>;
261 clock-names = "ipg", "ahb";
266 aips@53f00000 { /* AIPS2 */
267 compatible = "fsl,aips-bus", "simple-bus";
268 #address-cells = <1>;
270 reg = <0x53f00000 0x100000>;
274 compatible = "fsl,imx25-ccm";
275 reg = <0x53f80000 0x4000>;
280 gpt4: timer@53f84000 {
281 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
282 reg = <0x53f84000 0x4000>;
283 clocks = <&clks 9>, <&clks 45>;
284 clock-names = "ipg", "per";
288 gpt3: timer@53f88000 {
289 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
290 reg = <0x53f88000 0x4000>;
291 clocks = <&clks 9>, <&clks 47>;
292 clock-names = "ipg", "per";
296 gpt2: timer@53f8c000 {
297 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
298 reg = <0x53f8c000 0x4000>;
299 clocks = <&clks 9>, <&clks 47>;
300 clock-names = "ipg", "per";
304 gpt1: timer@53f90000 {
305 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
306 reg = <0x53f90000 0x4000>;
307 clocks = <&clks 9>, <&clks 47>;
308 clock-names = "ipg", "per";
312 epit1: timer@53f94000 {
313 compatible = "fsl,imx25-epit";
314 reg = <0x53f94000 0x4000>;
318 epit2: timer@53f98000 {
319 compatible = "fsl,imx25-epit";
320 reg = <0x53f98000 0x4000>;
324 gpio4: gpio@53f9c000 {
325 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
326 reg = <0x53f9c000 0x4000>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
335 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
337 reg = <0x53fa0000 0x4000>;
338 clocks = <&clks 106>, <&clks 52>;
339 clock-names = "ipg", "per";
343 gpio3: gpio@53fa4000 {
344 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
345 reg = <0x53fa4000 0x4000>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
354 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
356 reg = <0x53fa8000 0x4000>;
357 clocks = <&clks 107>, <&clks 52>;
358 clock-names = "ipg", "per";
362 esdhc1: esdhc@53fb4000 {
363 compatible = "fsl,imx25-esdhc";
364 reg = <0x53fb4000 0x4000>;
366 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
367 clock-names = "ipg", "ahb", "per";
371 esdhc2: esdhc@53fb8000 {
372 compatible = "fsl,imx25-esdhc";
373 reg = <0x53fb8000 0x4000>;
375 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
376 clock-names = "ipg", "ahb", "per";
381 reg = <0x53fbc000 0x4000>;
383 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
384 clock-names = "ipg", "ahb", "per";
389 reg = <0x53fc0000 0x4000>;
395 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
397 reg = <0x53fc8000 0x4000>;
398 clocks = <&clks 108>, <&clks 52>;
399 clock-names = "ipg", "per";
403 gpio1: gpio@53fcc000 {
404 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
405 reg = <0x53fcc000 0x4000>;
409 interrupt-controller;
410 #interrupt-cells = <2>;
413 gpio2: gpio@53fd0000 {
414 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
415 reg = <0x53fd0000 0x4000>;
419 interrupt-controller;
420 #interrupt-cells = <2>;
424 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
425 reg = <0x53fd4000 0x4000>;
426 clocks = <&clks 112>, <&clks 68>;
427 clock-names = "ipg", "ahb";
432 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
433 reg = <0x53fdc000 0x4000>;
434 clocks = <&clks 126>;
440 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
442 reg = <0x53fe0000 0x4000>;
443 clocks = <&clks 105>, <&clks 52>;
444 clock-names = "ipg", "per";
449 compatible = "nop-usbphy";
454 compatible = "nop-usbphy";
458 usbotg: usb@53ff4000 {
459 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
460 reg = <0x53ff4000 0x0200>;
462 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
463 clock-names = "ipg", "ahb", "per";
464 fsl,usbmisc = <&usbmisc 0>;
468 usbhost1: usb@53ff4400 {
469 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
470 reg = <0x53ff4400 0x0200>;
472 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
473 clock-names = "ipg", "ahb", "per";
474 fsl,usbmisc = <&usbmisc 1>;
478 usbmisc: usbmisc@53ff4600 {
480 compatible = "fsl,imx25-usbmisc";
481 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
482 clock-names = "ipg", "ahb", "per";
483 reg = <0x53ff4600 0x00f>;
488 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
489 reg = <0x53ffc000 0x4000>;
497 compatible = "fsl,emi-bus", "simple-bus";
498 #address-cells = <1>;
500 reg = <0x80000000 0x3b002000>;
504 #address-cells = <1>;
507 compatible = "fsl,imx25-nand";
508 reg = <0xbb000000 0x2000>;