arch/arm/boot/dts/bcm2835.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "brcm,bcm2835";
   5         model = "BCM2835";
   6         interrupt-parent = <&intc>;
   7
   8         chosen {
   9                 bootargs = "earlyprintk console=ttyAMA0";
  10         };
  11
  12         soc {
  13                 compatible = "simple-bus";
  14                 #address-cells = <1>;
  15                 #size-cells = <1>;
  16                 ranges = <0x7e000000 0x20000000 0x02000000>;
  17
  18                 timer {
  19                         compatible = "brcm,bcm2835-system-timer";
  20                         reg = <0x7e003000 0x1000>;
  21                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  22                         clock-frequency = <1000000>;
  23                 };
  24
  25                 intc: interrupt-controller {
  26                         compatible = "brcm,bcm2835-armctrl-ic";
  27                         reg = <0x7e00b200 0x200>;
  28                         interrupt-controller;
  29                         #interrupt-cells = <2>;
  30                 };
  31
  32                 watchdog {
  33                         compatible = "brcm,bcm2835-pm-wdt";
  34                         reg = <0x7e100000 0x28>;
  35                 };
  36
  37                 rng {
  38                         compatible = "brcm,bcm2835-rng";
  39                         reg = <0x7e104000 0x10>;
  40                 };
  41
  42                 uart@20201000 {
  43                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
  44                         reg = <0x7e201000 0x1000>;
  45                         interrupts = <2 25>;
  46                         clock-frequency = <3000000>;
  47                 };
  48
  49                 gpio: gpio {
  50                         compatible = "brcm,bcm2835-gpio";
  51                         reg = <0x7e200000 0xb4>;
  52                         /*
  53                          * The GPIO IP block is designed for 3 banks of GPIOs.
  54                          * Each bank has a GPIO interrupt for itself.
  55                          * There is an overall "any bank" interrupt.
  56                          * In order, these are GIC interrupts 17, 18, 19, 20.
  57                          * Since the BCM2835 only has 2 banks, the 2nd bank
  58                          * interrupt output appears to be mirrored onto the
  59                          * 3rd bank's interrupt signal.
  60                          * So, a bank0 interrupt shows up on 17, 20, and
  61                          * a bank1 interrupt shows up on 18, 19, 20!
  62                          */
  63                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
  64
  65                         gpio-controller;
  66                         #gpio-cells = <2>;
  67
  68                         interrupt-controller;
  69                         #interrupt-cells = <2>;
  70                 };
  71
  72                 spi: spi@20204000 {
  73                         compatible = "brcm,bcm2835-spi";
  74                         reg = <0x7e204000 0x1000>;
  75                         interrupts = <2 22>;
  76                         clocks = <&clk_spi>;
  77                         #address-cells = <1>;
  78                         #size-cells = <0>;
  79                         status = "disabled";
  80                 };
  81
  82                 i2c0: i2c@20205000 {
  83                         compatible = "brcm,bcm2835-i2c";
  84                         reg = <0x7e205000 0x1000>;
  85                         interrupts = <2 21>;
  86                         clocks = <&clk_i2c>;
  87                         status = "disabled";
  88                 };
  89
  90                 i2c1: i2c@20804000 {
  91                         compatible = "brcm,bcm2835-i2c";
  92                         reg = <0x7e804000 0x1000>;
  93                         interrupts = <2 21>;
  94                         clocks = <&clk_i2c>;
  95                         status = "disabled";
  96                 };
  97
  98                 sdhci: sdhci {
  99                         compatible = "brcm,bcm2835-sdhci";
 100                         reg = <0x7e300000 0x100>;
 101                         interrupts = <2 30>;
 102                         clocks = <&clk_mmc>;
 103                         status = "disabled";
 104                 };
 105         };
 106
 107         clocks {
 108                 compatible = "simple-bus";
 109                 #address-cells = <1>;
 110                 #size-cells = <0>;
 111
 112                 clk_mmc: mmc {
 113                         compatible = "fixed-clock";
 114                         reg = <0>;
 115                         #clock-cells = <0>;
 116                         clock-frequency = <100000000>;
 117                 };
 118
 119                 clk_i2c: i2c {
 120                         compatible = "fixed-clock";
 121                         reg = <1>;
 122                         #clock-cells = <0>;
 123                         clock-frequency = <250000000>;
 124                 };
 125
 126                 clk_spi: spi {
 127                         compatible = "fixed-clock";
 128                         reg = <2>;
 129                         #clock-cells = <0>;
 130                         clock-frequency = <250000000>;
 131                 };
 132         };
 133 };