2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
102 config HAVE_LATENCYTOP_SUPPORT
107 config LOCKDEP_SUPPORT
111 config TRACE_IRQFLAGS_SUPPORT
115 config HARDIRQS_SW_RESEND
119 config GENERIC_IRQ_PROBE
123 config GENERIC_LOCKBREAK
126 depends on SMP && PREEMPT
128 config RWSEM_GENERIC_SPINLOCK
132 config RWSEM_XCHGADD_ALGORITHM
135 config ARCH_HAS_ILOG2_U32
138 config ARCH_HAS_ILOG2_U64
141 config ARCH_HAS_CPUFREQ
144 Internal node to signify that the ARCH has CPUFREQ support
145 and that the relevant menu configurations are displayed for
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
274 select ARCH_USES_GETTIMEOFFSET
276 This enables support for systems based on the Atmel AT91RM9200,
277 AT91SAM9 and AT91CAP9 processors.
280 bool "Broadcom BCMRING"
285 select GENERIC_CLOCKEVENTS
286 select ARCH_WANT_OPTIONAL_GPIOLIB
288 Support for Broadcom's BCMRing platform.
291 bool "Cirrus Logic CLPS711x/EP721x-based"
293 select ARCH_USES_GETTIMEOFFSET
295 Support for Cirrus Logic 711x/721x based boards.
298 bool "Cavium Networks CNS3XXX family"
300 select GENERIC_CLOCKEVENTS
302 select PCI_DOMAINS if PCI
304 Support for Cavium Networks CNS3XXX platform.
307 bool "Cortina Systems Gemini"
309 select ARCH_REQUIRE_GPIOLIB
310 select ARCH_USES_GETTIMEOFFSET
312 Support for the Cortina Systems Gemini family SoCs
319 select ARCH_USES_GETTIMEOFFSET
321 This is an evaluation board for the StrongARM processor available
322 from Digital. It has limited hardware on-board, including an
323 Ethernet interface, two PCMCIA sockets, two serial ports and a
332 select ARCH_REQUIRE_GPIOLIB
333 select ARCH_HAS_HOLES_MEMORYMODEL
334 select ARCH_USES_GETTIMEOFFSET
336 This enables support for the Cirrus EP93xx series of CPUs.
338 config ARCH_FOOTBRIDGE
342 select ARCH_USES_GETTIMEOFFSET
344 Support for systems based on the DC21285 companion chip
345 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
348 bool "Freescale MXC/iMX-based"
349 select GENERIC_CLOCKEVENTS
350 select ARCH_REQUIRE_GPIOLIB
353 Support for Freescale MXC/iMX-based family of processors
356 bool "Freescale STMP3xxx"
359 select ARCH_REQUIRE_GPIOLIB
360 select GENERIC_CLOCKEVENTS
361 select USB_ARCH_HAS_EHCI
363 Support for systems based on the Freescale 3xxx CPUs.
366 bool "Hilscher NetX based"
369 select GENERIC_CLOCKEVENTS
371 This enables support for systems based on the Hilscher NetX Soc
374 bool "Hynix HMS720x-based"
377 select ARCH_USES_GETTIMEOFFSET
379 This enables support for systems based on the Hynix HMS720x
387 select ARCH_SUPPORTS_MSI
390 Support for Intel's IOP13XX (XScale) family of processors.
398 select ARCH_REQUIRE_GPIOLIB
400 Support for Intel's 80219 and IOP32X (XScale) family of
409 select ARCH_REQUIRE_GPIOLIB
411 Support for Intel's IOP33X (XScale) family of processors.
418 select ARCH_USES_GETTIMEOFFSET
420 Support for Intel's IXP23xx (XScale) family of processors.
423 bool "IXP2400/2800-based"
427 select ARCH_USES_GETTIMEOFFSET
429 Support for Intel's IXP2400/2800 (XScale) family of processors.
436 select GENERIC_CLOCKEVENTS
437 select DMABOUNCE if PCI
439 Support for Intel's IXP4XX (XScale) family of processors.
444 select ARCH_REQUIRE_GPIOLIB
445 select GENERIC_CLOCKEVENTS
448 Support for the Marvell Dove SoC 88AP510
451 bool "Marvell Kirkwood"
454 select ARCH_REQUIRE_GPIOLIB
455 select GENERIC_CLOCKEVENTS
458 Support for the following Marvell Kirkwood series SoCs:
459 88F6180, 88F6192 and 88F6281.
462 bool "Marvell Loki (88RC8480)"
464 select GENERIC_CLOCKEVENTS
467 Support for the Marvell Loki (88RC8480) SoC.
472 select ARCH_REQUIRE_GPIOLIB
475 select USB_ARCH_HAS_OHCI
478 select GENERIC_CLOCKEVENTS
480 Support for the NXP LPC32XX family of processors
483 bool "Marvell MV78xx0"
486 select ARCH_REQUIRE_GPIOLIB
487 select GENERIC_CLOCKEVENTS
490 Support for the following Marvell MV78xx0 series SoCs:
498 select ARCH_REQUIRE_GPIOLIB
499 select GENERIC_CLOCKEVENTS
502 Support for the following Marvell Orion 5x series SoCs:
503 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
504 Orion-2 (5281), Orion-1-90 (6183).
507 bool "Marvell PXA168/910/MMP2"
509 select ARCH_REQUIRE_GPIOLIB
511 select GENERIC_CLOCKEVENTS
515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
518 bool "Micrel/Kendin KS8695"
520 select ARCH_REQUIRE_GPIOLIB
521 select ARCH_USES_GETTIMEOFFSET
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
527 bool "NetSilicon NS9xxx"
530 select GENERIC_CLOCKEVENTS
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
536 <http://www.digi.com/products/microprocessors/index.jsp>
539 bool "Nuvoton W90X900 CPU"
541 select ARCH_REQUIRE_GPIOLIB
543 select GENERIC_CLOCKEVENTS
545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
554 bool "Nuvoton NUC93X CPU"
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
564 select GENERIC_CLOCKEVENTS
568 select ARCH_HAS_BARRIERS if CACHE_L2X0
570 This enables support for NVIDIA Tegra based systems (Tegra APX,
571 Tegra 6xx and Tegra 2 series).
574 bool "Philips Nexperia PNX4008 Mobile"
577 select ARCH_USES_GETTIMEOFFSET
579 This enables support for Philips PNX4008 mobile platform.
582 bool "PXA2xx/PXA3xx-based"
585 select ARCH_HAS_CPUFREQ
587 select ARCH_REQUIRE_GPIOLIB
588 select GENERIC_CLOCKEVENTS
592 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
597 select GENERIC_CLOCKEVENTS
598 select ARCH_REQUIRE_GPIOLIB
600 Support for Qualcomm MSM/QSD based systems. This runs on the
601 apps processor of the MSM/QSD and depends on a shared memory
602 interface to the modem processor which runs the baseband
603 stack and controls some vital subsystems
604 (clock and power control, etc).
607 bool "Renesas SH-Mobile"
609 Support for Renesas's SH-Mobile ARM platforms
616 select ARCH_MAY_HAVE_PC_FDC
617 select HAVE_PATA_PLATFORM
620 select ARCH_SPARSEMEM_ENABLE
621 select ARCH_USES_GETTIMEOFFSET
623 On the Acorn Risc-PC, Linux can support the internal IDE disk and
624 CD-ROM interface, serial and parallel port, and the floppy drive.
630 select ARCH_SPARSEMEM_ENABLE
632 select ARCH_HAS_CPUFREQ
634 select GENERIC_CLOCKEVENTS
637 select ARCH_REQUIRE_GPIOLIB
639 Support for StrongARM 11x0 based boards.
642 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
644 select ARCH_HAS_CPUFREQ
646 select ARCH_USES_GETTIMEOFFSET
648 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
649 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
650 the Samsung SMDK2410 development board (and derivatives).
652 Note, the S3C2416 and the S3C2450 are so close that they even share
653 the same SoC ID code. This means that there is no seperate machine
654 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
657 bool "Samsung S3C64XX"
663 select ARCH_USES_GETTIMEOFFSET
664 select ARCH_HAS_CPUFREQ
665 select ARCH_REQUIRE_GPIOLIB
666 select SAMSUNG_CLKSRC
667 select SAMSUNG_IRQ_VIC_TIMER
668 select SAMSUNG_IRQ_UART
669 select S3C_GPIO_TRACK
670 select S3C_GPIO_PULL_UPDOWN
671 select S3C_GPIO_CFG_S3C24XX
672 select S3C_GPIO_CFG_S3C64XX
674 select USB_ARCH_HAS_OHCI
675 select SAMSUNG_GPIOLIB_4BIT
677 Samsung S3C64XX series based systems
680 bool "Samsung S5P6440"
684 select ARCH_USES_GETTIMEOFFSET
686 Samsung S5P6440 CPU based systems
689 bool "Samsung S5P6442"
693 select ARCH_USES_GETTIMEOFFSET
695 Samsung S5P6442 CPU based systems
698 bool "Samsung S5PC100"
702 select ARM_L1_CACHE_SHIFT_6
703 select ARCH_USES_GETTIMEOFFSET
705 Samsung S5PC100 series based systems
708 bool "Samsung S5PV210/S5PC110"
712 select ARM_L1_CACHE_SHIFT_6
713 select ARCH_USES_GETTIMEOFFSET
715 Samsung S5PV210/S5PC110 series based systems
724 select ARCH_USES_GETTIMEOFFSET
726 Support for the StrongARM based Digital DNARD machine, also known
727 as "Shark" (<http://www.shark-linux.de/shark.html>).
732 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
733 select ARCH_USES_GETTIMEOFFSET
735 Say Y here for systems based on one of the Sharp LH7A40X
736 System on a Chip processors. These CPUs include an ARM922T
737 core with a wide array of integrated devices for
738 hand-held and low-power applications.
741 bool "ST-Ericsson U300 Series"
747 select GENERIC_CLOCKEVENTS
751 Support for ST-Ericsson U300 series mobile platforms.
754 bool "ST-Ericsson U8500 Series"
757 select GENERIC_CLOCKEVENTS
759 select ARCH_REQUIRE_GPIOLIB
761 Support for ST-Ericsson's Ux500 architecture
764 bool "STMicroelectronics Nomadik"
769 select GENERIC_CLOCKEVENTS
770 select ARCH_REQUIRE_GPIOLIB
772 Support for the Nomadik platform by ST-Ericsson
776 select GENERIC_CLOCKEVENTS
777 select ARCH_REQUIRE_GPIOLIB
781 select GENERIC_ALLOCATOR
782 select ARCH_HAS_HOLES_MEMORYMODEL
784 Support for TI's DaVinci platform.
789 select ARCH_REQUIRE_GPIOLIB
790 select ARCH_HAS_CPUFREQ
791 select GENERIC_CLOCKEVENTS
792 select ARCH_HAS_HOLES_MEMORYMODEL
794 Support for TI's OMAP platform (OMAP1 and OMAP2).
799 select ARCH_REQUIRE_GPIOLIB
801 select GENERIC_CLOCKEVENTS
804 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
809 # This is sorted alphabetically by mach-* pathname. However, plat-*
810 # Kconfigs may be included either alphabetically (according to the
811 # plat- suffix) or along side the corresponding mach-* source.
813 source "arch/arm/mach-aaec2000/Kconfig"
815 source "arch/arm/mach-at91/Kconfig"
817 source "arch/arm/mach-bcmring/Kconfig"
819 source "arch/arm/mach-clps711x/Kconfig"
821 source "arch/arm/mach-cns3xxx/Kconfig"
823 source "arch/arm/mach-davinci/Kconfig"
825 source "arch/arm/mach-dove/Kconfig"
827 source "arch/arm/mach-ep93xx/Kconfig"
829 source "arch/arm/mach-footbridge/Kconfig"
831 source "arch/arm/mach-gemini/Kconfig"
833 source "arch/arm/mach-h720x/Kconfig"
835 source "arch/arm/mach-integrator/Kconfig"
837 source "arch/arm/mach-iop32x/Kconfig"
839 source "arch/arm/mach-iop33x/Kconfig"
841 source "arch/arm/mach-iop13xx/Kconfig"
843 source "arch/arm/mach-ixp4xx/Kconfig"
845 source "arch/arm/mach-ixp2000/Kconfig"
847 source "arch/arm/mach-ixp23xx/Kconfig"
849 source "arch/arm/mach-kirkwood/Kconfig"
851 source "arch/arm/mach-ks8695/Kconfig"
853 source "arch/arm/mach-lh7a40x/Kconfig"
855 source "arch/arm/mach-loki/Kconfig"
857 source "arch/arm/mach-lpc32xx/Kconfig"
859 source "arch/arm/mach-msm/Kconfig"
861 source "arch/arm/mach-mv78xx0/Kconfig"
863 source "arch/arm/plat-mxc/Kconfig"
865 source "arch/arm/mach-netx/Kconfig"
867 source "arch/arm/mach-nomadik/Kconfig"
868 source "arch/arm/plat-nomadik/Kconfig"
870 source "arch/arm/mach-ns9xxx/Kconfig"
872 source "arch/arm/mach-nuc93x/Kconfig"
874 source "arch/arm/plat-omap/Kconfig"
876 source "arch/arm/mach-omap1/Kconfig"
878 source "arch/arm/mach-omap2/Kconfig"
880 source "arch/arm/mach-orion5x/Kconfig"
882 source "arch/arm/mach-pxa/Kconfig"
883 source "arch/arm/plat-pxa/Kconfig"
885 source "arch/arm/mach-mmp/Kconfig"
887 source "arch/arm/mach-realview/Kconfig"
889 source "arch/arm/mach-sa1100/Kconfig"
891 source "arch/arm/plat-samsung/Kconfig"
892 source "arch/arm/plat-s3c24xx/Kconfig"
893 source "arch/arm/plat-s5p/Kconfig"
895 source "arch/arm/plat-spear/Kconfig"
898 source "arch/arm/mach-s3c2400/Kconfig"
899 source "arch/arm/mach-s3c2410/Kconfig"
900 source "arch/arm/mach-s3c2412/Kconfig"
901 source "arch/arm/mach-s3c2416/Kconfig"
902 source "arch/arm/mach-s3c2440/Kconfig"
903 source "arch/arm/mach-s3c2443/Kconfig"
907 source "arch/arm/mach-s3c64xx/Kconfig"
910 source "arch/arm/mach-s5p6440/Kconfig"
912 source "arch/arm/mach-s5p6442/Kconfig"
914 source "arch/arm/mach-s5pc100/Kconfig"
916 source "arch/arm/mach-s5pv210/Kconfig"
918 source "arch/arm/mach-shmobile/Kconfig"
920 source "arch/arm/plat-stmp3xxx/Kconfig"
922 source "arch/arm/mach-tegra/Kconfig"
924 source "arch/arm/mach-u300/Kconfig"
926 source "arch/arm/mach-ux500/Kconfig"
928 source "arch/arm/mach-versatile/Kconfig"
930 source "arch/arm/mach-vexpress/Kconfig"
932 source "arch/arm/mach-w90x900/Kconfig"
934 # Definitions to make life easier
940 select GENERIC_CLOCKEVENTS
948 config PLAT_VERSATILE
951 config ARM_TIMER_SP804
954 source arch/arm/mm/Kconfig
957 bool "Enable iWMMXt support"
958 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
959 default y if PXA27x || PXA3xx || ARCH_MMP
961 Enable support for iWMMXt context switching at run time if
962 running on a CPU that supports it.
964 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
967 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
971 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
972 (!ARCH_OMAP3 || OMAP3_EMU)
977 source "arch/arm/Kconfig-nommu"
980 config ARM_ERRATA_411920
981 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
982 depends on CPU_V6 && !SMP
984 Invalidation of the Instruction Cache operation can
985 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
986 It does not affect the MPCore. This option enables the ARM Ltd.
987 recommended workaround.
989 config ARM_ERRATA_430973
990 bool "ARM errata: Stale prediction on replaced interworking branch"
993 This option enables the workaround for the 430973 Cortex-A8
994 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
995 interworking branch is replaced with another code sequence at the
996 same virtual address, whether due to self-modifying code or virtual
997 to physical address re-mapping, Cortex-A8 does not recover from the
998 stale interworking branch prediction. This results in Cortex-A8
999 executing the new code sequence in the incorrect ARM or Thumb state.
1000 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1001 and also flushes the branch target cache at every context switch.
1002 Note that setting specific bits in the ACTLR register may not be
1003 available in non-secure mode.
1005 config ARM_ERRATA_458693
1006 bool "ARM errata: Processor deadlock when a false hazard is created"
1009 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1010 erratum. For very specific sequences of memory operations, it is
1011 possible for a hazard condition intended for a cache line to instead
1012 be incorrectly associated with a different cache line. This false
1013 hazard might then cause a processor deadlock. The workaround enables
1014 the L1 caching of the NEON accesses and disables the PLD instruction
1015 in the ACTLR register. Note that setting specific bits in the ACTLR
1016 register may not be available in non-secure mode.
1018 config ARM_ERRATA_460075
1019 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1022 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1023 erratum. Any asynchronous access to the L2 cache may encounter a
1024 situation in which recent store transactions to the L2 cache are lost
1025 and overwritten with stale memory contents from external memory. The
1026 workaround disables the write-allocate mode for the L2 cache via the
1027 ACTLR register. Note that setting specific bits in the ACTLR register
1028 may not be available in non-secure mode.
1030 config PL310_ERRATA_588369
1031 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1032 depends on CACHE_L2X0 && ARCH_OMAP4
1034 The PL310 L2 cache controller implements three types of Clean &
1035 Invalidate maintenance operations: by Physical Address
1036 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1037 They are architecturally defined to behave as the execution of a
1038 clean operation followed immediately by an invalidate operation,
1039 both performing to the same memory location. This functionality
1040 is not correctly implemented in PL310 as clean lines are not
1041 invalidated as a result of these operations. Note that this errata
1042 uses Texas Instrument's secure monitor api.
1044 config ARM_ERRATA_720789
1045 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1046 depends on CPU_V7 && SMP
1048 This option enables the workaround for the 720789 Cortex-A9 (prior to
1049 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1050 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1051 As a consequence of this erratum, some TLB entries which should be
1052 invalidated are not, resulting in an incoherency in the system page
1053 tables. The workaround changes the TLB flushing routines to invalidate
1054 entries regardless of the ASID.
1057 source "arch/arm/common/Kconfig"
1067 Find out whether you have ISA slots on your motherboard. ISA is the
1068 name of a bus system, i.e. the way the CPU talks to the other stuff
1069 inside your box. Other bus systems are PCI, EISA, MicroChannel
1070 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1071 newer boards don't support it. If you have ISA, say Y, otherwise N.
1073 # Select ISA DMA controller support
1078 # Select ISA DMA interface
1083 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1085 Find out whether you have a PCI motherboard. PCI is the name of a
1086 bus system, i.e. the way the CPU talks to the other stuff inside
1087 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1088 VESA. If you have PCI, say Y, otherwise N.
1097 # Select the host bridge type
1098 config PCI_HOST_VIA82C505
1100 depends on PCI && ARCH_SHARK
1103 config PCI_HOST_ITE8152
1105 depends on PCI && MACH_ARMCORE
1109 source "drivers/pci/Kconfig"
1111 source "drivers/pcmcia/Kconfig"
1115 menu "Kernel Features"
1117 source "kernel/time/Kconfig"
1120 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1121 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1122 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1123 ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
1124 depends on GENERIC_CLOCKEVENTS
1125 select USE_GENERIC_SMP_HELPERS
1126 select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || \
1127 ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
1129 This enables support for systems with more than one CPU. If you have
1130 a system with only one CPU, like most personal computers, say N. If
1131 you have a system with more than one CPU, say Y.
1133 If you say N here, the kernel will run on single and multiprocessor
1134 machines, but will use only one CPU of a multiprocessor machine. If
1135 you say Y here, the kernel will run on many, but not all, single
1136 processor machines. On a single processor machine, the kernel will
1137 run faster if you say N here.
1139 See also <file:Documentation/i386/IO-APIC.txt>,
1140 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1141 <http://www.linuxdoc.org/docs.html#howto>.
1143 If you don't know what to do here, say N.
1149 This option enables support for the ARM system coherency unit
1155 This options enables support for the ARM timer and watchdog unit
1158 prompt "Memory split"
1161 Select the desired split between kernel and user memory.
1163 If you are not absolutely sure what you are doing, leave this
1167 bool "3G/1G user/kernel split"
1169 bool "2G/2G user/kernel split"
1171 bool "1G/3G user/kernel split"
1176 default 0x40000000 if VMSPLIT_1G
1177 default 0x80000000 if VMSPLIT_2G
1181 int "Maximum number of CPUs (2-32)"
1187 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1188 depends on SMP && HOTPLUG && EXPERIMENTAL
1190 Say Y here to experiment with turning CPUs off and on. CPUs
1191 can be controlled through /sys/devices/system/cpu.
1194 bool "Use local timer interrupts"
1195 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1196 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1197 ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
1199 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || \\
1200 ARCH_U8500 || ARCH_TEGRA
1202 Enable support for local timers on SMP platforms, rather then the
1203 legacy IPI broadcast method. Local timers allows the system
1204 accounting to be spread across the timer interval, preventing a
1205 "thundering herd" at every timer tick.
1207 source kernel/Kconfig.preempt
1211 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
1212 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1213 default AT91_TIMER_HZ if ARCH_AT91
1214 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1217 config THUMB2_KERNEL
1218 bool "Compile the kernel in Thumb-2 mode"
1219 depends on CPU_V7 && EXPERIMENTAL
1221 select ARM_ASM_UNIFIED
1223 By enabling this option, the kernel will be compiled in
1224 Thumb-2 mode. A compiler/assembler that understand the unified
1225 ARM-Thumb syntax is needed.
1229 config ARM_ASM_UNIFIED
1233 bool "Use the ARM EABI to compile the kernel"
1235 This option allows for the kernel to be compiled using the latest
1236 ARM ABI (aka EABI). This is only useful if you are using a user
1237 space environment that is also compiled with EABI.
1239 Since there are major incompatibilities between the legacy ABI and
1240 EABI, especially with regard to structure member alignment, this
1241 option also changes the kernel syscall calling convention to
1242 disambiguate both ABIs and allow for backward compatibility support
1243 (selected with CONFIG_OABI_COMPAT).
1245 To use this you need GCC version 4.0.0 or later.
1248 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1249 depends on AEABI && EXPERIMENTAL
1252 This option preserves the old syscall interface along with the
1253 new (ARM EABI) one. It also provides a compatibility layer to
1254 intercept syscalls that have structure arguments which layout
1255 in memory differs between the legacy ABI and the new ARM EABI
1256 (only for non "thumb" binaries). This option adds a tiny
1257 overhead to all syscalls and produces a slightly larger kernel.
1258 If you know you'll be using only pure EABI user space then you
1259 can say N here. If this option is not selected and you attempt
1260 to execute a legacy ABI binary then the result will be
1261 UNPREDICTABLE (in fact it can be predicted that it won't work
1262 at all). If in doubt say Y.
1264 config ARCH_HAS_HOLES_MEMORYMODEL
1267 config ARCH_SPARSEMEM_ENABLE
1270 config ARCH_SPARSEMEM_DEFAULT
1271 def_bool ARCH_SPARSEMEM_ENABLE
1273 config ARCH_SELECT_MEMORY_MODEL
1274 def_bool ARCH_SPARSEMEM_ENABLE
1277 bool "High Memory Support (EXPERIMENTAL)"
1278 depends on MMU && EXPERIMENTAL
1280 The address space of ARM processors is only 4 Gigabytes large
1281 and it has to accommodate user address space, kernel address
1282 space as well as some memory mapped IO. That means that, if you
1283 have a large amount of physical memory and/or IO, not all of the
1284 memory can be "permanently mapped" by the kernel. The physical
1285 memory that is not permanently mapped is called "high memory".
1287 Depending on the selected kernel/user memory split, minimum
1288 vmalloc space and actual amount of RAM, you may not need this
1289 option which should result in a slightly faster kernel.
1294 bool "Allocate 2nd-level pagetables from highmem"
1296 depends on !OUTER_CACHE
1298 config HW_PERF_EVENTS
1299 bool "Enable hardware performance counter support for perf events"
1300 depends on PERF_EVENTS && CPU_HAS_PMU
1303 Enable hardware performance counter support for perf events. If
1304 disabled, perf events will use software events only.
1309 This enables support for sparse irqs. This is useful in general
1310 as most CPUs have a fairly sparse array of IRQ vectors, which
1311 the irq_desc then maps directly on to. Systems with a high
1312 number of off-chip IRQs will want to treat this as
1313 experimental until they have been independently verified.
1317 config FORCE_MAX_ZONEORDER
1318 int "Maximum zone order" if ARCH_SHMOBILE
1319 range 11 64 if ARCH_SHMOBILE
1320 default "9" if SA1111
1323 The kernel memory allocator divides physically contiguous memory
1324 blocks into "zones", where each zone is a power of two number of
1325 pages. This option selects the largest power of two that the kernel
1326 keeps in the memory allocator. If you need to allocate very large
1327 blocks of physically contiguous memory, then you may need to
1328 increase this value.
1330 This config option is actually maximum order plus one. For example,
1331 a value of 11 means that the largest free memory block is 2^10 pages.
1334 bool "Timer and CPU usage LEDs"
1335 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1336 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1337 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1338 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1339 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1340 ARCH_AT91 || ARCH_DAVINCI || \
1341 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1343 If you say Y here, the LEDs on your machine will be used
1344 to provide useful information about your current system status.
1346 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1347 be able to select which LEDs are active using the options below. If
1348 you are compiling a kernel for the EBSA-110 or the LART however, the
1349 red LED will simply flash regularly to indicate that the system is
1350 still functional. It is safe to say Y here if you have a CATS
1351 system, but the driver will do nothing.
1354 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1355 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1356 || MACH_OMAP_PERSEUS2
1358 depends on !GENERIC_CLOCKEVENTS
1359 default y if ARCH_EBSA110
1361 If you say Y here, one of the system LEDs (the green one on the
1362 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1363 will flash regularly to indicate that the system is still
1364 operational. This is mainly useful to kernel hackers who are
1365 debugging unstable kernels.
1367 The LART uses the same LED for both Timer LED and CPU usage LED
1368 functions. You may choose to use both, but the Timer LED function
1369 will overrule the CPU usage LED.
1372 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1374 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1375 || MACH_OMAP_PERSEUS2
1378 If you say Y here, the red LED will be used to give a good real
1379 time indication of CPU usage, by lighting whenever the idle task
1380 is not currently executing.
1382 The LART uses the same LED for both Timer LED and CPU usage LED
1383 functions. You may choose to use both, but the Timer LED function
1384 will overrule the CPU usage LED.
1386 config ALIGNMENT_TRAP
1388 depends on CPU_CP15_MMU
1389 default y if !ARCH_EBSA110
1390 select HAVE_PROC_CPU if PROC_FS
1392 ARM processors cannot fetch/store information which is not
1393 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1394 address divisible by 4. On 32-bit ARM processors, these non-aligned
1395 fetch/store instructions will be emulated in software if you say
1396 here, which has a severe performance impact. This is necessary for
1397 correct operation of some network protocols. With an IP-only
1398 configuration it is safe to say N, otherwise say Y.
1400 config UACCESS_WITH_MEMCPY
1401 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1402 depends on MMU && EXPERIMENTAL
1403 default y if CPU_FEROCEON
1405 Implement faster copy_to_user and clear_user methods for CPU
1406 cores where a 8-word STM instruction give significantly higher
1407 memory write throughput than a sequence of individual 32bit stores.
1409 A possible side effect is a slight increase in scheduling latency
1410 between threads sharing the same address space if they invoke
1411 such copy operations with large buffers.
1413 However, if the CPU data cache is using a write-allocate mode,
1414 this option is unlikely to provide any performance gain.
1416 config CC_STACKPROTECTOR
1417 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1419 This option turns on the -fstack-protector GCC feature. This
1420 feature puts, at the beginning of functions, a canary value on
1421 the stack just before the return address, and validates
1422 the value just before actually returning. Stack based buffer
1423 overflows (that need to overwrite this return address) now also
1424 overwrite the canary, which gets detected and the attack is then
1425 neutralized via a kernel panic.
1426 This feature requires gcc version 4.2 or above.
1428 config DEPRECATED_PARAM_STRUCT
1429 bool "Provide old way to pass kernel parameters"
1431 This was deprecated in 2001 and announced to live on for 5 years.
1432 Some old boot loaders still use this way.
1438 # Compressed boot loader in ROM. Yes, we really want to ask about
1439 # TEXT and BSS so we preserve their values in the config files.
1440 config ZBOOT_ROM_TEXT
1441 hex "Compressed ROM boot loader base address"
1444 The physical address at which the ROM-able zImage is to be
1445 placed in the target. Platforms which normally make use of
1446 ROM-able zImage formats normally set this to a suitable
1447 value in their defconfig file.
1449 If ZBOOT_ROM is not enabled, this has no effect.
1451 config ZBOOT_ROM_BSS
1452 hex "Compressed ROM boot loader BSS address"
1455 The base address of an area of read/write memory in the target
1456 for the ROM-able zImage which must be available while the
1457 decompressor is running. It must be large enough to hold the
1458 entire decompressed kernel plus an additional 128 KiB.
1459 Platforms which normally make use of ROM-able zImage formats
1460 normally set this to a suitable value in their defconfig file.
1462 If ZBOOT_ROM is not enabled, this has no effect.
1465 bool "Compressed boot loader in ROM/flash"
1466 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1468 Say Y here if you intend to execute your compressed kernel image
1469 (zImage) directly from ROM or flash. If unsure, say N.
1472 string "Default kernel command string"
1475 On some architectures (EBSA110 and CATS), there is currently no way
1476 for the boot loader to pass arguments to the kernel. For these
1477 architectures, you should supply some command-line options at build
1478 time by entering them here. As a minimum, you should specify the
1479 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1481 config CMDLINE_FORCE
1482 bool "Always use the default kernel command string"
1483 depends on CMDLINE != ""
1485 Always use the default kernel command string, even if the boot
1486 loader passes other arguments to the kernel.
1487 This is useful if you cannot or don't want to change the
1488 command-line options your boot loader passes to the kernel.
1493 bool "Kernel Execute-In-Place from ROM"
1494 depends on !ZBOOT_ROM
1496 Execute-In-Place allows the kernel to run from non-volatile storage
1497 directly addressable by the CPU, such as NOR flash. This saves RAM
1498 space since the text section of the kernel is not loaded from flash
1499 to RAM. Read-write sections, such as the data section and stack,
1500 are still copied to RAM. The XIP kernel is not compressed since
1501 it has to run directly from flash, so it will take more space to
1502 store it. The flash address used to link the kernel object files,
1503 and for storing it, is configuration dependent. Therefore, if you
1504 say Y here, you must know the proper physical address where to
1505 store the kernel image depending on your own flash memory usage.
1507 Also note that the make target becomes "make xipImage" rather than
1508 "make zImage" or "make Image". The final kernel binary to put in
1509 ROM memory will be arch/arm/boot/xipImage.
1513 config XIP_PHYS_ADDR
1514 hex "XIP Kernel Physical Location"
1515 depends on XIP_KERNEL
1516 default "0x00080000"
1518 This is the physical address in your flash memory the kernel will
1519 be linked for and stored to. This address is dependent on your
1523 bool "Kexec system call (EXPERIMENTAL)"
1524 depends on EXPERIMENTAL
1526 kexec is a system call that implements the ability to shutdown your
1527 current kernel, and to start another kernel. It is like a reboot
1528 but it is independent of the system firmware. And like a reboot
1529 you can start any kernel with it, not just Linux.
1531 It is an ongoing process to be certain the hardware in a machine
1532 is properly shutdown, so do not be surprised if this code does not
1533 initially work for you. It may help to enable device hotplugging
1537 bool "Export atags in procfs"
1541 Should the atags used to boot the kernel be exported in an "atags"
1542 file in procfs. Useful with kexec.
1544 config AUTO_ZRELADDR
1545 bool "Auto calculation of the decompressed kernel image address"
1546 depends on !ZBOOT_ROM && !ARCH_U300
1548 ZRELADDR is the physical address where the decompressed kernel
1549 image will be placed. If AUTO_ZRELADDR is selected, the address
1550 will be determined at run-time by masking the current IP with
1551 0xf8000000. This assumes the zImage being placed in the first 128MB
1552 from start of memory.
1555 hex "Physical address of the decompressed kernel image"
1556 depends on !AUTO_ZRELADDR
1557 default 0x00008000 if ARCH_BCMRING ||\
1582 default 0x08008000 if ARCH_MX1 ||\
1584 default 0x10008000 if ARCH_MSM ||\
1587 default 0x20008000 if ARCH_S5P6440 ||\
1591 default 0x30008000 if ARCH_S3C2410 ||\
1597 default 0x40008000 if ARCH_STMP378X ||\
1601 default 0x50008000 if ARCH_S3C64XX ||\
1603 default 0x60008000 if ARCH_VEXPRESS
1604 default 0x80008000 if ARCH_MX25 ||\
1609 default 0x90008000 if ARCH_MX5 ||\
1611 default 0xa0008000 if ARCH_IOP32X ||\
1614 default 0xc0008000 if ARCH_LH7A40X ||\
1616 default 0xf0008000 if ARCH_AAEC2000 ||\
1618 default 0xc0028000 if ARCH_CLPS711X
1619 default 0x70008000 if ARCH_AT91 && (ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1620 default 0x20008000 if ARCH_AT91 && !(ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1621 default 0xc0008000 if ARCH_DAVINCI && ARCH_DAVINCI_DA8XX
1622 default 0x80008000 if ARCH_DAVINCI && !ARCH_DAVINCI_DA8XX
1623 default 0x00008000 if ARCH_EP93XX && EP93XX_SDCE3_SYNC_PHYS_OFFSET
1624 default 0xc0008000 if ARCH_EP93XX && EP93XX_SDCE0_PHYS_OFFSET
1625 default 0xd0008000 if ARCH_EP93XX && EP93XX_SDCE1_PHYS_OFFSET
1626 default 0xe0008000 if ARCH_EP93XX && EP93XX_SDCE2_PHYS_OFFSET
1627 default 0xf0008000 if ARCH_EP93XX && EP93XX_SDCE3_ASYNC_PHYS_OFFSET
1628 default 0x00008000 if ARCH_GEMINI && GEMINI_MEM_SWAP
1629 default 0x10008000 if ARCH_GEMINI && !GEMINI_MEM_SWAP
1630 default 0x70008000 if ARCH_REALVIEW && REALVIEW_HIGH_PHYS_OFFSET
1631 default 0x00008000 if ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET
1632 default 0xc0208000 if ARCH_SA1100 && SA1111
1633 default 0xc0008000 if ARCH_SA1100 && !SA1111
1634 default 0x30108000 if ARCH_S3C2410 && PM_H1940
1635 default 0x28E08000 if ARCH_U300 && MACH_U300_SINGLE_RAM
1636 default 0x48008000 if ARCH_U300 && !MACH_U300_SINGLE_RAM
1638 ZRELADDR is the physical address where the decompressed kernel
1639 image will be placed. ZRELADDR has to be specified when the
1640 assumption of AUTO_ZRELADDR is not valid, or when ZBOOT_ROM is
1645 menu "CPU Power Management"
1649 source "drivers/cpufreq/Kconfig"
1651 config CPU_FREQ_SA1100
1654 config CPU_FREQ_SA1110
1657 config CPU_FREQ_INTEGRATOR
1658 tristate "CPUfreq driver for ARM Integrator CPUs"
1659 depends on ARCH_INTEGRATOR && CPU_FREQ
1662 This enables the CPUfreq driver for ARM Integrator CPUs.
1664 For details, take a look at <file:Documentation/cpu-freq>.
1670 depends on CPU_FREQ && ARCH_PXA && PXA25x
1672 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1674 config CPU_FREQ_S3C64XX
1675 bool "CPUfreq support for Samsung S3C64XX CPUs"
1676 depends on CPU_FREQ && CPU_S3C6410
1681 Internal configuration node for common cpufreq on Samsung SoC
1683 config CPU_FREQ_S3C24XX
1684 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1685 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1688 This enables the CPUfreq driver for the Samsung S3C24XX family
1691 For details, take a look at <file:Documentation/cpu-freq>.
1695 config CPU_FREQ_S3C24XX_PLL
1696 bool "Support CPUfreq changing of PLL frequency"
1697 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1699 Compile in support for changing the PLL frequency from the
1700 S3C24XX series CPUfreq driver. The PLL takes time to settle
1701 after a frequency change, so by default it is not enabled.
1703 This also means that the PLL tables for the selected CPU(s) will
1704 be built which may increase the size of the kernel image.
1706 config CPU_FREQ_S3C24XX_DEBUG
1707 bool "Debug CPUfreq Samsung driver core"
1708 depends on CPU_FREQ_S3C24XX
1710 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1712 config CPU_FREQ_S3C24XX_IODEBUG
1713 bool "Debug CPUfreq Samsung driver IO timing"
1714 depends on CPU_FREQ_S3C24XX
1716 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1718 config CPU_FREQ_S3C24XX_DEBUGFS
1719 bool "Export debugfs for CPUFreq"
1720 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1722 Export status information via debugfs.
1726 source "drivers/cpuidle/Kconfig"
1730 menu "Floating point emulation"
1732 comment "At least one emulation must be selected"
1735 bool "NWFPE math emulation"
1736 depends on !AEABI || OABI_COMPAT
1738 Say Y to include the NWFPE floating point emulator in the kernel.
1739 This is necessary to run most binaries. Linux does not currently
1740 support floating point hardware so you need to say Y here even if
1741 your machine has an FPA or floating point co-processor podule.
1743 You may say N here if you are going to load the Acorn FPEmulator
1744 early in the bootup.
1747 bool "Support extended precision"
1748 depends on FPE_NWFPE
1750 Say Y to include 80-bit support in the kernel floating-point
1751 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1752 Note that gcc does not generate 80-bit operations by default,
1753 so in most cases this option only enlarges the size of the
1754 floating point emulator without any good reason.
1756 You almost surely want to say N here.
1759 bool "FastFPE math emulation (EXPERIMENTAL)"
1760 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1762 Say Y here to include the FAST floating point emulator in the kernel.
1763 This is an experimental much faster emulator which now also has full
1764 precision for the mantissa. It does not support any exceptions.
1765 It is very simple, and approximately 3-6 times faster than NWFPE.
1767 It should be sufficient for most programs. It may be not suitable
1768 for scientific calculations, but you have to check this for yourself.
1769 If you do not feel you need a faster FP emulation you should better
1773 bool "VFP-format floating point maths"
1774 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1776 Say Y to include VFP support code in the kernel. This is needed
1777 if your hardware includes a VFP unit.
1779 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1780 release notes and additional status information.
1782 Say N if your target does not have VFP hardware.
1790 bool "Advanced SIMD (NEON) Extension support"
1791 depends on VFPv3 && CPU_V7
1793 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1798 menu "Userspace binary formats"
1800 source "fs/Kconfig.binfmt"
1803 tristate "RISC OS personality"
1806 Say Y here to include the kernel code necessary if you want to run
1807 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1808 experimental; if this sounds frightening, say N and sleep in peace.
1809 You can also say M here to compile this support as a module (which
1810 will be called arthur).
1814 menu "Power management options"
1816 source "kernel/power/Kconfig"
1818 config ARCH_SUSPEND_POSSIBLE
1823 source "net/Kconfig"
1825 source "drivers/Kconfig"
1829 source "arch/arm/Kconfig.debug"
1831 source "security/Kconfig"
1833 source "crypto/Kconfig"
1835 source "lib/Kconfig"