Merge branch 'bugfixes' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if !XIP_KERNEL
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
32 help
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
39
40 config ARM_HAS_SG_CHAIN
41 bool
42
43 config HAVE_PWM
44 bool
45
46 config MIGHT_HAVE_PCI
47 bool
48
49 config SYS_SUPPORTS_APM_EMULATION
50 bool
51
52 config HAVE_SCHED_CLOCK
53 bool
54
55 config GENERIC_GPIO
56 bool
57
58 config ARCH_USES_GETTIMEOFFSET
59 bool
60 default n
61
62 config GENERIC_CLOCKEVENTS
63 bool
64
65 config GENERIC_CLOCKEVENTS_BROADCAST
66 bool
67 depends on GENERIC_CLOCKEVENTS
68 default y if SMP
69
70 config KTIME_SCALAR
71 bool
72 default y
73
74 config HAVE_TCM
75 bool
76 select GENERIC_ALLOCATOR
77
78 config HAVE_PROC_CPU
79 bool
80
81 config NO_IOPORT
82 bool
83
84 config EISA
85 bool
86 ---help---
87 The Extended Industry Standard Architecture (EISA) bus was
88 developed as an open alternative to the IBM MicroChannel bus.
89
90 The EISA bus provided some of the features of the IBM MicroChannel
91 bus while maintaining backward compatibility with cards made for
92 the older ISA bus. The EISA bus saw limited use between 1988 and
93 1995 when it was made obsolete by the PCI bus.
94
95 Say Y here if you are building a kernel for an EISA-based machine.
96
97 Otherwise, say N.
98
99 config SBUS
100 bool
101
102 config MCA
103 bool
104 help
105 MicroChannel Architecture is found in some IBM PS/2 machines and
106 laptops. It is a bus system similar to PCI or ISA. See
107 <file:Documentation/mca.txt> (and especially the web page given
108 there) before attempting to build an MCA bus kernel.
109
110 config STACKTRACE_SUPPORT
111 bool
112 default y
113
114 config HAVE_LATENCYTOP_SUPPORT
115 bool
116 depends on !SMP
117 default y
118
119 config LOCKDEP_SUPPORT
120 bool
121 default y
122
123 config TRACE_IRQFLAGS_SUPPORT
124 bool
125 default y
126
127 config HARDIRQS_SW_RESEND
128 bool
129 default y
130
131 config GENERIC_IRQ_PROBE
132 bool
133 default y
134
135 config GENERIC_LOCKBREAK
136 bool
137 default y
138 depends on SMP && PREEMPT
139
140 config RWSEM_GENERIC_SPINLOCK
141 bool
142 default y
143
144 config RWSEM_XCHGADD_ALGORITHM
145 bool
146
147 config ARCH_HAS_ILOG2_U32
148 bool
149
150 config ARCH_HAS_ILOG2_U64
151 bool
152
153 config ARCH_HAS_CPUFREQ
154 bool
155 help
156 Internal node to signify that the ARCH has CPUFREQ support
157 and that the relevant menu configurations are displayed for
158 it.
159
160 config ARCH_HAS_CPU_IDLE_WAIT
161 def_bool y
162
163 config GENERIC_HWEIGHT
164 bool
165 default y
166
167 config GENERIC_CALIBRATE_DELAY
168 bool
169 default y
170
171 config ARCH_MAY_HAVE_PC_FDC
172 bool
173
174 config ZONE_DMA
175 bool
176
177 config NEED_DMA_MAP_STATE
178 def_bool y
179
180 config GENERIC_ISA_DMA
181 bool
182
183 config FIQ
184 bool
185
186 config ARCH_MTD_XIP
187 bool
188
189 config VECTORS_BASE
190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197 config ARM_PATCH_PHYS_VIRT
198 bool "Patch physical to virtual translations at runtime"
199 depends on !XIP_KERNEL && MMU
200 depends on !ARCH_REALVIEW || !SPARSEMEM
201 help
202 Patch phys-to-virt and virt-to-phys translation functions at
203 boot and module load time according to the position of the
204 kernel in system memory.
205
206 This can only be used with non-XIP MMU kernels where the base
207 of physical memory is at a 16MB boundary, or theoretically 64K
208 for the MSM machine class.
209
210 config ARM_PATCH_PHYS_VIRT_16BIT
211 def_bool y
212 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
213 help
214 This option extends the physical to virtual translation patching
215 to allow physical memory down to a theoretical minimum of 64K
216 boundaries.
217
218 source "init/Kconfig"
219
220 source "kernel/Kconfig.freezer"
221
222 menu "System Type"
223
224 config MMU
225 bool "MMU-based Paged Memory Management Support"
226 default y
227 help
228 Select if you want MMU-based virtualised addressing space
229 support by paged memory management. If unsure, say 'Y'.
230
231 #
232 # The "ARM system type" choice list is ordered alphabetically by option
233 # text. Please add new entries in the option alphabetic order.
234 #
235 choice
236 prompt "ARM system type"
237 default ARCH_VERSATILE
238
239 config ARCH_INTEGRATOR
240 bool "ARM Ltd. Integrator family"
241 select ARM_AMBA
242 select ARCH_HAS_CPUFREQ
243 select CLKDEV_LOOKUP
244 select HAVE_MACH_CLKDEV
245 select ICST
246 select GENERIC_CLOCKEVENTS
247 select PLAT_VERSATILE
248 select PLAT_VERSATILE_FPGA_IRQ
249 help
250 Support for ARM's Integrator platform.
251
252 config ARCH_REALVIEW
253 bool "ARM Ltd. RealView family"
254 select ARM_AMBA
255 select CLKDEV_LOOKUP
256 select HAVE_MACH_CLKDEV
257 select ICST
258 select GENERIC_CLOCKEVENTS
259 select ARCH_WANT_OPTIONAL_GPIOLIB
260 select PLAT_VERSATILE
261 select PLAT_VERSATILE_CLCD
262 select ARM_TIMER_SP804
263 select GPIO_PL061 if GPIOLIB
264 help
265 This enables support for ARM Ltd RealView boards.
266
267 config ARCH_VERSATILE
268 bool "ARM Ltd. Versatile family"
269 select ARM_AMBA
270 select ARM_VIC
271 select CLKDEV_LOOKUP
272 select HAVE_MACH_CLKDEV
273 select ICST
274 select GENERIC_CLOCKEVENTS
275 select ARCH_WANT_OPTIONAL_GPIOLIB
276 select PLAT_VERSATILE
277 select PLAT_VERSATILE_CLCD
278 select PLAT_VERSATILE_FPGA_IRQ
279 select ARM_TIMER_SP804
280 help
281 This enables support for ARM Ltd Versatile board.
282
283 config ARCH_VEXPRESS
284 bool "ARM Ltd. Versatile Express family"
285 select ARCH_WANT_OPTIONAL_GPIOLIB
286 select ARM_AMBA
287 select ARM_TIMER_SP804
288 select CLKDEV_LOOKUP
289 select HAVE_MACH_CLKDEV
290 select GENERIC_CLOCKEVENTS
291 select HAVE_CLK
292 select HAVE_PATA_PLATFORM
293 select ICST
294 select PLAT_VERSATILE
295 select PLAT_VERSATILE_CLCD
296 help
297 This enables support for the ARM Ltd Versatile Express boards.
298
299 config ARCH_AT91
300 bool "Atmel AT91"
301 select ARCH_REQUIRE_GPIOLIB
302 select HAVE_CLK
303 select CLKDEV_LOOKUP
304 select ARM_PATCH_PHYS_VIRT if MMU
305 help
306 This enables support for systems based on the Atmel AT91RM9200,
307 AT91SAM9 and AT91CAP9 processors.
308
309 config ARCH_BCMRING
310 bool "Broadcom BCMRING"
311 depends on MMU
312 select CPU_V6
313 select ARM_AMBA
314 select ARM_TIMER_SP804
315 select CLKDEV_LOOKUP
316 select GENERIC_CLOCKEVENTS
317 select ARCH_WANT_OPTIONAL_GPIOLIB
318 help
319 Support for Broadcom's BCMRing platform.
320
321 config ARCH_CLPS711X
322 bool "Cirrus Logic CLPS711x/EP721x-based"
323 select CPU_ARM720T
324 select ARCH_USES_GETTIMEOFFSET
325 help
326 Support for Cirrus Logic 711x/721x based boards.
327
328 config ARCH_CNS3XXX
329 bool "Cavium Networks CNS3XXX family"
330 select CPU_V6K
331 select GENERIC_CLOCKEVENTS
332 select ARM_GIC
333 select MIGHT_HAVE_PCI
334 select PCI_DOMAINS if PCI
335 help
336 Support for Cavium Networks CNS3XXX platform.
337
338 config ARCH_GEMINI
339 bool "Cortina Systems Gemini"
340 select CPU_FA526
341 select ARCH_REQUIRE_GPIOLIB
342 select ARCH_USES_GETTIMEOFFSET
343 help
344 Support for the Cortina Systems Gemini family SoCs
345
346 config ARCH_PRIMA2
347 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
348 select CPU_V7
349 select GENERIC_TIME
350 select NO_IOPORT
351 select GENERIC_CLOCKEVENTS
352 select CLKDEV_LOOKUP
353 select GENERIC_IRQ_CHIP
354 select USE_OF
355 select ZONE_DMA
356 help
357 Support for CSR SiRFSoC ARM Cortex A9 Platform
358
359 config ARCH_EBSA110
360 bool "EBSA-110"
361 select CPU_SA110
362 select ISA
363 select NO_IOPORT
364 select ARCH_USES_GETTIMEOFFSET
365 help
366 This is an evaluation board for the StrongARM processor available
367 from Digital. It has limited hardware on-board, including an
368 Ethernet interface, two PCMCIA sockets, two serial ports and a
369 parallel port.
370
371 config ARCH_EP93XX
372 bool "EP93xx-based"
373 select CPU_ARM920T
374 select ARM_AMBA
375 select ARM_VIC
376 select CLKDEV_LOOKUP
377 select ARCH_REQUIRE_GPIOLIB
378 select ARCH_HAS_HOLES_MEMORYMODEL
379 select ARCH_USES_GETTIMEOFFSET
380 help
381 This enables support for the Cirrus EP93xx series of CPUs.
382
383 config ARCH_FOOTBRIDGE
384 bool "FootBridge"
385 select CPU_SA110
386 select FOOTBRIDGE
387 select GENERIC_CLOCKEVENTS
388 help
389 Support for systems based on the DC21285 companion chip
390 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
391
392 config ARCH_MXC
393 bool "Freescale MXC/iMX-based"
394 select GENERIC_CLOCKEVENTS
395 select ARCH_REQUIRE_GPIOLIB
396 select CLKDEV_LOOKUP
397 select CLKSRC_MMIO
398 select GENERIC_IRQ_CHIP
399 select HAVE_SCHED_CLOCK
400 help
401 Support for Freescale MXC/iMX-based family of processors
402
403 config ARCH_MXS
404 bool "Freescale MXS-based"
405 select GENERIC_CLOCKEVENTS
406 select ARCH_REQUIRE_GPIOLIB
407 select CLKDEV_LOOKUP
408 select CLKSRC_MMIO
409 help
410 Support for Freescale MXS-based family of processors
411
412 config ARCH_NETX
413 bool "Hilscher NetX based"
414 select CLKSRC_MMIO
415 select CPU_ARM926T
416 select ARM_VIC
417 select GENERIC_CLOCKEVENTS
418 help
419 This enables support for systems based on the Hilscher NetX Soc
420
421 config ARCH_H720X
422 bool "Hynix HMS720x-based"
423 select CPU_ARM720T
424 select ISA_DMA_API
425 select ARCH_USES_GETTIMEOFFSET
426 help
427 This enables support for systems based on the Hynix HMS720x
428
429 config ARCH_IOP13XX
430 bool "IOP13xx-based"
431 depends on MMU
432 select CPU_XSC3
433 select PLAT_IOP
434 select PCI
435 select ARCH_SUPPORTS_MSI
436 select VMSPLIT_1G
437 help
438 Support for Intel's IOP13XX (XScale) family of processors.
439
440 config ARCH_IOP32X
441 bool "IOP32x-based"
442 depends on MMU
443 select CPU_XSCALE
444 select PLAT_IOP
445 select PCI
446 select ARCH_REQUIRE_GPIOLIB
447 help
448 Support for Intel's 80219 and IOP32X (XScale) family of
449 processors.
450
451 config ARCH_IOP33X
452 bool "IOP33x-based"
453 depends on MMU
454 select CPU_XSCALE
455 select PLAT_IOP
456 select PCI
457 select ARCH_REQUIRE_GPIOLIB
458 help
459 Support for Intel's IOP33X (XScale) family of processors.
460
461 config ARCH_IXP23XX
462 bool "IXP23XX-based"
463 depends on MMU
464 select CPU_XSC3
465 select PCI
466 select ARCH_USES_GETTIMEOFFSET
467 help
468 Support for Intel's IXP23xx (XScale) family of processors.
469
470 config ARCH_IXP2000
471 bool "IXP2400/2800-based"
472 depends on MMU
473 select CPU_XSCALE
474 select PCI
475 select ARCH_USES_GETTIMEOFFSET
476 help
477 Support for Intel's IXP2400/2800 (XScale) family of processors.
478
479 config ARCH_IXP4XX
480 bool "IXP4xx-based"
481 depends on MMU
482 select CLKSRC_MMIO
483 select CPU_XSCALE
484 select GENERIC_GPIO
485 select GENERIC_CLOCKEVENTS
486 select HAVE_SCHED_CLOCK
487 select MIGHT_HAVE_PCI
488 select DMABOUNCE if PCI
489 help
490 Support for Intel's IXP4XX (XScale) family of processors.
491
492 config ARCH_DOVE
493 bool "Marvell Dove"
494 select CPU_V7
495 select PCI
496 select ARCH_REQUIRE_GPIOLIB
497 select GENERIC_CLOCKEVENTS
498 select PLAT_ORION
499 help
500 Support for the Marvell Dove SoC 88AP510
501
502 config ARCH_KIRKWOOD
503 bool "Marvell Kirkwood"
504 select CPU_FEROCEON
505 select PCI
506 select ARCH_REQUIRE_GPIOLIB
507 select GENERIC_CLOCKEVENTS
508 select PLAT_ORION
509 help
510 Support for the following Marvell Kirkwood series SoCs:
511 88F6180, 88F6192 and 88F6281.
512
513 config ARCH_LPC32XX
514 bool "NXP LPC32XX"
515 select CLKSRC_MMIO
516 select CPU_ARM926T
517 select ARCH_REQUIRE_GPIOLIB
518 select HAVE_IDE
519 select ARM_AMBA
520 select USB_ARCH_HAS_OHCI
521 select CLKDEV_LOOKUP
522 select GENERIC_TIME
523 select GENERIC_CLOCKEVENTS
524 help
525 Support for the NXP LPC32XX family of processors
526
527 config ARCH_MV78XX0
528 bool "Marvell MV78xx0"
529 select CPU_FEROCEON
530 select PCI
531 select ARCH_REQUIRE_GPIOLIB
532 select GENERIC_CLOCKEVENTS
533 select PLAT_ORION
534 help
535 Support for the following Marvell MV78xx0 series SoCs:
536 MV781x0, MV782x0.
537
538 config ARCH_ORION5X
539 bool "Marvell Orion"
540 depends on MMU
541 select CPU_FEROCEON
542 select PCI
543 select ARCH_REQUIRE_GPIOLIB
544 select GENERIC_CLOCKEVENTS
545 select PLAT_ORION
546 help
547 Support for the following Marvell Orion 5x series SoCs:
548 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
549 Orion-2 (5281), Orion-1-90 (6183).
550
551 config ARCH_MMP
552 bool "Marvell PXA168/910/MMP2"
553 depends on MMU
554 select ARCH_REQUIRE_GPIOLIB
555 select CLKDEV_LOOKUP
556 select GENERIC_CLOCKEVENTS
557 select HAVE_SCHED_CLOCK
558 select TICK_ONESHOT
559 select PLAT_PXA
560 select SPARSE_IRQ
561 help
562 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
563
564 config ARCH_KS8695
565 bool "Micrel/Kendin KS8695"
566 select CPU_ARM922T
567 select ARCH_REQUIRE_GPIOLIB
568 select ARCH_USES_GETTIMEOFFSET
569 help
570 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
571 System-on-Chip devices.
572
573 config ARCH_W90X900
574 bool "Nuvoton W90X900 CPU"
575 select CPU_ARM926T
576 select ARCH_REQUIRE_GPIOLIB
577 select CLKDEV_LOOKUP
578 select CLKSRC_MMIO
579 select GENERIC_CLOCKEVENTS
580 help
581 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
582 At present, the w90x900 has been renamed nuc900, regarding
583 the ARM series product line, you can login the following
584 link address to know more.
585
586 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
587 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
588
589 config ARCH_NUC93X
590 bool "Nuvoton NUC93X CPU"
591 select CPU_ARM926T
592 select CLKDEV_LOOKUP
593 help
594 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
595 low-power and high performance MPEG-4/JPEG multimedia controller chip.
596
597 config ARCH_TEGRA
598 bool "NVIDIA Tegra"
599 select CLKDEV_LOOKUP
600 select CLKSRC_MMIO
601 select GENERIC_TIME
602 select GENERIC_CLOCKEVENTS
603 select GENERIC_GPIO
604 select HAVE_CLK
605 select HAVE_SCHED_CLOCK
606 select ARCH_HAS_CPUFREQ
607 help
608 This enables support for NVIDIA Tegra based systems (Tegra APX,
609 Tegra 6xx and Tegra 2 series).
610
611 config ARCH_PNX4008
612 bool "Philips Nexperia PNX4008 Mobile"
613 select CPU_ARM926T
614 select CLKDEV_LOOKUP
615 select ARCH_USES_GETTIMEOFFSET
616 help
617 This enables support for Philips PNX4008 mobile platform.
618
619 config ARCH_PXA
620 bool "PXA2xx/PXA3xx-based"
621 depends on MMU
622 select ARCH_MTD_XIP
623 select ARCH_HAS_CPUFREQ
624 select CLKDEV_LOOKUP
625 select CLKSRC_MMIO
626 select ARCH_REQUIRE_GPIOLIB
627 select GENERIC_CLOCKEVENTS
628 select HAVE_SCHED_CLOCK
629 select TICK_ONESHOT
630 select PLAT_PXA
631 select SPARSE_IRQ
632 select AUTO_ZRELADDR
633 select MULTI_IRQ_HANDLER
634 help
635 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
636
637 config ARCH_MSM
638 bool "Qualcomm MSM"
639 select HAVE_CLK
640 select GENERIC_CLOCKEVENTS
641 select ARCH_REQUIRE_GPIOLIB
642 select CLKDEV_LOOKUP
643 help
644 Support for Qualcomm MSM/QSD based systems. This runs on the
645 apps processor of the MSM/QSD and depends on a shared memory
646 interface to the modem processor which runs the baseband
647 stack and controls some vital subsystems
648 (clock and power control, etc).
649
650 config ARCH_SHMOBILE
651 bool "Renesas SH-Mobile / R-Mobile"
652 select HAVE_CLK
653 select CLKDEV_LOOKUP
654 select HAVE_MACH_CLKDEV
655 select GENERIC_CLOCKEVENTS
656 select NO_IOPORT
657 select SPARSE_IRQ
658 select MULTI_IRQ_HANDLER
659 select PM_GENERIC_DOMAINS if PM
660 help
661 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
662
663 config ARCH_RPC
664 bool "RiscPC"
665 select ARCH_ACORN
666 select FIQ
667 select TIMER_ACORN
668 select ARCH_MAY_HAVE_PC_FDC
669 select HAVE_PATA_PLATFORM
670 select ISA_DMA_API
671 select NO_IOPORT
672 select ARCH_SPARSEMEM_ENABLE
673 select ARCH_USES_GETTIMEOFFSET
674 help
675 On the Acorn Risc-PC, Linux can support the internal IDE disk and
676 CD-ROM interface, serial and parallel port, and the floppy drive.
677
678 config ARCH_SA1100
679 bool "SA1100-based"
680 select CLKSRC_MMIO
681 select CPU_SA1100
682 select ISA
683 select ARCH_SPARSEMEM_ENABLE
684 select ARCH_MTD_XIP
685 select ARCH_HAS_CPUFREQ
686 select CPU_FREQ
687 select GENERIC_CLOCKEVENTS
688 select HAVE_CLK
689 select HAVE_SCHED_CLOCK
690 select TICK_ONESHOT
691 select ARCH_REQUIRE_GPIOLIB
692 help
693 Support for StrongARM 11x0 based boards.
694
695 config ARCH_S3C2410
696 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
697 select GENERIC_GPIO
698 select ARCH_HAS_CPUFREQ
699 select HAVE_CLK
700 select CLKDEV_LOOKUP
701 select ARCH_USES_GETTIMEOFFSET
702 select HAVE_S3C2410_I2C if I2C
703 help
704 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
705 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
706 the Samsung SMDK2410 development board (and derivatives).
707
708 Note, the S3C2416 and the S3C2450 are so close that they even share
709 the same SoC ID code. This means that there is no separate machine
710 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
711
712 config ARCH_S3C64XX
713 bool "Samsung S3C64XX"
714 select PLAT_SAMSUNG
715 select CPU_V6
716 select ARM_VIC
717 select HAVE_CLK
718 select CLKDEV_LOOKUP
719 select NO_IOPORT
720 select ARCH_USES_GETTIMEOFFSET
721 select ARCH_HAS_CPUFREQ
722 select ARCH_REQUIRE_GPIOLIB
723 select SAMSUNG_CLKSRC
724 select SAMSUNG_IRQ_VIC_TIMER
725 select SAMSUNG_IRQ_UART
726 select S3C_GPIO_TRACK
727 select S3C_GPIO_PULL_UPDOWN
728 select S3C_GPIO_CFG_S3C24XX
729 select S3C_GPIO_CFG_S3C64XX
730 select S3C_DEV_NAND
731 select USB_ARCH_HAS_OHCI
732 select SAMSUNG_GPIOLIB_4BIT
733 select HAVE_S3C2410_I2C if I2C
734 select HAVE_S3C2410_WATCHDOG if WATCHDOG
735 help
736 Samsung S3C64XX series based systems
737
738 config ARCH_S5P64X0
739 bool "Samsung S5P6440 S5P6450"
740 select CPU_V6
741 select GENERIC_GPIO
742 select HAVE_CLK
743 select CLKDEV_LOOKUP
744 select CLKSRC_MMIO
745 select HAVE_S3C2410_WATCHDOG if WATCHDOG
746 select GENERIC_CLOCKEVENTS
747 select HAVE_SCHED_CLOCK
748 select HAVE_S3C2410_I2C if I2C
749 select HAVE_S3C_RTC if RTC_CLASS
750 help
751 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
752 SMDK6450.
753
754 config ARCH_S5PC100
755 bool "Samsung S5PC100"
756 select GENERIC_GPIO
757 select HAVE_CLK
758 select CLKDEV_LOOKUP
759 select CPU_V7
760 select ARM_L1_CACHE_SHIFT_6
761 select ARCH_USES_GETTIMEOFFSET
762 select HAVE_S3C2410_I2C if I2C
763 select HAVE_S3C_RTC if RTC_CLASS
764 select HAVE_S3C2410_WATCHDOG if WATCHDOG
765 help
766 Samsung S5PC100 series based systems
767
768 config ARCH_S5PV210
769 bool "Samsung S5PV210/S5PC110"
770 select CPU_V7
771 select ARCH_SPARSEMEM_ENABLE
772 select ARCH_HAS_HOLES_MEMORYMODEL
773 select GENERIC_GPIO
774 select HAVE_CLK
775 select CLKDEV_LOOKUP
776 select CLKSRC_MMIO
777 select ARM_L1_CACHE_SHIFT_6
778 select ARCH_HAS_CPUFREQ
779 select GENERIC_CLOCKEVENTS
780 select HAVE_SCHED_CLOCK
781 select HAVE_S3C2410_I2C if I2C
782 select HAVE_S3C_RTC if RTC_CLASS
783 select HAVE_S3C2410_WATCHDOG if WATCHDOG
784 help
785 Samsung S5PV210/S5PC110 series based systems
786
787 config ARCH_EXYNOS4
788 bool "Samsung EXYNOS4"
789 select CPU_V7
790 select ARCH_SPARSEMEM_ENABLE
791 select ARCH_HAS_HOLES_MEMORYMODEL
792 select GENERIC_GPIO
793 select HAVE_CLK
794 select CLKDEV_LOOKUP
795 select ARCH_HAS_CPUFREQ
796 select GENERIC_CLOCKEVENTS
797 select HAVE_S3C_RTC if RTC_CLASS
798 select HAVE_S3C2410_I2C if I2C
799 select HAVE_S3C2410_WATCHDOG if WATCHDOG
800 help
801 Samsung EXYNOS4 series based systems
802
803 config ARCH_SHARK
804 bool "Shark"
805 select CPU_SA110
806 select ISA
807 select ISA_DMA
808 select ZONE_DMA
809 select PCI
810 select ARCH_USES_GETTIMEOFFSET
811 help
812 Support for the StrongARM based Digital DNARD machine, also known
813 as "Shark" (<http://www.shark-linux.de/shark.html>).
814
815 config ARCH_TCC_926
816 bool "Telechips TCC ARM926-based systems"
817 select CLKSRC_MMIO
818 select CPU_ARM926T
819 select HAVE_CLK
820 select CLKDEV_LOOKUP
821 select GENERIC_CLOCKEVENTS
822 help
823 Support for Telechips TCC ARM926-based systems.
824
825 config ARCH_U300
826 bool "ST-Ericsson U300 Series"
827 depends on MMU
828 select CLKSRC_MMIO
829 select CPU_ARM926T
830 select HAVE_SCHED_CLOCK
831 select HAVE_TCM
832 select ARM_AMBA
833 select ARM_VIC
834 select GENERIC_CLOCKEVENTS
835 select CLKDEV_LOOKUP
836 select HAVE_MACH_CLKDEV
837 select GENERIC_GPIO
838 help
839 Support for ST-Ericsson U300 series mobile platforms.
840
841 config ARCH_U8500
842 bool "ST-Ericsson U8500 Series"
843 select CPU_V7
844 select ARM_AMBA
845 select GENERIC_CLOCKEVENTS
846 select CLKDEV_LOOKUP
847 select ARCH_REQUIRE_GPIOLIB
848 select ARCH_HAS_CPUFREQ
849 help
850 Support for ST-Ericsson's Ux500 architecture
851
852 config ARCH_NOMADIK
853 bool "STMicroelectronics Nomadik"
854 select ARM_AMBA
855 select ARM_VIC
856 select CPU_ARM926T
857 select CLKDEV_LOOKUP
858 select GENERIC_CLOCKEVENTS
859 select ARCH_REQUIRE_GPIOLIB
860 help
861 Support for the Nomadik platform by ST-Ericsson
862
863 config ARCH_DAVINCI
864 bool "TI DaVinci"
865 select GENERIC_CLOCKEVENTS
866 select ARCH_REQUIRE_GPIOLIB
867 select ZONE_DMA
868 select HAVE_IDE
869 select CLKDEV_LOOKUP
870 select GENERIC_ALLOCATOR
871 select GENERIC_IRQ_CHIP
872 select ARCH_HAS_HOLES_MEMORYMODEL
873 help
874 Support for TI's DaVinci platform.
875
876 config ARCH_OMAP
877 bool "TI OMAP"
878 select HAVE_CLK
879 select ARCH_REQUIRE_GPIOLIB
880 select ARCH_HAS_CPUFREQ
881 select CLKSRC_MMIO
882 select GENERIC_CLOCKEVENTS
883 select HAVE_SCHED_CLOCK
884 select ARCH_HAS_HOLES_MEMORYMODEL
885 help
886 Support for TI's OMAP platform (OMAP1/2/3/4).
887
888 config PLAT_SPEAR
889 bool "ST SPEAr"
890 select ARM_AMBA
891 select ARCH_REQUIRE_GPIOLIB
892 select CLKDEV_LOOKUP
893 select CLKSRC_MMIO
894 select GENERIC_CLOCKEVENTS
895 select HAVE_CLK
896 help
897 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
898
899 config ARCH_VT8500
900 bool "VIA/WonderMedia 85xx"
901 select CPU_ARM926T
902 select GENERIC_GPIO
903 select ARCH_HAS_CPUFREQ
904 select GENERIC_CLOCKEVENTS
905 select ARCH_REQUIRE_GPIOLIB
906 select HAVE_PWM
907 help
908 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
909
910 config ARCH_ZYNQ
911 bool "Xilinx Zynq ARM Cortex A9 Platform"
912 select CPU_V7
913 select GENERIC_TIME
914 select GENERIC_CLOCKEVENTS
915 select CLKDEV_LOOKUP
916 select ARM_GIC
917 select ARM_AMBA
918 select ICST
919 select USE_OF
920 help
921 Support for Xilinx Zynq ARM Cortex A9 Platform
922 endchoice
923
924 #
925 # This is sorted alphabetically by mach-* pathname. However, plat-*
926 # Kconfigs may be included either alphabetically (according to the
927 # plat- suffix) or along side the corresponding mach-* source.
928 #
929 source "arch/arm/mach-at91/Kconfig"
930
931 source "arch/arm/mach-bcmring/Kconfig"
932
933 source "arch/arm/mach-clps711x/Kconfig"
934
935 source "arch/arm/mach-cns3xxx/Kconfig"
936
937 source "arch/arm/mach-davinci/Kconfig"
938
939 source "arch/arm/mach-dove/Kconfig"
940
941 source "arch/arm/mach-ep93xx/Kconfig"
942
943 source "arch/arm/mach-footbridge/Kconfig"
944
945 source "arch/arm/mach-gemini/Kconfig"
946
947 source "arch/arm/mach-h720x/Kconfig"
948
949 source "arch/arm/mach-integrator/Kconfig"
950
951 source "arch/arm/mach-iop32x/Kconfig"
952
953 source "arch/arm/mach-iop33x/Kconfig"
954
955 source "arch/arm/mach-iop13xx/Kconfig"
956
957 source "arch/arm/mach-ixp4xx/Kconfig"
958
959 source "arch/arm/mach-ixp2000/Kconfig"
960
961 source "arch/arm/mach-ixp23xx/Kconfig"
962
963 source "arch/arm/mach-kirkwood/Kconfig"
964
965 source "arch/arm/mach-ks8695/Kconfig"
966
967 source "arch/arm/mach-lpc32xx/Kconfig"
968
969 source "arch/arm/mach-msm/Kconfig"
970
971 source "arch/arm/mach-mv78xx0/Kconfig"
972
973 source "arch/arm/plat-mxc/Kconfig"
974
975 source "arch/arm/mach-mxs/Kconfig"
976
977 source "arch/arm/mach-netx/Kconfig"
978
979 source "arch/arm/mach-nomadik/Kconfig"
980 source "arch/arm/plat-nomadik/Kconfig"
981
982 source "arch/arm/mach-nuc93x/Kconfig"
983
984 source "arch/arm/plat-omap/Kconfig"
985
986 source "arch/arm/mach-omap1/Kconfig"
987
988 source "arch/arm/mach-omap2/Kconfig"
989
990 source "arch/arm/mach-orion5x/Kconfig"
991
992 source "arch/arm/mach-pxa/Kconfig"
993 source "arch/arm/plat-pxa/Kconfig"
994
995 source "arch/arm/mach-mmp/Kconfig"
996
997 source "arch/arm/mach-realview/Kconfig"
998
999 source "arch/arm/mach-sa1100/Kconfig"
1000
1001 source "arch/arm/plat-samsung/Kconfig"
1002 source "arch/arm/plat-s3c24xx/Kconfig"
1003 source "arch/arm/plat-s5p/Kconfig"
1004
1005 source "arch/arm/plat-spear/Kconfig"
1006
1007 source "arch/arm/plat-tcc/Kconfig"
1008
1009 if ARCH_S3C2410
1010 source "arch/arm/mach-s3c2410/Kconfig"
1011 source "arch/arm/mach-s3c2412/Kconfig"
1012 source "arch/arm/mach-s3c2416/Kconfig"
1013 source "arch/arm/mach-s3c2440/Kconfig"
1014 source "arch/arm/mach-s3c2443/Kconfig"
1015 endif
1016
1017 if ARCH_S3C64XX
1018 source "arch/arm/mach-s3c64xx/Kconfig"
1019 endif
1020
1021 source "arch/arm/mach-s5p64x0/Kconfig"
1022
1023 source "arch/arm/mach-s5pc100/Kconfig"
1024
1025 source "arch/arm/mach-s5pv210/Kconfig"
1026
1027 source "arch/arm/mach-exynos4/Kconfig"
1028
1029 source "arch/arm/mach-shmobile/Kconfig"
1030
1031 source "arch/arm/mach-tegra/Kconfig"
1032
1033 source "arch/arm/mach-u300/Kconfig"
1034
1035 source "arch/arm/mach-ux500/Kconfig"
1036
1037 source "arch/arm/mach-versatile/Kconfig"
1038
1039 source "arch/arm/mach-vexpress/Kconfig"
1040 source "arch/arm/plat-versatile/Kconfig"
1041
1042 source "arch/arm/mach-vt8500/Kconfig"
1043
1044 source "arch/arm/mach-w90x900/Kconfig"
1045
1046 # Definitions to make life easier
1047 config ARCH_ACORN
1048 bool
1049
1050 config PLAT_IOP
1051 bool
1052 select GENERIC_CLOCKEVENTS
1053 select HAVE_SCHED_CLOCK
1054
1055 config PLAT_ORION
1056 bool
1057 select CLKSRC_MMIO
1058 select GENERIC_IRQ_CHIP
1059 select HAVE_SCHED_CLOCK
1060
1061 config PLAT_PXA
1062 bool
1063
1064 config PLAT_VERSATILE
1065 bool
1066
1067 config ARM_TIMER_SP804
1068 bool
1069 select CLKSRC_MMIO
1070
1071 source arch/arm/mm/Kconfig
1072
1073 config IWMMXT
1074 bool "Enable iWMMXt support"
1075 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1076 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1077 help
1078 Enable support for iWMMXt context switching at run time if
1079 running on a CPU that supports it.
1080
1081 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1082 config XSCALE_PMU
1083 bool
1084 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1085 default y
1086
1087 config CPU_HAS_PMU
1088 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1089 (!ARCH_OMAP3 || OMAP3_EMU)
1090 default y
1091 bool
1092
1093 config MULTI_IRQ_HANDLER
1094 bool
1095 help
1096 Allow each machine to specify it's own IRQ handler at run time.
1097
1098 if !MMU
1099 source "arch/arm/Kconfig-nommu"
1100 endif
1101
1102 config ARM_ERRATA_411920
1103 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1104 depends on CPU_V6 || CPU_V6K
1105 help
1106 Invalidation of the Instruction Cache operation can
1107 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1108 It does not affect the MPCore. This option enables the ARM Ltd.
1109 recommended workaround.
1110
1111 config ARM_ERRATA_430973
1112 bool "ARM errata: Stale prediction on replaced interworking branch"
1113 depends on CPU_V7
1114 help
1115 This option enables the workaround for the 430973 Cortex-A8
1116 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1117 interworking branch is replaced with another code sequence at the
1118 same virtual address, whether due to self-modifying code or virtual
1119 to physical address re-mapping, Cortex-A8 does not recover from the
1120 stale interworking branch prediction. This results in Cortex-A8
1121 executing the new code sequence in the incorrect ARM or Thumb state.
1122 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1123 and also flushes the branch target cache at every context switch.
1124 Note that setting specific bits in the ACTLR register may not be
1125 available in non-secure mode.
1126
1127 config ARM_ERRATA_458693
1128 bool "ARM errata: Processor deadlock when a false hazard is created"
1129 depends on CPU_V7
1130 help
1131 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1132 erratum. For very specific sequences of memory operations, it is
1133 possible for a hazard condition intended for a cache line to instead
1134 be incorrectly associated with a different cache line. This false
1135 hazard might then cause a processor deadlock. The workaround enables
1136 the L1 caching of the NEON accesses and disables the PLD instruction
1137 in the ACTLR register. Note that setting specific bits in the ACTLR
1138 register may not be available in non-secure mode.
1139
1140 config ARM_ERRATA_460075
1141 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1142 depends on CPU_V7
1143 help
1144 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1145 erratum. Any asynchronous access to the L2 cache may encounter a
1146 situation in which recent store transactions to the L2 cache are lost
1147 and overwritten with stale memory contents from external memory. The
1148 workaround disables the write-allocate mode for the L2 cache via the
1149 ACTLR register. Note that setting specific bits in the ACTLR register
1150 may not be available in non-secure mode.
1151
1152 config ARM_ERRATA_742230
1153 bool "ARM errata: DMB operation may be faulty"
1154 depends on CPU_V7 && SMP
1155 help
1156 This option enables the workaround for the 742230 Cortex-A9
1157 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1158 between two write operations may not ensure the correct visibility
1159 ordering of the two writes. This workaround sets a specific bit in
1160 the diagnostic register of the Cortex-A9 which causes the DMB
1161 instruction to behave as a DSB, ensuring the correct behaviour of
1162 the two writes.
1163
1164 config ARM_ERRATA_742231
1165 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1166 depends on CPU_V7 && SMP
1167 help
1168 This option enables the workaround for the 742231 Cortex-A9
1169 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1170 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1171 accessing some data located in the same cache line, may get corrupted
1172 data due to bad handling of the address hazard when the line gets
1173 replaced from one of the CPUs at the same time as another CPU is
1174 accessing it. This workaround sets specific bits in the diagnostic
1175 register of the Cortex-A9 which reduces the linefill issuing
1176 capabilities of the processor.
1177
1178 config PL310_ERRATA_588369
1179 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1180 depends on CACHE_L2X0
1181 help
1182 The PL310 L2 cache controller implements three types of Clean &
1183 Invalidate maintenance operations: by Physical Address
1184 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1185 They are architecturally defined to behave as the execution of a
1186 clean operation followed immediately by an invalidate operation,
1187 both performing to the same memory location. This functionality
1188 is not correctly implemented in PL310 as clean lines are not
1189 invalidated as a result of these operations.
1190
1191 config ARM_ERRATA_720789
1192 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1193 depends on CPU_V7 && SMP
1194 help
1195 This option enables the workaround for the 720789 Cortex-A9 (prior to
1196 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1197 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1198 As a consequence of this erratum, some TLB entries which should be
1199 invalidated are not, resulting in an incoherency in the system page
1200 tables. The workaround changes the TLB flushing routines to invalidate
1201 entries regardless of the ASID.
1202
1203 config PL310_ERRATA_727915
1204 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1205 depends on CACHE_L2X0
1206 help
1207 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1208 operation (offset 0x7FC). This operation runs in background so that
1209 PL310 can handle normal accesses while it is in progress. Under very
1210 rare circumstances, due to this erratum, write data can be lost when
1211 PL310 treats a cacheable write transaction during a Clean &
1212 Invalidate by Way operation.
1213
1214 config ARM_ERRATA_743622
1215 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1216 depends on CPU_V7
1217 help
1218 This option enables the workaround for the 743622 Cortex-A9
1219 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1220 optimisation in the Cortex-A9 Store Buffer may lead to data
1221 corruption. This workaround sets a specific bit in the diagnostic
1222 register of the Cortex-A9 which disables the Store Buffer
1223 optimisation, preventing the defect from occurring. This has no
1224 visible impact on the overall performance or power consumption of the
1225 processor.
1226
1227 config ARM_ERRATA_751472
1228 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1229 depends on CPU_V7 && SMP
1230 help
1231 This option enables the workaround for the 751472 Cortex-A9 (prior
1232 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1233 completion of a following broadcasted operation if the second
1234 operation is received by a CPU before the ICIALLUIS has completed,
1235 potentially leading to corrupted entries in the cache or TLB.
1236
1237 config ARM_ERRATA_753970
1238 bool "ARM errata: cache sync operation may be faulty"
1239 depends on CACHE_PL310
1240 help
1241 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1242
1243 Under some condition the effect of cache sync operation on
1244 the store buffer still remains when the operation completes.
1245 This means that the store buffer is always asked to drain and
1246 this prevents it from merging any further writes. The workaround
1247 is to replace the normal offset of cache sync operation (0x730)
1248 by another offset targeting an unmapped PL310 register 0x740.
1249 This has the same effect as the cache sync operation: store buffer
1250 drain and waiting for all buffers empty.
1251
1252 config ARM_ERRATA_754322
1253 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1254 depends on CPU_V7
1255 help
1256 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1257 r3p*) erratum. A speculative memory access may cause a page table walk
1258 which starts prior to an ASID switch but completes afterwards. This
1259 can populate the micro-TLB with a stale entry which may be hit with
1260 the new ASID. This workaround places two dsb instructions in the mm
1261 switching code so that no page table walks can cross the ASID switch.
1262
1263 config ARM_ERRATA_754327
1264 bool "ARM errata: no automatic Store Buffer drain"
1265 depends on CPU_V7 && SMP
1266 help
1267 This option enables the workaround for the 754327 Cortex-A9 (prior to
1268 r2p0) erratum. The Store Buffer does not have any automatic draining
1269 mechanism and therefore a livelock may occur if an external agent
1270 continuously polls a memory location waiting to observe an update.
1271 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1272 written polling loops from denying visibility of updates to memory.
1273
1274 endmenu
1275
1276 source "arch/arm/common/Kconfig"
1277
1278 menu "Bus support"
1279
1280 config ARM_AMBA
1281 bool
1282
1283 config ISA
1284 bool
1285 help
1286 Find out whether you have ISA slots on your motherboard. ISA is the
1287 name of a bus system, i.e. the way the CPU talks to the other stuff
1288 inside your box. Other bus systems are PCI, EISA, MicroChannel
1289 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1290 newer boards don't support it. If you have ISA, say Y, otherwise N.
1291
1292 # Select ISA DMA controller support
1293 config ISA_DMA
1294 bool
1295 select ISA_DMA_API
1296
1297 # Select ISA DMA interface
1298 config ISA_DMA_API
1299 bool
1300
1301 config PCI
1302 bool "PCI support" if MIGHT_HAVE_PCI
1303 help
1304 Find out whether you have a PCI motherboard. PCI is the name of a
1305 bus system, i.e. the way the CPU talks to the other stuff inside
1306 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1307 VESA. If you have PCI, say Y, otherwise N.
1308
1309 config PCI_DOMAINS
1310 bool
1311 depends on PCI
1312
1313 config PCI_NANOENGINE
1314 bool "BSE nanoEngine PCI support"
1315 depends on SA1100_NANOENGINE
1316 help
1317 Enable PCI on the BSE nanoEngine board.
1318
1319 config PCI_SYSCALL
1320 def_bool PCI
1321
1322 # Select the host bridge type
1323 config PCI_HOST_VIA82C505
1324 bool
1325 depends on PCI && ARCH_SHARK
1326 default y
1327
1328 config PCI_HOST_ITE8152
1329 bool
1330 depends on PCI && MACH_ARMCORE
1331 default y
1332 select DMABOUNCE
1333
1334 source "drivers/pci/Kconfig"
1335
1336 source "drivers/pcmcia/Kconfig"
1337
1338 endmenu
1339
1340 menu "Kernel Features"
1341
1342 source "kernel/time/Kconfig"
1343
1344 config SMP
1345 bool "Symmetric Multi-Processing"
1346 depends on CPU_V6K || CPU_V7
1347 depends on GENERIC_CLOCKEVENTS
1348 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1349 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1350 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1351 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1352 select USE_GENERIC_SMP_HELPERS
1353 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1354 help
1355 This enables support for systems with more than one CPU. If you have
1356 a system with only one CPU, like most personal computers, say N. If
1357 you have a system with more than one CPU, say Y.
1358
1359 If you say N here, the kernel will run on single and multiprocessor
1360 machines, but will use only one CPU of a multiprocessor machine. If
1361 you say Y here, the kernel will run on many, but not all, single
1362 processor machines. On a single processor machine, the kernel will
1363 run faster if you say N here.
1364
1365 See also <file:Documentation/i386/IO-APIC.txt>,
1366 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1367 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1368
1369 If you don't know what to do here, say N.
1370
1371 config SMP_ON_UP
1372 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1373 depends on EXPERIMENTAL
1374 depends on SMP && !XIP_KERNEL
1375 default y
1376 help
1377 SMP kernels contain instructions which fail on non-SMP processors.
1378 Enabling this option allows the kernel to modify itself to make
1379 these instructions safe. Disabling it allows about 1K of space
1380 savings.
1381
1382 If you don't know what to do here, say Y.
1383
1384 config HAVE_ARM_SCU
1385 bool
1386 help
1387 This option enables support for the ARM system coherency unit
1388
1389 config HAVE_ARM_TWD
1390 bool
1391 depends on SMP
1392 select TICK_ONESHOT
1393 help
1394 This options enables support for the ARM timer and watchdog unit
1395
1396 choice
1397 prompt "Memory split"
1398 default VMSPLIT_3G
1399 help
1400 Select the desired split between kernel and user memory.
1401
1402 If you are not absolutely sure what you are doing, leave this
1403 option alone!
1404
1405 config VMSPLIT_3G
1406 bool "3G/1G user/kernel split"
1407 config VMSPLIT_2G
1408 bool "2G/2G user/kernel split"
1409 config VMSPLIT_1G
1410 bool "1G/3G user/kernel split"
1411 endchoice
1412
1413 config PAGE_OFFSET
1414 hex
1415 default 0x40000000 if VMSPLIT_1G
1416 default 0x80000000 if VMSPLIT_2G
1417 default 0xC0000000
1418
1419 config NR_CPUS
1420 int "Maximum number of CPUs (2-32)"
1421 range 2 32
1422 depends on SMP
1423 default "4"
1424
1425 config HOTPLUG_CPU
1426 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1427 depends on SMP && HOTPLUG && EXPERIMENTAL
1428 help
1429 Say Y here to experiment with turning CPUs off and on. CPUs
1430 can be controlled through /sys/devices/system/cpu.
1431
1432 config LOCAL_TIMERS
1433 bool "Use local timer interrupts"
1434 depends on SMP
1435 default y
1436 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1437 help
1438 Enable support for local timers on SMP platforms, rather then the
1439 legacy IPI broadcast method. Local timers allows the system
1440 accounting to be spread across the timer interval, preventing a
1441 "thundering herd" at every timer tick.
1442
1443 source kernel/Kconfig.preempt
1444
1445 config HZ
1446 int
1447 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1448 ARCH_S5PV210 || ARCH_EXYNOS4
1449 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1450 default AT91_TIMER_HZ if ARCH_AT91
1451 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1452 default 100
1453
1454 config THUMB2_KERNEL
1455 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1456 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1457 select AEABI
1458 select ARM_ASM_UNIFIED
1459 help
1460 By enabling this option, the kernel will be compiled in
1461 Thumb-2 mode. A compiler/assembler that understand the unified
1462 ARM-Thumb syntax is needed.
1463
1464 If unsure, say N.
1465
1466 config THUMB2_AVOID_R_ARM_THM_JUMP11
1467 bool "Work around buggy Thumb-2 short branch relocations in gas"
1468 depends on THUMB2_KERNEL && MODULES
1469 default y
1470 help
1471 Various binutils versions can resolve Thumb-2 branches to
1472 locally-defined, preemptible global symbols as short-range "b.n"
1473 branch instructions.
1474
1475 This is a problem, because there's no guarantee the final
1476 destination of the symbol, or any candidate locations for a
1477 trampoline, are within range of the branch. For this reason, the
1478 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1479 relocation in modules at all, and it makes little sense to add
1480 support.
1481
1482 The symptom is that the kernel fails with an "unsupported
1483 relocation" error when loading some modules.
1484
1485 Until fixed tools are available, passing
1486 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1487 code which hits this problem, at the cost of a bit of extra runtime
1488 stack usage in some cases.
1489
1490 The problem is described in more detail at:
1491 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1492
1493 Only Thumb-2 kernels are affected.
1494
1495 Unless you are sure your tools don't have this problem, say Y.
1496
1497 config ARM_ASM_UNIFIED
1498 bool
1499
1500 config AEABI
1501 bool "Use the ARM EABI to compile the kernel"
1502 help
1503 This option allows for the kernel to be compiled using the latest
1504 ARM ABI (aka EABI). This is only useful if you are using a user
1505 space environment that is also compiled with EABI.
1506
1507 Since there are major incompatibilities between the legacy ABI and
1508 EABI, especially with regard to structure member alignment, this
1509 option also changes the kernel syscall calling convention to
1510 disambiguate both ABIs and allow for backward compatibility support
1511 (selected with CONFIG_OABI_COMPAT).
1512
1513 To use this you need GCC version 4.0.0 or later.
1514
1515 config OABI_COMPAT
1516 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1517 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1518 default y
1519 help
1520 This option preserves the old syscall interface along with the
1521 new (ARM EABI) one. It also provides a compatibility layer to
1522 intercept syscalls that have structure arguments which layout
1523 in memory differs between the legacy ABI and the new ARM EABI
1524 (only for non "thumb" binaries). This option adds a tiny
1525 overhead to all syscalls and produces a slightly larger kernel.
1526 If you know you'll be using only pure EABI user space then you
1527 can say N here. If this option is not selected and you attempt
1528 to execute a legacy ABI binary then the result will be
1529 UNPREDICTABLE (in fact it can be predicted that it won't work
1530 at all). If in doubt say Y.
1531
1532 config ARCH_HAS_HOLES_MEMORYMODEL
1533 bool
1534
1535 config ARCH_SPARSEMEM_ENABLE
1536 bool
1537
1538 config ARCH_SPARSEMEM_DEFAULT
1539 def_bool ARCH_SPARSEMEM_ENABLE
1540
1541 config ARCH_SELECT_MEMORY_MODEL
1542 def_bool ARCH_SPARSEMEM_ENABLE
1543
1544 config HAVE_ARCH_PFN_VALID
1545 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1546
1547 config HIGHMEM
1548 bool "High Memory Support"
1549 depends on MMU
1550 help
1551 The address space of ARM processors is only 4 Gigabytes large
1552 and it has to accommodate user address space, kernel address
1553 space as well as some memory mapped IO. That means that, if you
1554 have a large amount of physical memory and/or IO, not all of the
1555 memory can be "permanently mapped" by the kernel. The physical
1556 memory that is not permanently mapped is called "high memory".
1557
1558 Depending on the selected kernel/user memory split, minimum
1559 vmalloc space and actual amount of RAM, you may not need this
1560 option which should result in a slightly faster kernel.
1561
1562 If unsure, say n.
1563
1564 config HIGHPTE
1565 bool "Allocate 2nd-level pagetables from highmem"
1566 depends on HIGHMEM
1567
1568 config HW_PERF_EVENTS
1569 bool "Enable hardware performance counter support for perf events"
1570 depends on PERF_EVENTS && CPU_HAS_PMU
1571 default y
1572 help
1573 Enable hardware performance counter support for perf events. If
1574 disabled, perf events will use software events only.
1575
1576 source "mm/Kconfig"
1577
1578 config FORCE_MAX_ZONEORDER
1579 int "Maximum zone order" if ARCH_SHMOBILE
1580 range 11 64 if ARCH_SHMOBILE
1581 default "9" if SA1111
1582 default "11"
1583 help
1584 The kernel memory allocator divides physically contiguous memory
1585 blocks into "zones", where each zone is a power of two number of
1586 pages. This option selects the largest power of two that the kernel
1587 keeps in the memory allocator. If you need to allocate very large
1588 blocks of physically contiguous memory, then you may need to
1589 increase this value.
1590
1591 This config option is actually maximum order plus one. For example,
1592 a value of 11 means that the largest free memory block is 2^10 pages.
1593
1594 config LEDS
1595 bool "Timer and CPU usage LEDs"
1596 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1597 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1598 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1599 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1600 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1601 ARCH_AT91 || ARCH_DAVINCI || \
1602 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1603 help
1604 If you say Y here, the LEDs on your machine will be used
1605 to provide useful information about your current system status.
1606
1607 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1608 be able to select which LEDs are active using the options below. If
1609 you are compiling a kernel for the EBSA-110 or the LART however, the
1610 red LED will simply flash regularly to indicate that the system is
1611 still functional. It is safe to say Y here if you have a CATS
1612 system, but the driver will do nothing.
1613
1614 config LEDS_TIMER
1615 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1616 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1617 || MACH_OMAP_PERSEUS2
1618 depends on LEDS
1619 depends on !GENERIC_CLOCKEVENTS
1620 default y if ARCH_EBSA110
1621 help
1622 If you say Y here, one of the system LEDs (the green one on the
1623 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1624 will flash regularly to indicate that the system is still
1625 operational. This is mainly useful to kernel hackers who are
1626 debugging unstable kernels.
1627
1628 The LART uses the same LED for both Timer LED and CPU usage LED
1629 functions. You may choose to use both, but the Timer LED function
1630 will overrule the CPU usage LED.
1631
1632 config LEDS_CPU
1633 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1634 !ARCH_OMAP) \
1635 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1636 || MACH_OMAP_PERSEUS2
1637 depends on LEDS
1638 help
1639 If you say Y here, the red LED will be used to give a good real
1640 time indication of CPU usage, by lighting whenever the idle task
1641 is not currently executing.
1642
1643 The LART uses the same LED for both Timer LED and CPU usage LED
1644 functions. You may choose to use both, but the Timer LED function
1645 will overrule the CPU usage LED.
1646
1647 config ALIGNMENT_TRAP
1648 bool
1649 depends on CPU_CP15_MMU
1650 default y if !ARCH_EBSA110
1651 select HAVE_PROC_CPU if PROC_FS
1652 help
1653 ARM processors cannot fetch/store information which is not
1654 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1655 address divisible by 4. On 32-bit ARM processors, these non-aligned
1656 fetch/store instructions will be emulated in software if you say
1657 here, which has a severe performance impact. This is necessary for
1658 correct operation of some network protocols. With an IP-only
1659 configuration it is safe to say N, otherwise say Y.
1660
1661 config UACCESS_WITH_MEMCPY
1662 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1663 depends on MMU && EXPERIMENTAL
1664 default y if CPU_FEROCEON
1665 help
1666 Implement faster copy_to_user and clear_user methods for CPU
1667 cores where a 8-word STM instruction give significantly higher
1668 memory write throughput than a sequence of individual 32bit stores.
1669
1670 A possible side effect is a slight increase in scheduling latency
1671 between threads sharing the same address space if they invoke
1672 such copy operations with large buffers.
1673
1674 However, if the CPU data cache is using a write-allocate mode,
1675 this option is unlikely to provide any performance gain.
1676
1677 config SECCOMP
1678 bool
1679 prompt "Enable seccomp to safely compute untrusted bytecode"
1680 ---help---
1681 This kernel feature is useful for number crunching applications
1682 that may need to compute untrusted bytecode during their
1683 execution. By using pipes or other transports made available to
1684 the process as file descriptors supporting the read/write
1685 syscalls, it's possible to isolate those applications in
1686 their own address space using seccomp. Once seccomp is
1687 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1688 and the task is only allowed to execute a few safe syscalls
1689 defined by each seccomp mode.
1690
1691 config CC_STACKPROTECTOR
1692 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1693 depends on EXPERIMENTAL
1694 help
1695 This option turns on the -fstack-protector GCC feature. This
1696 feature puts, at the beginning of functions, a canary value on
1697 the stack just before the return address, and validates
1698 the value just before actually returning. Stack based buffer
1699 overflows (that need to overwrite this return address) now also
1700 overwrite the canary, which gets detected and the attack is then
1701 neutralized via a kernel panic.
1702 This feature requires gcc version 4.2 or above.
1703
1704 config DEPRECATED_PARAM_STRUCT
1705 bool "Provide old way to pass kernel parameters"
1706 help
1707 This was deprecated in 2001 and announced to live on for 5 years.
1708 Some old boot loaders still use this way.
1709
1710 endmenu
1711
1712 menu "Boot options"
1713
1714 config USE_OF
1715 bool "Flattened Device Tree support"
1716 select OF
1717 select OF_EARLY_FLATTREE
1718 select IRQ_DOMAIN
1719 help
1720 Include support for flattened device tree machine descriptions.
1721
1722 # Compressed boot loader in ROM. Yes, we really want to ask about
1723 # TEXT and BSS so we preserve their values in the config files.
1724 config ZBOOT_ROM_TEXT
1725 hex "Compressed ROM boot loader base address"
1726 default "0"
1727 help
1728 The physical address at which the ROM-able zImage is to be
1729 placed in the target. Platforms which normally make use of
1730 ROM-able zImage formats normally set this to a suitable
1731 value in their defconfig file.
1732
1733 If ZBOOT_ROM is not enabled, this has no effect.
1734
1735 config ZBOOT_ROM_BSS
1736 hex "Compressed ROM boot loader BSS address"
1737 default "0"
1738 help
1739 The base address of an area of read/write memory in the target
1740 for the ROM-able zImage which must be available while the
1741 decompressor is running. It must be large enough to hold the
1742 entire decompressed kernel plus an additional 128 KiB.
1743 Platforms which normally make use of ROM-able zImage formats
1744 normally set this to a suitable value in their defconfig file.
1745
1746 If ZBOOT_ROM is not enabled, this has no effect.
1747
1748 config ZBOOT_ROM
1749 bool "Compressed boot loader in ROM/flash"
1750 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1751 help
1752 Say Y here if you intend to execute your compressed kernel image
1753 (zImage) directly from ROM or flash. If unsure, say N.
1754
1755 choice
1756 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1757 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1758 default ZBOOT_ROM_NONE
1759 help
1760 Include experimental SD/MMC loading code in the ROM-able zImage.
1761 With this enabled it is possible to write the the ROM-able zImage
1762 kernel image to an MMC or SD card and boot the kernel straight
1763 from the reset vector. At reset the processor Mask ROM will load
1764 the first part of the the ROM-able zImage which in turn loads the
1765 rest the kernel image to RAM.
1766
1767 config ZBOOT_ROM_NONE
1768 bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1769 help
1770 Do not load image from SD or MMC
1771
1772 config ZBOOT_ROM_MMCIF
1773 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1774 help
1775 Load image from MMCIF hardware block.
1776
1777 config ZBOOT_ROM_SH_MOBILE_SDHI
1778 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1779 help
1780 Load image from SDHI hardware block
1781
1782 endchoice
1783
1784 config CMDLINE
1785 string "Default kernel command string"
1786 default ""
1787 help
1788 On some architectures (EBSA110 and CATS), there is currently no way
1789 for the boot loader to pass arguments to the kernel. For these
1790 architectures, you should supply some command-line options at build
1791 time by entering them here. As a minimum, you should specify the
1792 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1793
1794 choice
1795 prompt "Kernel command line type" if CMDLINE != ""
1796 default CMDLINE_FROM_BOOTLOADER
1797
1798 config CMDLINE_FROM_BOOTLOADER
1799 bool "Use bootloader kernel arguments if available"
1800 help
1801 Uses the command-line options passed by the boot loader. If
1802 the boot loader doesn't provide any, the default kernel command
1803 string provided in CMDLINE will be used.
1804
1805 config CMDLINE_EXTEND
1806 bool "Extend bootloader kernel arguments"
1807 help
1808 The command-line arguments provided by the boot loader will be
1809 appended to the default kernel command string.
1810
1811 config CMDLINE_FORCE
1812 bool "Always use the default kernel command string"
1813 help
1814 Always use the default kernel command string, even if the boot
1815 loader passes other arguments to the kernel.
1816 This is useful if you cannot or don't want to change the
1817 command-line options your boot loader passes to the kernel.
1818 endchoice
1819
1820 config XIP_KERNEL
1821 bool "Kernel Execute-In-Place from ROM"
1822 depends on !ZBOOT_ROM
1823 help
1824 Execute-In-Place allows the kernel to run from non-volatile storage
1825 directly addressable by the CPU, such as NOR flash. This saves RAM
1826 space since the text section of the kernel is not loaded from flash
1827 to RAM. Read-write sections, such as the data section and stack,
1828 are still copied to RAM. The XIP kernel is not compressed since
1829 it has to run directly from flash, so it will take more space to
1830 store it. The flash address used to link the kernel object files,
1831 and for storing it, is configuration dependent. Therefore, if you
1832 say Y here, you must know the proper physical address where to
1833 store the kernel image depending on your own flash memory usage.
1834
1835 Also note that the make target becomes "make xipImage" rather than
1836 "make zImage" or "make Image". The final kernel binary to put in
1837 ROM memory will be arch/arm/boot/xipImage.
1838
1839 If unsure, say N.
1840
1841 config XIP_PHYS_ADDR
1842 hex "XIP Kernel Physical Location"
1843 depends on XIP_KERNEL
1844 default "0x00080000"
1845 help
1846 This is the physical address in your flash memory the kernel will
1847 be linked for and stored to. This address is dependent on your
1848 own flash usage.
1849
1850 config KEXEC
1851 bool "Kexec system call (EXPERIMENTAL)"
1852 depends on EXPERIMENTAL
1853 help
1854 kexec is a system call that implements the ability to shutdown your
1855 current kernel, and to start another kernel. It is like a reboot
1856 but it is independent of the system firmware. And like a reboot
1857 you can start any kernel with it, not just Linux.
1858
1859 It is an ongoing process to be certain the hardware in a machine
1860 is properly shutdown, so do not be surprised if this code does not
1861 initially work for you. It may help to enable device hotplugging
1862 support.
1863
1864 config ATAGS_PROC
1865 bool "Export atags in procfs"
1866 depends on KEXEC
1867 default y
1868 help
1869 Should the atags used to boot the kernel be exported in an "atags"
1870 file in procfs. Useful with kexec.
1871
1872 config CRASH_DUMP
1873 bool "Build kdump crash kernel (EXPERIMENTAL)"
1874 depends on EXPERIMENTAL
1875 help
1876 Generate crash dump after being started by kexec. This should
1877 be normally only set in special crash dump kernels which are
1878 loaded in the main kernel with kexec-tools into a specially
1879 reserved region and then later executed after a crash by
1880 kdump/kexec. The crash dump kernel must be compiled to a
1881 memory address not used by the main kernel
1882
1883 For more details see Documentation/kdump/kdump.txt
1884
1885 config AUTO_ZRELADDR
1886 bool "Auto calculation of the decompressed kernel image address"
1887 depends on !ZBOOT_ROM && !ARCH_U300
1888 help
1889 ZRELADDR is the physical address where the decompressed kernel
1890 image will be placed. If AUTO_ZRELADDR is selected, the address
1891 will be determined at run-time by masking the current IP with
1892 0xf8000000. This assumes the zImage being placed in the first 128MB
1893 from start of memory.
1894
1895 endmenu
1896
1897 menu "CPU Power Management"
1898
1899 if ARCH_HAS_CPUFREQ
1900
1901 source "drivers/cpufreq/Kconfig"
1902
1903 config CPU_FREQ_IMX
1904 tristate "CPUfreq driver for i.MX CPUs"
1905 depends on ARCH_MXC && CPU_FREQ
1906 help
1907 This enables the CPUfreq driver for i.MX CPUs.
1908
1909 config CPU_FREQ_SA1100
1910 bool
1911
1912 config CPU_FREQ_SA1110
1913 bool
1914
1915 config CPU_FREQ_INTEGRATOR
1916 tristate "CPUfreq driver for ARM Integrator CPUs"
1917 depends on ARCH_INTEGRATOR && CPU_FREQ
1918 default y
1919 help
1920 This enables the CPUfreq driver for ARM Integrator CPUs.
1921
1922 For details, take a look at <file:Documentation/cpu-freq>.
1923
1924 If in doubt, say Y.
1925
1926 config CPU_FREQ_PXA
1927 bool
1928 depends on CPU_FREQ && ARCH_PXA && PXA25x
1929 default y
1930 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1931
1932 config CPU_FREQ_S3C
1933 bool
1934 help
1935 Internal configuration node for common cpufreq on Samsung SoC
1936
1937 config CPU_FREQ_S3C24XX
1938 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1939 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1940 select CPU_FREQ_S3C
1941 help
1942 This enables the CPUfreq driver for the Samsung S3C24XX family
1943 of CPUs.
1944
1945 For details, take a look at <file:Documentation/cpu-freq>.
1946
1947 If in doubt, say N.
1948
1949 config CPU_FREQ_S3C24XX_PLL
1950 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1951 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1952 help
1953 Compile in support for changing the PLL frequency from the
1954 S3C24XX series CPUfreq driver. The PLL takes time to settle
1955 after a frequency change, so by default it is not enabled.
1956
1957 This also means that the PLL tables for the selected CPU(s) will
1958 be built which may increase the size of the kernel image.
1959
1960 config CPU_FREQ_S3C24XX_DEBUG
1961 bool "Debug CPUfreq Samsung driver core"
1962 depends on CPU_FREQ_S3C24XX
1963 help
1964 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1965
1966 config CPU_FREQ_S3C24XX_IODEBUG
1967 bool "Debug CPUfreq Samsung driver IO timing"
1968 depends on CPU_FREQ_S3C24XX
1969 help
1970 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1971
1972 config CPU_FREQ_S3C24XX_DEBUGFS
1973 bool "Export debugfs for CPUFreq"
1974 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1975 help
1976 Export status information via debugfs.
1977
1978 endif
1979
1980 source "drivers/cpuidle/Kconfig"
1981
1982 endmenu
1983
1984 menu "Floating point emulation"
1985
1986 comment "At least one emulation must be selected"
1987
1988 config FPE_NWFPE
1989 bool "NWFPE math emulation"
1990 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1991 ---help---
1992 Say Y to include the NWFPE floating point emulator in the kernel.
1993 This is necessary to run most binaries. Linux does not currently
1994 support floating point hardware so you need to say Y here even if
1995 your machine has an FPA or floating point co-processor podule.
1996
1997 You may say N here if you are going to load the Acorn FPEmulator
1998 early in the bootup.
1999
2000 config FPE_NWFPE_XP
2001 bool "Support extended precision"
2002 depends on FPE_NWFPE
2003 help
2004 Say Y to include 80-bit support in the kernel floating-point
2005 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2006 Note that gcc does not generate 80-bit operations by default,
2007 so in most cases this option only enlarges the size of the
2008 floating point emulator without any good reason.
2009
2010 You almost surely want to say N here.
2011
2012 config FPE_FASTFPE
2013 bool "FastFPE math emulation (EXPERIMENTAL)"
2014 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2015 ---help---
2016 Say Y here to include the FAST floating point emulator in the kernel.
2017 This is an experimental much faster emulator which now also has full
2018 precision for the mantissa. It does not support any exceptions.
2019 It is very simple, and approximately 3-6 times faster than NWFPE.
2020
2021 It should be sufficient for most programs. It may be not suitable
2022 for scientific calculations, but you have to check this for yourself.
2023 If you do not feel you need a faster FP emulation you should better
2024 choose NWFPE.
2025
2026 config VFP
2027 bool "VFP-format floating point maths"
2028 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2029 help
2030 Say Y to include VFP support code in the kernel. This is needed
2031 if your hardware includes a VFP unit.
2032
2033 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2034 release notes and additional status information.
2035
2036 Say N if your target does not have VFP hardware.
2037
2038 config VFPv3
2039 bool
2040 depends on VFP
2041 default y if CPU_V7
2042
2043 config NEON
2044 bool "Advanced SIMD (NEON) Extension support"
2045 depends on VFPv3 && CPU_V7
2046 help
2047 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2048 Extension.
2049
2050 endmenu
2051
2052 menu "Userspace binary formats"
2053
2054 source "fs/Kconfig.binfmt"
2055
2056 config ARTHUR
2057 tristate "RISC OS personality"
2058 depends on !AEABI
2059 help
2060 Say Y here to include the kernel code necessary if you want to run
2061 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2062 experimental; if this sounds frightening, say N and sleep in peace.
2063 You can also say M here to compile this support as a module (which
2064 will be called arthur).
2065
2066 endmenu
2067
2068 menu "Power management options"
2069
2070 source "kernel/power/Kconfig"
2071
2072 config ARCH_SUSPEND_POSSIBLE
2073 depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2074 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2075 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2076 def_bool y
2077
2078 endmenu
2079
2080 source "net/Kconfig"
2081
2082 source "drivers/Kconfig"
2083
2084 source "fs/Kconfig"
2085
2086 source "arch/arm/Kconfig.debug"
2087
2088 source "security/Kconfig"
2089
2090 source "crypto/Kconfig"
2091
2092 source "lib/Kconfig"