Fix common misspellings
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
32 help
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
39
40 config HAVE_PWM
41 bool
42
43 config MIGHT_HAVE_PCI
44 bool
45
46 config SYS_SUPPORTS_APM_EMULATION
47 bool
48
49 config HAVE_SCHED_CLOCK
50 bool
51
52 config GENERIC_GPIO
53 bool
54
55 config ARCH_USES_GETTIMEOFFSET
56 bool
57 default n
58
59 config GENERIC_CLOCKEVENTS
60 bool
61
62 config GENERIC_CLOCKEVENTS_BROADCAST
63 bool
64 depends on GENERIC_CLOCKEVENTS
65 default y if SMP
66
67 config KTIME_SCALAR
68 bool
69 default y
70
71 config HAVE_TCM
72 bool
73 select GENERIC_ALLOCATOR
74
75 config HAVE_PROC_CPU
76 bool
77
78 config NO_IOPORT
79 bool
80
81 config EISA
82 bool
83 ---help---
84 The Extended Industry Standard Architecture (EISA) bus was
85 developed as an open alternative to the IBM MicroChannel bus.
86
87 The EISA bus provided some of the features of the IBM MicroChannel
88 bus while maintaining backward compatibility with cards made for
89 the older ISA bus. The EISA bus saw limited use between 1988 and
90 1995 when it was made obsolete by the PCI bus.
91
92 Say Y here if you are building a kernel for an EISA-based machine.
93
94 Otherwise, say N.
95
96 config SBUS
97 bool
98
99 config MCA
100 bool
101 help
102 MicroChannel Architecture is found in some IBM PS/2 machines and
103 laptops. It is a bus system similar to PCI or ISA. See
104 <file:Documentation/mca.txt> (and especially the web page given
105 there) before attempting to build an MCA bus kernel.
106
107 config STACKTRACE_SUPPORT
108 bool
109 default y
110
111 config HAVE_LATENCYTOP_SUPPORT
112 bool
113 depends on !SMP
114 default y
115
116 config LOCKDEP_SUPPORT
117 bool
118 default y
119
120 config TRACE_IRQFLAGS_SUPPORT
121 bool
122 default y
123
124 config HARDIRQS_SW_RESEND
125 bool
126 default y
127
128 config GENERIC_IRQ_PROBE
129 bool
130 default y
131
132 config GENERIC_LOCKBREAK
133 bool
134 default y
135 depends on SMP && PREEMPT
136
137 config RWSEM_GENERIC_SPINLOCK
138 bool
139 default y
140
141 config RWSEM_XCHGADD_ALGORITHM
142 bool
143
144 config ARCH_HAS_ILOG2_U32
145 bool
146
147 config ARCH_HAS_ILOG2_U64
148 bool
149
150 config ARCH_HAS_CPUFREQ
151 bool
152 help
153 Internal node to signify that the ARCH has CPUFREQ support
154 and that the relevant menu configurations are displayed for
155 it.
156
157 config ARCH_HAS_CPU_IDLE_WAIT
158 def_bool y
159
160 config GENERIC_HWEIGHT
161 bool
162 default y
163
164 config GENERIC_CALIBRATE_DELAY
165 bool
166 default y
167
168 config ARCH_MAY_HAVE_PC_FDC
169 bool
170
171 config ZONE_DMA
172 bool
173
174 config NEED_DMA_MAP_STATE
175 def_bool y
176
177 config GENERIC_ISA_DMA
178 bool
179
180 config FIQ
181 bool
182
183 config ARCH_MTD_XIP
184 bool
185
186 config VECTORS_BASE
187 hex
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
190 default 0x00000000
191 help
192 The base address of exception vectors.
193
194 config ARM_PATCH_PHYS_VIRT
195 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
196 depends on EXPERIMENTAL
197 depends on !XIP_KERNEL && MMU
198 depends on !ARCH_REALVIEW || !SPARSEMEM
199 help
200 Patch phys-to-virt translation functions at runtime according to
201 the position of the kernel in system memory.
202
203 This can only be used with non-XIP with MMU kernels where
204 the base of physical memory is at a 16MB boundary.
205
206 config ARM_PATCH_PHYS_VIRT_16BIT
207 def_bool y
208 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
209
210 source "init/Kconfig"
211
212 source "kernel/Kconfig.freezer"
213
214 menu "System Type"
215
216 config MMU
217 bool "MMU-based Paged Memory Management Support"
218 default y
219 help
220 Select if you want MMU-based virtualised addressing space
221 support by paged memory management. If unsure, say 'Y'.
222
223 #
224 # The "ARM system type" choice list is ordered alphabetically by option
225 # text. Please add new entries in the option alphabetic order.
226 #
227 choice
228 prompt "ARM system type"
229 default ARCH_VERSATILE
230
231 config ARCH_INTEGRATOR
232 bool "ARM Ltd. Integrator family"
233 select ARM_AMBA
234 select ARCH_HAS_CPUFREQ
235 select CLKDEV_LOOKUP
236 select ICST
237 select GENERIC_CLOCKEVENTS
238 select PLAT_VERSATILE
239 select PLAT_VERSATILE_FPGA_IRQ
240 help
241 Support for ARM's Integrator platform.
242
243 config ARCH_REALVIEW
244 bool "ARM Ltd. RealView family"
245 select ARM_AMBA
246 select CLKDEV_LOOKUP
247 select ICST
248 select GENERIC_CLOCKEVENTS
249 select ARCH_WANT_OPTIONAL_GPIOLIB
250 select PLAT_VERSATILE
251 select PLAT_VERSATILE_CLCD
252 select ARM_TIMER_SP804
253 select GPIO_PL061 if GPIOLIB
254 help
255 This enables support for ARM Ltd RealView boards.
256
257 config ARCH_VERSATILE
258 bool "ARM Ltd. Versatile family"
259 select ARM_AMBA
260 select ARM_VIC
261 select CLKDEV_LOOKUP
262 select ICST
263 select GENERIC_CLOCKEVENTS
264 select ARCH_WANT_OPTIONAL_GPIOLIB
265 select PLAT_VERSATILE
266 select PLAT_VERSATILE_CLCD
267 select PLAT_VERSATILE_FPGA_IRQ
268 select ARM_TIMER_SP804
269 help
270 This enables support for ARM Ltd Versatile board.
271
272 config ARCH_VEXPRESS
273 bool "ARM Ltd. Versatile Express family"
274 select ARCH_WANT_OPTIONAL_GPIOLIB
275 select ARM_AMBA
276 select ARM_TIMER_SP804
277 select CLKDEV_LOOKUP
278 select GENERIC_CLOCKEVENTS
279 select HAVE_CLK
280 select HAVE_PATA_PLATFORM
281 select ICST
282 select PLAT_VERSATILE
283 select PLAT_VERSATILE_CLCD
284 help
285 This enables support for the ARM Ltd Versatile Express boards.
286
287 config ARCH_AT91
288 bool "Atmel AT91"
289 select ARCH_REQUIRE_GPIOLIB
290 select HAVE_CLK
291 help
292 This enables support for systems based on the Atmel AT91RM9200,
293 AT91SAM9 and AT91CAP9 processors.
294
295 config ARCH_BCMRING
296 bool "Broadcom BCMRING"
297 depends on MMU
298 select CPU_V6
299 select ARM_AMBA
300 select CLKDEV_LOOKUP
301 select GENERIC_CLOCKEVENTS
302 select ARCH_WANT_OPTIONAL_GPIOLIB
303 help
304 Support for Broadcom's BCMRing platform.
305
306 config ARCH_CLPS711X
307 bool "Cirrus Logic CLPS711x/EP721x-based"
308 select CPU_ARM720T
309 select ARCH_USES_GETTIMEOFFSET
310 help
311 Support for Cirrus Logic 711x/721x based boards.
312
313 config ARCH_CNS3XXX
314 bool "Cavium Networks CNS3XXX family"
315 select CPU_V6
316 select GENERIC_CLOCKEVENTS
317 select ARM_GIC
318 select MIGHT_HAVE_PCI
319 select PCI_DOMAINS if PCI
320 help
321 Support for Cavium Networks CNS3XXX platform.
322
323 config ARCH_GEMINI
324 bool "Cortina Systems Gemini"
325 select CPU_FA526
326 select ARCH_REQUIRE_GPIOLIB
327 select ARCH_USES_GETTIMEOFFSET
328 help
329 Support for the Cortina Systems Gemini family SoCs
330
331 config ARCH_EBSA110
332 bool "EBSA-110"
333 select CPU_SA110
334 select ISA
335 select NO_IOPORT
336 select ARCH_USES_GETTIMEOFFSET
337 help
338 This is an evaluation board for the StrongARM processor available
339 from Digital. It has limited hardware on-board, including an
340 Ethernet interface, two PCMCIA sockets, two serial ports and a
341 parallel port.
342
343 config ARCH_EP93XX
344 bool "EP93xx-based"
345 select CPU_ARM920T
346 select ARM_AMBA
347 select ARM_VIC
348 select CLKDEV_LOOKUP
349 select ARCH_REQUIRE_GPIOLIB
350 select ARCH_HAS_HOLES_MEMORYMODEL
351 select ARCH_USES_GETTIMEOFFSET
352 help
353 This enables support for the Cirrus EP93xx series of CPUs.
354
355 config ARCH_FOOTBRIDGE
356 bool "FootBridge"
357 select CPU_SA110
358 select FOOTBRIDGE
359 select GENERIC_CLOCKEVENTS
360 help
361 Support for systems based on the DC21285 companion chip
362 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
363
364 config ARCH_MXC
365 bool "Freescale MXC/iMX-based"
366 select GENERIC_CLOCKEVENTS
367 select ARCH_REQUIRE_GPIOLIB
368 select CLKDEV_LOOKUP
369 select HAVE_SCHED_CLOCK
370 help
371 Support for Freescale MXC/iMX-based family of processors
372
373 config ARCH_MXS
374 bool "Freescale MXS-based"
375 select GENERIC_CLOCKEVENTS
376 select ARCH_REQUIRE_GPIOLIB
377 select CLKDEV_LOOKUP
378 help
379 Support for Freescale MXS-based family of processors
380
381 config ARCH_STMP3XXX
382 bool "Freescale STMP3xxx"
383 select CPU_ARM926T
384 select CLKDEV_LOOKUP
385 select ARCH_REQUIRE_GPIOLIB
386 select GENERIC_CLOCKEVENTS
387 select USB_ARCH_HAS_EHCI
388 help
389 Support for systems based on the Freescale 3xxx CPUs.
390
391 config ARCH_NETX
392 bool "Hilscher NetX based"
393 select CPU_ARM926T
394 select ARM_VIC
395 select GENERIC_CLOCKEVENTS
396 help
397 This enables support for systems based on the Hilscher NetX Soc
398
399 config ARCH_H720X
400 bool "Hynix HMS720x-based"
401 select CPU_ARM720T
402 select ISA_DMA_API
403 select ARCH_USES_GETTIMEOFFSET
404 help
405 This enables support for systems based on the Hynix HMS720x
406
407 config ARCH_IOP13XX
408 bool "IOP13xx-based"
409 depends on MMU
410 select CPU_XSC3
411 select PLAT_IOP
412 select PCI
413 select ARCH_SUPPORTS_MSI
414 select VMSPLIT_1G
415 help
416 Support for Intel's IOP13XX (XScale) family of processors.
417
418 config ARCH_IOP32X
419 bool "IOP32x-based"
420 depends on MMU
421 select CPU_XSCALE
422 select PLAT_IOP
423 select PCI
424 select ARCH_REQUIRE_GPIOLIB
425 help
426 Support for Intel's 80219 and IOP32X (XScale) family of
427 processors.
428
429 config ARCH_IOP33X
430 bool "IOP33x-based"
431 depends on MMU
432 select CPU_XSCALE
433 select PLAT_IOP
434 select PCI
435 select ARCH_REQUIRE_GPIOLIB
436 help
437 Support for Intel's IOP33X (XScale) family of processors.
438
439 config ARCH_IXP23XX
440 bool "IXP23XX-based"
441 depends on MMU
442 select CPU_XSC3
443 select PCI
444 select ARCH_USES_GETTIMEOFFSET
445 help
446 Support for Intel's IXP23xx (XScale) family of processors.
447
448 config ARCH_IXP2000
449 bool "IXP2400/2800-based"
450 depends on MMU
451 select CPU_XSCALE
452 select PCI
453 select ARCH_USES_GETTIMEOFFSET
454 help
455 Support for Intel's IXP2400/2800 (XScale) family of processors.
456
457 config ARCH_IXP4XX
458 bool "IXP4xx-based"
459 depends on MMU
460 select CPU_XSCALE
461 select GENERIC_GPIO
462 select GENERIC_CLOCKEVENTS
463 select HAVE_SCHED_CLOCK
464 select MIGHT_HAVE_PCI
465 select DMABOUNCE if PCI
466 help
467 Support for Intel's IXP4XX (XScale) family of processors.
468
469 config ARCH_DOVE
470 bool "Marvell Dove"
471 select CPU_V6K
472 select PCI
473 select ARCH_REQUIRE_GPIOLIB
474 select GENERIC_CLOCKEVENTS
475 select PLAT_ORION
476 help
477 Support for the Marvell Dove SoC 88AP510
478
479 config ARCH_KIRKWOOD
480 bool "Marvell Kirkwood"
481 select CPU_FEROCEON
482 select PCI
483 select ARCH_REQUIRE_GPIOLIB
484 select GENERIC_CLOCKEVENTS
485 select PLAT_ORION
486 help
487 Support for the following Marvell Kirkwood series SoCs:
488 88F6180, 88F6192 and 88F6281.
489
490 config ARCH_LOKI
491 bool "Marvell Loki (88RC8480)"
492 select CPU_FEROCEON
493 select GENERIC_CLOCKEVENTS
494 select PLAT_ORION
495 help
496 Support for the Marvell Loki (88RC8480) SoC.
497
498 config ARCH_LPC32XX
499 bool "NXP LPC32XX"
500 select CPU_ARM926T
501 select ARCH_REQUIRE_GPIOLIB
502 select HAVE_IDE
503 select ARM_AMBA
504 select USB_ARCH_HAS_OHCI
505 select CLKDEV_LOOKUP
506 select GENERIC_TIME
507 select GENERIC_CLOCKEVENTS
508 help
509 Support for the NXP LPC32XX family of processors
510
511 config ARCH_MV78XX0
512 bool "Marvell MV78xx0"
513 select CPU_FEROCEON
514 select PCI
515 select ARCH_REQUIRE_GPIOLIB
516 select GENERIC_CLOCKEVENTS
517 select PLAT_ORION
518 help
519 Support for the following Marvell MV78xx0 series SoCs:
520 MV781x0, MV782x0.
521
522 config ARCH_ORION5X
523 bool "Marvell Orion"
524 depends on MMU
525 select CPU_FEROCEON
526 select PCI
527 select ARCH_REQUIRE_GPIOLIB
528 select GENERIC_CLOCKEVENTS
529 select PLAT_ORION
530 help
531 Support for the following Marvell Orion 5x series SoCs:
532 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
533 Orion-2 (5281), Orion-1-90 (6183).
534
535 config ARCH_MMP
536 bool "Marvell PXA168/910/MMP2"
537 depends on MMU
538 select ARCH_REQUIRE_GPIOLIB
539 select CLKDEV_LOOKUP
540 select GENERIC_CLOCKEVENTS
541 select HAVE_SCHED_CLOCK
542 select TICK_ONESHOT
543 select PLAT_PXA
544 select SPARSE_IRQ
545 help
546 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
547
548 config ARCH_KS8695
549 bool "Micrel/Kendin KS8695"
550 select CPU_ARM922T
551 select ARCH_REQUIRE_GPIOLIB
552 select ARCH_USES_GETTIMEOFFSET
553 help
554 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
555 System-on-Chip devices.
556
557 config ARCH_NS9XXX
558 bool "NetSilicon NS9xxx"
559 select CPU_ARM926T
560 select GENERIC_GPIO
561 select GENERIC_CLOCKEVENTS
562 select HAVE_CLK
563 help
564 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
565 System.
566
567 <http://www.digi.com/products/microprocessors/index.jsp>
568
569 config ARCH_W90X900
570 bool "Nuvoton W90X900 CPU"
571 select CPU_ARM926T
572 select ARCH_REQUIRE_GPIOLIB
573 select CLKDEV_LOOKUP
574 select GENERIC_CLOCKEVENTS
575 help
576 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
577 At present, the w90x900 has been renamed nuc900, regarding
578 the ARM series product line, you can login the following
579 link address to know more.
580
581 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
582 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
583
584 config ARCH_NUC93X
585 bool "Nuvoton NUC93X CPU"
586 select CPU_ARM926T
587 select CLKDEV_LOOKUP
588 help
589 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
590 low-power and high performance MPEG-4/JPEG multimedia controller chip.
591
592 config ARCH_TEGRA
593 bool "NVIDIA Tegra"
594 select CLKDEV_LOOKUP
595 select GENERIC_TIME
596 select GENERIC_CLOCKEVENTS
597 select GENERIC_GPIO
598 select HAVE_CLK
599 select HAVE_SCHED_CLOCK
600 select ARCH_HAS_BARRIERS if CACHE_L2X0
601 select ARCH_HAS_CPUFREQ
602 help
603 This enables support for NVIDIA Tegra based systems (Tegra APX,
604 Tegra 6xx and Tegra 2 series).
605
606 config ARCH_PNX4008
607 bool "Philips Nexperia PNX4008 Mobile"
608 select CPU_ARM926T
609 select CLKDEV_LOOKUP
610 select ARCH_USES_GETTIMEOFFSET
611 help
612 This enables support for Philips PNX4008 mobile platform.
613
614 config ARCH_PXA
615 bool "PXA2xx/PXA3xx-based"
616 depends on MMU
617 select ARCH_MTD_XIP
618 select ARCH_HAS_CPUFREQ
619 select CLKDEV_LOOKUP
620 select ARCH_REQUIRE_GPIOLIB
621 select GENERIC_CLOCKEVENTS
622 select HAVE_SCHED_CLOCK
623 select TICK_ONESHOT
624 select PLAT_PXA
625 select SPARSE_IRQ
626 help
627 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
628
629 config ARCH_MSM
630 bool "Qualcomm MSM"
631 select HAVE_CLK
632 select GENERIC_CLOCKEVENTS
633 select ARCH_REQUIRE_GPIOLIB
634 select CLKDEV_LOOKUP
635 help
636 Support for Qualcomm MSM/QSD based systems. This runs on the
637 apps processor of the MSM/QSD and depends on a shared memory
638 interface to the modem processor which runs the baseband
639 stack and controls some vital subsystems
640 (clock and power control, etc).
641
642 config ARCH_SHMOBILE
643 bool "Renesas SH-Mobile / R-Mobile"
644 select HAVE_CLK
645 select CLKDEV_LOOKUP
646 select GENERIC_CLOCKEVENTS
647 select NO_IOPORT
648 select SPARSE_IRQ
649 select MULTI_IRQ_HANDLER
650 help
651 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
652
653 config ARCH_RPC
654 bool "RiscPC"
655 select ARCH_ACORN
656 select FIQ
657 select TIMER_ACORN
658 select ARCH_MAY_HAVE_PC_FDC
659 select HAVE_PATA_PLATFORM
660 select ISA_DMA_API
661 select NO_IOPORT
662 select ARCH_SPARSEMEM_ENABLE
663 select ARCH_USES_GETTIMEOFFSET
664 help
665 On the Acorn Risc-PC, Linux can support the internal IDE disk and
666 CD-ROM interface, serial and parallel port, and the floppy drive.
667
668 config ARCH_SA1100
669 bool "SA1100-based"
670 select CPU_SA1100
671 select ISA
672 select ARCH_SPARSEMEM_ENABLE
673 select ARCH_MTD_XIP
674 select ARCH_HAS_CPUFREQ
675 select CPU_FREQ
676 select GENERIC_CLOCKEVENTS
677 select HAVE_CLK
678 select HAVE_SCHED_CLOCK
679 select TICK_ONESHOT
680 select ARCH_REQUIRE_GPIOLIB
681 help
682 Support for StrongARM 11x0 based boards.
683
684 config ARCH_S3C2410
685 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
686 select GENERIC_GPIO
687 select ARCH_HAS_CPUFREQ
688 select HAVE_CLK
689 select ARCH_USES_GETTIMEOFFSET
690 select HAVE_S3C2410_I2C if I2C
691 help
692 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
693 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
694 the Samsung SMDK2410 development board (and derivatives).
695
696 Note, the S3C2416 and the S3C2450 are so close that they even share
697 the same SoC ID code. This means that there is no separate machine
698 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
699
700 config ARCH_S3C64XX
701 bool "Samsung S3C64XX"
702 select PLAT_SAMSUNG
703 select CPU_V6
704 select ARM_VIC
705 select HAVE_CLK
706 select NO_IOPORT
707 select ARCH_USES_GETTIMEOFFSET
708 select ARCH_HAS_CPUFREQ
709 select ARCH_REQUIRE_GPIOLIB
710 select SAMSUNG_CLKSRC
711 select SAMSUNG_IRQ_VIC_TIMER
712 select SAMSUNG_IRQ_UART
713 select S3C_GPIO_TRACK
714 select S3C_GPIO_PULL_UPDOWN
715 select S3C_GPIO_CFG_S3C24XX
716 select S3C_GPIO_CFG_S3C64XX
717 select S3C_DEV_NAND
718 select USB_ARCH_HAS_OHCI
719 select SAMSUNG_GPIOLIB_4BIT
720 select HAVE_S3C2410_I2C if I2C
721 select HAVE_S3C2410_WATCHDOG if WATCHDOG
722 help
723 Samsung S3C64XX series based systems
724
725 config ARCH_S5P64X0
726 bool "Samsung S5P6440 S5P6450"
727 select CPU_V6
728 select GENERIC_GPIO
729 select HAVE_CLK
730 select HAVE_S3C2410_WATCHDOG if WATCHDOG
731 select GENERIC_CLOCKEVENTS
732 select HAVE_SCHED_CLOCK
733 select HAVE_S3C2410_I2C if I2C
734 select HAVE_S3C_RTC if RTC_CLASS
735 help
736 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
737 SMDK6450.
738
739 config ARCH_S5P6442
740 bool "Samsung S5P6442"
741 select CPU_V6
742 select GENERIC_GPIO
743 select HAVE_CLK
744 select ARCH_USES_GETTIMEOFFSET
745 select HAVE_S3C2410_WATCHDOG if WATCHDOG
746 help
747 Samsung S5P6442 CPU based systems
748
749 config ARCH_S5PC100
750 bool "Samsung S5PC100"
751 select GENERIC_GPIO
752 select HAVE_CLK
753 select CPU_V7
754 select ARM_L1_CACHE_SHIFT_6
755 select ARCH_USES_GETTIMEOFFSET
756 select HAVE_S3C2410_I2C if I2C
757 select HAVE_S3C_RTC if RTC_CLASS
758 select HAVE_S3C2410_WATCHDOG if WATCHDOG
759 help
760 Samsung S5PC100 series based systems
761
762 config ARCH_S5PV210
763 bool "Samsung S5PV210/S5PC110"
764 select CPU_V7
765 select ARCH_SPARSEMEM_ENABLE
766 select GENERIC_GPIO
767 select HAVE_CLK
768 select ARM_L1_CACHE_SHIFT_6
769 select ARCH_HAS_CPUFREQ
770 select GENERIC_CLOCKEVENTS
771 select HAVE_SCHED_CLOCK
772 select HAVE_S3C2410_I2C if I2C
773 select HAVE_S3C_RTC if RTC_CLASS
774 select HAVE_S3C2410_WATCHDOG if WATCHDOG
775 help
776 Samsung S5PV210/S5PC110 series based systems
777
778 config ARCH_EXYNOS4
779 bool "Samsung EXYNOS4"
780 select CPU_V7
781 select ARCH_SPARSEMEM_ENABLE
782 select GENERIC_GPIO
783 select HAVE_CLK
784 select ARCH_HAS_CPUFREQ
785 select GENERIC_CLOCKEVENTS
786 select HAVE_S3C_RTC if RTC_CLASS
787 select HAVE_S3C2410_I2C if I2C
788 select HAVE_S3C2410_WATCHDOG if WATCHDOG
789 help
790 Samsung EXYNOS4 series based systems
791
792 config ARCH_SHARK
793 bool "Shark"
794 select CPU_SA110
795 select ISA
796 select ISA_DMA
797 select ZONE_DMA
798 select PCI
799 select ARCH_USES_GETTIMEOFFSET
800 help
801 Support for the StrongARM based Digital DNARD machine, also known
802 as "Shark" (<http://www.shark-linux.de/shark.html>).
803
804 config ARCH_TCC_926
805 bool "Telechips TCC ARM926-based systems"
806 select CPU_ARM926T
807 select HAVE_CLK
808 select CLKDEV_LOOKUP
809 select GENERIC_CLOCKEVENTS
810 help
811 Support for Telechips TCC ARM926-based systems.
812
813 config ARCH_U300
814 bool "ST-Ericsson U300 Series"
815 depends on MMU
816 select CPU_ARM926T
817 select HAVE_SCHED_CLOCK
818 select HAVE_TCM
819 select ARM_AMBA
820 select ARM_VIC
821 select GENERIC_CLOCKEVENTS
822 select CLKDEV_LOOKUP
823 select GENERIC_GPIO
824 help
825 Support for ST-Ericsson U300 series mobile platforms.
826
827 config ARCH_U8500
828 bool "ST-Ericsson U8500 Series"
829 select CPU_V7
830 select ARM_AMBA
831 select GENERIC_CLOCKEVENTS
832 select CLKDEV_LOOKUP
833 select ARCH_REQUIRE_GPIOLIB
834 select ARCH_HAS_CPUFREQ
835 help
836 Support for ST-Ericsson's Ux500 architecture
837
838 config ARCH_NOMADIK
839 bool "STMicroelectronics Nomadik"
840 select ARM_AMBA
841 select ARM_VIC
842 select CPU_ARM926T
843 select CLKDEV_LOOKUP
844 select GENERIC_CLOCKEVENTS
845 select ARCH_REQUIRE_GPIOLIB
846 help
847 Support for the Nomadik platform by ST-Ericsson
848
849 config ARCH_DAVINCI
850 bool "TI DaVinci"
851 select GENERIC_CLOCKEVENTS
852 select ARCH_REQUIRE_GPIOLIB
853 select ZONE_DMA
854 select HAVE_IDE
855 select CLKDEV_LOOKUP
856 select GENERIC_ALLOCATOR
857 select ARCH_HAS_HOLES_MEMORYMODEL
858 help
859 Support for TI's DaVinci platform.
860
861 config ARCH_OMAP
862 bool "TI OMAP"
863 select HAVE_CLK
864 select ARCH_REQUIRE_GPIOLIB
865 select ARCH_HAS_CPUFREQ
866 select GENERIC_CLOCKEVENTS
867 select HAVE_SCHED_CLOCK
868 select ARCH_HAS_HOLES_MEMORYMODEL
869 help
870 Support for TI's OMAP platform (OMAP1/2/3/4).
871
872 config PLAT_SPEAR
873 bool "ST SPEAr"
874 select ARM_AMBA
875 select ARCH_REQUIRE_GPIOLIB
876 select CLKDEV_LOOKUP
877 select GENERIC_CLOCKEVENTS
878 select HAVE_CLK
879 help
880 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
881
882 config ARCH_VT8500
883 bool "VIA/WonderMedia 85xx"
884 select CPU_ARM926T
885 select GENERIC_GPIO
886 select ARCH_HAS_CPUFREQ
887 select GENERIC_CLOCKEVENTS
888 select ARCH_REQUIRE_GPIOLIB
889 select HAVE_PWM
890 help
891 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
892 endchoice
893
894 #
895 # This is sorted alphabetically by mach-* pathname. However, plat-*
896 # Kconfigs may be included either alphabetically (according to the
897 # plat- suffix) or along side the corresponding mach-* source.
898 #
899 source "arch/arm/mach-at91/Kconfig"
900
901 source "arch/arm/mach-bcmring/Kconfig"
902
903 source "arch/arm/mach-clps711x/Kconfig"
904
905 source "arch/arm/mach-cns3xxx/Kconfig"
906
907 source "arch/arm/mach-davinci/Kconfig"
908
909 source "arch/arm/mach-dove/Kconfig"
910
911 source "arch/arm/mach-ep93xx/Kconfig"
912
913 source "arch/arm/mach-footbridge/Kconfig"
914
915 source "arch/arm/mach-gemini/Kconfig"
916
917 source "arch/arm/mach-h720x/Kconfig"
918
919 source "arch/arm/mach-integrator/Kconfig"
920
921 source "arch/arm/mach-iop32x/Kconfig"
922
923 source "arch/arm/mach-iop33x/Kconfig"
924
925 source "arch/arm/mach-iop13xx/Kconfig"
926
927 source "arch/arm/mach-ixp4xx/Kconfig"
928
929 source "arch/arm/mach-ixp2000/Kconfig"
930
931 source "arch/arm/mach-ixp23xx/Kconfig"
932
933 source "arch/arm/mach-kirkwood/Kconfig"
934
935 source "arch/arm/mach-ks8695/Kconfig"
936
937 source "arch/arm/mach-loki/Kconfig"
938
939 source "arch/arm/mach-lpc32xx/Kconfig"
940
941 source "arch/arm/mach-msm/Kconfig"
942
943 source "arch/arm/mach-mv78xx0/Kconfig"
944
945 source "arch/arm/plat-mxc/Kconfig"
946
947 source "arch/arm/mach-mxs/Kconfig"
948
949 source "arch/arm/mach-netx/Kconfig"
950
951 source "arch/arm/mach-nomadik/Kconfig"
952 source "arch/arm/plat-nomadik/Kconfig"
953
954 source "arch/arm/mach-ns9xxx/Kconfig"
955
956 source "arch/arm/mach-nuc93x/Kconfig"
957
958 source "arch/arm/plat-omap/Kconfig"
959
960 source "arch/arm/mach-omap1/Kconfig"
961
962 source "arch/arm/mach-omap2/Kconfig"
963
964 source "arch/arm/mach-orion5x/Kconfig"
965
966 source "arch/arm/mach-pxa/Kconfig"
967 source "arch/arm/plat-pxa/Kconfig"
968
969 source "arch/arm/mach-mmp/Kconfig"
970
971 source "arch/arm/mach-realview/Kconfig"
972
973 source "arch/arm/mach-sa1100/Kconfig"
974
975 source "arch/arm/plat-samsung/Kconfig"
976 source "arch/arm/plat-s3c24xx/Kconfig"
977 source "arch/arm/plat-s5p/Kconfig"
978
979 source "arch/arm/plat-spear/Kconfig"
980
981 source "arch/arm/plat-tcc/Kconfig"
982
983 if ARCH_S3C2410
984 source "arch/arm/mach-s3c2400/Kconfig"
985 source "arch/arm/mach-s3c2410/Kconfig"
986 source "arch/arm/mach-s3c2412/Kconfig"
987 source "arch/arm/mach-s3c2416/Kconfig"
988 source "arch/arm/mach-s3c2440/Kconfig"
989 source "arch/arm/mach-s3c2443/Kconfig"
990 endif
991
992 if ARCH_S3C64XX
993 source "arch/arm/mach-s3c64xx/Kconfig"
994 endif
995
996 source "arch/arm/mach-s5p64x0/Kconfig"
997
998 source "arch/arm/mach-s5p6442/Kconfig"
999
1000 source "arch/arm/mach-s5pc100/Kconfig"
1001
1002 source "arch/arm/mach-s5pv210/Kconfig"
1003
1004 source "arch/arm/mach-exynos4/Kconfig"
1005
1006 source "arch/arm/mach-shmobile/Kconfig"
1007
1008 source "arch/arm/plat-stmp3xxx/Kconfig"
1009
1010 source "arch/arm/mach-tegra/Kconfig"
1011
1012 source "arch/arm/mach-u300/Kconfig"
1013
1014 source "arch/arm/mach-ux500/Kconfig"
1015
1016 source "arch/arm/mach-versatile/Kconfig"
1017
1018 source "arch/arm/mach-vexpress/Kconfig"
1019 source "arch/arm/plat-versatile/Kconfig"
1020
1021 source "arch/arm/mach-vt8500/Kconfig"
1022
1023 source "arch/arm/mach-w90x900/Kconfig"
1024
1025 # Definitions to make life easier
1026 config ARCH_ACORN
1027 bool
1028
1029 config PLAT_IOP
1030 bool
1031 select GENERIC_CLOCKEVENTS
1032 select HAVE_SCHED_CLOCK
1033
1034 config PLAT_ORION
1035 bool
1036 select HAVE_SCHED_CLOCK
1037
1038 config PLAT_PXA
1039 bool
1040
1041 config PLAT_VERSATILE
1042 bool
1043
1044 config ARM_TIMER_SP804
1045 bool
1046
1047 source arch/arm/mm/Kconfig
1048
1049 config IWMMXT
1050 bool "Enable iWMMXt support"
1051 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1052 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1053 help
1054 Enable support for iWMMXt context switching at run time if
1055 running on a CPU that supports it.
1056
1057 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1058 config XSCALE_PMU
1059 bool
1060 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1061 default y
1062
1063 config CPU_HAS_PMU
1064 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1065 (!ARCH_OMAP3 || OMAP3_EMU)
1066 default y
1067 bool
1068
1069 config MULTI_IRQ_HANDLER
1070 bool
1071 help
1072 Allow each machine to specify it's own IRQ handler at run time.
1073
1074 if !MMU
1075 source "arch/arm/Kconfig-nommu"
1076 endif
1077
1078 config ARM_ERRATA_411920
1079 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1080 depends on CPU_V6 || CPU_V6K
1081 help
1082 Invalidation of the Instruction Cache operation can
1083 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1084 It does not affect the MPCore. This option enables the ARM Ltd.
1085 recommended workaround.
1086
1087 config ARM_ERRATA_430973
1088 bool "ARM errata: Stale prediction on replaced interworking branch"
1089 depends on CPU_V7
1090 help
1091 This option enables the workaround for the 430973 Cortex-A8
1092 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1093 interworking branch is replaced with another code sequence at the
1094 same virtual address, whether due to self-modifying code or virtual
1095 to physical address re-mapping, Cortex-A8 does not recover from the
1096 stale interworking branch prediction. This results in Cortex-A8
1097 executing the new code sequence in the incorrect ARM or Thumb state.
1098 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1099 and also flushes the branch target cache at every context switch.
1100 Note that setting specific bits in the ACTLR register may not be
1101 available in non-secure mode.
1102
1103 config ARM_ERRATA_458693
1104 bool "ARM errata: Processor deadlock when a false hazard is created"
1105 depends on CPU_V7
1106 help
1107 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1108 erratum. For very specific sequences of memory operations, it is
1109 possible for a hazard condition intended for a cache line to instead
1110 be incorrectly associated with a different cache line. This false
1111 hazard might then cause a processor deadlock. The workaround enables
1112 the L1 caching of the NEON accesses and disables the PLD instruction
1113 in the ACTLR register. Note that setting specific bits in the ACTLR
1114 register may not be available in non-secure mode.
1115
1116 config ARM_ERRATA_460075
1117 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1118 depends on CPU_V7
1119 help
1120 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1121 erratum. Any asynchronous access to the L2 cache may encounter a
1122 situation in which recent store transactions to the L2 cache are lost
1123 and overwritten with stale memory contents from external memory. The
1124 workaround disables the write-allocate mode for the L2 cache via the
1125 ACTLR register. Note that setting specific bits in the ACTLR register
1126 may not be available in non-secure mode.
1127
1128 config ARM_ERRATA_742230
1129 bool "ARM errata: DMB operation may be faulty"
1130 depends on CPU_V7 && SMP
1131 help
1132 This option enables the workaround for the 742230 Cortex-A9
1133 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1134 between two write operations may not ensure the correct visibility
1135 ordering of the two writes. This workaround sets a specific bit in
1136 the diagnostic register of the Cortex-A9 which causes the DMB
1137 instruction to behave as a DSB, ensuring the correct behaviour of
1138 the two writes.
1139
1140 config ARM_ERRATA_742231
1141 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1142 depends on CPU_V7 && SMP
1143 help
1144 This option enables the workaround for the 742231 Cortex-A9
1145 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1146 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1147 accessing some data located in the same cache line, may get corrupted
1148 data due to bad handling of the address hazard when the line gets
1149 replaced from one of the CPUs at the same time as another CPU is
1150 accessing it. This workaround sets specific bits in the diagnostic
1151 register of the Cortex-A9 which reduces the linefill issuing
1152 capabilities of the processor.
1153
1154 config PL310_ERRATA_588369
1155 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1156 depends on CACHE_L2X0
1157 help
1158 The PL310 L2 cache controller implements three types of Clean &
1159 Invalidate maintenance operations: by Physical Address
1160 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1161 They are architecturally defined to behave as the execution of a
1162 clean operation followed immediately by an invalidate operation,
1163 both performing to the same memory location. This functionality
1164 is not correctly implemented in PL310 as clean lines are not
1165 invalidated as a result of these operations.
1166
1167 config ARM_ERRATA_720789
1168 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1169 depends on CPU_V7 && SMP
1170 help
1171 This option enables the workaround for the 720789 Cortex-A9 (prior to
1172 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1173 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1174 As a consequence of this erratum, some TLB entries which should be
1175 invalidated are not, resulting in an incoherency in the system page
1176 tables. The workaround changes the TLB flushing routines to invalidate
1177 entries regardless of the ASID.
1178
1179 config PL310_ERRATA_727915
1180 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1181 depends on CACHE_L2X0
1182 help
1183 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1184 operation (offset 0x7FC). This operation runs in background so that
1185 PL310 can handle normal accesses while it is in progress. Under very
1186 rare circumstances, due to this erratum, write data can be lost when
1187 PL310 treats a cacheable write transaction during a Clean &
1188 Invalidate by Way operation.
1189
1190 config ARM_ERRATA_743622
1191 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1192 depends on CPU_V7
1193 help
1194 This option enables the workaround for the 743622 Cortex-A9
1195 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1196 optimisation in the Cortex-A9 Store Buffer may lead to data
1197 corruption. This workaround sets a specific bit in the diagnostic
1198 register of the Cortex-A9 which disables the Store Buffer
1199 optimisation, preventing the defect from occurring. This has no
1200 visible impact on the overall performance or power consumption of the
1201 processor.
1202
1203 config ARM_ERRATA_751472
1204 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1205 depends on CPU_V7 && SMP
1206 help
1207 This option enables the workaround for the 751472 Cortex-A9 (prior
1208 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1209 completion of a following broadcasted operation if the second
1210 operation is received by a CPU before the ICIALLUIS has completed,
1211 potentially leading to corrupted entries in the cache or TLB.
1212
1213 config ARM_ERRATA_753970
1214 bool "ARM errata: cache sync operation may be faulty"
1215 depends on CACHE_PL310
1216 help
1217 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1218
1219 Under some condition the effect of cache sync operation on
1220 the store buffer still remains when the operation completes.
1221 This means that the store buffer is always asked to drain and
1222 this prevents it from merging any further writes. The workaround
1223 is to replace the normal offset of cache sync operation (0x730)
1224 by another offset targeting an unmapped PL310 register 0x740.
1225 This has the same effect as the cache sync operation: store buffer
1226 drain and waiting for all buffers empty.
1227
1228 config ARM_ERRATA_754322
1229 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1230 depends on CPU_V7
1231 help
1232 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1233 r3p*) erratum. A speculative memory access may cause a page table walk
1234 which starts prior to an ASID switch but completes afterwards. This
1235 can populate the micro-TLB with a stale entry which may be hit with
1236 the new ASID. This workaround places two dsb instructions in the mm
1237 switching code so that no page table walks can cross the ASID switch.
1238
1239 config ARM_ERRATA_754327
1240 bool "ARM errata: no automatic Store Buffer drain"
1241 depends on CPU_V7 && SMP
1242 help
1243 This option enables the workaround for the 754327 Cortex-A9 (prior to
1244 r2p0) erratum. The Store Buffer does not have any automatic draining
1245 mechanism and therefore a livelock may occur if an external agent
1246 continuously polls a memory location waiting to observe an update.
1247 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1248 written polling loops from denying visibility of updates to memory.
1249
1250 endmenu
1251
1252 source "arch/arm/common/Kconfig"
1253
1254 menu "Bus support"
1255
1256 config ARM_AMBA
1257 bool
1258
1259 config ISA
1260 bool
1261 help
1262 Find out whether you have ISA slots on your motherboard. ISA is the
1263 name of a bus system, i.e. the way the CPU talks to the other stuff
1264 inside your box. Other bus systems are PCI, EISA, MicroChannel
1265 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1266 newer boards don't support it. If you have ISA, say Y, otherwise N.
1267
1268 # Select ISA DMA controller support
1269 config ISA_DMA
1270 bool
1271 select ISA_DMA_API
1272
1273 # Select ISA DMA interface
1274 config ISA_DMA_API
1275 bool
1276
1277 config PCI
1278 bool "PCI support" if MIGHT_HAVE_PCI
1279 help
1280 Find out whether you have a PCI motherboard. PCI is the name of a
1281 bus system, i.e. the way the CPU talks to the other stuff inside
1282 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1283 VESA. If you have PCI, say Y, otherwise N.
1284
1285 config PCI_DOMAINS
1286 bool
1287 depends on PCI
1288
1289 config PCI_NANOENGINE
1290 bool "BSE nanoEngine PCI support"
1291 depends on SA1100_NANOENGINE
1292 help
1293 Enable PCI on the BSE nanoEngine board.
1294
1295 config PCI_SYSCALL
1296 def_bool PCI
1297
1298 # Select the host bridge type
1299 config PCI_HOST_VIA82C505
1300 bool
1301 depends on PCI && ARCH_SHARK
1302 default y
1303
1304 config PCI_HOST_ITE8152
1305 bool
1306 depends on PCI && MACH_ARMCORE
1307 default y
1308 select DMABOUNCE
1309
1310 source "drivers/pci/Kconfig"
1311
1312 source "drivers/pcmcia/Kconfig"
1313
1314 endmenu
1315
1316 menu "Kernel Features"
1317
1318 source "kernel/time/Kconfig"
1319
1320 config SMP
1321 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1322 depends on EXPERIMENTAL
1323 depends on CPU_V6K || CPU_V7
1324 depends on GENERIC_CLOCKEVENTS
1325 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1326 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1327 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1328 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1329 select USE_GENERIC_SMP_HELPERS
1330 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1331 help
1332 This enables support for systems with more than one CPU. If you have
1333 a system with only one CPU, like most personal computers, say N. If
1334 you have a system with more than one CPU, say Y.
1335
1336 If you say N here, the kernel will run on single and multiprocessor
1337 machines, but will use only one CPU of a multiprocessor machine. If
1338 you say Y here, the kernel will run on many, but not all, single
1339 processor machines. On a single processor machine, the kernel will
1340 run faster if you say N here.
1341
1342 See also <file:Documentation/i386/IO-APIC.txt>,
1343 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1344 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1345
1346 If you don't know what to do here, say N.
1347
1348 config SMP_ON_UP
1349 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1350 depends on EXPERIMENTAL
1351 depends on SMP && !XIP_KERNEL
1352 default y
1353 help
1354 SMP kernels contain instructions which fail on non-SMP processors.
1355 Enabling this option allows the kernel to modify itself to make
1356 these instructions safe. Disabling it allows about 1K of space
1357 savings.
1358
1359 If you don't know what to do here, say Y.
1360
1361 config HAVE_ARM_SCU
1362 bool
1363 depends on SMP
1364 help
1365 This option enables support for the ARM system coherency unit
1366
1367 config HAVE_ARM_TWD
1368 bool
1369 depends on SMP
1370 select TICK_ONESHOT
1371 help
1372 This options enables support for the ARM timer and watchdog unit
1373
1374 choice
1375 prompt "Memory split"
1376 default VMSPLIT_3G
1377 help
1378 Select the desired split between kernel and user memory.
1379
1380 If you are not absolutely sure what you are doing, leave this
1381 option alone!
1382
1383 config VMSPLIT_3G
1384 bool "3G/1G user/kernel split"
1385 config VMSPLIT_2G
1386 bool "2G/2G user/kernel split"
1387 config VMSPLIT_1G
1388 bool "1G/3G user/kernel split"
1389 endchoice
1390
1391 config PAGE_OFFSET
1392 hex
1393 default 0x40000000 if VMSPLIT_1G
1394 default 0x80000000 if VMSPLIT_2G
1395 default 0xC0000000
1396
1397 config NR_CPUS
1398 int "Maximum number of CPUs (2-32)"
1399 range 2 32
1400 depends on SMP
1401 default "4"
1402
1403 config HOTPLUG_CPU
1404 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1405 depends on SMP && HOTPLUG && EXPERIMENTAL
1406 depends on !ARCH_MSM
1407 help
1408 Say Y here to experiment with turning CPUs off and on. CPUs
1409 can be controlled through /sys/devices/system/cpu.
1410
1411 config LOCAL_TIMERS
1412 bool "Use local timer interrupts"
1413 depends on SMP
1414 default y
1415 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1416 help
1417 Enable support for local timers on SMP platforms, rather then the
1418 legacy IPI broadcast method. Local timers allows the system
1419 accounting to be spread across the timer interval, preventing a
1420 "thundering herd" at every timer tick.
1421
1422 source kernel/Kconfig.preempt
1423
1424 config HZ
1425 int
1426 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1427 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
1428 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1429 default AT91_TIMER_HZ if ARCH_AT91
1430 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1431 default 100
1432
1433 config THUMB2_KERNEL
1434 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1435 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1436 select AEABI
1437 select ARM_ASM_UNIFIED
1438 help
1439 By enabling this option, the kernel will be compiled in
1440 Thumb-2 mode. A compiler/assembler that understand the unified
1441 ARM-Thumb syntax is needed.
1442
1443 If unsure, say N.
1444
1445 config THUMB2_AVOID_R_ARM_THM_JUMP11
1446 bool "Work around buggy Thumb-2 short branch relocations in gas"
1447 depends on THUMB2_KERNEL && MODULES
1448 default y
1449 help
1450 Various binutils versions can resolve Thumb-2 branches to
1451 locally-defined, preemptible global symbols as short-range "b.n"
1452 branch instructions.
1453
1454 This is a problem, because there's no guarantee the final
1455 destination of the symbol, or any candidate locations for a
1456 trampoline, are within range of the branch. For this reason, the
1457 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1458 relocation in modules at all, and it makes little sense to add
1459 support.
1460
1461 The symptom is that the kernel fails with an "unsupported
1462 relocation" error when loading some modules.
1463
1464 Until fixed tools are available, passing
1465 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1466 code which hits this problem, at the cost of a bit of extra runtime
1467 stack usage in some cases.
1468
1469 The problem is described in more detail at:
1470 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1471
1472 Only Thumb-2 kernels are affected.
1473
1474 Unless you are sure your tools don't have this problem, say Y.
1475
1476 config ARM_ASM_UNIFIED
1477 bool
1478
1479 config AEABI
1480 bool "Use the ARM EABI to compile the kernel"
1481 help
1482 This option allows for the kernel to be compiled using the latest
1483 ARM ABI (aka EABI). This is only useful if you are using a user
1484 space environment that is also compiled with EABI.
1485
1486 Since there are major incompatibilities between the legacy ABI and
1487 EABI, especially with regard to structure member alignment, this
1488 option also changes the kernel syscall calling convention to
1489 disambiguate both ABIs and allow for backward compatibility support
1490 (selected with CONFIG_OABI_COMPAT).
1491
1492 To use this you need GCC version 4.0.0 or later.
1493
1494 config OABI_COMPAT
1495 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1496 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1497 default y
1498 help
1499 This option preserves the old syscall interface along with the
1500 new (ARM EABI) one. It also provides a compatibility layer to
1501 intercept syscalls that have structure arguments which layout
1502 in memory differs between the legacy ABI and the new ARM EABI
1503 (only for non "thumb" binaries). This option adds a tiny
1504 overhead to all syscalls and produces a slightly larger kernel.
1505 If you know you'll be using only pure EABI user space then you
1506 can say N here. If this option is not selected and you attempt
1507 to execute a legacy ABI binary then the result will be
1508 UNPREDICTABLE (in fact it can be predicted that it won't work
1509 at all). If in doubt say Y.
1510
1511 config ARCH_HAS_HOLES_MEMORYMODEL
1512 bool
1513
1514 config ARCH_SPARSEMEM_ENABLE
1515 bool
1516
1517 config ARCH_SPARSEMEM_DEFAULT
1518 def_bool ARCH_SPARSEMEM_ENABLE
1519
1520 config ARCH_SELECT_MEMORY_MODEL
1521 def_bool ARCH_SPARSEMEM_ENABLE
1522
1523 config HIGHMEM
1524 bool "High Memory Support (EXPERIMENTAL)"
1525 depends on MMU && EXPERIMENTAL
1526 help
1527 The address space of ARM processors is only 4 Gigabytes large
1528 and it has to accommodate user address space, kernel address
1529 space as well as some memory mapped IO. That means that, if you
1530 have a large amount of physical memory and/or IO, not all of the
1531 memory can be "permanently mapped" by the kernel. The physical
1532 memory that is not permanently mapped is called "high memory".
1533
1534 Depending on the selected kernel/user memory split, minimum
1535 vmalloc space and actual amount of RAM, you may not need this
1536 option which should result in a slightly faster kernel.
1537
1538 If unsure, say n.
1539
1540 config HIGHPTE
1541 bool "Allocate 2nd-level pagetables from highmem"
1542 depends on HIGHMEM
1543 depends on !OUTER_CACHE
1544
1545 config HW_PERF_EVENTS
1546 bool "Enable hardware performance counter support for perf events"
1547 depends on PERF_EVENTS && CPU_HAS_PMU
1548 default y
1549 help
1550 Enable hardware performance counter support for perf events. If
1551 disabled, perf events will use software events only.
1552
1553 source "mm/Kconfig"
1554
1555 config FORCE_MAX_ZONEORDER
1556 int "Maximum zone order" if ARCH_SHMOBILE
1557 range 11 64 if ARCH_SHMOBILE
1558 default "9" if SA1111
1559 default "11"
1560 help
1561 The kernel memory allocator divides physically contiguous memory
1562 blocks into "zones", where each zone is a power of two number of
1563 pages. This option selects the largest power of two that the kernel
1564 keeps in the memory allocator. If you need to allocate very large
1565 blocks of physically contiguous memory, then you may need to
1566 increase this value.
1567
1568 This config option is actually maximum order plus one. For example,
1569 a value of 11 means that the largest free memory block is 2^10 pages.
1570
1571 config LEDS
1572 bool "Timer and CPU usage LEDs"
1573 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1574 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1575 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1576 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1577 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1578 ARCH_AT91 || ARCH_DAVINCI || \
1579 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1580 help
1581 If you say Y here, the LEDs on your machine will be used
1582 to provide useful information about your current system status.
1583
1584 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1585 be able to select which LEDs are active using the options below. If
1586 you are compiling a kernel for the EBSA-110 or the LART however, the
1587 red LED will simply flash regularly to indicate that the system is
1588 still functional. It is safe to say Y here if you have a CATS
1589 system, but the driver will do nothing.
1590
1591 config LEDS_TIMER
1592 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1593 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1594 || MACH_OMAP_PERSEUS2
1595 depends on LEDS
1596 depends on !GENERIC_CLOCKEVENTS
1597 default y if ARCH_EBSA110
1598 help
1599 If you say Y here, one of the system LEDs (the green one on the
1600 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1601 will flash regularly to indicate that the system is still
1602 operational. This is mainly useful to kernel hackers who are
1603 debugging unstable kernels.
1604
1605 The LART uses the same LED for both Timer LED and CPU usage LED
1606 functions. You may choose to use both, but the Timer LED function
1607 will overrule the CPU usage LED.
1608
1609 config LEDS_CPU
1610 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1611 !ARCH_OMAP) \
1612 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1613 || MACH_OMAP_PERSEUS2
1614 depends on LEDS
1615 help
1616 If you say Y here, the red LED will be used to give a good real
1617 time indication of CPU usage, by lighting whenever the idle task
1618 is not currently executing.
1619
1620 The LART uses the same LED for both Timer LED and CPU usage LED
1621 functions. You may choose to use both, but the Timer LED function
1622 will overrule the CPU usage LED.
1623
1624 config ALIGNMENT_TRAP
1625 bool
1626 depends on CPU_CP15_MMU
1627 default y if !ARCH_EBSA110
1628 select HAVE_PROC_CPU if PROC_FS
1629 help
1630 ARM processors cannot fetch/store information which is not
1631 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1632 address divisible by 4. On 32-bit ARM processors, these non-aligned
1633 fetch/store instructions will be emulated in software if you say
1634 here, which has a severe performance impact. This is necessary for
1635 correct operation of some network protocols. With an IP-only
1636 configuration it is safe to say N, otherwise say Y.
1637
1638 config UACCESS_WITH_MEMCPY
1639 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1640 depends on MMU && EXPERIMENTAL
1641 default y if CPU_FEROCEON
1642 help
1643 Implement faster copy_to_user and clear_user methods for CPU
1644 cores where a 8-word STM instruction give significantly higher
1645 memory write throughput than a sequence of individual 32bit stores.
1646
1647 A possible side effect is a slight increase in scheduling latency
1648 between threads sharing the same address space if they invoke
1649 such copy operations with large buffers.
1650
1651 However, if the CPU data cache is using a write-allocate mode,
1652 this option is unlikely to provide any performance gain.
1653
1654 config SECCOMP
1655 bool
1656 prompt "Enable seccomp to safely compute untrusted bytecode"
1657 ---help---
1658 This kernel feature is useful for number crunching applications
1659 that may need to compute untrusted bytecode during their
1660 execution. By using pipes or other transports made available to
1661 the process as file descriptors supporting the read/write
1662 syscalls, it's possible to isolate those applications in
1663 their own address space using seccomp. Once seccomp is
1664 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1665 and the task is only allowed to execute a few safe syscalls
1666 defined by each seccomp mode.
1667
1668 config CC_STACKPROTECTOR
1669 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1670 depends on EXPERIMENTAL
1671 help
1672 This option turns on the -fstack-protector GCC feature. This
1673 feature puts, at the beginning of functions, a canary value on
1674 the stack just before the return address, and validates
1675 the value just before actually returning. Stack based buffer
1676 overflows (that need to overwrite this return address) now also
1677 overwrite the canary, which gets detected and the attack is then
1678 neutralized via a kernel panic.
1679 This feature requires gcc version 4.2 or above.
1680
1681 config DEPRECATED_PARAM_STRUCT
1682 bool "Provide old way to pass kernel parameters"
1683 help
1684 This was deprecated in 2001 and announced to live on for 5 years.
1685 Some old boot loaders still use this way.
1686
1687 endmenu
1688
1689 menu "Boot options"
1690
1691 # Compressed boot loader in ROM. Yes, we really want to ask about
1692 # TEXT and BSS so we preserve their values in the config files.
1693 config ZBOOT_ROM_TEXT
1694 hex "Compressed ROM boot loader base address"
1695 default "0"
1696 help
1697 The physical address at which the ROM-able zImage is to be
1698 placed in the target. Platforms which normally make use of
1699 ROM-able zImage formats normally set this to a suitable
1700 value in their defconfig file.
1701
1702 If ZBOOT_ROM is not enabled, this has no effect.
1703
1704 config ZBOOT_ROM_BSS
1705 hex "Compressed ROM boot loader BSS address"
1706 default "0"
1707 help
1708 The base address of an area of read/write memory in the target
1709 for the ROM-able zImage which must be available while the
1710 decompressor is running. It must be large enough to hold the
1711 entire decompressed kernel plus an additional 128 KiB.
1712 Platforms which normally make use of ROM-able zImage formats
1713 normally set this to a suitable value in their defconfig file.
1714
1715 If ZBOOT_ROM is not enabled, this has no effect.
1716
1717 config ZBOOT_ROM
1718 bool "Compressed boot loader in ROM/flash"
1719 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1720 help
1721 Say Y here if you intend to execute your compressed kernel image
1722 (zImage) directly from ROM or flash. If unsure, say N.
1723
1724 config ZBOOT_ROM_MMCIF
1725 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1726 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1727 help
1728 Say Y here to include experimental MMCIF loading code in the
1729 ROM-able zImage. With this enabled it is possible to write the
1730 the ROM-able zImage kernel image to an MMC card and boot the
1731 kernel straight from the reset vector. At reset the processor
1732 Mask ROM will load the first part of the the ROM-able zImage
1733 which in turn loads the rest the kernel image to RAM using the
1734 MMCIF hardware block.
1735
1736 config CMDLINE
1737 string "Default kernel command string"
1738 default ""
1739 help
1740 On some architectures (EBSA110 and CATS), there is currently no way
1741 for the boot loader to pass arguments to the kernel. For these
1742 architectures, you should supply some command-line options at build
1743 time by entering them here. As a minimum, you should specify the
1744 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1745
1746 config CMDLINE_FORCE
1747 bool "Always use the default kernel command string"
1748 depends on CMDLINE != ""
1749 help
1750 Always use the default kernel command string, even if the boot
1751 loader passes other arguments to the kernel.
1752 This is useful if you cannot or don't want to change the
1753 command-line options your boot loader passes to the kernel.
1754
1755 If unsure, say N.
1756
1757 config XIP_KERNEL
1758 bool "Kernel Execute-In-Place from ROM"
1759 depends on !ZBOOT_ROM
1760 help
1761 Execute-In-Place allows the kernel to run from non-volatile storage
1762 directly addressable by the CPU, such as NOR flash. This saves RAM
1763 space since the text section of the kernel is not loaded from flash
1764 to RAM. Read-write sections, such as the data section and stack,
1765 are still copied to RAM. The XIP kernel is not compressed since
1766 it has to run directly from flash, so it will take more space to
1767 store it. The flash address used to link the kernel object files,
1768 and for storing it, is configuration dependent. Therefore, if you
1769 say Y here, you must know the proper physical address where to
1770 store the kernel image depending on your own flash memory usage.
1771
1772 Also note that the make target becomes "make xipImage" rather than
1773 "make zImage" or "make Image". The final kernel binary to put in
1774 ROM memory will be arch/arm/boot/xipImage.
1775
1776 If unsure, say N.
1777
1778 config XIP_PHYS_ADDR
1779 hex "XIP Kernel Physical Location"
1780 depends on XIP_KERNEL
1781 default "0x00080000"
1782 help
1783 This is the physical address in your flash memory the kernel will
1784 be linked for and stored to. This address is dependent on your
1785 own flash usage.
1786
1787 config KEXEC
1788 bool "Kexec system call (EXPERIMENTAL)"
1789 depends on EXPERIMENTAL
1790 help
1791 kexec is a system call that implements the ability to shutdown your
1792 current kernel, and to start another kernel. It is like a reboot
1793 but it is independent of the system firmware. And like a reboot
1794 you can start any kernel with it, not just Linux.
1795
1796 It is an ongoing process to be certain the hardware in a machine
1797 is properly shutdown, so do not be surprised if this code does not
1798 initially work for you. It may help to enable device hotplugging
1799 support.
1800
1801 config ATAGS_PROC
1802 bool "Export atags in procfs"
1803 depends on KEXEC
1804 default y
1805 help
1806 Should the atags used to boot the kernel be exported in an "atags"
1807 file in procfs. Useful with kexec.
1808
1809 config CRASH_DUMP
1810 bool "Build kdump crash kernel (EXPERIMENTAL)"
1811 depends on EXPERIMENTAL
1812 help
1813 Generate crash dump after being started by kexec. This should
1814 be normally only set in special crash dump kernels which are
1815 loaded in the main kernel with kexec-tools into a specially
1816 reserved region and then later executed after a crash by
1817 kdump/kexec. The crash dump kernel must be compiled to a
1818 memory address not used by the main kernel
1819
1820 For more details see Documentation/kdump/kdump.txt
1821
1822 config AUTO_ZRELADDR
1823 bool "Auto calculation of the decompressed kernel image address"
1824 depends on !ZBOOT_ROM && !ARCH_U300
1825 help
1826 ZRELADDR is the physical address where the decompressed kernel
1827 image will be placed. If AUTO_ZRELADDR is selected, the address
1828 will be determined at run-time by masking the current IP with
1829 0xf8000000. This assumes the zImage being placed in the first 128MB
1830 from start of memory.
1831
1832 endmenu
1833
1834 menu "CPU Power Management"
1835
1836 if ARCH_HAS_CPUFREQ
1837
1838 source "drivers/cpufreq/Kconfig"
1839
1840 config CPU_FREQ_IMX
1841 tristate "CPUfreq driver for i.MX CPUs"
1842 depends on ARCH_MXC && CPU_FREQ
1843 help
1844 This enables the CPUfreq driver for i.MX CPUs.
1845
1846 config CPU_FREQ_SA1100
1847 bool
1848
1849 config CPU_FREQ_SA1110
1850 bool
1851
1852 config CPU_FREQ_INTEGRATOR
1853 tristate "CPUfreq driver for ARM Integrator CPUs"
1854 depends on ARCH_INTEGRATOR && CPU_FREQ
1855 default y
1856 help
1857 This enables the CPUfreq driver for ARM Integrator CPUs.
1858
1859 For details, take a look at <file:Documentation/cpu-freq>.
1860
1861 If in doubt, say Y.
1862
1863 config CPU_FREQ_PXA
1864 bool
1865 depends on CPU_FREQ && ARCH_PXA && PXA25x
1866 default y
1867 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1868
1869 config CPU_FREQ_S3C64XX
1870 bool "CPUfreq support for Samsung S3C64XX CPUs"
1871 depends on CPU_FREQ && CPU_S3C6410
1872
1873 config CPU_FREQ_S3C
1874 bool
1875 help
1876 Internal configuration node for common cpufreq on Samsung SoC
1877
1878 config CPU_FREQ_S3C24XX
1879 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1880 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1881 select CPU_FREQ_S3C
1882 help
1883 This enables the CPUfreq driver for the Samsung S3C24XX family
1884 of CPUs.
1885
1886 For details, take a look at <file:Documentation/cpu-freq>.
1887
1888 If in doubt, say N.
1889
1890 config CPU_FREQ_S3C24XX_PLL
1891 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1892 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1893 help
1894 Compile in support for changing the PLL frequency from the
1895 S3C24XX series CPUfreq driver. The PLL takes time to settle
1896 after a frequency change, so by default it is not enabled.
1897
1898 This also means that the PLL tables for the selected CPU(s) will
1899 be built which may increase the size of the kernel image.
1900
1901 config CPU_FREQ_S3C24XX_DEBUG
1902 bool "Debug CPUfreq Samsung driver core"
1903 depends on CPU_FREQ_S3C24XX
1904 help
1905 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1906
1907 config CPU_FREQ_S3C24XX_IODEBUG
1908 bool "Debug CPUfreq Samsung driver IO timing"
1909 depends on CPU_FREQ_S3C24XX
1910 help
1911 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1912
1913 config CPU_FREQ_S3C24XX_DEBUGFS
1914 bool "Export debugfs for CPUFreq"
1915 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1916 help
1917 Export status information via debugfs.
1918
1919 endif
1920
1921 source "drivers/cpuidle/Kconfig"
1922
1923 endmenu
1924
1925 menu "Floating point emulation"
1926
1927 comment "At least one emulation must be selected"
1928
1929 config FPE_NWFPE
1930 bool "NWFPE math emulation"
1931 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1932 ---help---
1933 Say Y to include the NWFPE floating point emulator in the kernel.
1934 This is necessary to run most binaries. Linux does not currently
1935 support floating point hardware so you need to say Y here even if
1936 your machine has an FPA or floating point co-processor podule.
1937
1938 You may say N here if you are going to load the Acorn FPEmulator
1939 early in the bootup.
1940
1941 config FPE_NWFPE_XP
1942 bool "Support extended precision"
1943 depends on FPE_NWFPE
1944 help
1945 Say Y to include 80-bit support in the kernel floating-point
1946 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1947 Note that gcc does not generate 80-bit operations by default,
1948 so in most cases this option only enlarges the size of the
1949 floating point emulator without any good reason.
1950
1951 You almost surely want to say N here.
1952
1953 config FPE_FASTFPE
1954 bool "FastFPE math emulation (EXPERIMENTAL)"
1955 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1956 ---help---
1957 Say Y here to include the FAST floating point emulator in the kernel.
1958 This is an experimental much faster emulator which now also has full
1959 precision for the mantissa. It does not support any exceptions.
1960 It is very simple, and approximately 3-6 times faster than NWFPE.
1961
1962 It should be sufficient for most programs. It may be not suitable
1963 for scientific calculations, but you have to check this for yourself.
1964 If you do not feel you need a faster FP emulation you should better
1965 choose NWFPE.
1966
1967 config VFP
1968 bool "VFP-format floating point maths"
1969 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1970 help
1971 Say Y to include VFP support code in the kernel. This is needed
1972 if your hardware includes a VFP unit.
1973
1974 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1975 release notes and additional status information.
1976
1977 Say N if your target does not have VFP hardware.
1978
1979 config VFPv3
1980 bool
1981 depends on VFP
1982 default y if CPU_V7
1983
1984 config NEON
1985 bool "Advanced SIMD (NEON) Extension support"
1986 depends on VFPv3 && CPU_V7
1987 help
1988 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1989 Extension.
1990
1991 endmenu
1992
1993 menu "Userspace binary formats"
1994
1995 source "fs/Kconfig.binfmt"
1996
1997 config ARTHUR
1998 tristate "RISC OS personality"
1999 depends on !AEABI
2000 help
2001 Say Y here to include the kernel code necessary if you want to run
2002 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2003 experimental; if this sounds frightening, say N and sleep in peace.
2004 You can also say M here to compile this support as a module (which
2005 will be called arthur).
2006
2007 endmenu
2008
2009 menu "Power management options"
2010
2011 source "kernel/power/Kconfig"
2012
2013 config ARCH_SUSPEND_POSSIBLE
2014 depends on !ARCH_S5P64X0 && !ARCH_S5P6442
2015 def_bool y
2016
2017 endmenu
2018
2019 source "net/Kconfig"
2020
2021 source "drivers/Kconfig"
2022
2023 source "fs/Kconfig"
2024
2025 source "arch/arm/Kconfig.debug"
2026
2027 source "security/Kconfig"
2028
2029 source "crypto/Kconfig"
2030
2031 source "lib/Kconfig"