arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 199         default y
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary.
 209
 210           Only disable this option if you know that you do not require
 211           this feature (eg, building a kernel for a single machine) and
 212           you need to shrink the kernel to the minimal size.
 213
 214 config NO_MACH_MEMORY_H
 215         bool
 216         help
 217           Select this when mach/memory.h is removed.
 218
 219 config PHYS_OFFSET
 220         hex "Physical address of main memory"
 221         depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H
 222         help
 223           Please provide the physical address corresponding to the
 224           location of main memory in your system.
 225
 226 source "init/Kconfig"
 227
 228 source "kernel/Kconfig.freezer"
 229
 230 menu "System Type"
 231
 232 config MMU
 233         bool "MMU-based Paged Memory Management Support"
 234         default y
 235         help
 236           Select if you want MMU-based virtualised addressing space
 237           support by paged memory management. If unsure, say 'Y'.
 238
 239 #
 240 # The "ARM system type" choice list is ordered alphabetically by option
 241 # text.  Please add new entries in the option alphabetic order.
 242 #
 243 choice
 244         prompt "ARM system type"
 245         default ARCH_VERSATILE
 246
 247 config ARCH_INTEGRATOR
 248         bool "ARM Ltd. Integrator family"
 249         select ARM_AMBA
 250         select ARCH_HAS_CPUFREQ
 251         select CLKDEV_LOOKUP
 252         select HAVE_MACH_CLKDEV
 253         select ICST
 254         select GENERIC_CLOCKEVENTS
 255         select PLAT_VERSATILE
 256         select PLAT_VERSATILE_FPGA_IRQ
 257         help
 258           Support for ARM's Integrator platform.
 259
 260 config ARCH_REALVIEW
 261         bool "ARM Ltd. RealView family"
 262         select ARM_AMBA
 263         select CLKDEV_LOOKUP
 264         select HAVE_MACH_CLKDEV
 265         select ICST
 266         select GENERIC_CLOCKEVENTS
 267         select ARCH_WANT_OPTIONAL_GPIOLIB
 268         select PLAT_VERSATILE
 269         select PLAT_VERSATILE_CLCD
 270         select ARM_TIMER_SP804
 271         select GPIO_PL061 if GPIOLIB
 272         help
 273           This enables support for ARM Ltd RealView boards.
 274
 275 config ARCH_VERSATILE
 276         bool "ARM Ltd. Versatile family"
 277         select ARM_AMBA
 278         select ARM_VIC
 279         select CLKDEV_LOOKUP
 280         select HAVE_MACH_CLKDEV
 281         select ICST
 282         select GENERIC_CLOCKEVENTS
 283         select ARCH_WANT_OPTIONAL_GPIOLIB
 284         select PLAT_VERSATILE
 285         select PLAT_VERSATILE_CLCD
 286         select PLAT_VERSATILE_FPGA_IRQ
 287         select ARM_TIMER_SP804
 288         select NO_MACH_MEMORY_H
 289         help
 290           This enables support for ARM Ltd Versatile board.
 291
 292 config ARCH_VEXPRESS
 293         bool "ARM Ltd. Versatile Express family"
 294         select ARCH_WANT_OPTIONAL_GPIOLIB
 295         select ARM_AMBA
 296         select ARM_TIMER_SP804
 297         select CLKDEV_LOOKUP
 298         select HAVE_MACH_CLKDEV
 299         select GENERIC_CLOCKEVENTS
 300         select HAVE_CLK
 301         select HAVE_PATA_PLATFORM
 302         select ICST
 303         select PLAT_VERSATILE
 304         select PLAT_VERSATILE_CLCD
 305         select NO_MACH_MEMORY_H
 306         help
 307           This enables support for the ARM Ltd Versatile Express boards.
 308
 309 config ARCH_AT91
 310         bool "Atmel AT91"
 311         select ARCH_REQUIRE_GPIOLIB
 312         select HAVE_CLK
 313         select CLKDEV_LOOKUP
 314         help
 315           This enables support for systems based on the Atmel AT91RM9200,
 316           AT91SAM9 and AT91CAP9 processors.
 317
 318 config ARCH_BCMRING
 319         bool "Broadcom BCMRING"
 320         depends on MMU
 321         select CPU_V6
 322         select ARM_AMBA
 323         select ARM_TIMER_SP804
 324         select CLKDEV_LOOKUP
 325         select GENERIC_CLOCKEVENTS
 326         select ARCH_WANT_OPTIONAL_GPIOLIB
 327         help
 328           Support for Broadcom's BCMRing platform.
 329
 330 config ARCH_CLPS711X
 331         bool "Cirrus Logic CLPS711x/EP721x-based"
 332         select CPU_ARM720T
 333         select ARCH_USES_GETTIMEOFFSET
 334         help
 335           Support for Cirrus Logic 711x/721x based boards.
 336
 337 config ARCH_CNS3XXX
 338         bool "Cavium Networks CNS3XXX family"
 339         select CPU_V6K
 340         select GENERIC_CLOCKEVENTS
 341         select ARM_GIC
 342         select MIGHT_HAVE_PCI
 343         select PCI_DOMAINS if PCI
 344         select NO_MACH_MEMORY_H
 345         help
 346           Support for Cavium Networks CNS3XXX platform.
 347
 348 config ARCH_GEMINI
 349         bool "Cortina Systems Gemini"
 350         select CPU_FA526
 351         select ARCH_REQUIRE_GPIOLIB
 352         select ARCH_USES_GETTIMEOFFSET
 353         select NO_MACH_MEMORY_H
 354         help
 355           Support for the Cortina Systems Gemini family SoCs
 356
 357 config ARCH_PRIMA2
 358         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 359         select CPU_V7
 360         select GENERIC_TIME
 361         select NO_IOPORT
 362         select GENERIC_CLOCKEVENTS
 363         select CLKDEV_LOOKUP
 364         select GENERIC_IRQ_CHIP
 365         select USE_OF
 366         select ZONE_DMA
 367         help
 368           Support for CSR SiRFSoC ARM Cortex A9 Platform
 369
 370 config ARCH_EBSA110
 371         bool "EBSA-110"
 372         select CPU_SA110
 373         select ISA
 374         select NO_IOPORT
 375         select ARCH_USES_GETTIMEOFFSET
 376         help
 377           This is an evaluation board for the StrongARM processor available
 378           from Digital. It has limited hardware on-board, including an
 379           Ethernet interface, two PCMCIA sockets, two serial ports and a
 380           parallel port.
 381
 382 config ARCH_EP93XX
 383         bool "EP93xx-based"
 384         select CPU_ARM920T
 385         select ARM_AMBA
 386         select ARM_VIC
 387         select CLKDEV_LOOKUP
 388         select ARCH_REQUIRE_GPIOLIB
 389         select ARCH_HAS_HOLES_MEMORYMODEL
 390         select ARCH_USES_GETTIMEOFFSET
 391         help
 392           This enables support for the Cirrus EP93xx series of CPUs.
 393
 394 config ARCH_FOOTBRIDGE
 395         bool "FootBridge"
 396         select CPU_SA110
 397         select FOOTBRIDGE
 398         select GENERIC_CLOCKEVENTS
 399         help
 400           Support for systems based on the DC21285 companion chip
 401           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 402
 403 config ARCH_MXC
 404         bool "Freescale MXC/iMX-based"
 405         select GENERIC_CLOCKEVENTS
 406         select ARCH_REQUIRE_GPIOLIB
 407         select CLKDEV_LOOKUP
 408         select CLKSRC_MMIO
 409         select GENERIC_IRQ_CHIP
 410         select HAVE_SCHED_CLOCK
 411         help
 412           Support for Freescale MXC/iMX-based family of processors
 413
 414 config ARCH_MXS
 415         bool "Freescale MXS-based"
 416         select GENERIC_CLOCKEVENTS
 417         select ARCH_REQUIRE_GPIOLIB
 418         select CLKDEV_LOOKUP
 419         select CLKSRC_MMIO
 420         select NO_MACH_MEMORY_H
 421         help
 422           Support for Freescale MXS-based family of processors
 423
 424 config ARCH_NETX
 425         bool "Hilscher NetX based"
 426         select CLKSRC_MMIO
 427         select CPU_ARM926T
 428         select ARM_VIC
 429         select GENERIC_CLOCKEVENTS
 430         select NO_MACH_MEMORY_H
 431         help
 432           This enables support for systems based on the Hilscher NetX Soc
 433
 434 config ARCH_H720X
 435         bool "Hynix HMS720x-based"
 436         select CPU_ARM720T
 437         select ISA_DMA_API
 438         select ARCH_USES_GETTIMEOFFSET
 439         help
 440           This enables support for systems based on the Hynix HMS720x
 441
 442 config ARCH_IOP13XX
 443         bool "IOP13xx-based"
 444         depends on MMU
 445         select CPU_XSC3
 446         select PLAT_IOP
 447         select PCI
 448         select ARCH_SUPPORTS_MSI
 449         select VMSPLIT_1G
 450         help
 451           Support for Intel's IOP13XX (XScale) family of processors.
 452
 453 config ARCH_IOP32X
 454         bool "IOP32x-based"
 455         depends on MMU
 456         select CPU_XSCALE
 457         select PLAT_IOP
 458         select PCI
 459         select ARCH_REQUIRE_GPIOLIB
 460         select NO_MACH_MEMORY_H
 461         help
 462           Support for Intel's 80219 and IOP32X (XScale) family of
 463           processors.
 464
 465 config ARCH_IOP33X
 466         bool "IOP33x-based"
 467         depends on MMU
 468         select CPU_XSCALE
 469         select PLAT_IOP
 470         select PCI
 471         select ARCH_REQUIRE_GPIOLIB
 472         select NO_MACH_MEMORY_H
 473         help
 474           Support for Intel's IOP33X (XScale) family of processors.
 475
 476 config ARCH_IXP23XX
 477         bool "IXP23XX-based"
 478         depends on MMU
 479         select CPU_XSC3
 480         select PCI
 481         select ARCH_USES_GETTIMEOFFSET
 482         help
 483           Support for Intel's IXP23xx (XScale) family of processors.
 484
 485 config ARCH_IXP2000
 486         bool "IXP2400/2800-based"
 487         depends on MMU
 488         select CPU_XSCALE
 489         select PCI
 490         select ARCH_USES_GETTIMEOFFSET
 491         help
 492           Support for Intel's IXP2400/2800 (XScale) family of processors.
 493
 494 config ARCH_IXP4XX
 495         bool "IXP4xx-based"
 496         depends on MMU
 497         select CLKSRC_MMIO
 498         select CPU_XSCALE
 499         select GENERIC_GPIO
 500         select GENERIC_CLOCKEVENTS
 501         select HAVE_SCHED_CLOCK
 502         select MIGHT_HAVE_PCI
 503         select DMABOUNCE if PCI
 504         help
 505           Support for Intel's IXP4XX (XScale) family of processors.
 506
 507 config ARCH_DOVE
 508         bool "Marvell Dove"
 509         select CPU_V7
 510         select PCI
 511         select ARCH_REQUIRE_GPIOLIB
 512         select GENERIC_CLOCKEVENTS
 513         select PLAT_ORION
 514         select NO_MACH_MEMORY_H
 515         help
 516           Support for the Marvell Dove SoC 88AP510
 517
 518 config ARCH_KIRKWOOD
 519         bool "Marvell Kirkwood"
 520         select CPU_FEROCEON
 521         select PCI
 522         select ARCH_REQUIRE_GPIOLIB
 523         select GENERIC_CLOCKEVENTS
 524         select PLAT_ORION
 525         select NO_MACH_MEMORY_H
 526         help
 527           Support for the following Marvell Kirkwood series SoCs:
 528           88F6180, 88F6192 and 88F6281.
 529
 530 config ARCH_LPC32XX
 531         bool "NXP LPC32XX"
 532         select CLKSRC_MMIO
 533         select CPU_ARM926T
 534         select ARCH_REQUIRE_GPIOLIB
 535         select HAVE_IDE
 536         select ARM_AMBA
 537         select USB_ARCH_HAS_OHCI
 538         select CLKDEV_LOOKUP
 539         select GENERIC_TIME
 540         select GENERIC_CLOCKEVENTS
 541         select NO_MACH_MEMORY_H
 542         help
 543           Support for the NXP LPC32XX family of processors
 544
 545 config ARCH_MV78XX0
 546         bool "Marvell MV78xx0"
 547         select CPU_FEROCEON
 548         select PCI
 549         select ARCH_REQUIRE_GPIOLIB
 550         select GENERIC_CLOCKEVENTS
 551         select PLAT_ORION
 552         select NO_MACH_MEMORY_H
 553         help
 554           Support for the following Marvell MV78xx0 series SoCs:
 555           MV781x0, MV782x0.
 556
 557 config ARCH_ORION5X
 558         bool "Marvell Orion"
 559         depends on MMU
 560         select CPU_FEROCEON
 561         select PCI
 562         select ARCH_REQUIRE_GPIOLIB
 563         select GENERIC_CLOCKEVENTS
 564         select PLAT_ORION
 565         select NO_MACH_MEMORY_H
 566         help
 567           Support for the following Marvell Orion 5x series SoCs:
 568           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 569           Orion-2 (5281), Orion-1-90 (6183).
 570
 571 config ARCH_MMP
 572         bool "Marvell PXA168/910/MMP2"
 573         depends on MMU
 574         select ARCH_REQUIRE_GPIOLIB
 575         select CLKDEV_LOOKUP
 576         select GENERIC_CLOCKEVENTS
 577         select HAVE_SCHED_CLOCK
 578         select TICK_ONESHOT
 579         select PLAT_PXA
 580         select SPARSE_IRQ
 581         select NO_MACH_MEMORY_H
 582         help
 583           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 584
 585 config ARCH_KS8695
 586         bool "Micrel/Kendin KS8695"
 587         select CPU_ARM922T
 588         select ARCH_REQUIRE_GPIOLIB
 589         select ARCH_USES_GETTIMEOFFSET
 590         help
 591           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 592           System-on-Chip devices.
 593
 594 config ARCH_W90X900
 595         bool "Nuvoton W90X900 CPU"
 596         select CPU_ARM926T
 597         select ARCH_REQUIRE_GPIOLIB
 598         select CLKDEV_LOOKUP
 599         select CLKSRC_MMIO
 600         select GENERIC_CLOCKEVENTS
 601         select NO_MACH_MEMORY_H
 602         help
 603           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 604           At present, the w90x900 has been renamed nuc900, regarding
 605           the ARM series product line, you can login the following
 606           link address to know more.
 607
 608           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 609                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 610
 611 config ARCH_NUC93X
 612         bool "Nuvoton NUC93X CPU"
 613         select CPU_ARM926T
 614         select CLKDEV_LOOKUP
 615         select NO_MACH_MEMORY_H
 616         help
 617           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 618           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 619
 620 config ARCH_TEGRA
 621         bool "NVIDIA Tegra"
 622         select CLKDEV_LOOKUP
 623         select CLKSRC_MMIO
 624         select GENERIC_TIME
 625         select GENERIC_CLOCKEVENTS
 626         select GENERIC_GPIO
 627         select HAVE_CLK
 628         select HAVE_SCHED_CLOCK
 629         select ARCH_HAS_CPUFREQ
 630         help
 631           This enables support for NVIDIA Tegra based systems (Tegra APX,
 632           Tegra 6xx and Tegra 2 series).
 633
 634 config ARCH_PNX4008
 635         bool "Philips Nexperia PNX4008 Mobile"
 636         select CPU_ARM926T
 637         select CLKDEV_LOOKUP
 638         select ARCH_USES_GETTIMEOFFSET
 639         select NO_MACH_MEMORY_H
 640         help
 641           This enables support for Philips PNX4008 mobile platform.
 642
 643 config ARCH_PXA
 644         bool "PXA2xx/PXA3xx-based"
 645         depends on MMU
 646         select ARCH_MTD_XIP
 647         select ARCH_HAS_CPUFREQ
 648         select CLKDEV_LOOKUP
 649         select CLKSRC_MMIO
 650         select ARCH_REQUIRE_GPIOLIB
 651         select GENERIC_CLOCKEVENTS
 652         select HAVE_SCHED_CLOCK
 653         select TICK_ONESHOT
 654         select PLAT_PXA
 655         select SPARSE_IRQ
 656         select AUTO_ZRELADDR
 657         select MULTI_IRQ_HANDLER
 658         help
 659           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 660
 661 config ARCH_MSM
 662         bool "Qualcomm MSM"
 663         select HAVE_CLK
 664         select GENERIC_CLOCKEVENTS
 665         select ARCH_REQUIRE_GPIOLIB
 666         select CLKDEV_LOOKUP
 667         select NO_MACH_MEMORY_H
 668         help
 669           Support for Qualcomm MSM/QSD based systems.  This runs on the
 670           apps processor of the MSM/QSD and depends on a shared memory
 671           interface to the modem processor which runs the baseband
 672           stack and controls some vital subsystems
 673           (clock and power control, etc).
 674
 675 config ARCH_SHMOBILE
 676         bool "Renesas SH-Mobile / R-Mobile"
 677         select HAVE_CLK
 678         select CLKDEV_LOOKUP
 679         select HAVE_MACH_CLKDEV
 680         select GENERIC_CLOCKEVENTS
 681         select NO_IOPORT
 682         select SPARSE_IRQ
 683         select MULTI_IRQ_HANDLER
 684         select PM_GENERIC_DOMAINS if PM
 685         help
 686           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 687
 688 config ARCH_RPC
 689         bool "RiscPC"
 690         select ARCH_ACORN
 691         select FIQ
 692         select TIMER_ACORN
 693         select ARCH_MAY_HAVE_PC_FDC
 694         select HAVE_PATA_PLATFORM
 695         select ISA_DMA_API
 696         select NO_IOPORT
 697         select ARCH_SPARSEMEM_ENABLE
 698         select ARCH_USES_GETTIMEOFFSET
 699         help
 700           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 701           CD-ROM interface, serial and parallel port, and the floppy drive.
 702
 703 config ARCH_SA1100
 704         bool "SA1100-based"
 705         select CLKSRC_MMIO
 706         select CPU_SA1100
 707         select ISA
 708         select ARCH_SPARSEMEM_ENABLE
 709         select ARCH_MTD_XIP
 710         select ARCH_HAS_CPUFREQ
 711         select CPU_FREQ
 712         select GENERIC_CLOCKEVENTS
 713         select HAVE_CLK
 714         select HAVE_SCHED_CLOCK
 715         select TICK_ONESHOT
 716         select ARCH_REQUIRE_GPIOLIB
 717         help
 718           Support for StrongARM 11x0 based boards.
 719
 720 config ARCH_S3C2410
 721         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 722         select GENERIC_GPIO
 723         select ARCH_HAS_CPUFREQ
 724         select HAVE_CLK
 725         select CLKDEV_LOOKUP
 726         select ARCH_USES_GETTIMEOFFSET
 727         select HAVE_S3C2410_I2C if I2C
 728         select NO_MACH_MEMORY_H
 729         help
 730           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 731           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 732           the Samsung SMDK2410 development board (and derivatives).
 733
 734           Note, the S3C2416 and the S3C2450 are so close that they even share
 735           the same SoC ID code. This means that there is no separate machine
 736           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 737
 738 config ARCH_S3C64XX
 739         bool "Samsung S3C64XX"
 740         select PLAT_SAMSUNG
 741         select CPU_V6
 742         select ARM_VIC
 743         select HAVE_CLK
 744         select CLKDEV_LOOKUP
 745         select NO_IOPORT
 746         select ARCH_USES_GETTIMEOFFSET
 747         select ARCH_HAS_CPUFREQ
 748         select ARCH_REQUIRE_GPIOLIB
 749         select SAMSUNG_CLKSRC
 750         select SAMSUNG_IRQ_VIC_TIMER
 751         select SAMSUNG_IRQ_UART
 752         select S3C_GPIO_TRACK
 753         select S3C_GPIO_PULL_UPDOWN
 754         select S3C_GPIO_CFG_S3C24XX
 755         select S3C_GPIO_CFG_S3C64XX
 756         select S3C_DEV_NAND
 757         select USB_ARCH_HAS_OHCI
 758         select SAMSUNG_GPIOLIB_4BIT
 759         select HAVE_S3C2410_I2C if I2C
 760         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 761         help
 762           Samsung S3C64XX series based systems
 763
 764 config ARCH_S5P64X0
 765         bool "Samsung S5P6440 S5P6450"
 766         select CPU_V6
 767         select GENERIC_GPIO
 768         select HAVE_CLK
 769         select CLKDEV_LOOKUP
 770         select CLKSRC_MMIO
 771         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 772         select GENERIC_CLOCKEVENTS
 773         select HAVE_SCHED_CLOCK
 774         select HAVE_S3C2410_I2C if I2C
 775         select HAVE_S3C_RTC if RTC_CLASS
 776         help
 777           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 778           SMDK6450.
 779
 780 config ARCH_S5PC100
 781         bool "Samsung S5PC100"
 782         select GENERIC_GPIO
 783         select HAVE_CLK
 784         select CLKDEV_LOOKUP
 785         select CPU_V7
 786         select ARM_L1_CACHE_SHIFT_6
 787         select ARCH_USES_GETTIMEOFFSET
 788         select HAVE_S3C2410_I2C if I2C
 789         select HAVE_S3C_RTC if RTC_CLASS
 790         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 791         help
 792           Samsung S5PC100 series based systems
 793
 794 config ARCH_S5PV210
 795         bool "Samsung S5PV210/S5PC110"
 796         select CPU_V7
 797         select ARCH_SPARSEMEM_ENABLE
 798         select ARCH_HAS_HOLES_MEMORYMODEL
 799         select GENERIC_GPIO
 800         select HAVE_CLK
 801         select CLKDEV_LOOKUP
 802         select CLKSRC_MMIO
 803         select ARM_L1_CACHE_SHIFT_6
 804         select ARCH_HAS_CPUFREQ
 805         select GENERIC_CLOCKEVENTS
 806         select HAVE_SCHED_CLOCK
 807         select HAVE_S3C2410_I2C if I2C
 808         select HAVE_S3C_RTC if RTC_CLASS
 809         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 810         help
 811           Samsung S5PV210/S5PC110 series based systems
 812
 813 config ARCH_EXYNOS4
 814         bool "Samsung EXYNOS4"
 815         select CPU_V7
 816         select ARCH_SPARSEMEM_ENABLE
 817         select ARCH_HAS_HOLES_MEMORYMODEL
 818         select GENERIC_GPIO
 819         select HAVE_CLK
 820         select CLKDEV_LOOKUP
 821         select ARCH_HAS_CPUFREQ
 822         select GENERIC_CLOCKEVENTS
 823         select HAVE_S3C_RTC if RTC_CLASS
 824         select HAVE_S3C2410_I2C if I2C
 825         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 826         help
 827           Samsung EXYNOS4 series based systems
 828
 829 config ARCH_SHARK
 830         bool "Shark"
 831         select CPU_SA110
 832         select ISA
 833         select ISA_DMA
 834         select ZONE_DMA
 835         select PCI
 836         select ARCH_USES_GETTIMEOFFSET
 837         help
 838           Support for the StrongARM based Digital DNARD machine, also known
 839           as "Shark" (<http://www.shark-linux.de/shark.html>).
 840
 841 config ARCH_TCC_926
 842         bool "Telechips TCC ARM926-based systems"
 843         select CLKSRC_MMIO
 844         select CPU_ARM926T
 845         select HAVE_CLK
 846         select CLKDEV_LOOKUP
 847         select GENERIC_CLOCKEVENTS
 848         help
 849           Support for Telechips TCC ARM926-based systems.
 850
 851 config ARCH_U300
 852         bool "ST-Ericsson U300 Series"
 853         depends on MMU
 854         select CLKSRC_MMIO
 855         select CPU_ARM926T
 856         select HAVE_SCHED_CLOCK
 857         select HAVE_TCM
 858         select ARM_AMBA
 859         select ARM_VIC
 860         select GENERIC_CLOCKEVENTS
 861         select CLKDEV_LOOKUP
 862         select HAVE_MACH_CLKDEV
 863         select GENERIC_GPIO
 864         help
 865           Support for ST-Ericsson U300 series mobile platforms.
 866
 867 config ARCH_U8500
 868         bool "ST-Ericsson U8500 Series"
 869         select CPU_V7
 870         select ARM_AMBA
 871         select GENERIC_CLOCKEVENTS
 872         select CLKDEV_LOOKUP
 873         select ARCH_REQUIRE_GPIOLIB
 874         select ARCH_HAS_CPUFREQ
 875         select NO_MACH_MEMORY_H
 876         help
 877           Support for ST-Ericsson's Ux500 architecture
 878
 879 config ARCH_NOMADIK
 880         bool "STMicroelectronics Nomadik"
 881         select ARM_AMBA
 882         select ARM_VIC
 883         select CPU_ARM926T
 884         select CLKDEV_LOOKUP
 885         select GENERIC_CLOCKEVENTS
 886         select ARCH_REQUIRE_GPIOLIB
 887         select NO_MACH_MEMORY_H
 888         help
 889           Support for the Nomadik platform by ST-Ericsson
 890
 891 config ARCH_DAVINCI
 892         bool "TI DaVinci"
 893         select GENERIC_CLOCKEVENTS
 894         select ARCH_REQUIRE_GPIOLIB
 895         select ZONE_DMA
 896         select HAVE_IDE
 897         select CLKDEV_LOOKUP
 898         select GENERIC_ALLOCATOR
 899         select GENERIC_IRQ_CHIP
 900         select ARCH_HAS_HOLES_MEMORYMODEL
 901         help
 902           Support for TI's DaVinci platform.
 903
 904 config ARCH_OMAP
 905         bool "TI OMAP"
 906         select HAVE_CLK
 907         select ARCH_REQUIRE_GPIOLIB
 908         select ARCH_HAS_CPUFREQ
 909         select CLKSRC_MMIO
 910         select GENERIC_CLOCKEVENTS
 911         select HAVE_SCHED_CLOCK
 912         select ARCH_HAS_HOLES_MEMORYMODEL
 913         help
 914           Support for TI's OMAP platform (OMAP1/2/3/4).
 915
 916 config PLAT_SPEAR
 917         bool "ST SPEAr"
 918         select ARM_AMBA
 919         select ARCH_REQUIRE_GPIOLIB
 920         select CLKDEV_LOOKUP
 921         select CLKSRC_MMIO
 922         select GENERIC_CLOCKEVENTS
 923         select HAVE_CLK
 924         select NO_MACH_MEMORY_H
 925         help
 926           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 927
 928 config ARCH_VT8500
 929         bool "VIA/WonderMedia 85xx"
 930         select CPU_ARM926T
 931         select GENERIC_GPIO
 932         select ARCH_HAS_CPUFREQ
 933         select GENERIC_CLOCKEVENTS
 934         select ARCH_REQUIRE_GPIOLIB
 935         select HAVE_PWM
 936         help
 937           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 938
 939 config ARCH_ZYNQ
 940         bool "Xilinx Zynq ARM Cortex A9 Platform"
 941         select CPU_V7
 942         select GENERIC_TIME
 943         select GENERIC_CLOCKEVENTS
 944         select CLKDEV_LOOKUP
 945         select ARM_GIC
 946         select ARM_AMBA
 947         select ICST
 948         select USE_OF
 949         help
 950           Support for Xilinx Zynq ARM Cortex A9 Platform
 951 endchoice
 952
 953 #
 954 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 955 # Kconfigs may be included either alphabetically (according to the
 956 # plat- suffix) or along side the corresponding mach-* source.
 957 #
 958 source "arch/arm/mach-at91/Kconfig"
 959
 960 source "arch/arm/mach-bcmring/Kconfig"
 961
 962 source "arch/arm/mach-clps711x/Kconfig"
 963
 964 source "arch/arm/mach-cns3xxx/Kconfig"
 965
 966 source "arch/arm/mach-davinci/Kconfig"
 967
 968 source "arch/arm/mach-dove/Kconfig"
 969
 970 source "arch/arm/mach-ep93xx/Kconfig"
 971
 972 source "arch/arm/mach-footbridge/Kconfig"
 973
 974 source "arch/arm/mach-gemini/Kconfig"
 975
 976 source "arch/arm/mach-h720x/Kconfig"
 977
 978 source "arch/arm/mach-integrator/Kconfig"
 979
 980 source "arch/arm/mach-iop32x/Kconfig"
 981
 982 source "arch/arm/mach-iop33x/Kconfig"
 983
 984 source "arch/arm/mach-iop13xx/Kconfig"
 985
 986 source "arch/arm/mach-ixp4xx/Kconfig"
 987
 988 source "arch/arm/mach-ixp2000/Kconfig"
 989
 990 source "arch/arm/mach-ixp23xx/Kconfig"
 991
 992 source "arch/arm/mach-kirkwood/Kconfig"
 993
 994 source "arch/arm/mach-ks8695/Kconfig"
 995
 996 source "arch/arm/mach-lpc32xx/Kconfig"
 997
 998 source "arch/arm/mach-msm/Kconfig"
 999
1000 source "arch/arm/mach-mv78xx0/Kconfig"
1001
1002 source "arch/arm/plat-mxc/Kconfig"
1003
1004 source "arch/arm/mach-mxs/Kconfig"
1005
1006 source "arch/arm/mach-netx/Kconfig"
1007
1008 source "arch/arm/mach-nomadik/Kconfig"
1009 source "arch/arm/plat-nomadik/Kconfig"
1010
1011 source "arch/arm/mach-nuc93x/Kconfig"
1012
1013 source "arch/arm/plat-omap/Kconfig"
1014
1015 source "arch/arm/mach-omap1/Kconfig"
1016
1017 source "arch/arm/mach-omap2/Kconfig"
1018
1019 source "arch/arm/mach-orion5x/Kconfig"
1020
1021 source "arch/arm/mach-pxa/Kconfig"
1022 source "arch/arm/plat-pxa/Kconfig"
1023
1024 source "arch/arm/mach-mmp/Kconfig"
1025
1026 source "arch/arm/mach-realview/Kconfig"
1027
1028 source "arch/arm/mach-sa1100/Kconfig"
1029
1030 source "arch/arm/plat-samsung/Kconfig"
1031 source "arch/arm/plat-s3c24xx/Kconfig"
1032 source "arch/arm/plat-s5p/Kconfig"
1033
1034 source "arch/arm/plat-spear/Kconfig"
1035
1036 source "arch/arm/plat-tcc/Kconfig"
1037
1038 if ARCH_S3C2410
1039 source "arch/arm/mach-s3c2410/Kconfig"
1040 source "arch/arm/mach-s3c2412/Kconfig"
1041 source "arch/arm/mach-s3c2416/Kconfig"
1042 source "arch/arm/mach-s3c2440/Kconfig"
1043 source "arch/arm/mach-s3c2443/Kconfig"
1044 endif
1045
1046 if ARCH_S3C64XX
1047 source "arch/arm/mach-s3c64xx/Kconfig"
1048 endif
1049
1050 source "arch/arm/mach-s5p64x0/Kconfig"
1051
1052 source "arch/arm/mach-s5pc100/Kconfig"
1053
1054 source "arch/arm/mach-s5pv210/Kconfig"
1055
1056 source "arch/arm/mach-exynos4/Kconfig"
1057
1058 source "arch/arm/mach-shmobile/Kconfig"
1059
1060 source "arch/arm/mach-tegra/Kconfig"
1061
1062 source "arch/arm/mach-u300/Kconfig"
1063
1064 source "arch/arm/mach-ux500/Kconfig"
1065
1066 source "arch/arm/mach-versatile/Kconfig"
1067
1068 source "arch/arm/mach-vexpress/Kconfig"
1069 source "arch/arm/plat-versatile/Kconfig"
1070
1071 source "arch/arm/mach-vt8500/Kconfig"
1072
1073 source "arch/arm/mach-w90x900/Kconfig"
1074
1075 # Definitions to make life easier
1076 config ARCH_ACORN
1077         bool
1078
1079 config PLAT_IOP
1080         bool
1081         select GENERIC_CLOCKEVENTS
1082         select HAVE_SCHED_CLOCK
1083
1084 config PLAT_ORION
1085         bool
1086         select CLKSRC_MMIO
1087         select GENERIC_IRQ_CHIP
1088         select HAVE_SCHED_CLOCK
1089
1090 config PLAT_PXA
1091         bool
1092
1093 config PLAT_VERSATILE
1094         bool
1095
1096 config ARM_TIMER_SP804
1097         bool
1098         select CLKSRC_MMIO
1099
1100 source arch/arm/mm/Kconfig
1101
1102 config IWMMXT
1103         bool "Enable iWMMXt support"
1104         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1105         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1106         help
1107           Enable support for iWMMXt context switching at run time if
1108           running on a CPU that supports it.
1109
1110 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1111 config XSCALE_PMU
1112         bool
1113         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1114         default y
1115
1116 config CPU_HAS_PMU
1117         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1118                    (!ARCH_OMAP3 || OMAP3_EMU)
1119         default y
1120         bool
1121
1122 config MULTI_IRQ_HANDLER
1123         bool
1124         help
1125           Allow each machine to specify it's own IRQ handler at run time.
1126
1127 if !MMU
1128 source "arch/arm/Kconfig-nommu"
1129 endif
1130
1131 config ARM_ERRATA_411920
1132         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1133         depends on CPU_V6 || CPU_V6K
1134         help
1135           Invalidation of the Instruction Cache operation can
1136           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1137           It does not affect the MPCore. This option enables the ARM Ltd.
1138           recommended workaround.
1139
1140 config ARM_ERRATA_430973
1141         bool "ARM errata: Stale prediction on replaced interworking branch"
1142         depends on CPU_V7
1143         help
1144           This option enables the workaround for the 430973 Cortex-A8
1145           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1146           interworking branch is replaced with another code sequence at the
1147           same virtual address, whether due to self-modifying code or virtual
1148           to physical address re-mapping, Cortex-A8 does not recover from the
1149           stale interworking branch prediction. This results in Cortex-A8
1150           executing the new code sequence in the incorrect ARM or Thumb state.
1151           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1152           and also flushes the branch target cache at every context switch.
1153           Note that setting specific bits in the ACTLR register may not be
1154           available in non-secure mode.
1155
1156 config ARM_ERRATA_458693
1157         bool "ARM errata: Processor deadlock when a false hazard is created"
1158         depends on CPU_V7
1159         help
1160           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1161           erratum. For very specific sequences of memory operations, it is
1162           possible for a hazard condition intended for a cache line to instead
1163           be incorrectly associated with a different cache line. This false
1164           hazard might then cause a processor deadlock. The workaround enables
1165           the L1 caching of the NEON accesses and disables the PLD instruction
1166           in the ACTLR register. Note that setting specific bits in the ACTLR
1167           register may not be available in non-secure mode.
1168
1169 config ARM_ERRATA_460075
1170         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1171         depends on CPU_V7
1172         help
1173           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1174           erratum. Any asynchronous access to the L2 cache may encounter a
1175           situation in which recent store transactions to the L2 cache are lost
1176           and overwritten with stale memory contents from external memory. The
1177           workaround disables the write-allocate mode for the L2 cache via the
1178           ACTLR register. Note that setting specific bits in the ACTLR register
1179           may not be available in non-secure mode.
1180
1181 config ARM_ERRATA_742230
1182         bool "ARM errata: DMB operation may be faulty"
1183         depends on CPU_V7 && SMP
1184         help
1185           This option enables the workaround for the 742230 Cortex-A9
1186           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1187           between two write operations may not ensure the correct visibility
1188           ordering of the two writes. This workaround sets a specific bit in
1189           the diagnostic register of the Cortex-A9 which causes the DMB
1190           instruction to behave as a DSB, ensuring the correct behaviour of
1191           the two writes.
1192
1193 config ARM_ERRATA_742231
1194         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1195         depends on CPU_V7 && SMP
1196         help
1197           This option enables the workaround for the 742231 Cortex-A9
1198           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1199           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1200           accessing some data located in the same cache line, may get corrupted
1201           data due to bad handling of the address hazard when the line gets
1202           replaced from one of the CPUs at the same time as another CPU is
1203           accessing it. This workaround sets specific bits in the diagnostic
1204           register of the Cortex-A9 which reduces the linefill issuing
1205           capabilities of the processor.
1206
1207 config PL310_ERRATA_588369
1208         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1209         depends on CACHE_L2X0
1210         help
1211            The PL310 L2 cache controller implements three types of Clean &
1212            Invalidate maintenance operations: by Physical Address
1213            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1214            They are architecturally defined to behave as the execution of a
1215            clean operation followed immediately by an invalidate operation,
1216            both performing to the same memory location. This functionality
1217            is not correctly implemented in PL310 as clean lines are not
1218            invalidated as a result of these operations.
1219
1220 config ARM_ERRATA_720789
1221         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1222         depends on CPU_V7 && SMP
1223         help
1224           This option enables the workaround for the 720789 Cortex-A9 (prior to
1225           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1226           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1227           As a consequence of this erratum, some TLB entries which should be
1228           invalidated are not, resulting in an incoherency in the system page
1229           tables. The workaround changes the TLB flushing routines to invalidate
1230           entries regardless of the ASID.
1231
1232 config PL310_ERRATA_727915
1233         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1234         depends on CACHE_L2X0
1235         help
1236           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1237           operation (offset 0x7FC). This operation runs in background so that
1238           PL310 can handle normal accesses while it is in progress. Under very
1239           rare circumstances, due to this erratum, write data can be lost when
1240           PL310 treats a cacheable write transaction during a Clean &
1241           Invalidate by Way operation.
1242
1243 config ARM_ERRATA_743622
1244         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1245         depends on CPU_V7
1246         help
1247           This option enables the workaround for the 743622 Cortex-A9
1248           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1249           optimisation in the Cortex-A9 Store Buffer may lead to data
1250           corruption. This workaround sets a specific bit in the diagnostic
1251           register of the Cortex-A9 which disables the Store Buffer
1252           optimisation, preventing the defect from occurring. This has no
1253           visible impact on the overall performance or power consumption of the
1254           processor.
1255
1256 config ARM_ERRATA_751472
1257         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1258         depends on CPU_V7 && SMP
1259         help
1260           This option enables the workaround for the 751472 Cortex-A9 (prior
1261           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1262           completion of a following broadcasted operation if the second
1263           operation is received by a CPU before the ICIALLUIS has completed,
1264           potentially leading to corrupted entries in the cache or TLB.
1265
1266 config ARM_ERRATA_753970
1267         bool "ARM errata: cache sync operation may be faulty"
1268         depends on CACHE_PL310
1269         help
1270           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1271
1272           Under some condition the effect of cache sync operation on
1273           the store buffer still remains when the operation completes.
1274           This means that the store buffer is always asked to drain and
1275           this prevents it from merging any further writes. The workaround
1276           is to replace the normal offset of cache sync operation (0x730)
1277           by another offset targeting an unmapped PL310 register 0x740.
1278           This has the same effect as the cache sync operation: store buffer
1279           drain and waiting for all buffers empty.
1280
1281 config ARM_ERRATA_754322
1282         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1283         depends on CPU_V7
1284         help
1285           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1286           r3p*) erratum. A speculative memory access may cause a page table walk
1287           which starts prior to an ASID switch but completes afterwards. This
1288           can populate the micro-TLB with a stale entry which may be hit with
1289           the new ASID. This workaround places two dsb instructions in the mm
1290           switching code so that no page table walks can cross the ASID switch.
1291
1292 config ARM_ERRATA_754327
1293         bool "ARM errata: no automatic Store Buffer drain"
1294         depends on CPU_V7 && SMP
1295         help
1296           This option enables the workaround for the 754327 Cortex-A9 (prior to
1297           r2p0) erratum. The Store Buffer does not have any automatic draining
1298           mechanism and therefore a livelock may occur if an external agent
1299           continuously polls a memory location waiting to observe an update.
1300           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1301           written polling loops from denying visibility of updates to memory.
1302
1303 endmenu
1304
1305 source "arch/arm/common/Kconfig"
1306
1307 menu "Bus support"
1308
1309 config ARM_AMBA
1310         bool
1311
1312 config ISA
1313         bool
1314         help
1315           Find out whether you have ISA slots on your motherboard.  ISA is the
1316           name of a bus system, i.e. the way the CPU talks to the other stuff
1317           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1318           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1319           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1320
1321 # Select ISA DMA controller support
1322 config ISA_DMA
1323         bool
1324         select ISA_DMA_API
1325
1326 # Select ISA DMA interface
1327 config ISA_DMA_API
1328         bool
1329
1330 config PCI
1331         bool "PCI support" if MIGHT_HAVE_PCI
1332         help
1333           Find out whether you have a PCI motherboard. PCI is the name of a
1334           bus system, i.e. the way the CPU talks to the other stuff inside
1335           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1336           VESA. If you have PCI, say Y, otherwise N.
1337
1338 config PCI_DOMAINS
1339         bool
1340         depends on PCI
1341
1342 config PCI_NANOENGINE
1343         bool "BSE nanoEngine PCI support"
1344         depends on SA1100_NANOENGINE
1345         help
1346           Enable PCI on the BSE nanoEngine board.
1347
1348 config PCI_SYSCALL
1349         def_bool PCI
1350
1351 # Select the host bridge type
1352 config PCI_HOST_VIA82C505
1353         bool
1354         depends on PCI && ARCH_SHARK
1355         default y
1356
1357 config PCI_HOST_ITE8152
1358         bool
1359         depends on PCI && MACH_ARMCORE
1360         default y
1361         select DMABOUNCE
1362
1363 source "drivers/pci/Kconfig"
1364
1365 source "drivers/pcmcia/Kconfig"
1366
1367 endmenu
1368
1369 menu "Kernel Features"
1370
1371 source "kernel/time/Kconfig"
1372
1373 config SMP
1374         bool "Symmetric Multi-Processing"
1375         depends on CPU_V6K || CPU_V7
1376         depends on GENERIC_CLOCKEVENTS
1377         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1378                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1379                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1380                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1381         select USE_GENERIC_SMP_HELPERS
1382         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1383         help
1384           This enables support for systems with more than one CPU. If you have
1385           a system with only one CPU, like most personal computers, say N. If
1386           you have a system with more than one CPU, say Y.
1387
1388           If you say N here, the kernel will run on single and multiprocessor
1389           machines, but will use only one CPU of a multiprocessor machine. If
1390           you say Y here, the kernel will run on many, but not all, single
1391           processor machines. On a single processor machine, the kernel will
1392           run faster if you say N here.
1393
1394           See also <file:Documentation/i386/IO-APIC.txt>,
1395           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1396           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1397
1398           If you don't know what to do here, say N.
1399
1400 config SMP_ON_UP
1401         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1402         depends on EXPERIMENTAL
1403         depends on SMP && !XIP_KERNEL
1404         default y
1405         help
1406           SMP kernels contain instructions which fail on non-SMP processors.
1407           Enabling this option allows the kernel to modify itself to make
1408           these instructions safe.  Disabling it allows about 1K of space
1409           savings.
1410
1411           If you don't know what to do here, say Y.
1412
1413 config HAVE_ARM_SCU
1414         bool
1415         help
1416           This option enables support for the ARM system coherency unit
1417
1418 config HAVE_ARM_TWD
1419         bool
1420         depends on SMP
1421         select TICK_ONESHOT
1422         help
1423           This options enables support for the ARM timer and watchdog unit
1424
1425 choice
1426         prompt "Memory split"
1427         default VMSPLIT_3G
1428         help
1429           Select the desired split between kernel and user memory.
1430
1431           If you are not absolutely sure what you are doing, leave this
1432           option alone!
1433
1434         config VMSPLIT_3G
1435                 bool "3G/1G user/kernel split"
1436         config VMSPLIT_2G
1437                 bool "2G/2G user/kernel split"
1438         config VMSPLIT_1G
1439                 bool "1G/3G user/kernel split"
1440 endchoice
1441
1442 config PAGE_OFFSET
1443         hex
1444         default 0x40000000 if VMSPLIT_1G
1445         default 0x80000000 if VMSPLIT_2G
1446         default 0xC0000000
1447
1448 config NR_CPUS
1449         int "Maximum number of CPUs (2-32)"
1450         range 2 32
1451         depends on SMP
1452         default "4"
1453
1454 config HOTPLUG_CPU
1455         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1456         depends on SMP && HOTPLUG && EXPERIMENTAL
1457         help
1458           Say Y here to experiment with turning CPUs off and on.  CPUs
1459           can be controlled through /sys/devices/system/cpu.
1460
1461 config LOCAL_TIMERS
1462         bool "Use local timer interrupts"
1463         depends on SMP
1464         default y
1465         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1466         help
1467           Enable support for local timers on SMP platforms, rather then the
1468           legacy IPI broadcast method.  Local timers allows the system
1469           accounting to be spread across the timer interval, preventing a
1470           "thundering herd" at every timer tick.
1471
1472 source kernel/Kconfig.preempt
1473
1474 config HZ
1475         int
1476         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1477                 ARCH_S5PV210 || ARCH_EXYNOS4
1478         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1479         default AT91_TIMER_HZ if ARCH_AT91
1480         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1481         default 100
1482
1483 config THUMB2_KERNEL
1484         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1485         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1486         select AEABI
1487         select ARM_ASM_UNIFIED
1488         help
1489           By enabling this option, the kernel will be compiled in
1490           Thumb-2 mode. A compiler/assembler that understand the unified
1491           ARM-Thumb syntax is needed.
1492
1493           If unsure, say N.
1494
1495 config THUMB2_AVOID_R_ARM_THM_JUMP11
1496         bool "Work around buggy Thumb-2 short branch relocations in gas"
1497         depends on THUMB2_KERNEL && MODULES
1498         default y
1499         help
1500           Various binutils versions can resolve Thumb-2 branches to
1501           locally-defined, preemptible global symbols as short-range "b.n"
1502           branch instructions.
1503
1504           This is a problem, because there's no guarantee the final
1505           destination of the symbol, or any candidate locations for a
1506           trampoline, are within range of the branch.  For this reason, the
1507           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1508           relocation in modules at all, and it makes little sense to add
1509           support.
1510
1511           The symptom is that the kernel fails with an "unsupported
1512           relocation" error when loading some modules.
1513
1514           Until fixed tools are available, passing
1515           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1516           code which hits this problem, at the cost of a bit of extra runtime
1517           stack usage in some cases.
1518
1519           The problem is described in more detail at:
1520               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1521
1522           Only Thumb-2 kernels are affected.
1523
1524           Unless you are sure your tools don't have this problem, say Y.
1525
1526 config ARM_ASM_UNIFIED
1527         bool
1528
1529 config AEABI
1530         bool "Use the ARM EABI to compile the kernel"
1531         help
1532           This option allows for the kernel to be compiled using the latest
1533           ARM ABI (aka EABI).  This is only useful if you are using a user
1534           space environment that is also compiled with EABI.
1535
1536           Since there are major incompatibilities between the legacy ABI and
1537           EABI, especially with regard to structure member alignment, this
1538           option also changes the kernel syscall calling convention to
1539           disambiguate both ABIs and allow for backward compatibility support
1540           (selected with CONFIG_OABI_COMPAT).
1541
1542           To use this you need GCC version 4.0.0 or later.
1543
1544 config OABI_COMPAT
1545         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1546         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1547         default y
1548         help
1549           This option preserves the old syscall interface along with the
1550           new (ARM EABI) one. It also provides a compatibility layer to
1551           intercept syscalls that have structure arguments which layout
1552           in memory differs between the legacy ABI and the new ARM EABI
1553           (only for non "thumb" binaries). This option adds a tiny
1554           overhead to all syscalls and produces a slightly larger kernel.
1555           If you know you'll be using only pure EABI user space then you
1556           can say N here. If this option is not selected and you attempt
1557           to execute a legacy ABI binary then the result will be
1558           UNPREDICTABLE (in fact it can be predicted that it won't work
1559           at all). If in doubt say Y.
1560
1561 config ARCH_HAS_HOLES_MEMORYMODEL
1562         bool
1563
1564 config ARCH_SPARSEMEM_ENABLE
1565         bool
1566
1567 config ARCH_SPARSEMEM_DEFAULT
1568         def_bool ARCH_SPARSEMEM_ENABLE
1569
1570 config ARCH_SELECT_MEMORY_MODEL
1571         def_bool ARCH_SPARSEMEM_ENABLE
1572
1573 config HAVE_ARCH_PFN_VALID
1574         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1575
1576 config HIGHMEM
1577         bool "High Memory Support"
1578         depends on MMU
1579         help
1580           The address space of ARM processors is only 4 Gigabytes large
1581           and it has to accommodate user address space, kernel address
1582           space as well as some memory mapped IO. That means that, if you
1583           have a large amount of physical memory and/or IO, not all of the
1584           memory can be "permanently mapped" by the kernel. The physical
1585           memory that is not permanently mapped is called "high memory".
1586
1587           Depending on the selected kernel/user memory split, minimum
1588           vmalloc space and actual amount of RAM, you may not need this
1589           option which should result in a slightly faster kernel.
1590
1591           If unsure, say n.
1592
1593 config HIGHPTE
1594         bool "Allocate 2nd-level pagetables from highmem"
1595         depends on HIGHMEM
1596
1597 config HW_PERF_EVENTS
1598         bool "Enable hardware performance counter support for perf events"
1599         depends on PERF_EVENTS && CPU_HAS_PMU
1600         default y
1601         help
1602           Enable hardware performance counter support for perf events. If
1603           disabled, perf events will use software events only.
1604
1605 source "mm/Kconfig"
1606
1607 config FORCE_MAX_ZONEORDER
1608         int "Maximum zone order" if ARCH_SHMOBILE
1609         range 11 64 if ARCH_SHMOBILE
1610         default "9" if SA1111
1611         default "11"
1612         help
1613           The kernel memory allocator divides physically contiguous memory
1614           blocks into "zones", where each zone is a power of two number of
1615           pages.  This option selects the largest power of two that the kernel
1616           keeps in the memory allocator.  If you need to allocate very large
1617           blocks of physically contiguous memory, then you may need to
1618           increase this value.
1619
1620           This config option is actually maximum order plus one. For example,
1621           a value of 11 means that the largest free memory block is 2^10 pages.
1622
1623 config LEDS
1624         bool "Timer and CPU usage LEDs"
1625         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1626                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1627                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1628                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1629                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1630                    ARCH_AT91 || ARCH_DAVINCI || \
1631                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1632         help
1633           If you say Y here, the LEDs on your machine will be used
1634           to provide useful information about your current system status.
1635
1636           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1637           be able to select which LEDs are active using the options below. If
1638           you are compiling a kernel for the EBSA-110 or the LART however, the
1639           red LED will simply flash regularly to indicate that the system is
1640           still functional. It is safe to say Y here if you have a CATS
1641           system, but the driver will do nothing.
1642
1643 config LEDS_TIMER
1644         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1645                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1646                             || MACH_OMAP_PERSEUS2
1647         depends on LEDS
1648         depends on !GENERIC_CLOCKEVENTS
1649         default y if ARCH_EBSA110
1650         help
1651           If you say Y here, one of the system LEDs (the green one on the
1652           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1653           will flash regularly to indicate that the system is still
1654           operational. This is mainly useful to kernel hackers who are
1655           debugging unstable kernels.
1656
1657           The LART uses the same LED for both Timer LED and CPU usage LED
1658           functions. You may choose to use both, but the Timer LED function
1659           will overrule the CPU usage LED.
1660
1661 config LEDS_CPU
1662         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1663                         !ARCH_OMAP) \
1664                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1665                         || MACH_OMAP_PERSEUS2
1666         depends on LEDS
1667         help
1668           If you say Y here, the red LED will be used to give a good real
1669           time indication of CPU usage, by lighting whenever the idle task
1670           is not currently executing.
1671
1672           The LART uses the same LED for both Timer LED and CPU usage LED
1673           functions. You may choose to use both, but the Timer LED function
1674           will overrule the CPU usage LED.
1675
1676 config ALIGNMENT_TRAP
1677         bool
1678         depends on CPU_CP15_MMU
1679         default y if !ARCH_EBSA110
1680         select HAVE_PROC_CPU if PROC_FS
1681         help
1682           ARM processors cannot fetch/store information which is not
1683           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1684           address divisible by 4. On 32-bit ARM processors, these non-aligned
1685           fetch/store instructions will be emulated in software if you say
1686           here, which has a severe performance impact. This is necessary for
1687           correct operation of some network protocols. With an IP-only
1688           configuration it is safe to say N, otherwise say Y.
1689
1690 config UACCESS_WITH_MEMCPY
1691         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1692         depends on MMU && EXPERIMENTAL
1693         default y if CPU_FEROCEON
1694         help
1695           Implement faster copy_to_user and clear_user methods for CPU
1696           cores where a 8-word STM instruction give significantly higher
1697           memory write throughput than a sequence of individual 32bit stores.
1698
1699           A possible side effect is a slight increase in scheduling latency
1700           between threads sharing the same address space if they invoke
1701           such copy operations with large buffers.
1702
1703           However, if the CPU data cache is using a write-allocate mode,
1704           this option is unlikely to provide any performance gain.
1705
1706 config SECCOMP
1707         bool
1708         prompt "Enable seccomp to safely compute untrusted bytecode"
1709         ---help---
1710           This kernel feature is useful for number crunching applications
1711           that may need to compute untrusted bytecode during their
1712           execution. By using pipes or other transports made available to
1713           the process as file descriptors supporting the read/write
1714           syscalls, it's possible to isolate those applications in
1715           their own address space using seccomp. Once seccomp is
1716           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1717           and the task is only allowed to execute a few safe syscalls
1718           defined by each seccomp mode.
1719
1720 config CC_STACKPROTECTOR
1721         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1722         depends on EXPERIMENTAL
1723         help
1724           This option turns on the -fstack-protector GCC feature. This
1725           feature puts, at the beginning of functions, a canary value on
1726           the stack just before the return address, and validates
1727           the value just before actually returning.  Stack based buffer
1728           overflows (that need to overwrite this return address) now also
1729           overwrite the canary, which gets detected and the attack is then
1730           neutralized via a kernel panic.
1731           This feature requires gcc version 4.2 or above.
1732
1733 config DEPRECATED_PARAM_STRUCT
1734         bool "Provide old way to pass kernel parameters"
1735         help
1736           This was deprecated in 2001 and announced to live on for 5 years.
1737           Some old boot loaders still use this way.
1738
1739 endmenu
1740
1741 menu "Boot options"
1742
1743 config USE_OF
1744         bool "Flattened Device Tree support"
1745         select OF
1746         select OF_EARLY_FLATTREE
1747         select IRQ_DOMAIN
1748         help
1749           Include support for flattened device tree machine descriptions.
1750
1751 # Compressed boot loader in ROM.  Yes, we really want to ask about
1752 # TEXT and BSS so we preserve their values in the config files.
1753 config ZBOOT_ROM_TEXT
1754         hex "Compressed ROM boot loader base address"
1755         default "0"
1756         help
1757           The physical address at which the ROM-able zImage is to be
1758           placed in the target.  Platforms which normally make use of
1759           ROM-able zImage formats normally set this to a suitable
1760           value in their defconfig file.
1761
1762           If ZBOOT_ROM is not enabled, this has no effect.
1763
1764 config ZBOOT_ROM_BSS
1765         hex "Compressed ROM boot loader BSS address"
1766         default "0"
1767         help
1768           The base address of an area of read/write memory in the target
1769           for the ROM-able zImage which must be available while the
1770           decompressor is running. It must be large enough to hold the
1771           entire decompressed kernel plus an additional 128 KiB.
1772           Platforms which normally make use of ROM-able zImage formats
1773           normally set this to a suitable value in their defconfig file.
1774
1775           If ZBOOT_ROM is not enabled, this has no effect.
1776
1777 config ZBOOT_ROM
1778         bool "Compressed boot loader in ROM/flash"
1779         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1780         help
1781           Say Y here if you intend to execute your compressed kernel image
1782           (zImage) directly from ROM or flash.  If unsure, say N.
1783
1784 choice
1785         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1786         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1787         default ZBOOT_ROM_NONE
1788         help
1789           Include experimental SD/MMC loading code in the ROM-able zImage.
1790           With this enabled it is possible to write the the ROM-able zImage
1791           kernel image to an MMC or SD card and boot the kernel straight
1792           from the reset vector. At reset the processor Mask ROM will load
1793           the first part of the the ROM-able zImage which in turn loads the
1794           rest the kernel image to RAM.
1795
1796 config ZBOOT_ROM_NONE
1797         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1798         help
1799           Do not load image from SD or MMC
1800
1801 config ZBOOT_ROM_MMCIF
1802         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1803         help
1804           Load image from MMCIF hardware block.
1805
1806 config ZBOOT_ROM_SH_MOBILE_SDHI
1807         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1808         help
1809           Load image from SDHI hardware block
1810
1811 endchoice
1812
1813 config CMDLINE
1814         string "Default kernel command string"
1815         default ""
1816         help
1817           On some architectures (EBSA110 and CATS), there is currently no way
1818           for the boot loader to pass arguments to the kernel. For these
1819           architectures, you should supply some command-line options at build
1820           time by entering them here. As a minimum, you should specify the
1821           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1822
1823 choice
1824         prompt "Kernel command line type" if CMDLINE != ""
1825         default CMDLINE_FROM_BOOTLOADER
1826
1827 config CMDLINE_FROM_BOOTLOADER
1828         bool "Use bootloader kernel arguments if available"
1829         help
1830           Uses the command-line options passed by the boot loader. If
1831           the boot loader doesn't provide any, the default kernel command
1832           string provided in CMDLINE will be used.
1833
1834 config CMDLINE_EXTEND
1835         bool "Extend bootloader kernel arguments"
1836         help
1837           The command-line arguments provided by the boot loader will be
1838           appended to the default kernel command string.
1839
1840 config CMDLINE_FORCE
1841         bool "Always use the default kernel command string"
1842         help
1843           Always use the default kernel command string, even if the boot
1844           loader passes other arguments to the kernel.
1845           This is useful if you cannot or don't want to change the
1846           command-line options your boot loader passes to the kernel.
1847 endchoice
1848
1849 config XIP_KERNEL
1850         bool "Kernel Execute-In-Place from ROM"
1851         depends on !ZBOOT_ROM
1852         help
1853           Execute-In-Place allows the kernel to run from non-volatile storage
1854           directly addressable by the CPU, such as NOR flash. This saves RAM
1855           space since the text section of the kernel is not loaded from flash
1856           to RAM.  Read-write sections, such as the data section and stack,
1857           are still copied to RAM.  The XIP kernel is not compressed since
1858           it has to run directly from flash, so it will take more space to
1859           store it.  The flash address used to link the kernel object files,
1860           and for storing it, is configuration dependent. Therefore, if you
1861           say Y here, you must know the proper physical address where to
1862           store the kernel image depending on your own flash memory usage.
1863
1864           Also note that the make target becomes "make xipImage" rather than
1865           "make zImage" or "make Image".  The final kernel binary to put in
1866           ROM memory will be arch/arm/boot/xipImage.
1867
1868           If unsure, say N.
1869
1870 config XIP_PHYS_ADDR
1871         hex "XIP Kernel Physical Location"
1872         depends on XIP_KERNEL
1873         default "0x00080000"
1874         help
1875           This is the physical address in your flash memory the kernel will
1876           be linked for and stored to.  This address is dependent on your
1877           own flash usage.
1878
1879 config KEXEC
1880         bool "Kexec system call (EXPERIMENTAL)"
1881         depends on EXPERIMENTAL
1882         help
1883           kexec is a system call that implements the ability to shutdown your
1884           current kernel, and to start another kernel.  It is like a reboot
1885           but it is independent of the system firmware.   And like a reboot
1886           you can start any kernel with it, not just Linux.
1887
1888           It is an ongoing process to be certain the hardware in a machine
1889           is properly shutdown, so do not be surprised if this code does not
1890           initially work for you.  It may help to enable device hotplugging
1891           support.
1892
1893 config ATAGS_PROC
1894         bool "Export atags in procfs"
1895         depends on KEXEC
1896         default y
1897         help
1898           Should the atags used to boot the kernel be exported in an "atags"
1899           file in procfs. Useful with kexec.
1900
1901 config CRASH_DUMP
1902         bool "Build kdump crash kernel (EXPERIMENTAL)"
1903         depends on EXPERIMENTAL
1904         help
1905           Generate crash dump after being started by kexec. This should
1906           be normally only set in special crash dump kernels which are
1907           loaded in the main kernel with kexec-tools into a specially
1908           reserved region and then later executed after a crash by
1909           kdump/kexec. The crash dump kernel must be compiled to a
1910           memory address not used by the main kernel
1911
1912           For more details see Documentation/kdump/kdump.txt
1913
1914 config AUTO_ZRELADDR
1915         bool "Auto calculation of the decompressed kernel image address"
1916         depends on !ZBOOT_ROM && !ARCH_U300
1917         help
1918           ZRELADDR is the physical address where the decompressed kernel
1919           image will be placed. If AUTO_ZRELADDR is selected, the address
1920           will be determined at run-time by masking the current IP with
1921           0xf8000000. This assumes the zImage being placed in the first 128MB
1922           from start of memory.
1923
1924 endmenu
1925
1926 menu "CPU Power Management"
1927
1928 if ARCH_HAS_CPUFREQ
1929
1930 source "drivers/cpufreq/Kconfig"
1931
1932 config CPU_FREQ_IMX
1933         tristate "CPUfreq driver for i.MX CPUs"
1934         depends on ARCH_MXC && CPU_FREQ
1935         help
1936           This enables the CPUfreq driver for i.MX CPUs.
1937
1938 config CPU_FREQ_SA1100
1939         bool
1940
1941 config CPU_FREQ_SA1110
1942         bool
1943
1944 config CPU_FREQ_INTEGRATOR
1945         tristate "CPUfreq driver for ARM Integrator CPUs"
1946         depends on ARCH_INTEGRATOR && CPU_FREQ
1947         default y
1948         help
1949           This enables the CPUfreq driver for ARM Integrator CPUs.
1950
1951           For details, take a look at <file:Documentation/cpu-freq>.
1952
1953           If in doubt, say Y.
1954
1955 config CPU_FREQ_PXA
1956         bool
1957         depends on CPU_FREQ && ARCH_PXA && PXA25x
1958         default y
1959         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1960
1961 config CPU_FREQ_S3C
1962         bool
1963         help
1964           Internal configuration node for common cpufreq on Samsung SoC
1965
1966 config CPU_FREQ_S3C24XX
1967         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1968         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1969         select CPU_FREQ_S3C
1970         help
1971           This enables the CPUfreq driver for the Samsung S3C24XX family
1972           of CPUs.
1973
1974           For details, take a look at <file:Documentation/cpu-freq>.
1975
1976           If in doubt, say N.
1977
1978 config CPU_FREQ_S3C24XX_PLL
1979         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1980         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1981         help
1982           Compile in support for changing the PLL frequency from the
1983           S3C24XX series CPUfreq driver. The PLL takes time to settle
1984           after a frequency change, so by default it is not enabled.
1985
1986           This also means that the PLL tables for the selected CPU(s) will
1987           be built which may increase the size of the kernel image.
1988
1989 config CPU_FREQ_S3C24XX_DEBUG
1990         bool "Debug CPUfreq Samsung driver core"
1991         depends on CPU_FREQ_S3C24XX
1992         help
1993           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1994
1995 config CPU_FREQ_S3C24XX_IODEBUG
1996         bool "Debug CPUfreq Samsung driver IO timing"
1997         depends on CPU_FREQ_S3C24XX
1998         help
1999           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2000
2001 config CPU_FREQ_S3C24XX_DEBUGFS
2002         bool "Export debugfs for CPUFreq"
2003         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2004         help
2005           Export status information via debugfs.
2006
2007 endif
2008
2009 source "drivers/cpuidle/Kconfig"
2010
2011 endmenu
2012
2013 menu "Floating point emulation"
2014
2015 comment "At least one emulation must be selected"
2016
2017 config FPE_NWFPE
2018         bool "NWFPE math emulation"
2019         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2020         ---help---
2021           Say Y to include the NWFPE floating point emulator in the kernel.
2022           This is necessary to run most binaries. Linux does not currently
2023           support floating point hardware so you need to say Y here even if
2024           your machine has an FPA or floating point co-processor podule.
2025
2026           You may say N here if you are going to load the Acorn FPEmulator
2027           early in the bootup.
2028
2029 config FPE_NWFPE_XP
2030         bool "Support extended precision"
2031         depends on FPE_NWFPE
2032         help
2033           Say Y to include 80-bit support in the kernel floating-point
2034           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2035           Note that gcc does not generate 80-bit operations by default,
2036           so in most cases this option only enlarges the size of the
2037           floating point emulator without any good reason.
2038
2039           You almost surely want to say N here.
2040
2041 config FPE_FASTFPE
2042         bool "FastFPE math emulation (EXPERIMENTAL)"
2043         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2044         ---help---
2045           Say Y here to include the FAST floating point emulator in the kernel.
2046           This is an experimental much faster emulator which now also has full
2047           precision for the mantissa.  It does not support any exceptions.
2048           It is very simple, and approximately 3-6 times faster than NWFPE.
2049
2050           It should be sufficient for most programs.  It may be not suitable
2051           for scientific calculations, but you have to check this for yourself.
2052           If you do not feel you need a faster FP emulation you should better
2053           choose NWFPE.
2054
2055 config VFP
2056         bool "VFP-format floating point maths"
2057         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2058         help
2059           Say Y to include VFP support code in the kernel. This is needed
2060           if your hardware includes a VFP unit.
2061
2062           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2063           release notes and additional status information.
2064
2065           Say N if your target does not have VFP hardware.
2066
2067 config VFPv3
2068         bool
2069         depends on VFP
2070         default y if CPU_V7
2071
2072 config NEON
2073         bool "Advanced SIMD (NEON) Extension support"
2074         depends on VFPv3 && CPU_V7
2075         help
2076           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2077           Extension.
2078
2079 endmenu
2080
2081 menu "Userspace binary formats"
2082
2083 source "fs/Kconfig.binfmt"
2084
2085 config ARTHUR
2086         tristate "RISC OS personality"
2087         depends on !AEABI
2088         help
2089           Say Y here to include the kernel code necessary if you want to run
2090           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2091           experimental; if this sounds frightening, say N and sleep in peace.
2092           You can also say M here to compile this support as a module (which
2093           will be called arthur).
2094
2095 endmenu
2096
2097 menu "Power management options"
2098
2099 source "kernel/power/Kconfig"
2100
2101 config ARCH_SUSPEND_POSSIBLE
2102         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2103         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2104                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2105         def_bool y
2106
2107 endmenu
2108
2109 source "net/Kconfig"
2110
2111 source "drivers/Kconfig"
2112
2113 source "fs/Kconfig"
2114
2115 source "arch/arm/Kconfig.debug"
2116
2117 source "security/Kconfig"
2118
2119 source "crypto/Kconfig"
2120
2121 source "lib/Kconfig"