arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime"
 199         depends on !XIP_KERNEL && MMU
 200         depends on !ARCH_REALVIEW || !SPARSEMEM
 201         help
 202           Patch phys-to-virt and virt-to-phys translation functions at
 203           boot and module load time according to the position of the
 204           kernel in system memory.
 205
 206           This can only be used with non-XIP MMU kernels where the base
 207           of physical memory is at a 16MB boundary, or theoretically 64K
 208           for the MSM machine class.
 209
 210 config ARM_PATCH_PHYS_VIRT_16BIT
 211         def_bool y
 212         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 213         help
 214           This option extends the physical to virtual translation patching
 215           to allow physical memory down to a theoretical minimum of 64K
 216           boundaries.
 217
 218 source "init/Kconfig"
 219
 220 source "kernel/Kconfig.freezer"
 221
 222 menu "System Type"
 223
 224 config MMU
 225         bool "MMU-based Paged Memory Management Support"
 226         default y
 227         help
 228           Select if you want MMU-based virtualised addressing space
 229           support by paged memory management. If unsure, say 'Y'.
 230
 231 #
 232 # The "ARM system type" choice list is ordered alphabetically by option
 233 # text.  Please add new entries in the option alphabetic order.
 234 #
 235 choice
 236         prompt "ARM system type"
 237         default ARCH_VERSATILE
 238
 239 config ARCH_INTEGRATOR
 240         bool "ARM Ltd. Integrator family"
 241         select ARM_AMBA
 242         select ARCH_HAS_CPUFREQ
 243         select CLKDEV_LOOKUP
 244         select HAVE_MACH_CLKDEV
 245         select ICST
 246         select GENERIC_CLOCKEVENTS
 247         select PLAT_VERSATILE
 248         select PLAT_VERSATILE_FPGA_IRQ
 249         help
 250           Support for ARM's Integrator platform.
 251
 252 config ARCH_REALVIEW
 253         bool "ARM Ltd. RealView family"
 254         select ARM_AMBA
 255         select CLKDEV_LOOKUP
 256         select HAVE_MACH_CLKDEV
 257         select ICST
 258         select GENERIC_CLOCKEVENTS
 259         select ARCH_WANT_OPTIONAL_GPIOLIB
 260         select PLAT_VERSATILE
 261         select PLAT_VERSATILE_CLCD
 262         select ARM_TIMER_SP804
 263         select GPIO_PL061 if GPIOLIB
 264         help
 265           This enables support for ARM Ltd RealView boards.
 266
 267 config ARCH_VERSATILE
 268         bool "ARM Ltd. Versatile family"
 269         select ARM_AMBA
 270         select ARM_VIC
 271         select CLKDEV_LOOKUP
 272         select HAVE_MACH_CLKDEV
 273         select ICST
 274         select GENERIC_CLOCKEVENTS
 275         select ARCH_WANT_OPTIONAL_GPIOLIB
 276         select PLAT_VERSATILE
 277         select PLAT_VERSATILE_CLCD
 278         select PLAT_VERSATILE_FPGA_IRQ
 279         select ARM_TIMER_SP804
 280         help
 281           This enables support for ARM Ltd Versatile board.
 282
 283 config ARCH_VEXPRESS
 284         bool "ARM Ltd. Versatile Express family"
 285         select ARCH_WANT_OPTIONAL_GPIOLIB
 286         select ARM_AMBA
 287         select ARM_TIMER_SP804
 288         select CLKDEV_LOOKUP
 289         select HAVE_MACH_CLKDEV
 290         select GENERIC_CLOCKEVENTS
 291         select HAVE_CLK
 292         select HAVE_PATA_PLATFORM
 293         select ICST
 294         select PLAT_VERSATILE
 295         select PLAT_VERSATILE_CLCD
 296         help
 297           This enables support for the ARM Ltd Versatile Express boards.
 298
 299 config ARCH_AT91
 300         bool "Atmel AT91"
 301         select ARCH_REQUIRE_GPIOLIB
 302         select HAVE_CLK
 303         select CLKDEV_LOOKUP
 304         select ARM_PATCH_PHYS_VIRT if MMU
 305         help
 306           This enables support for systems based on the Atmel AT91RM9200,
 307           AT91SAM9 and AT91CAP9 processors.
 308
 309 config ARCH_BCMRING
 310         bool "Broadcom BCMRING"
 311         depends on MMU
 312         select CPU_V6
 313         select ARM_AMBA
 314         select ARM_TIMER_SP804
 315         select CLKDEV_LOOKUP
 316         select GENERIC_CLOCKEVENTS
 317         select ARCH_WANT_OPTIONAL_GPIOLIB
 318         help
 319           Support for Broadcom's BCMRing platform.
 320
 321 config ARCH_CLPS711X
 322         bool "Cirrus Logic CLPS711x/EP721x-based"
 323         select CPU_ARM720T
 324         select ARCH_USES_GETTIMEOFFSET
 325         help
 326           Support for Cirrus Logic 711x/721x based boards.
 327
 328 config ARCH_CNS3XXX
 329         bool "Cavium Networks CNS3XXX family"
 330         select CPU_V6K
 331         select GENERIC_CLOCKEVENTS
 332         select ARM_GIC
 333         select MIGHT_HAVE_PCI
 334         select PCI_DOMAINS if PCI
 335         help
 336           Support for Cavium Networks CNS3XXX platform.
 337
 338 config ARCH_GEMINI
 339         bool "Cortina Systems Gemini"
 340         select CPU_FA526
 341         select ARCH_REQUIRE_GPIOLIB
 342         select ARCH_USES_GETTIMEOFFSET
 343         help
 344           Support for the Cortina Systems Gemini family SoCs
 345
 346 config ARCH_PRIMA2
 347         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 348         select CPU_V7
 349         select GENERIC_TIME
 350         select NO_IOPORT
 351         select GENERIC_CLOCKEVENTS
 352         select CLKDEV_LOOKUP
 353         select GENERIC_IRQ_CHIP
 354         select USE_OF
 355         select ZONE_DMA
 356         help
 357           Support for CSR SiRFSoC ARM Cortex A9 Platform
 358
 359 config ARCH_EBSA110
 360         bool "EBSA-110"
 361         select CPU_SA110
 362         select ISA
 363         select NO_IOPORT
 364         select ARCH_USES_GETTIMEOFFSET
 365         help
 366           This is an evaluation board for the StrongARM processor available
 367           from Digital. It has limited hardware on-board, including an
 368           Ethernet interface, two PCMCIA sockets, two serial ports and a
 369           parallel port.
 370
 371 config ARCH_EP93XX
 372         bool "EP93xx-based"
 373         select CPU_ARM920T
 374         select ARM_AMBA
 375         select ARM_VIC
 376         select CLKDEV_LOOKUP
 377         select ARCH_REQUIRE_GPIOLIB
 378         select ARCH_HAS_HOLES_MEMORYMODEL
 379         select ARCH_USES_GETTIMEOFFSET
 380         help
 381           This enables support for the Cirrus EP93xx series of CPUs.
 382
 383 config ARCH_FOOTBRIDGE
 384         bool "FootBridge"
 385         select CPU_SA110
 386         select FOOTBRIDGE
 387         select GENERIC_CLOCKEVENTS
 388         help
 389           Support for systems based on the DC21285 companion chip
 390           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 391
 392 config ARCH_MXC
 393         bool "Freescale MXC/iMX-based"
 394         select GENERIC_CLOCKEVENTS
 395         select ARCH_REQUIRE_GPIOLIB
 396         select CLKDEV_LOOKUP
 397         select CLKSRC_MMIO
 398         select GENERIC_IRQ_CHIP
 399         select HAVE_SCHED_CLOCK
 400         select MULTI_IRQ_HANDLER
 401         help
 402           Support for Freescale MXC/iMX-based family of processors
 403
 404 config ARCH_MXS
 405         bool "Freescale MXS-based"
 406         select GENERIC_CLOCKEVENTS
 407         select ARCH_REQUIRE_GPIOLIB
 408         select CLKDEV_LOOKUP
 409         select CLKSRC_MMIO
 410         help
 411           Support for Freescale MXS-based family of processors
 412
 413 config ARCH_NETX
 414         bool "Hilscher NetX based"
 415         select CLKSRC_MMIO
 416         select CPU_ARM926T
 417         select ARM_VIC
 418         select GENERIC_CLOCKEVENTS
 419         help
 420           This enables support for systems based on the Hilscher NetX Soc
 421
 422 config ARCH_H720X
 423         bool "Hynix HMS720x-based"
 424         select CPU_ARM720T
 425         select ISA_DMA_API
 426         select ARCH_USES_GETTIMEOFFSET
 427         help
 428           This enables support for systems based on the Hynix HMS720x
 429
 430 config ARCH_IOP13XX
 431         bool "IOP13xx-based"
 432         depends on MMU
 433         select CPU_XSC3
 434         select PLAT_IOP
 435         select PCI
 436         select ARCH_SUPPORTS_MSI
 437         select VMSPLIT_1G
 438         help
 439           Support for Intel's IOP13XX (XScale) family of processors.
 440
 441 config ARCH_IOP32X
 442         bool "IOP32x-based"
 443         depends on MMU
 444         select CPU_XSCALE
 445         select PLAT_IOP
 446         select PCI
 447         select ARCH_REQUIRE_GPIOLIB
 448         help
 449           Support for Intel's 80219 and IOP32X (XScale) family of
 450           processors.
 451
 452 config ARCH_IOP33X
 453         bool "IOP33x-based"
 454         depends on MMU
 455         select CPU_XSCALE
 456         select PLAT_IOP
 457         select PCI
 458         select ARCH_REQUIRE_GPIOLIB
 459         help
 460           Support for Intel's IOP33X (XScale) family of processors.
 461
 462 config ARCH_IXP23XX
 463         bool "IXP23XX-based"
 464         depends on MMU
 465         select CPU_XSC3
 466         select PCI
 467         select ARCH_USES_GETTIMEOFFSET
 468         help
 469           Support for Intel's IXP23xx (XScale) family of processors.
 470
 471 config ARCH_IXP2000
 472         bool "IXP2400/2800-based"
 473         depends on MMU
 474         select CPU_XSCALE
 475         select PCI
 476         select ARCH_USES_GETTIMEOFFSET
 477         help
 478           Support for Intel's IXP2400/2800 (XScale) family of processors.
 479
 480 config ARCH_IXP4XX
 481         bool "IXP4xx-based"
 482         depends on MMU
 483         select CLKSRC_MMIO
 484         select CPU_XSCALE
 485         select GENERIC_GPIO
 486         select GENERIC_CLOCKEVENTS
 487         select HAVE_SCHED_CLOCK
 488         select MIGHT_HAVE_PCI
 489         select DMABOUNCE if PCI
 490         help
 491           Support for Intel's IXP4XX (XScale) family of processors.
 492
 493 config ARCH_DOVE
 494         bool "Marvell Dove"
 495         select CPU_V7
 496         select PCI
 497         select ARCH_REQUIRE_GPIOLIB
 498         select GENERIC_CLOCKEVENTS
 499         select PLAT_ORION
 500         help
 501           Support for the Marvell Dove SoC 88AP510
 502
 503 config ARCH_KIRKWOOD
 504         bool "Marvell Kirkwood"
 505         select CPU_FEROCEON
 506         select PCI
 507         select ARCH_REQUIRE_GPIOLIB
 508         select GENERIC_CLOCKEVENTS
 509         select PLAT_ORION
 510         help
 511           Support for the following Marvell Kirkwood series SoCs:
 512           88F6180, 88F6192 and 88F6281.
 513
 514 config ARCH_LPC32XX
 515         bool "NXP LPC32XX"
 516         select CLKSRC_MMIO
 517         select CPU_ARM926T
 518         select ARCH_REQUIRE_GPIOLIB
 519         select HAVE_IDE
 520         select ARM_AMBA
 521         select USB_ARCH_HAS_OHCI
 522         select CLKDEV_LOOKUP
 523         select GENERIC_TIME
 524         select GENERIC_CLOCKEVENTS
 525         help
 526           Support for the NXP LPC32XX family of processors
 527
 528 config ARCH_MV78XX0
 529         bool "Marvell MV78xx0"
 530         select CPU_FEROCEON
 531         select PCI
 532         select ARCH_REQUIRE_GPIOLIB
 533         select GENERIC_CLOCKEVENTS
 534         select PLAT_ORION
 535         help
 536           Support for the following Marvell MV78xx0 series SoCs:
 537           MV781x0, MV782x0.
 538
 539 config ARCH_ORION5X
 540         bool "Marvell Orion"
 541         depends on MMU
 542         select CPU_FEROCEON
 543         select PCI
 544         select ARCH_REQUIRE_GPIOLIB
 545         select GENERIC_CLOCKEVENTS
 546         select PLAT_ORION
 547         help
 548           Support for the following Marvell Orion 5x series SoCs:
 549           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 550           Orion-2 (5281), Orion-1-90 (6183).
 551
 552 config ARCH_MMP
 553         bool "Marvell PXA168/910/MMP2"
 554         depends on MMU
 555         select ARCH_REQUIRE_GPIOLIB
 556         select CLKDEV_LOOKUP
 557         select GENERIC_CLOCKEVENTS
 558         select HAVE_SCHED_CLOCK
 559         select TICK_ONESHOT
 560         select PLAT_PXA
 561         select SPARSE_IRQ
 562         help
 563           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 564
 565 config ARCH_KS8695
 566         bool "Micrel/Kendin KS8695"
 567         select CPU_ARM922T
 568         select ARCH_REQUIRE_GPIOLIB
 569         select ARCH_USES_GETTIMEOFFSET
 570         help
 571           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 572           System-on-Chip devices.
 573
 574 config ARCH_W90X900
 575         bool "Nuvoton W90X900 CPU"
 576         select CPU_ARM926T
 577         select ARCH_REQUIRE_GPIOLIB
 578         select CLKDEV_LOOKUP
 579         select CLKSRC_MMIO
 580         select GENERIC_CLOCKEVENTS
 581         help
 582           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 583           At present, the w90x900 has been renamed nuc900, regarding
 584           the ARM series product line, you can login the following
 585           link address to know more.
 586
 587           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 588                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 589
 590 config ARCH_NUC93X
 591         bool "Nuvoton NUC93X CPU"
 592         select CPU_ARM926T
 593         select CLKDEV_LOOKUP
 594         help
 595           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 596           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 597
 598 config ARCH_TEGRA
 599         bool "NVIDIA Tegra"
 600         select CLKDEV_LOOKUP
 601         select CLKSRC_MMIO
 602         select GENERIC_TIME
 603         select GENERIC_CLOCKEVENTS
 604         select GENERIC_GPIO
 605         select HAVE_CLK
 606         select HAVE_SCHED_CLOCK
 607         select ARCH_HAS_CPUFREQ
 608         help
 609           This enables support for NVIDIA Tegra based systems (Tegra APX,
 610           Tegra 6xx and Tegra 2 series).
 611
 612 config ARCH_PNX4008
 613         bool "Philips Nexperia PNX4008 Mobile"
 614         select CPU_ARM926T
 615         select CLKDEV_LOOKUP
 616         select ARCH_USES_GETTIMEOFFSET
 617         help
 618           This enables support for Philips PNX4008 mobile platform.
 619
 620 config ARCH_PXA
 621         bool "PXA2xx/PXA3xx-based"
 622         depends on MMU
 623         select ARCH_MTD_XIP
 624         select ARCH_HAS_CPUFREQ
 625         select CLKDEV_LOOKUP
 626         select CLKSRC_MMIO
 627         select ARCH_REQUIRE_GPIOLIB
 628         select GENERIC_CLOCKEVENTS
 629         select HAVE_SCHED_CLOCK
 630         select TICK_ONESHOT
 631         select PLAT_PXA
 632         select SPARSE_IRQ
 633         select AUTO_ZRELADDR
 634         select MULTI_IRQ_HANDLER
 635         help
 636           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 637
 638 config ARCH_MSM
 639         bool "Qualcomm MSM"
 640         select HAVE_CLK
 641         select GENERIC_CLOCKEVENTS
 642         select ARCH_REQUIRE_GPIOLIB
 643         select CLKDEV_LOOKUP
 644         help
 645           Support for Qualcomm MSM/QSD based systems.  This runs on the
 646           apps processor of the MSM/QSD and depends on a shared memory
 647           interface to the modem processor which runs the baseband
 648           stack and controls some vital subsystems
 649           (clock and power control, etc).
 650
 651 config ARCH_SHMOBILE
 652         bool "Renesas SH-Mobile / R-Mobile"
 653         select HAVE_CLK
 654         select CLKDEV_LOOKUP
 655         select HAVE_MACH_CLKDEV
 656         select GENERIC_CLOCKEVENTS
 657         select NO_IOPORT
 658         select SPARSE_IRQ
 659         select MULTI_IRQ_HANDLER
 660         select PM_GENERIC_DOMAINS if PM
 661         help
 662           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 663
 664 config ARCH_RPC
 665         bool "RiscPC"
 666         select ARCH_ACORN
 667         select FIQ
 668         select TIMER_ACORN
 669         select ARCH_MAY_HAVE_PC_FDC
 670         select HAVE_PATA_PLATFORM
 671         select ISA_DMA_API
 672         select NO_IOPORT
 673         select ARCH_SPARSEMEM_ENABLE
 674         select ARCH_USES_GETTIMEOFFSET
 675         help
 676           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 677           CD-ROM interface, serial and parallel port, and the floppy drive.
 678
 679 config ARCH_SA1100
 680         bool "SA1100-based"
 681         select CLKSRC_MMIO
 682         select CPU_SA1100
 683         select ISA
 684         select ARCH_SPARSEMEM_ENABLE
 685         select ARCH_MTD_XIP
 686         select ARCH_HAS_CPUFREQ
 687         select CPU_FREQ
 688         select GENERIC_CLOCKEVENTS
 689         select HAVE_CLK
 690         select HAVE_SCHED_CLOCK
 691         select TICK_ONESHOT
 692         select ARCH_REQUIRE_GPIOLIB
 693         help
 694           Support for StrongARM 11x0 based boards.
 695
 696 config ARCH_S3C2410
 697         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 698         select GENERIC_GPIO
 699         select ARCH_HAS_CPUFREQ
 700         select HAVE_CLK
 701         select CLKDEV_LOOKUP
 702         select ARCH_USES_GETTIMEOFFSET
 703         select HAVE_S3C2410_I2C if I2C
 704         help
 705           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 706           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 707           the Samsung SMDK2410 development board (and derivatives).
 708
 709           Note, the S3C2416 and the S3C2450 are so close that they even share
 710           the same SoC ID code. This means that there is no separate machine
 711           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 712
 713 config ARCH_S3C64XX
 714         bool "Samsung S3C64XX"
 715         select PLAT_SAMSUNG
 716         select CPU_V6
 717         select ARM_VIC
 718         select HAVE_CLK
 719         select CLKDEV_LOOKUP
 720         select NO_IOPORT
 721         select ARCH_USES_GETTIMEOFFSET
 722         select ARCH_HAS_CPUFREQ
 723         select ARCH_REQUIRE_GPIOLIB
 724         select SAMSUNG_CLKSRC
 725         select SAMSUNG_IRQ_VIC_TIMER
 726         select SAMSUNG_IRQ_UART
 727         select S3C_GPIO_TRACK
 728         select S3C_GPIO_PULL_UPDOWN
 729         select S3C_GPIO_CFG_S3C24XX
 730         select S3C_GPIO_CFG_S3C64XX
 731         select S3C_DEV_NAND
 732         select USB_ARCH_HAS_OHCI
 733         select SAMSUNG_GPIOLIB_4BIT
 734         select HAVE_S3C2410_I2C if I2C
 735         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 736         help
 737           Samsung S3C64XX series based systems
 738
 739 config ARCH_S5P64X0
 740         bool "Samsung S5P6440 S5P6450"
 741         select CPU_V6
 742         select GENERIC_GPIO
 743         select HAVE_CLK
 744         select CLKDEV_LOOKUP
 745         select CLKSRC_MMIO
 746         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 747         select GENERIC_CLOCKEVENTS
 748         select HAVE_SCHED_CLOCK
 749         select HAVE_S3C2410_I2C if I2C
 750         select HAVE_S3C_RTC if RTC_CLASS
 751         help
 752           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 753           SMDK6450.
 754
 755 config ARCH_S5PC100
 756         bool "Samsung S5PC100"
 757         select GENERIC_GPIO
 758         select HAVE_CLK
 759         select CLKDEV_LOOKUP
 760         select CPU_V7
 761         select ARM_L1_CACHE_SHIFT_6
 762         select ARCH_USES_GETTIMEOFFSET
 763         select HAVE_S3C2410_I2C if I2C
 764         select HAVE_S3C_RTC if RTC_CLASS
 765         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 766         help
 767           Samsung S5PC100 series based systems
 768
 769 config ARCH_S5PV210
 770         bool "Samsung S5PV210/S5PC110"
 771         select CPU_V7
 772         select ARCH_SPARSEMEM_ENABLE
 773         select ARCH_HAS_HOLES_MEMORYMODEL
 774         select GENERIC_GPIO
 775         select HAVE_CLK
 776         select CLKDEV_LOOKUP
 777         select CLKSRC_MMIO
 778         select ARM_L1_CACHE_SHIFT_6
 779         select ARCH_HAS_CPUFREQ
 780         select GENERIC_CLOCKEVENTS
 781         select HAVE_SCHED_CLOCK
 782         select HAVE_S3C2410_I2C if I2C
 783         select HAVE_S3C_RTC if RTC_CLASS
 784         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 785         help
 786           Samsung S5PV210/S5PC110 series based systems
 787
 788 config ARCH_EXYNOS4
 789         bool "Samsung EXYNOS4"
 790         select CPU_V7
 791         select ARCH_SPARSEMEM_ENABLE
 792         select ARCH_HAS_HOLES_MEMORYMODEL
 793         select GENERIC_GPIO
 794         select HAVE_CLK
 795         select CLKDEV_LOOKUP
 796         select ARCH_HAS_CPUFREQ
 797         select GENERIC_CLOCKEVENTS
 798         select HAVE_S3C_RTC if RTC_CLASS
 799         select HAVE_S3C2410_I2C if I2C
 800         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 801         help
 802           Samsung EXYNOS4 series based systems
 803
 804 config ARCH_SHARK
 805         bool "Shark"
 806         select CPU_SA110
 807         select ISA
 808         select ISA_DMA
 809         select ZONE_DMA
 810         select PCI
 811         select ARCH_USES_GETTIMEOFFSET
 812         help
 813           Support for the StrongARM based Digital DNARD machine, also known
 814           as "Shark" (<http://www.shark-linux.de/shark.html>).
 815
 816 config ARCH_TCC_926
 817         bool "Telechips TCC ARM926-based systems"
 818         select CLKSRC_MMIO
 819         select CPU_ARM926T
 820         select HAVE_CLK
 821         select CLKDEV_LOOKUP
 822         select GENERIC_CLOCKEVENTS
 823         help
 824           Support for Telechips TCC ARM926-based systems.
 825
 826 config ARCH_U300
 827         bool "ST-Ericsson U300 Series"
 828         depends on MMU
 829         select CLKSRC_MMIO
 830         select CPU_ARM926T
 831         select HAVE_SCHED_CLOCK
 832         select HAVE_TCM
 833         select ARM_AMBA
 834         select ARM_VIC
 835         select GENERIC_CLOCKEVENTS
 836         select CLKDEV_LOOKUP
 837         select HAVE_MACH_CLKDEV
 838         select GENERIC_GPIO
 839         select ARCH_REQUIRE_GPIOLIB
 840         help
 841           Support for ST-Ericsson U300 series mobile platforms.
 842
 843 config ARCH_U8500
 844         bool "ST-Ericsson U8500 Series"
 845         select CPU_V7
 846         select ARM_AMBA
 847         select GENERIC_CLOCKEVENTS
 848         select CLKDEV_LOOKUP
 849         select ARCH_REQUIRE_GPIOLIB
 850         select ARCH_HAS_CPUFREQ
 851         help
 852           Support for ST-Ericsson's Ux500 architecture
 853
 854 config ARCH_NOMADIK
 855         bool "STMicroelectronics Nomadik"
 856         select ARM_AMBA
 857         select ARM_VIC
 858         select CPU_ARM926T
 859         select CLKDEV_LOOKUP
 860         select GENERIC_CLOCKEVENTS
 861         select ARCH_REQUIRE_GPIOLIB
 862         help
 863           Support for the Nomadik platform by ST-Ericsson
 864
 865 config ARCH_DAVINCI
 866         bool "TI DaVinci"
 867         select GENERIC_CLOCKEVENTS
 868         select ARCH_REQUIRE_GPIOLIB
 869         select ZONE_DMA
 870         select HAVE_IDE
 871         select CLKDEV_LOOKUP
 872         select GENERIC_ALLOCATOR
 873         select GENERIC_IRQ_CHIP
 874         select ARCH_HAS_HOLES_MEMORYMODEL
 875         help
 876           Support for TI's DaVinci platform.
 877
 878 config ARCH_OMAP
 879         bool "TI OMAP"
 880         select HAVE_CLK
 881         select ARCH_REQUIRE_GPIOLIB
 882         select ARCH_HAS_CPUFREQ
 883         select CLKSRC_MMIO
 884         select GENERIC_CLOCKEVENTS
 885         select HAVE_SCHED_CLOCK
 886         select ARCH_HAS_HOLES_MEMORYMODEL
 887         help
 888           Support for TI's OMAP platform (OMAP1/2/3/4).
 889
 890 config PLAT_SPEAR
 891         bool "ST SPEAr"
 892         select ARM_AMBA
 893         select ARCH_REQUIRE_GPIOLIB
 894         select CLKDEV_LOOKUP
 895         select CLKSRC_MMIO
 896         select GENERIC_CLOCKEVENTS
 897         select HAVE_CLK
 898         help
 899           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 900
 901 config ARCH_VT8500
 902         bool "VIA/WonderMedia 85xx"
 903         select CPU_ARM926T
 904         select GENERIC_GPIO
 905         select ARCH_HAS_CPUFREQ
 906         select GENERIC_CLOCKEVENTS
 907         select ARCH_REQUIRE_GPIOLIB
 908         select HAVE_PWM
 909         help
 910           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 911
 912 config ARCH_ZYNQ
 913         bool "Xilinx Zynq ARM Cortex A9 Platform"
 914         select CPU_V7
 915         select GENERIC_TIME
 916         select GENERIC_CLOCKEVENTS
 917         select CLKDEV_LOOKUP
 918         select ARM_GIC
 919         select ARM_AMBA
 920         select ICST
 921         select USE_OF
 922         help
 923           Support for Xilinx Zynq ARM Cortex A9 Platform
 924 endchoice
 925
 926 #
 927 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 928 # Kconfigs may be included either alphabetically (according to the
 929 # plat- suffix) or along side the corresponding mach-* source.
 930 #
 931 source "arch/arm/mach-at91/Kconfig"
 932
 933 source "arch/arm/mach-bcmring/Kconfig"
 934
 935 source "arch/arm/mach-clps711x/Kconfig"
 936
 937 source "arch/arm/mach-cns3xxx/Kconfig"
 938
 939 source "arch/arm/mach-davinci/Kconfig"
 940
 941 source "arch/arm/mach-dove/Kconfig"
 942
 943 source "arch/arm/mach-ep93xx/Kconfig"
 944
 945 source "arch/arm/mach-footbridge/Kconfig"
 946
 947 source "arch/arm/mach-gemini/Kconfig"
 948
 949 source "arch/arm/mach-h720x/Kconfig"
 950
 951 source "arch/arm/mach-integrator/Kconfig"
 952
 953 source "arch/arm/mach-iop32x/Kconfig"
 954
 955 source "arch/arm/mach-iop33x/Kconfig"
 956
 957 source "arch/arm/mach-iop13xx/Kconfig"
 958
 959 source "arch/arm/mach-ixp4xx/Kconfig"
 960
 961 source "arch/arm/mach-ixp2000/Kconfig"
 962
 963 source "arch/arm/mach-ixp23xx/Kconfig"
 964
 965 source "arch/arm/mach-kirkwood/Kconfig"
 966
 967 source "arch/arm/mach-ks8695/Kconfig"
 968
 969 source "arch/arm/mach-lpc32xx/Kconfig"
 970
 971 source "arch/arm/mach-msm/Kconfig"
 972
 973 source "arch/arm/mach-mv78xx0/Kconfig"
 974
 975 source "arch/arm/plat-mxc/Kconfig"
 976
 977 source "arch/arm/mach-mxs/Kconfig"
 978
 979 source "arch/arm/mach-netx/Kconfig"
 980
 981 source "arch/arm/mach-nomadik/Kconfig"
 982 source "arch/arm/plat-nomadik/Kconfig"
 983
 984 source "arch/arm/mach-nuc93x/Kconfig"
 985
 986 source "arch/arm/plat-omap/Kconfig"
 987
 988 source "arch/arm/mach-omap1/Kconfig"
 989
 990 source "arch/arm/mach-omap2/Kconfig"
 991
 992 source "arch/arm/mach-orion5x/Kconfig"
 993
 994 source "arch/arm/mach-pxa/Kconfig"
 995 source "arch/arm/plat-pxa/Kconfig"
 996
 997 source "arch/arm/mach-mmp/Kconfig"
 998
 999 source "arch/arm/mach-realview/Kconfig"
1000
1001 source "arch/arm/mach-sa1100/Kconfig"
1002
1003 source "arch/arm/plat-samsung/Kconfig"
1004 source "arch/arm/plat-s3c24xx/Kconfig"
1005 source "arch/arm/plat-s5p/Kconfig"
1006
1007 source "arch/arm/plat-spear/Kconfig"
1008
1009 source "arch/arm/plat-tcc/Kconfig"
1010
1011 if ARCH_S3C2410
1012 source "arch/arm/mach-s3c2410/Kconfig"
1013 source "arch/arm/mach-s3c2412/Kconfig"
1014 source "arch/arm/mach-s3c2416/Kconfig"
1015 source "arch/arm/mach-s3c2440/Kconfig"
1016 source "arch/arm/mach-s3c2443/Kconfig"
1017 endif
1018
1019 if ARCH_S3C64XX
1020 source "arch/arm/mach-s3c64xx/Kconfig"
1021 endif
1022
1023 source "arch/arm/mach-s5p64x0/Kconfig"
1024
1025 source "arch/arm/mach-s5pc100/Kconfig"
1026
1027 source "arch/arm/mach-s5pv210/Kconfig"
1028
1029 source "arch/arm/mach-exynos4/Kconfig"
1030
1031 source "arch/arm/mach-shmobile/Kconfig"
1032
1033 source "arch/arm/mach-tegra/Kconfig"
1034
1035 source "arch/arm/mach-u300/Kconfig"
1036
1037 source "arch/arm/mach-ux500/Kconfig"
1038
1039 source "arch/arm/mach-versatile/Kconfig"
1040
1041 source "arch/arm/mach-vexpress/Kconfig"
1042 source "arch/arm/plat-versatile/Kconfig"
1043
1044 source "arch/arm/mach-vt8500/Kconfig"
1045
1046 source "arch/arm/mach-w90x900/Kconfig"
1047
1048 # Definitions to make life easier
1049 config ARCH_ACORN
1050         bool
1051
1052 config PLAT_IOP
1053         bool
1054         select GENERIC_CLOCKEVENTS
1055         select HAVE_SCHED_CLOCK
1056
1057 config PLAT_ORION
1058         bool
1059         select CLKSRC_MMIO
1060         select GENERIC_IRQ_CHIP
1061         select HAVE_SCHED_CLOCK
1062
1063 config PLAT_PXA
1064         bool
1065
1066 config PLAT_VERSATILE
1067         bool
1068
1069 config ARM_TIMER_SP804
1070         bool
1071         select CLKSRC_MMIO
1072
1073 source arch/arm/mm/Kconfig
1074
1075 config IWMMXT
1076         bool "Enable iWMMXt support"
1077         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1078         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1079         help
1080           Enable support for iWMMXt context switching at run time if
1081           running on a CPU that supports it.
1082
1083 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1084 config XSCALE_PMU
1085         bool
1086         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1087         default y
1088
1089 config CPU_HAS_PMU
1090         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1091                    (!ARCH_OMAP3 || OMAP3_EMU)
1092         default y
1093         bool
1094
1095 config MULTI_IRQ_HANDLER
1096         bool
1097         help
1098           Allow each machine to specify it's own IRQ handler at run time.
1099
1100 if !MMU
1101 source "arch/arm/Kconfig-nommu"
1102 endif
1103
1104 config ARM_ERRATA_411920
1105         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1106         depends on CPU_V6 || CPU_V6K
1107         help
1108           Invalidation of the Instruction Cache operation can
1109           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1110           It does not affect the MPCore. This option enables the ARM Ltd.
1111           recommended workaround.
1112
1113 config ARM_ERRATA_430973
1114         bool "ARM errata: Stale prediction on replaced interworking branch"
1115         depends on CPU_V7
1116         help
1117           This option enables the workaround for the 430973 Cortex-A8
1118           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1119           interworking branch is replaced with another code sequence at the
1120           same virtual address, whether due to self-modifying code or virtual
1121           to physical address re-mapping, Cortex-A8 does not recover from the
1122           stale interworking branch prediction. This results in Cortex-A8
1123           executing the new code sequence in the incorrect ARM or Thumb state.
1124           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1125           and also flushes the branch target cache at every context switch.
1126           Note that setting specific bits in the ACTLR register may not be
1127           available in non-secure mode.
1128
1129 config ARM_ERRATA_458693
1130         bool "ARM errata: Processor deadlock when a false hazard is created"
1131         depends on CPU_V7
1132         help
1133           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1134           erratum. For very specific sequences of memory operations, it is
1135           possible for a hazard condition intended for a cache line to instead
1136           be incorrectly associated with a different cache line. This false
1137           hazard might then cause a processor deadlock. The workaround enables
1138           the L1 caching of the NEON accesses and disables the PLD instruction
1139           in the ACTLR register. Note that setting specific bits in the ACTLR
1140           register may not be available in non-secure mode.
1141
1142 config ARM_ERRATA_460075
1143         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1144         depends on CPU_V7
1145         help
1146           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1147           erratum. Any asynchronous access to the L2 cache may encounter a
1148           situation in which recent store transactions to the L2 cache are lost
1149           and overwritten with stale memory contents from external memory. The
1150           workaround disables the write-allocate mode for the L2 cache via the
1151           ACTLR register. Note that setting specific bits in the ACTLR register
1152           may not be available in non-secure mode.
1153
1154 config ARM_ERRATA_742230
1155         bool "ARM errata: DMB operation may be faulty"
1156         depends on CPU_V7 && SMP
1157         help
1158           This option enables the workaround for the 742230 Cortex-A9
1159           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1160           between two write operations may not ensure the correct visibility
1161           ordering of the two writes. This workaround sets a specific bit in
1162           the diagnostic register of the Cortex-A9 which causes the DMB
1163           instruction to behave as a DSB, ensuring the correct behaviour of
1164           the two writes.
1165
1166 config ARM_ERRATA_742231
1167         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1168         depends on CPU_V7 && SMP
1169         help
1170           This option enables the workaround for the 742231 Cortex-A9
1171           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1172           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1173           accessing some data located in the same cache line, may get corrupted
1174           data due to bad handling of the address hazard when the line gets
1175           replaced from one of the CPUs at the same time as another CPU is
1176           accessing it. This workaround sets specific bits in the diagnostic
1177           register of the Cortex-A9 which reduces the linefill issuing
1178           capabilities of the processor.
1179
1180 config PL310_ERRATA_588369
1181         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1182         depends on CACHE_L2X0
1183         help
1184            The PL310 L2 cache controller implements three types of Clean &
1185            Invalidate maintenance operations: by Physical Address
1186            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1187            They are architecturally defined to behave as the execution of a
1188            clean operation followed immediately by an invalidate operation,
1189            both performing to the same memory location. This functionality
1190            is not correctly implemented in PL310 as clean lines are not
1191            invalidated as a result of these operations.
1192
1193 config ARM_ERRATA_720789
1194         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1195         depends on CPU_V7 && SMP
1196         help
1197           This option enables the workaround for the 720789 Cortex-A9 (prior to
1198           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1199           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1200           As a consequence of this erratum, some TLB entries which should be
1201           invalidated are not, resulting in an incoherency in the system page
1202           tables. The workaround changes the TLB flushing routines to invalidate
1203           entries regardless of the ASID.
1204
1205 config PL310_ERRATA_727915
1206         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1207         depends on CACHE_L2X0
1208         help
1209           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1210           operation (offset 0x7FC). This operation runs in background so that
1211           PL310 can handle normal accesses while it is in progress. Under very
1212           rare circumstances, due to this erratum, write data can be lost when
1213           PL310 treats a cacheable write transaction during a Clean &
1214           Invalidate by Way operation.
1215
1216 config ARM_ERRATA_743622
1217         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1218         depends on CPU_V7
1219         help
1220           This option enables the workaround for the 743622 Cortex-A9
1221           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1222           optimisation in the Cortex-A9 Store Buffer may lead to data
1223           corruption. This workaround sets a specific bit in the diagnostic
1224           register of the Cortex-A9 which disables the Store Buffer
1225           optimisation, preventing the defect from occurring. This has no
1226           visible impact on the overall performance or power consumption of the
1227           processor.
1228
1229 config ARM_ERRATA_751472
1230         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1231         depends on CPU_V7 && SMP
1232         help
1233           This option enables the workaround for the 751472 Cortex-A9 (prior
1234           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1235           completion of a following broadcasted operation if the second
1236           operation is received by a CPU before the ICIALLUIS has completed,
1237           potentially leading to corrupted entries in the cache or TLB.
1238
1239 config ARM_ERRATA_753970
1240         bool "ARM errata: cache sync operation may be faulty"
1241         depends on CACHE_PL310
1242         help
1243           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1244
1245           Under some condition the effect of cache sync operation on
1246           the store buffer still remains when the operation completes.
1247           This means that the store buffer is always asked to drain and
1248           this prevents it from merging any further writes. The workaround
1249           is to replace the normal offset of cache sync operation (0x730)
1250           by another offset targeting an unmapped PL310 register 0x740.
1251           This has the same effect as the cache sync operation: store buffer
1252           drain and waiting for all buffers empty.
1253
1254 config ARM_ERRATA_754322
1255         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1256         depends on CPU_V7
1257         help
1258           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1259           r3p*) erratum. A speculative memory access may cause a page table walk
1260           which starts prior to an ASID switch but completes afterwards. This
1261           can populate the micro-TLB with a stale entry which may be hit with
1262           the new ASID. This workaround places two dsb instructions in the mm
1263           switching code so that no page table walks can cross the ASID switch.
1264
1265 config ARM_ERRATA_754327
1266         bool "ARM errata: no automatic Store Buffer drain"
1267         depends on CPU_V7 && SMP
1268         help
1269           This option enables the workaround for the 754327 Cortex-A9 (prior to
1270           r2p0) erratum. The Store Buffer does not have any automatic draining
1271           mechanism and therefore a livelock may occur if an external agent
1272           continuously polls a memory location waiting to observe an update.
1273           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1274           written polling loops from denying visibility of updates to memory.
1275
1276 config ARM_ERRATA_364296
1277         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1278         depends on CPU_V6 && !SMP
1279         help
1280           This options enables the workaround for the 364296 ARM1136
1281           r0p2 erratum (possible cache data corruption with
1282           hit-under-miss enabled). It sets the undocumented bit 31 in
1283           the auxiliary control register and the FI bit in the control
1284           register, thus disabling hit-under-miss without putting the
1285           processor into full low interrupt latency mode. ARM11MPCore
1286           is not affected.
1287
1288 config ARM_ERRATA_764369
1289         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1290         depends on CPU_V7 && SMP
1291         help
1292           This option enables the workaround for erratum 764369
1293           affecting Cortex-A9 MPCore with two or more processors (all
1294           current revisions). Under certain timing circumstances, a data
1295           cache line maintenance operation by MVA targeting an Inner
1296           Shareable memory region may fail to proceed up to either the
1297           Point of Coherency or to the Point of Unification of the
1298           system. This workaround adds a DSB instruction before the
1299           relevant cache maintenance functions and sets a specific bit
1300           in the diagnostic control register of the SCU.
1301
1302 endmenu
1303
1304 source "arch/arm/common/Kconfig"
1305
1306 menu "Bus support"
1307
1308 config ARM_AMBA
1309         bool
1310
1311 config ISA
1312         bool
1313         help
1314           Find out whether you have ISA slots on your motherboard.  ISA is the
1315           name of a bus system, i.e. the way the CPU talks to the other stuff
1316           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1317           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1318           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1319
1320 # Select ISA DMA controller support
1321 config ISA_DMA
1322         bool
1323         select ISA_DMA_API
1324
1325 # Select ISA DMA interface
1326 config ISA_DMA_API
1327         bool
1328
1329 config PCI
1330         bool "PCI support" if MIGHT_HAVE_PCI
1331         help
1332           Find out whether you have a PCI motherboard. PCI is the name of a
1333           bus system, i.e. the way the CPU talks to the other stuff inside
1334           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1335           VESA. If you have PCI, say Y, otherwise N.
1336
1337 config PCI_DOMAINS
1338         bool
1339         depends on PCI
1340
1341 config PCI_NANOENGINE
1342         bool "BSE nanoEngine PCI support"
1343         depends on SA1100_NANOENGINE
1344         help
1345           Enable PCI on the BSE nanoEngine board.
1346
1347 config PCI_SYSCALL
1348         def_bool PCI
1349
1350 # Select the host bridge type
1351 config PCI_HOST_VIA82C505
1352         bool
1353         depends on PCI && ARCH_SHARK
1354         default y
1355
1356 config PCI_HOST_ITE8152
1357         bool
1358         depends on PCI && MACH_ARMCORE
1359         default y
1360         select DMABOUNCE
1361
1362 source "drivers/pci/Kconfig"
1363
1364 source "drivers/pcmcia/Kconfig"
1365
1366 endmenu
1367
1368 menu "Kernel Features"
1369
1370 source "kernel/time/Kconfig"
1371
1372 config SMP
1373         bool "Symmetric Multi-Processing"
1374         depends on CPU_V6K || CPU_V7
1375         depends on GENERIC_CLOCKEVENTS
1376         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1377                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1378                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1379                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1380         select USE_GENERIC_SMP_HELPERS
1381         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1382         help
1383           This enables support for systems with more than one CPU. If you have
1384           a system with only one CPU, like most personal computers, say N. If
1385           you have a system with more than one CPU, say Y.
1386
1387           If you say N here, the kernel will run on single and multiprocessor
1388           machines, but will use only one CPU of a multiprocessor machine. If
1389           you say Y here, the kernel will run on many, but not all, single
1390           processor machines. On a single processor machine, the kernel will
1391           run faster if you say N here.
1392
1393           See also <file:Documentation/i386/IO-APIC.txt>,
1394           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1395           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1396
1397           If you don't know what to do here, say N.
1398
1399 config SMP_ON_UP
1400         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1401         depends on EXPERIMENTAL
1402         depends on SMP && !XIP_KERNEL
1403         default y
1404         help
1405           SMP kernels contain instructions which fail on non-SMP processors.
1406           Enabling this option allows the kernel to modify itself to make
1407           these instructions safe.  Disabling it allows about 1K of space
1408           savings.
1409
1410           If you don't know what to do here, say Y.
1411
1412 config HAVE_ARM_SCU
1413         bool
1414         help
1415           This option enables support for the ARM system coherency unit
1416
1417 config HAVE_ARM_TWD
1418         bool
1419         depends on SMP
1420         select TICK_ONESHOT
1421         help
1422           This options enables support for the ARM timer and watchdog unit
1423
1424 choice
1425         prompt "Memory split"
1426         default VMSPLIT_3G
1427         help
1428           Select the desired split between kernel and user memory.
1429
1430           If you are not absolutely sure what you are doing, leave this
1431           option alone!
1432
1433         config VMSPLIT_3G
1434                 bool "3G/1G user/kernel split"
1435         config VMSPLIT_2G
1436                 bool "2G/2G user/kernel split"
1437         config VMSPLIT_1G
1438                 bool "1G/3G user/kernel split"
1439 endchoice
1440
1441 config PAGE_OFFSET
1442         hex
1443         default 0x40000000 if VMSPLIT_1G
1444         default 0x80000000 if VMSPLIT_2G
1445         default 0xC0000000
1446
1447 config NR_CPUS
1448         int "Maximum number of CPUs (2-32)"
1449         range 2 32
1450         depends on SMP
1451         default "4"
1452
1453 config HOTPLUG_CPU
1454         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1455         depends on SMP && HOTPLUG && EXPERIMENTAL
1456         help
1457           Say Y here to experiment with turning CPUs off and on.  CPUs
1458           can be controlled through /sys/devices/system/cpu.
1459
1460 config LOCAL_TIMERS
1461         bool "Use local timer interrupts"
1462         depends on SMP
1463         default y
1464         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1465         help
1466           Enable support for local timers on SMP platforms, rather then the
1467           legacy IPI broadcast method.  Local timers allows the system
1468           accounting to be spread across the timer interval, preventing a
1469           "thundering herd" at every timer tick.
1470
1471 source kernel/Kconfig.preempt
1472
1473 config HZ
1474         int
1475         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1476                 ARCH_S5PV210 || ARCH_EXYNOS4
1477         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1478         default AT91_TIMER_HZ if ARCH_AT91
1479         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1480         default 100
1481
1482 config THUMB2_KERNEL
1483         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1484         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1485         select AEABI
1486         select ARM_ASM_UNIFIED
1487         help
1488           By enabling this option, the kernel will be compiled in
1489           Thumb-2 mode. A compiler/assembler that understand the unified
1490           ARM-Thumb syntax is needed.
1491
1492           If unsure, say N.
1493
1494 config THUMB2_AVOID_R_ARM_THM_JUMP11
1495         bool "Work around buggy Thumb-2 short branch relocations in gas"
1496         depends on THUMB2_KERNEL && MODULES
1497         default y
1498         help
1499           Various binutils versions can resolve Thumb-2 branches to
1500           locally-defined, preemptible global symbols as short-range "b.n"
1501           branch instructions.
1502
1503           This is a problem, because there's no guarantee the final
1504           destination of the symbol, or any candidate locations for a
1505           trampoline, are within range of the branch.  For this reason, the
1506           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1507           relocation in modules at all, and it makes little sense to add
1508           support.
1509
1510           The symptom is that the kernel fails with an "unsupported
1511           relocation" error when loading some modules.
1512
1513           Until fixed tools are available, passing
1514           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1515           code which hits this problem, at the cost of a bit of extra runtime
1516           stack usage in some cases.
1517
1518           The problem is described in more detail at:
1519               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1520
1521           Only Thumb-2 kernels are affected.
1522
1523           Unless you are sure your tools don't have this problem, say Y.
1524
1525 config ARM_ASM_UNIFIED
1526         bool
1527
1528 config AEABI
1529         bool "Use the ARM EABI to compile the kernel"
1530         help
1531           This option allows for the kernel to be compiled using the latest
1532           ARM ABI (aka EABI).  This is only useful if you are using a user
1533           space environment that is also compiled with EABI.
1534
1535           Since there are major incompatibilities between the legacy ABI and
1536           EABI, especially with regard to structure member alignment, this
1537           option also changes the kernel syscall calling convention to
1538           disambiguate both ABIs and allow for backward compatibility support
1539           (selected with CONFIG_OABI_COMPAT).
1540
1541           To use this you need GCC version 4.0.0 or later.
1542
1543 config OABI_COMPAT
1544         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1545         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1546         default y
1547         help
1548           This option preserves the old syscall interface along with the
1549           new (ARM EABI) one. It also provides a compatibility layer to
1550           intercept syscalls that have structure arguments which layout
1551           in memory differs between the legacy ABI and the new ARM EABI
1552           (only for non "thumb" binaries). This option adds a tiny
1553           overhead to all syscalls and produces a slightly larger kernel.
1554           If you know you'll be using only pure EABI user space then you
1555           can say N here. If this option is not selected and you attempt
1556           to execute a legacy ABI binary then the result will be
1557           UNPREDICTABLE (in fact it can be predicted that it won't work
1558           at all). If in doubt say Y.
1559
1560 config ARCH_HAS_HOLES_MEMORYMODEL
1561         bool
1562
1563 config ARCH_SPARSEMEM_ENABLE
1564         bool
1565
1566 config ARCH_SPARSEMEM_DEFAULT
1567         def_bool ARCH_SPARSEMEM_ENABLE
1568
1569 config ARCH_SELECT_MEMORY_MODEL
1570         def_bool ARCH_SPARSEMEM_ENABLE
1571
1572 config HAVE_ARCH_PFN_VALID
1573         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1574
1575 config HIGHMEM
1576         bool "High Memory Support"
1577         depends on MMU
1578         help
1579           The address space of ARM processors is only 4 Gigabytes large
1580           and it has to accommodate user address space, kernel address
1581           space as well as some memory mapped IO. That means that, if you
1582           have a large amount of physical memory and/or IO, not all of the
1583           memory can be "permanently mapped" by the kernel. The physical
1584           memory that is not permanently mapped is called "high memory".
1585
1586           Depending on the selected kernel/user memory split, minimum
1587           vmalloc space and actual amount of RAM, you may not need this
1588           option which should result in a slightly faster kernel.
1589
1590           If unsure, say n.
1591
1592 config HIGHPTE
1593         bool "Allocate 2nd-level pagetables from highmem"
1594         depends on HIGHMEM
1595
1596 config HW_PERF_EVENTS
1597         bool "Enable hardware performance counter support for perf events"
1598         depends on PERF_EVENTS && CPU_HAS_PMU
1599         default y
1600         help
1601           Enable hardware performance counter support for perf events. If
1602           disabled, perf events will use software events only.
1603
1604 source "mm/Kconfig"
1605
1606 config FORCE_MAX_ZONEORDER
1607         int "Maximum zone order" if ARCH_SHMOBILE
1608         range 11 64 if ARCH_SHMOBILE
1609         default "9" if SA1111
1610         default "11"
1611         help
1612           The kernel memory allocator divides physically contiguous memory
1613           blocks into "zones", where each zone is a power of two number of
1614           pages.  This option selects the largest power of two that the kernel
1615           keeps in the memory allocator.  If you need to allocate very large
1616           blocks of physically contiguous memory, then you may need to
1617           increase this value.
1618
1619           This config option is actually maximum order plus one. For example,
1620           a value of 11 means that the largest free memory block is 2^10 pages.
1621
1622 config LEDS
1623         bool "Timer and CPU usage LEDs"
1624         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1625                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1626                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1627                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1628                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1629                    ARCH_AT91 || ARCH_DAVINCI || \
1630                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1631         help
1632           If you say Y here, the LEDs on your machine will be used
1633           to provide useful information about your current system status.
1634
1635           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1636           be able to select which LEDs are active using the options below. If
1637           you are compiling a kernel for the EBSA-110 or the LART however, the
1638           red LED will simply flash regularly to indicate that the system is
1639           still functional. It is safe to say Y here if you have a CATS
1640           system, but the driver will do nothing.
1641
1642 config LEDS_TIMER
1643         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1644                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1645                             || MACH_OMAP_PERSEUS2
1646         depends on LEDS
1647         depends on !GENERIC_CLOCKEVENTS
1648         default y if ARCH_EBSA110
1649         help
1650           If you say Y here, one of the system LEDs (the green one on the
1651           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1652           will flash regularly to indicate that the system is still
1653           operational. This is mainly useful to kernel hackers who are
1654           debugging unstable kernels.
1655
1656           The LART uses the same LED for both Timer LED and CPU usage LED
1657           functions. You may choose to use both, but the Timer LED function
1658           will overrule the CPU usage LED.
1659
1660 config LEDS_CPU
1661         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1662                         !ARCH_OMAP) \
1663                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1664                         || MACH_OMAP_PERSEUS2
1665         depends on LEDS
1666         help
1667           If you say Y here, the red LED will be used to give a good real
1668           time indication of CPU usage, by lighting whenever the idle task
1669           is not currently executing.
1670
1671           The LART uses the same LED for both Timer LED and CPU usage LED
1672           functions. You may choose to use both, but the Timer LED function
1673           will overrule the CPU usage LED.
1674
1675 config ALIGNMENT_TRAP
1676         bool
1677         depends on CPU_CP15_MMU
1678         default y if !ARCH_EBSA110
1679         select HAVE_PROC_CPU if PROC_FS
1680         help
1681           ARM processors cannot fetch/store information which is not
1682           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1683           address divisible by 4. On 32-bit ARM processors, these non-aligned
1684           fetch/store instructions will be emulated in software if you say
1685           here, which has a severe performance impact. This is necessary for
1686           correct operation of some network protocols. With an IP-only
1687           configuration it is safe to say N, otherwise say Y.
1688
1689 config UACCESS_WITH_MEMCPY
1690         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1691         depends on MMU && EXPERIMENTAL
1692         default y if CPU_FEROCEON
1693         help
1694           Implement faster copy_to_user and clear_user methods for CPU
1695           cores where a 8-word STM instruction give significantly higher
1696           memory write throughput than a sequence of individual 32bit stores.
1697
1698           A possible side effect is a slight increase in scheduling latency
1699           between threads sharing the same address space if they invoke
1700           such copy operations with large buffers.
1701
1702           However, if the CPU data cache is using a write-allocate mode,
1703           this option is unlikely to provide any performance gain.
1704
1705 config SECCOMP
1706         bool
1707         prompt "Enable seccomp to safely compute untrusted bytecode"
1708         ---help---
1709           This kernel feature is useful for number crunching applications
1710           that may need to compute untrusted bytecode during their
1711           execution. By using pipes or other transports made available to
1712           the process as file descriptors supporting the read/write
1713           syscalls, it's possible to isolate those applications in
1714           their own address space using seccomp. Once seccomp is
1715           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1716           and the task is only allowed to execute a few safe syscalls
1717           defined by each seccomp mode.
1718
1719 config CC_STACKPROTECTOR
1720         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1721         depends on EXPERIMENTAL
1722         help
1723           This option turns on the -fstack-protector GCC feature. This
1724           feature puts, at the beginning of functions, a canary value on
1725           the stack just before the return address, and validates
1726           the value just before actually returning.  Stack based buffer
1727           overflows (that need to overwrite this return address) now also
1728           overwrite the canary, which gets detected and the attack is then
1729           neutralized via a kernel panic.
1730           This feature requires gcc version 4.2 or above.
1731
1732 config DEPRECATED_PARAM_STRUCT
1733         bool "Provide old way to pass kernel parameters"
1734         help
1735           This was deprecated in 2001 and announced to live on for 5 years.
1736           Some old boot loaders still use this way.
1737
1738 endmenu
1739
1740 menu "Boot options"
1741
1742 config USE_OF
1743         bool "Flattened Device Tree support"
1744         select OF
1745         select OF_EARLY_FLATTREE
1746         select IRQ_DOMAIN
1747         help
1748           Include support for flattened device tree machine descriptions.
1749
1750 # Compressed boot loader in ROM.  Yes, we really want to ask about
1751 # TEXT and BSS so we preserve their values in the config files.
1752 config ZBOOT_ROM_TEXT
1753         hex "Compressed ROM boot loader base address"
1754         default "0"
1755         help
1756           The physical address at which the ROM-able zImage is to be
1757           placed in the target.  Platforms which normally make use of
1758           ROM-able zImage formats normally set this to a suitable
1759           value in their defconfig file.
1760
1761           If ZBOOT_ROM is not enabled, this has no effect.
1762
1763 config ZBOOT_ROM_BSS
1764         hex "Compressed ROM boot loader BSS address"
1765         default "0"
1766         help
1767           The base address of an area of read/write memory in the target
1768           for the ROM-able zImage which must be available while the
1769           decompressor is running. It must be large enough to hold the
1770           entire decompressed kernel plus an additional 128 KiB.
1771           Platforms which normally make use of ROM-able zImage formats
1772           normally set this to a suitable value in their defconfig file.
1773
1774           If ZBOOT_ROM is not enabled, this has no effect.
1775
1776 config ZBOOT_ROM
1777         bool "Compressed boot loader in ROM/flash"
1778         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1779         help
1780           Say Y here if you intend to execute your compressed kernel image
1781           (zImage) directly from ROM or flash.  If unsure, say N.
1782
1783 choice
1784         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1785         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1786         default ZBOOT_ROM_NONE
1787         help
1788           Include experimental SD/MMC loading code in the ROM-able zImage.
1789           With this enabled it is possible to write the the ROM-able zImage
1790           kernel image to an MMC or SD card and boot the kernel straight
1791           from the reset vector. At reset the processor Mask ROM will load
1792           the first part of the the ROM-able zImage which in turn loads the
1793           rest the kernel image to RAM.
1794
1795 config ZBOOT_ROM_NONE
1796         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1797         help
1798           Do not load image from SD or MMC
1799
1800 config ZBOOT_ROM_MMCIF
1801         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1802         help
1803           Load image from MMCIF hardware block.
1804
1805 config ZBOOT_ROM_SH_MOBILE_SDHI
1806         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1807         help
1808           Load image from SDHI hardware block
1809
1810 endchoice
1811
1812 config CMDLINE
1813         string "Default kernel command string"
1814         default ""
1815         help
1816           On some architectures (EBSA110 and CATS), there is currently no way
1817           for the boot loader to pass arguments to the kernel. For these
1818           architectures, you should supply some command-line options at build
1819           time by entering them here. As a minimum, you should specify the
1820           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1821
1822 choice
1823         prompt "Kernel command line type" if CMDLINE != ""
1824         default CMDLINE_FROM_BOOTLOADER
1825
1826 config CMDLINE_FROM_BOOTLOADER
1827         bool "Use bootloader kernel arguments if available"
1828         help
1829           Uses the command-line options passed by the boot loader. If
1830           the boot loader doesn't provide any, the default kernel command
1831           string provided in CMDLINE will be used.
1832
1833 config CMDLINE_EXTEND
1834         bool "Extend bootloader kernel arguments"
1835         help
1836           The command-line arguments provided by the boot loader will be
1837           appended to the default kernel command string.
1838
1839 config CMDLINE_FORCE
1840         bool "Always use the default kernel command string"
1841         help
1842           Always use the default kernel command string, even if the boot
1843           loader passes other arguments to the kernel.
1844           This is useful if you cannot or don't want to change the
1845           command-line options your boot loader passes to the kernel.
1846 endchoice
1847
1848 config XIP_KERNEL
1849         bool "Kernel Execute-In-Place from ROM"
1850         depends on !ZBOOT_ROM
1851         help
1852           Execute-In-Place allows the kernel to run from non-volatile storage
1853           directly addressable by the CPU, such as NOR flash. This saves RAM
1854           space since the text section of the kernel is not loaded from flash
1855           to RAM.  Read-write sections, such as the data section and stack,
1856           are still copied to RAM.  The XIP kernel is not compressed since
1857           it has to run directly from flash, so it will take more space to
1858           store it.  The flash address used to link the kernel object files,
1859           and for storing it, is configuration dependent. Therefore, if you
1860           say Y here, you must know the proper physical address where to
1861           store the kernel image depending on your own flash memory usage.
1862
1863           Also note that the make target becomes "make xipImage" rather than
1864           "make zImage" or "make Image".  The final kernel binary to put in
1865           ROM memory will be arch/arm/boot/xipImage.
1866
1867           If unsure, say N.
1868
1869 config XIP_PHYS_ADDR
1870         hex "XIP Kernel Physical Location"
1871         depends on XIP_KERNEL
1872         default "0x00080000"
1873         help
1874           This is the physical address in your flash memory the kernel will
1875           be linked for and stored to.  This address is dependent on your
1876           own flash usage.
1877
1878 config KEXEC
1879         bool "Kexec system call (EXPERIMENTAL)"
1880         depends on EXPERIMENTAL
1881         help
1882           kexec is a system call that implements the ability to shutdown your
1883           current kernel, and to start another kernel.  It is like a reboot
1884           but it is independent of the system firmware.   And like a reboot
1885           you can start any kernel with it, not just Linux.
1886
1887           It is an ongoing process to be certain the hardware in a machine
1888           is properly shutdown, so do not be surprised if this code does not
1889           initially work for you.  It may help to enable device hotplugging
1890           support.
1891
1892 config ATAGS_PROC
1893         bool "Export atags in procfs"
1894         depends on KEXEC
1895         default y
1896         help
1897           Should the atags used to boot the kernel be exported in an "atags"
1898           file in procfs. Useful with kexec.
1899
1900 config CRASH_DUMP
1901         bool "Build kdump crash kernel (EXPERIMENTAL)"
1902         depends on EXPERIMENTAL
1903         help
1904           Generate crash dump after being started by kexec. This should
1905           be normally only set in special crash dump kernels which are
1906           loaded in the main kernel with kexec-tools into a specially
1907           reserved region and then later executed after a crash by
1908           kdump/kexec. The crash dump kernel must be compiled to a
1909           memory address not used by the main kernel
1910
1911           For more details see Documentation/kdump/kdump.txt
1912
1913 config AUTO_ZRELADDR
1914         bool "Auto calculation of the decompressed kernel image address"
1915         depends on !ZBOOT_ROM && !ARCH_U300
1916         help
1917           ZRELADDR is the physical address where the decompressed kernel
1918           image will be placed. If AUTO_ZRELADDR is selected, the address
1919           will be determined at run-time by masking the current IP with
1920           0xf8000000. This assumes the zImage being placed in the first 128MB
1921           from start of memory.
1922
1923 endmenu
1924
1925 menu "CPU Power Management"
1926
1927 if ARCH_HAS_CPUFREQ
1928
1929 source "drivers/cpufreq/Kconfig"
1930
1931 config CPU_FREQ_IMX
1932         tristate "CPUfreq driver for i.MX CPUs"
1933         depends on ARCH_MXC && CPU_FREQ
1934         help
1935           This enables the CPUfreq driver for i.MX CPUs.
1936
1937 config CPU_FREQ_SA1100
1938         bool
1939
1940 config CPU_FREQ_SA1110
1941         bool
1942
1943 config CPU_FREQ_INTEGRATOR
1944         tristate "CPUfreq driver for ARM Integrator CPUs"
1945         depends on ARCH_INTEGRATOR && CPU_FREQ
1946         default y
1947         help
1948           This enables the CPUfreq driver for ARM Integrator CPUs.
1949
1950           For details, take a look at <file:Documentation/cpu-freq>.
1951
1952           If in doubt, say Y.
1953
1954 config CPU_FREQ_PXA
1955         bool
1956         depends on CPU_FREQ && ARCH_PXA && PXA25x
1957         default y
1958         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1959
1960 config CPU_FREQ_S3C
1961         bool
1962         help
1963           Internal configuration node for common cpufreq on Samsung SoC
1964
1965 config CPU_FREQ_S3C24XX
1966         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1967         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1968         select CPU_FREQ_S3C
1969         help
1970           This enables the CPUfreq driver for the Samsung S3C24XX family
1971           of CPUs.
1972
1973           For details, take a look at <file:Documentation/cpu-freq>.
1974
1975           If in doubt, say N.
1976
1977 config CPU_FREQ_S3C24XX_PLL
1978         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1979         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1980         help
1981           Compile in support for changing the PLL frequency from the
1982           S3C24XX series CPUfreq driver. The PLL takes time to settle
1983           after a frequency change, so by default it is not enabled.
1984
1985           This also means that the PLL tables for the selected CPU(s) will
1986           be built which may increase the size of the kernel image.
1987
1988 config CPU_FREQ_S3C24XX_DEBUG
1989         bool "Debug CPUfreq Samsung driver core"
1990         depends on CPU_FREQ_S3C24XX
1991         help
1992           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1993
1994 config CPU_FREQ_S3C24XX_IODEBUG
1995         bool "Debug CPUfreq Samsung driver IO timing"
1996         depends on CPU_FREQ_S3C24XX
1997         help
1998           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1999
2000 config CPU_FREQ_S3C24XX_DEBUGFS
2001         bool "Export debugfs for CPUFreq"
2002         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2003         help
2004           Export status information via debugfs.
2005
2006 endif
2007
2008 source "drivers/cpuidle/Kconfig"
2009
2010 endmenu
2011
2012 menu "Floating point emulation"
2013
2014 comment "At least one emulation must be selected"
2015
2016 config FPE_NWFPE
2017         bool "NWFPE math emulation"
2018         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2019         ---help---
2020           Say Y to include the NWFPE floating point emulator in the kernel.
2021           This is necessary to run most binaries. Linux does not currently
2022           support floating point hardware so you need to say Y here even if
2023           your machine has an FPA or floating point co-processor podule.
2024
2025           You may say N here if you are going to load the Acorn FPEmulator
2026           early in the bootup.
2027
2028 config FPE_NWFPE_XP
2029         bool "Support extended precision"
2030         depends on FPE_NWFPE
2031         help
2032           Say Y to include 80-bit support in the kernel floating-point
2033           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2034           Note that gcc does not generate 80-bit operations by default,
2035           so in most cases this option only enlarges the size of the
2036           floating point emulator without any good reason.
2037
2038           You almost surely want to say N here.
2039
2040 config FPE_FASTFPE
2041         bool "FastFPE math emulation (EXPERIMENTAL)"
2042         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2043         ---help---
2044           Say Y here to include the FAST floating point emulator in the kernel.
2045           This is an experimental much faster emulator which now also has full
2046           precision for the mantissa.  It does not support any exceptions.
2047           It is very simple, and approximately 3-6 times faster than NWFPE.
2048
2049           It should be sufficient for most programs.  It may be not suitable
2050           for scientific calculations, but you have to check this for yourself.
2051           If you do not feel you need a faster FP emulation you should better
2052           choose NWFPE.
2053
2054 config VFP
2055         bool "VFP-format floating point maths"
2056         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2057         help
2058           Say Y to include VFP support code in the kernel. This is needed
2059           if your hardware includes a VFP unit.
2060
2061           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2062           release notes and additional status information.
2063
2064           Say N if your target does not have VFP hardware.
2065
2066 config VFPv3
2067         bool
2068         depends on VFP
2069         default y if CPU_V7
2070
2071 config NEON
2072         bool "Advanced SIMD (NEON) Extension support"
2073         depends on VFPv3 && CPU_V7
2074         help
2075           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2076           Extension.
2077
2078 endmenu
2079
2080 menu "Userspace binary formats"
2081
2082 source "fs/Kconfig.binfmt"
2083
2084 config ARTHUR
2085         tristate "RISC OS personality"
2086         depends on !AEABI
2087         help
2088           Say Y here to include the kernel code necessary if you want to run
2089           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2090           experimental; if this sounds frightening, say N and sleep in peace.
2091           You can also say M here to compile this support as a module (which
2092           will be called arthur).
2093
2094 endmenu
2095
2096 menu "Power management options"
2097
2098 source "kernel/power/Kconfig"
2099
2100 config ARCH_SUSPEND_POSSIBLE
2101         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2102         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2103                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2104         def_bool y
2105
2106 endmenu
2107
2108 source "net/Kconfig"
2109
2110 source "drivers/Kconfig"
2111
2112 source "fs/Kconfig"
2113
2114 source "arch/arm/Kconfig.debug"
2115
2116 source "security/Kconfig"
2117
2118 source "crypto/Kconfig"
2119
2120 source "lib/Kconfig"