2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <asm/sections.h>
18 #include <asm/arcregs.h>
20 #include <asm/cache.h>
21 #include <asm/setup.h>
24 #include <asm/arcregs.h>
26 #include <asm/unwind.h>
28 #include <asm/mach_desc.h>
30 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
32 int running_on_hw
= 1; /* vs. on ISS */
34 char __initdata command_line
[COMMAND_LINE_SIZE
];
35 struct machine_desc
*machine_desc __initdata
;
37 struct task_struct
*_current_task
[NR_CPUS
]; /* For stack switching */
39 struct cpuinfo_arc cpuinfo_arc700
[NR_CPUS
];
42 void __init
read_arc_build_cfg_regs(void)
44 struct bcr_perip uncached_space
;
45 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
48 READ_BCR(AUX_IDENTITY
, cpu
->core
);
50 cpu
->timers
= read_aux_reg(ARC_REG_TIMERS_BCR
);
52 cpu
->vec_base
= read_aux_reg(AUX_INTR_VEC_BASE
);
53 if (cpu
->vec_base
== 0)
54 cpu
->vec_base
= (unsigned int)_int_vec_base_lds
;
56 READ_BCR(ARC_REG_D_UNCACH_BCR
, uncached_space
);
57 cpu
->uncached_base
= uncached_space
.start
<< 24;
59 cpu
->extn
.mul
= read_aux_reg(ARC_REG_MUL_BCR
);
60 cpu
->extn
.swap
= read_aux_reg(ARC_REG_SWAP_BCR
);
61 cpu
->extn
.norm
= read_aux_reg(ARC_REG_NORM_BCR
);
62 cpu
->extn
.minmax
= read_aux_reg(ARC_REG_MIXMAX_BCR
);
63 cpu
->extn
.barrel
= read_aux_reg(ARC_REG_BARREL_BCR
);
64 READ_BCR(ARC_REG_MAC_BCR
, cpu
->extn_mac_mul
);
66 cpu
->extn
.ext_arith
= read_aux_reg(ARC_REG_EXTARITH_BCR
);
67 cpu
->extn
.crc
= read_aux_reg(ARC_REG_CRC_BCR
);
69 /* Note that we read the CCM BCRs independent of kernel config
70 * This is to catch the cases where user doesn't know that
71 * CCMs are present in hardware build
76 struct bcr_dccm_base dccm_base
;
77 unsigned int bcr_32bit_val
;
79 bcr_32bit_val
= read_aux_reg(ARC_REG_ICCM_BCR
);
81 iccm
= *((struct bcr_iccm
*)&bcr_32bit_val
);
82 cpu
->iccm
.base_addr
= iccm
.base
<< 16;
83 cpu
->iccm
.sz
= 0x2000 << (iccm
.sz
- 1);
86 bcr_32bit_val
= read_aux_reg(ARC_REG_DCCM_BCR
);
88 dccm
= *((struct bcr_dccm
*)&bcr_32bit_val
);
89 cpu
->dccm
.sz
= 0x800 << (dccm
.sz
);
91 READ_BCR(ARC_REG_DCCMBASE_BCR
, dccm_base
);
92 cpu
->dccm
.base_addr
= dccm_base
.addr
<< 8;
96 READ_BCR(ARC_REG_XY_MEM_BCR
, cpu
->extn_xymem
);
98 read_decode_mmu_bcr();
99 read_decode_cache_bcr();
101 READ_BCR(ARC_REG_FP_BCR
, cpu
->fp
);
102 READ_BCR(ARC_REG_DPFP_BCR
, cpu
->dpfp
);
105 static const struct cpuinfo_data arc_cpu_tbl
[] = {
106 { {0x10, "ARCTangent A5"}, 0x1F},
107 { {0x20, "ARC 600" }, 0x2F},
108 { {0x30, "ARC 700" }, 0x33},
109 { {0x34, "ARC 700 R4.10"}, 0x34},
113 char *arc_cpu_mumbojumbo(int cpu_id
, char *buf
, int len
)
116 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
117 struct bcr_identity
*core
= &cpu
->core
;
118 const struct cpuinfo_data
*tbl
;
120 #ifdef CONFIG_CPU_BIG_ENDIAN
125 n
+= scnprintf(buf
+ n
, len
- n
,
126 "\nARC IDENTITY\t: Family [%#02x]"
127 " Cpu-id [%#02x] Chip-id [%#4x]\n",
128 core
->family
, core
->cpu_id
,
131 for (tbl
= &arc_cpu_tbl
[0]; tbl
->info
.id
!= 0; tbl
++) {
132 if ((core
->family
>= tbl
->info
.id
) &&
133 (core
->family
<= tbl
->up_range
)) {
134 n
+= scnprintf(buf
+ n
, len
- n
,
135 "processor\t: %s %s\n",
137 be
? "[Big Endian]" : "");
142 if (tbl
->info
.id
== 0)
143 n
+= scnprintf(buf
+ n
, len
- n
, "UNKNOWN ARC Processor\n");
145 n
+= scnprintf(buf
+ n
, len
- n
, "CPU speed\t: %u.%02u Mhz\n",
146 (unsigned int)(arc_get_core_freq() / 1000000),
147 (unsigned int)(arc_get_core_freq() / 10000) % 100);
149 n
+= scnprintf(buf
+ n
, len
- n
, "Timers\t\t: %s %s\n",
150 (cpu
->timers
& 0x200) ? "TIMER1" : "",
151 (cpu
->timers
& 0x100) ? "TIMER0" : "");
153 n
+= scnprintf(buf
+ n
, len
- n
, "Vect Tbl Base\t: %#x\n",
156 n
+= scnprintf(buf
+ n
, len
- n
, "UNCACHED Base\t: %#x\n",
162 static const struct id_to_str mul_type_nm
[] = {
164 { 0x1, "32x32 (spl Result Reg)" },
165 { 0x2, "32x32 (ANY Result Reg)" }
168 static const struct id_to_str mac_mul_nm
[] = {
171 {0x2, "Dual 16 x 16"},
175 {0x6, "Dual 16x16 and 32x16"}
178 char *arc_extn_mumbojumbo(int cpu_id
, char *buf
, int len
)
181 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
184 #define IS_AVAIL1(var, str) ((var) ? str : "")
185 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
186 #define IS_USED(var) ((var) ? "(in-use)" : "(not used)")
188 n
+= scnprintf(buf
+ n
, len
- n
,
189 "Extn [700-Base]\t: %s %s %s %s %s %s\n",
190 IS_AVAIL2(cpu
->extn
.norm
, "norm,"),
191 IS_AVAIL2(cpu
->extn
.barrel
, "barrel-shift,"),
192 IS_AVAIL1(cpu
->extn
.swap
, "swap,"),
193 IS_AVAIL2(cpu
->extn
.minmax
, "minmax,"),
194 IS_AVAIL1(cpu
->extn
.crc
, "crc,"),
195 IS_AVAIL2(cpu
->extn
.ext_arith
, "ext-arith"));
197 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [700-MPY]\t: %s",
198 mul_type_nm
[cpu
->extn
.mul
].str
);
200 n
+= scnprintf(buf
+ n
, len
- n
, " MAC MPY: %s\n",
201 mac_mul_nm
[cpu
->extn_mac_mul
.type
].str
);
203 if (cpu
->core
.family
== 0x34) {
204 n
+= scnprintf(buf
+ n
, len
- n
,
205 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
206 IS_USED(__CONFIG_ARC_HAS_LLSC_VAL
),
207 IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL
),
208 IS_USED(__CONFIG_ARC_HAS_RTSC_VAL
));
211 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [CCM]\t: %s",
212 !(cpu
->dccm
.sz
|| cpu
->iccm
.sz
) ? "N/A" : "");
215 n
+= scnprintf(buf
+ n
, len
- n
, "DCCM: @ %x, %d KB ",
216 cpu
->dccm
.base_addr
, TO_KB(cpu
->dccm
.sz
));
219 n
+= scnprintf(buf
+ n
, len
- n
, "ICCM: @ %x, %d KB",
220 cpu
->iccm
.base_addr
, TO_KB(cpu
->iccm
.sz
));
222 n
+= scnprintf(buf
+ n
, len
- n
, "\nExtn [FPU]\t: %s",
223 !(cpu
->fp
.ver
|| cpu
->dpfp
.ver
) ? "N/A" : "");
226 n
+= scnprintf(buf
+ n
, len
- n
, "SP [v%d] %s",
227 cpu
->fp
.ver
, cpu
->fp
.fast
? "(fast)" : "");
230 n
+= scnprintf(buf
+ n
, len
- n
, "DP [v%d] %s",
231 cpu
->dpfp
.ver
, cpu
->dpfp
.fast
? "(fast)" : "");
233 n
+= scnprintf(buf
+ n
, len
- n
, "\n");
235 n
+= scnprintf(buf
+ n
, len
- n
,
236 "OS ABI [v3]\t: no-legacy-syscalls\n");
241 void __init
arc_chk_ccms(void)
243 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
244 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
246 #ifdef CONFIG_ARC_HAS_DCCM
248 * DCCM can be arbit placed in hardware.
249 * Make sure it's placement/sz matches what Linux is built with
251 if ((unsigned int)__arc_dccm_base
!= cpu
->dccm
.base_addr
)
252 panic("Linux built with incorrect DCCM Base address\n");
254 if (CONFIG_ARC_DCCM_SZ
!= cpu
->dccm
.sz
)
255 panic("Linux built with incorrect DCCM Size\n");
258 #ifdef CONFIG_ARC_HAS_ICCM
259 if (CONFIG_ARC_ICCM_SZ
!= cpu
->iccm
.sz
)
260 panic("Linux built with incorrect ICCM Size\n");
266 * Ensure that FP hardware and kernel config match
267 * -If hardware contains DPFP, kernel needs to save/restore FPU state
268 * across context switches
269 * -If hardware lacks DPFP, but kernel configured to save FPU state then
270 * kernel trying to access non-existant DPFP regs will crash
272 * We only check for Dbl precision Floating Point, because only DPFP
273 * hardware has dedicated regs which need to be saved/restored on ctx-sw
274 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
276 void __init
arc_chk_fpu(void)
278 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
281 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
282 pr_warn("DPFP support broken in this kernel...\n");
285 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
286 panic("H/w lacks DPFP support, apps won't work\n");
292 * Initialize and setup the processor core
293 * This is called by all the CPUs thus should not do special case stuff
294 * such as only for boot CPU etc
297 void __init
setup_processor(void)
300 int cpu_id
= smp_processor_id();
302 read_arc_build_cfg_regs();
305 printk(arc_cpu_mumbojumbo(cpu_id
, str
, sizeof(str
)));
311 printk(arc_extn_mumbojumbo(cpu_id
, str
, sizeof(str
)));
314 printk(arc_platform_smp_cpuinfo());
320 void __init
setup_arch(char **cmdline_p
)
322 #ifdef CONFIG_CMDLINE_UBOOT
323 /* Make sure that a whitespace is inserted before */
324 strlcat(command_line
, " ", sizeof(command_line
));
327 * Append .config cmdline to base command line, which might already
328 * contain u-boot "bootargs" (handled by head.S, if so configured)
330 strlcat(command_line
, CONFIG_CMDLINE
, sizeof(command_line
));
332 /* Save unparsed command line copy for /proc/cmdline */
333 strlcpy(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
334 *cmdline_p
= command_line
;
336 machine_desc
= setup_machine_fdt(__dtb_start
);
338 panic("Embedded DT invalid\n");
340 /* To force early parsing of things like mem=xxx */
343 /* Platform/board specific: e.g. early console registration */
344 if (machine_desc
->init_early
)
345 machine_desc
->init_early();
355 /* copy flat DT out of .init and then unflatten it */
357 unflatten_device_tree();
359 /* Can be issue if someone passes cmd line arg "ro"
360 * But that is unlikely so keeping it as it is
362 root_mountflags
&= ~MS_RDONLY
;
366 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
367 conswitchp
= &dummy_con
;
374 static int __init
customize_machine(void)
376 /* Add platform devices */
377 if (machine_desc
->init_machine
)
378 machine_desc
->init_machine();
382 arch_initcall(customize_machine
);
384 static int __init
init_late_machine(void)
386 if (machine_desc
->init_late
)
387 machine_desc
->init_late();
391 late_initcall(init_late_machine
);
393 * Get CPU information for use by the procfs.
396 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
397 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
399 static int show_cpuinfo(struct seq_file
*m
, void *v
)
402 int cpu_id
= ptr_to_cpu(v
);
404 str
= (char *)__get_free_page(GFP_TEMPORARY
);
408 seq_printf(m
, arc_cpu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
410 seq_printf(m
, "Bogo MIPS : \t%lu.%02lu\n",
411 loops_per_jiffy
/ (500000 / HZ
),
412 (loops_per_jiffy
/ (5000 / HZ
)) % 100);
414 seq_printf(m
, arc_mmu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
416 seq_printf(m
, arc_cache_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
418 seq_printf(m
, arc_extn_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
421 seq_printf(m
, arc_platform_smp_cpuinfo());
424 free_page((unsigned long)str
);
426 seq_printf(m
, "\n\n");
431 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
434 * Callback returns cpu-id to iterator for show routine, NULL to stop.
435 * However since NULL is also a valid cpu-id (0), we use a round-about
436 * way to pass it w/o having to kmalloc/free a 2 byte string.
437 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
439 return *pos
< num_possible_cpus() ? cpu_to_ptr(*pos
) : NULL
;
442 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
445 return c_start(m
, pos
);
448 static void c_stop(struct seq_file
*m
, void *v
)
452 const struct seq_operations cpuinfo_op
= {
459 static DEFINE_PER_CPU(struct cpu
, cpu_topology
);
461 static int __init
topology_init(void)
465 for_each_present_cpu(cpu
)
466 register_cpu(&per_cpu(cpu_topology
, cpu
), cpu
);
471 subsys_initcall(topology_init
);