hwmon: (lm90) Add support for ADT7461A and NCT1008
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / Documentation / hwmon / lm90
1 Kernel driver lm90
2 ==================
3
4 Supported chips:
5 * National Semiconductor LM90
6 Prefix: 'lm90'
7 Addresses scanned: I2C 0x4c
8 Datasheet: Publicly available at the National Semiconductor website
9 http://www.national.com/pf/LM/LM90.html
10 * National Semiconductor LM89
11 Prefix: 'lm89' (no auto-detection)
12 Addresses scanned: I2C 0x4c and 0x4d
13 Datasheet: Publicly available at the National Semiconductor website
14 http://www.national.com/mpf/LM/LM89.html
15 * National Semiconductor LM99
16 Prefix: 'lm99'
17 Addresses scanned: I2C 0x4c and 0x4d
18 Datasheet: Publicly available at the National Semiconductor website
19 http://www.national.com/pf/LM/LM99.html
20 * National Semiconductor LM86
21 Prefix: 'lm86'
22 Addresses scanned: I2C 0x4c
23 Datasheet: Publicly available at the National Semiconductor website
24 http://www.national.com/mpf/LM/LM86.html
25 * Analog Devices ADM1032
26 Prefix: 'adm1032'
27 Addresses scanned: I2C 0x4c and 0x4d
28 Datasheet: Publicly available at the ON Semiconductor website
29 http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032
30 * Analog Devices ADT7461
31 Prefix: 'adt7461'
32 Addresses scanned: I2C 0x4c and 0x4d
33 Datasheet: Publicly available at the ON Semiconductor website
34 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
35 * Analog Devices ADT7461A
36 Prefix: 'adt7461a'
37 Addresses scanned: I2C 0x4c and 0x4d
38 Datasheet: Publicly available at the ON Semiconductor website
39 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A
40 * ON Semiconductor NCT1008
41 Prefix: 'nct1008'
42 Addresses scanned: I2C 0x4c and 0x4d
43 Datasheet: Publicly available at the ON Semiconductor website
44 http://www.onsemi.com/PowerSolutions/product.do?id=NCT1008
45 * Maxim MAX6646
46 Prefix: 'max6646'
47 Addresses scanned: I2C 0x4d
48 Datasheet: Publicly available at the Maxim website
49 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
50 * Maxim MAX6647
51 Prefix: 'max6646'
52 Addresses scanned: I2C 0x4e
53 Datasheet: Publicly available at the Maxim website
54 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
55 * Maxim MAX6648
56 Prefix: 'max6646'
57 Addresses scanned: I2C 0x4c
58 Datasheet: Publicly available at the Maxim website
59 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
60 * Maxim MAX6649
61 Prefix: 'max6646'
62 Addresses scanned: I2C 0x4c
63 Datasheet: Publicly available at the Maxim website
64 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
65 * Maxim MAX6657
66 Prefix: 'max6657'
67 Addresses scanned: I2C 0x4c
68 Datasheet: Publicly available at the Maxim website
69 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
70 * Maxim MAX6658
71 Prefix: 'max6657'
72 Addresses scanned: I2C 0x4c
73 Datasheet: Publicly available at the Maxim website
74 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
75 * Maxim MAX6659
76 Prefix: 'max6659'
77 Addresses scanned: I2C 0x4c, 0x4d, 0x4e
78 Datasheet: Publicly available at the Maxim website
79 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
80 * Maxim MAX6680
81 Prefix: 'max6680'
82 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
83 0x4c, 0x4d and 0x4e
84 Datasheet: Publicly available at the Maxim website
85 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
86 * Maxim MAX6681
87 Prefix: 'max6680'
88 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
89 0x4c, 0x4d and 0x4e
90 Datasheet: Publicly available at the Maxim website
91 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
92 * Maxim MAX6692
93 Prefix: 'max6646'
94 Addresses scanned: I2C 0x4c
95 Datasheet: Publicly available at the Maxim website
96 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
97 * Maxim MAX6695
98 Prefix: 'max6695'
99 Addresses scanned: I2C 0x18
100 Datasheet: Publicly available at the Maxim website
101 http://www.maxim-ic.com/datasheet/index.mvp/id/4199
102 * Maxim MAX6696
103 Prefix: 'max6695'
104 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
105 0x4c, 0x4d and 0x4e
106 Datasheet: Publicly available at the Maxim website
107 http://www.maxim-ic.com/datasheet/index.mvp/id/4199
108 * Winbond/Nuvoton W83L771W/G
109 Prefix: 'w83l771'
110 Addresses scanned: I2C 0x4c
111 Datasheet: No longer available
112 * Winbond/Nuvoton W83L771AWG/ASG
113 Prefix: 'w83l771'
114 Addresses scanned: I2C 0x4c
115 Datasheet: Not publicly available, can be requested from Nuvoton
116
117
118 Author: Jean Delvare <khali@linux-fr.org>
119
120
121 Description
122 -----------
123
124 The LM90 is a digital temperature sensor. It senses its own temperature as
125 well as the temperature of up to one external diode. It is compatible
126 with many other devices, many of which are supported by this driver.
127
128 Note that there is no easy way to differentiate between the MAX6657,
129 MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only
130 supported by this driver if the chip is located at address 0x4d or 0x4e,
131 or if the chip type is explicitly selected as max6659.
132 The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously
133 can't (and don't need to) be distinguished.
134
135 The specificity of this family of chipsets over the ADM1021/LM84
136 family is that it features critical limits with hysteresis, and an
137 increased resolution of the remote temperature measurement.
138
139 The different chipsets of the family are not strictly identical, although
140 very similar. For reference, here comes a non-exhaustive list of specific
141 features:
142
143 LM90:
144 * Filter and alert configuration register at 0xBF.
145 * ALERT is triggered by temperatures over critical limits.
146
147 LM86 and LM89:
148 * Same as LM90
149 * Better external channel accuracy
150
151 LM99:
152 * Same as LM89
153 * External temperature shifted by 16 degrees down
154
155 ADM1032:
156 * Consecutive alert register at 0x22.
157 * Conversion averaging.
158 * Up to 64 conversions/s.
159 * ALERT is triggered by open remote sensor.
160 * SMBus PEC support for Write Byte and Receive Byte transactions.
161
162 ADT7461, ADT7461A, NCT1008:
163 * Extended temperature range (breaks compatibility)
164 * Lower resolution for remote temperature
165
166 MAX6657 and MAX6658:
167 * Better local resolution
168 * Remote sensor type selection
169
170 MAX6659:
171 * Better local resolution
172 * Selectable address
173 * Second critical temperature limit
174 * Remote sensor type selection
175
176 MAX6680 and MAX6681:
177 * Selectable address
178 * Remote sensor type selection
179
180 MAX6695 and MAX6696:
181 * Better local resolution
182 * Selectable address (max6696)
183 * Second critical temperature limit
184 * Two remote sensors
185
186 W83L771W/G
187 * The G variant is lead-free, otherwise similar to the W.
188 * Filter and alert configuration register at 0xBF
189 * Moving average (depending on conversion rate)
190
191 W83L771AWG/ASG
192 * Successor of the W83L771W/G, same features.
193 * The AWG and ASG variants only differ in package format.
194 * Diode ideality factor configuration (remote sensor) at 0xE3
195
196 All temperature values are given in degrees Celsius. Resolution
197 is 1.0 degree for the local temperature, 0.125 degree for the remote
198 temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
199 resolution of 0.125 degree for both temperatures.
200
201 Each sensor has its own high and low limits, plus a critical limit.
202 Additionally, there is a relative hysteresis value common to both critical
203 values. To make life easier to user-space applications, two absolute values
204 are exported, one for each channel, but these values are of course linked.
205 Only the local hysteresis can be set from user-space, and the same delta
206 applies to the remote hysteresis.
207
208 The lm90 driver will not update its values more frequently than every
209 other second; reading them more often will do no harm, but will return
210 'old' values.
211
212 SMBus Alert Support
213 -------------------
214
215 This driver has basic support for SMBus alert. When an alert is received,
216 the status register is read and the faulty temperature channel is logged.
217
218 The Analog Devices chips (ADM1032, ADT7461 and ADT7461A) and ON
219 Semiconductor chips (NCT1008) do not implement the SMBus alert protocol
220 properly so additional care is needed: the ALERT output is disabled when
221 an alert is received, and is re-enabled only when the alarm is gone.
222 Otherwise the chip would block alerts from other chips in the bus as long
223 as the alarm is active.
224
225 PEC Support
226 -----------
227
228 The ADM1032 is the only chip of the family which supports PEC. It does
229 not support PEC on all transactions though, so some care must be taken.
230
231 When reading a register value, the PEC byte is computed and sent by the
232 ADM1032 chip. However, in the case of a combined transaction (SMBus Read
233 Byte), the ADM1032 computes the CRC value over only the second half of
234 the message rather than its entirety, because it thinks the first half
235 of the message belongs to a different transaction. As a result, the CRC
236 value differs from what the SMBus master expects, and all reads fail.
237
238 For this reason, the lm90 driver will enable PEC for the ADM1032 only if
239 the bus supports the SMBus Send Byte and Receive Byte transaction types.
240 These transactions will be used to read register values, instead of
241 SMBus Read Byte, and PEC will work properly.
242
243 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
244 Instead, it will try to write the PEC value to the register (because the
245 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
246 without PEC), which is not what we want. Thus, PEC is explicitly disabled
247 on SMBus Send Byte transactions in the lm90 driver.
248
249 PEC on byte data transactions represents a significant increase in bandwidth
250 usage (+33% for writes, +25% for reads) in normal conditions. With the need
251 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
252 two transactions will typically mean twice as much delay waiting for
253 transaction completion, effectively doubling the register cache refresh time.
254 I guess reliability comes at a price, but it's quite expensive this time.
255
256 So, as not everyone might enjoy the slowdown, PEC can be disabled through
257 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
258 to that file to enable PEC again.