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kernel/dts: samsung moto charger feature
[GitHub/moto-9609/android_kernel_motorola_exynos9610.git] / \
1 /*
2 * SAMSUNG EXYNOS9610 board device tree source
3 *
4 * Copyright (c) 2017 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 /dts-v1/;
13 /plugin/;
14
15 #include "exynos9610_battery_data.dtsi"
16 #include <dt-bindings/clock/exynos9610.h>
17 #include "modem-ss360ap-sit-pdata.dtsi"
18 #include "exynos9610-display-lcd.dtsi"
19 #include "novatek-nt36xxx-i2c.dtsi"
20 #include "wing-sensor.dtsi"
21
22 / {
23 compatible = "samsung,exynos9610", "samsung,WING";
24 board_id = <0x0>;
25 board_rev = <0x0>;
26
27 fragment@model {
28 target-path = "/";
29 __overlay__ {
30 #address-cells = <2>;
31 #size-cells = <1>;
32 model = "Samsung Wing board based on EXYNOS9610";
33
34 ect {
35 parameter_address = <0x90000000>;
36 parameter_size = <0x19000>;
37 };
38
39 chosen {
40 bootargs = "console=ttySAC0,115200 skip_initramfs rootwait ro init=/init clk_ignore_unused bcm_setup=0xffffff80f8e00000 androidboot.hardware=exynos9610 androidboot.selinux=permissive androidboot.debug_level=0x4948 firmware_class.path=/vendor/firmware ecd_setup=disable reserve-fimc=0xffffff80fa000000 pmic_info=0x3 ccic_info=0x1 epx_activate=true ";
41 linux,initrd-start = <0x84000000>;
42 linux,initrd-end = <0x841FFFFF>;
43 };
44
45 fixed-rate-clocks {
46 oscclk {
47 compatible = "samsung,exynos9610-oscclk";
48 clock-frequency = <26000000>;
49 };
50 };
51
52 firmware {
53 android {
54 compatible = "android,firmware";
55 vbmeta {
56 compatible = "android,vbmeta";
57 parts = "vbmeta,boot,system,vendor";
58 };
59 fstab {
60 compatible = "android,fstab";
61 vendor {
62 compatible = "android,vendor";
63 dev = "/dev/block/platform/13520000.ufs/by-name/vendor";
64 type = "ext4";
65 mnt_flags = "ro";
66 fsmgr_flags = "wait,slotselect";
67 };
68 };
69 };
70 };
71
72 ifconn {
73 status = "okay";
74 compatible = "samsung,ifconn";
75 ifconn,usbpd = "s2mm005";
76 ifconn,muic = "s2mu106-muic";
77 };
78
79 /*Fingerprint start*/
80 et320: et320{
81 compatible = "egistec,et320";
82 status = "ok";
83 reg = <0>;
84 clocks = <&clock GATE_SPI_1_QCH>, <&clock SPI1>;
85 clock-names = "spi", "spi_busclk0";
86 pinctrl-names = "default";
87 pinctrl-0 = <&spi7_bus &spi7_cs_func>;
88 egistec,gpio_irq = <&gpa0 5 0>;
89 egistec,gpio_rst = <&gpa1 1 0>;
90 };
91 /*Fingerprint end*/
92
93 speedy@11a10000 {
94 status = "okay";
95 #address-cells = <1>;
96 #size-cells = <0>;
97 s2mpu09mfd@00 {
98 compatible = "samsung,s2mpu09mfd";
99 acpm-ipc-channel = <2>;
100 i2c-speedy-address;
101 s2mpu09,wakeup = "enabled";
102 s2mpu09,irq-gpio = <&gpa2 0 0>;
103 reg = <0x00>;
104 interrupts = <2 0 0>;
105 interrupt-parent = <&gpa2>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pmic_irq &pm_wrsti>;
108 /* RTC: wtsr/smpl */
109 wtsr_en = "enabled"; /* enable */
110 smpl_en = "enabled"; /* enable */
111 wtsr_timer_val = <3>; /* 1000ms */
112 smpl_timer_val = <4>; /* 500ms */
113 check_jigon = <0>; /* do not check jigon */
114 /* RTC: If it's first boot, reset rtc to 1/1/2017 12:00:00(Sun) */
115 init_time,sec = <0>;
116 init_time,min = <0>;
117 init_time,hour = <12>;
118 init_time,mday = <1>;
119 init_time,mon = <0>;
120 init_time,year = <117>;
121 init_time,wday = <0>;
122
123 regulators {
124 b1_reg: BUCK1 {
125 regulator-name = "vdd_mif";
126 regulator-min-microvolt = <500000>;
127 regulator-max-microvolt = <1100000>;
128 regulator-always-on;
129 regulator-ramp-delay = <12000>;
130 regulator-initial-mode = <2>;
131 };
132
133 b2_reg: BUCK2 {
134 regulator-name = "vdd_cpucl1";
135 regulator-min-microvolt = <500000>;
136 regulator-max-microvolt = <1300000>;
137 regulator-always-on;
138 regulator-ramp-delay = <12000>;
139 regulator-initial-mode = <1>;
140 };
141
142 b3_reg: BUCK3 {
143 regulator-name = "vdd_cpucl0";
144 regulator-min-microvolt = <500000>;
145 regulator-max-microvolt = <1300000>;
146 regulator-always-on;
147 regulator-ramp-delay = <12000>;
148 regulator-initial-mode = <1>;
149 };
150
151 b4_reg: BUCK4{
152 regulator-name = "vdd_int";
153 regulator-min-microvolt = <500000>;
154 regulator-max-microvolt = <1100000>;
155 regulator-always-on;
156 regulator-ramp-delay = <12000>;
157 regulator-initial-mode = <2>;
158 };
159
160 b5_reg: BUCK5 {
161 regulator-name = "vdd_g3d";
162 regulator-min-microvolt = <500000>;
163 regulator-max-microvolt = <1200000>;
164 regulator-always-on;
165 regulator-ramp-delay = <12000>;
166 regulator-initial-mode = <2>;
167 };
168
169 b6_reg: BUCK6 {
170 regulator-name = "vdd_cam_vipx";
171 regulator-min-microvolt = <500000>;
172 regulator-max-microvolt = <1300000>;
173 regulator-always-on;
174 regulator-ramp-delay = <12000>;
175 regulator-initial-mode = <2>;
176 };
177
178 b7_reg: BUCK7 {
179 regulator-name = "vdd2_mem";
180 regulator-min-microvolt = <500000>;
181 regulator-max-microvolt = <1300000>;
182 regulator-always-on;
183 regulator-ramp-delay = <12000>;
184 regulator-initial-mode = <3>;
185 };
186
187 b8_reg: BUCK8 {
188 regulator-name = "vdd_lldo";
189 regulator-min-microvolt = <1200000>;
190 regulator-max-microvolt = <1500000>;
191 regulator-always-on;
192 regulator-ramp-delay = <12000>;
193 regulator-initial-mode = <3>;
194 };
195
196 b9_reg: BUCK9 {
197 regulator-name = "vdd_mldo";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <2100000>;
200 regulator-always-on;
201 regulator-ramp-delay = <12000>;
202 regulator-initial-mode = <3>;
203 };
204
205 l1_reg: LDO1 {
206 regulator-name = "vdd_ldo1";
207 regulator-min-microvolt = <700000>;
208 regulator-max-microvolt = <1300000>;
209 regulator-always-on;
210 regulator-ramp-delay = <12000>;
211 regulator-initial-mode = <3>;
212 };
213
214 l2_reg: LDO2 {
215 regulator-name = "vqmmc";
216 regulator-min-microvolt = <1800000>;
217 regulator-max-microvolt = <3375000>;
218 regulator-ramp-delay = <12000>;
219 };
220
221 l3_reg: LDO3 {
222 regulator-name = "vdd_ldo3";
223 regulator-min-microvolt = <800000>;
224 regulator-max-microvolt = <1950000>;
225 regulator-always-on;
226 regulator-ramp-delay = <12000>;
227 regulator-initial-mode = <3>;
228 };
229
230 l4_reg: LDO4 {
231 regulator-name = "vdd_ldo4";
232 regulator-min-microvolt = <500000>;
233 regulator-max-microvolt = <1100000>;
234 regulator-always-on;
235 regulator-ramp-delay = <12000>;
236 regulator-initial-mode = <1>;
237 };
238
239 l5_reg: LDO5 {
240 regulator-name = "vdd_ldo5";
241 regulator-min-microvolt = <800000>;
242 regulator-max-microvolt = <1300000>;
243 regulator-always-on;
244 regulator-ramp-delay = <12000>;
245 regulator-initial-mode = <1>;
246 };
247
248 l6_reg: LDO6 {
249 regulator-name = "vdd_ldo6";
250 regulator-min-microvolt = <800000>;
251 regulator-max-microvolt = <1300000>;
252 regulator-always-on;
253 regulator-ramp-delay = <12000>;
254 regulator-initial-mode = <1>;
255 };
256
257 l7_reg: LDO7 {
258 regulator-name = "vdd_ldo7";
259 regulator-min-microvolt = <800000>;
260 regulator-max-microvolt = <1950000>;
261 regulator-always-on;
262 regulator-ramp-delay = <12000>;
263 regulator-initial-mode = <1>;
264 };
265
266 l8_reg: LDO8 {
267 regulator-name = "vdd_ldo8";
268 regulator-min-microvolt = <500000>;
269 regulator-max-microvolt = <1300000>;
270 regulator-always-on;
271 regulator-ramp-delay = <12000>;
272 regulator-initial-mode = <1>;
273 };
274
275 l9_reg: LDO9 {
276 regulator-name = "vdd_ldo9";
277 regulator-min-microvolt = <500000>;
278 regulator-max-microvolt = <1300000>;
279 regulator-always-on;
280 regulator-ramp-delay = <12000>;
281 regulator-initial-mode = <1>;
282 };
283
284 l10_reg: LDO10 {
285 regulator-name = "vdd_ldo10";
286 regulator-min-microvolt = <500000>;
287 regulator-max-microvolt = <1300000>;
288 regulator-always-on;
289 regulator-ramp-delay = <12000>;
290 regulator-initial-mode = <1>;
291 };
292
293 l11_reg: LDO11 {
294 regulator-name = "vdd_ldo11";
295 regulator-min-microvolt = <500000>;
296 regulator-max-microvolt = <1300000>;
297 regulator-always-on;
298 regulator-ramp-delay = <12000>;
299 regulator-initial-mode = <1>;
300 };
301
302 l12_reg: LDO12 {
303 regulator-name = "vdd_ldo12";
304 regulator-min-microvolt = <800000>;
305 regulator-max-microvolt = <1300000>;
306 regulator-always-on;
307 regulator-ramp-delay = <12000>;
308 regulator-initial-mode = <1>;
309 };
310
311 l13_reg: LDO13 {
312 regulator-name = "vdd_ldo13";
313 regulator-min-microvolt = <800000>;
314 regulator-max-microvolt = <1950000>;
315 regulator-always-on;
316 regulator-ramp-delay = <12000>;
317 regulator-initial-mode = <1>;
318 };
319
320 l14_reg: LDO14 {
321 regulator-name = "vdd_ldo14";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <3375000>;
324 regulator-always-on;
325 regulator-ramp-delay = <12000>;
326 regulator-initial-mode = <1>;
327 };
328
329 l33_reg: LDO33 {
330 regulator-name = "vdd_ldo33";
331 regulator-min-microvolt = <800000>;
332 regulator-max-microvolt = <1950000>;
333 regulator-ramp-delay = <12000>;
334 };
335
336 l34_reg: LDO34 {
337 regulator-name = "vdd_ldo34";
338 regulator-min-microvolt = <1800000>;
339 regulator-max-microvolt = <3375000>;
340 regulator-ramp-delay = <12000>;
341 };
342
343 l35_reg: LDO35 {
344 regulator-name = "vmmc";
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <3375000>;
347 regulator-ramp-delay = <12000>;
348 };
349
350 l36_reg: LDO36 {
351 regulator-name = "vdd_ldo36";
352 regulator-min-microvolt = <500000>;
353 regulator-max-microvolt = <1300000>;
354 regulator-always-on;
355 regulator-ramp-delay = <12000>;
356 regulator-initial-mode = <1>;
357 };
358
359 l37_reg: LDO37 {
360 regulator-name = "vdd_ldo37";
361 regulator-min-microvolt = <3300000>;
362 regulator-max-microvolt = <3300000>;
363 regulator-ramp-delay = <12000>;
364 regulator-always-on;
365 };
366
367 l38_reg: LDO38 {
368 regulator-name = "vdd_ldo38";
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <3375000>;
371 regulator-ramp-delay = <12000>;
372 regulator-always-on;
373 };
374
375 l39_reg: LDO39 {
376 regulator-name = "vdd_ldo39";
377 regulator-min-microvolt = <800000>;
378 regulator-max-microvolt = <1950000>;
379 regulator-ramp-delay = <12000>;
380 regulator-always-on;
381 };
382
383 l40_reg: LDO40 {
384 regulator-name = "vdd_ldo40";
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <3375000>;
387 regulator-ramp-delay = <12000>;
388 regulator-initial-mode = <3>;
389 regulator-always-on;
390 };
391
392 l41_reg: LDO41 {
393 regulator-name = "vdd_ldo41";
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <3375000>;
396 regulator-ramp-delay = <12000>;
397 };
398
399 l42_reg: LDO42 {
400 regulator-name = "vdd_ldo42";
401 regulator-min-microvolt = <800000>;
402 regulator-max-microvolt = <1950000>;
403 regulator-ramp-delay = <12000>;
404 regulator-always-on;
405 };
406
407 l43_reg: LDO43 {
408 regulator-name = "vdd_ldo43";
409 regulator-min-microvolt = <500000>;
410 regulator-max-microvolt = <1300000>;
411 regulator-always-on;
412 regulator-ramp-delay = <12000>;
413 regulator-initial-mode = <1>;
414 };
415
416 l44_reg: LDO44 {
417 regulator-name = "vdd_ldo44";
418 regulator-min-microvolt = <800000>;
419 regulator-max-microvolt = <1300000>;
420 regulator-ramp-delay = <12000>;
421 regulator-always-on;
422 };
423 };
424 };
425 };
426
427
428 exynos_rgt {
429 compatible = "samsung,exynos-rgt";
430 };
431
432 mailbox_cp: mcu_ipc@11920000 {
433 compatible = "samsung,exynos-shd-ipc-mailbox";
434 reg = <0x0 0x11920000 0x180>;
435 mcu,name = "mcu_ipc_cp";
436 mcu,id = <0>;
437 interrupts = <0 40 0 >;
438 };
439
440 mailbox_gnss: mcu_ipc@11A00000 {
441 compatible = "samsung,exynos-shd-ipc-mailbox";
442 reg = <0x0 0x11A00000 0x180>;
443 mcu,name = "mcu_ipc_gnss";
444 mcu,id = <1>;
445 interrupts = <0 43 0>; /* INTREQ__MAILBOX_GNSS2AP */
446 };
447
448 gnss_pdata {
449 status = "okay";
450
451 compatible = "samsung,gnss_shdmem_if";
452 shmem,name = "KEPLER";
453 shmem,device_node_name = "gnss_ipc";
454
455 /* INTREQ__ALIVE_GNSS_ACTIVE, INTREQ__GNSS2AP_WDOG_RESET, INTREQ__GNSS2AP_WAKEUP, INTREQ__GNSS2AP */
456 interrupts = <0 27 0>, <0 81 0>, <0 80 0>, <0 79 0>;
457 interrupt-names = "ACTIVE", "WATCHDOG", "WAKEUP", "REQ_INIT";
458
459 memory-region = <&gnss_reserved>;
460 mbox_info = <&mailbox_gnss>;
461
462 mbx,int_ap2gnss_bcmd = <0>;
463 mbx,int_ap2gnss_req_fault_info = <1>;
464 mbx,int_ap2gnss_ipc_msg = <2>;
465 mbx,int_ap2gnss_ack_wake_set = <3>;
466 mbx,int_ap2gnss_ack_wake_clr = <4>;
467
468 mbx,irq_gnss2ap_bcmd = <0>;
469 mbx,irq_gnss2ap_rsp_fault_info = <1>;
470 mbx,irq_gnss2ap_ipc_msg = <2>;
471 mbx,irq_gnss2ap_req_wake_clr = <4>;
472
473 mbx,reg_bcmd_ctrl = <0>, <1>, <2>, <3>;
474
475 reg_rx_ipc_msg = <1 5>;
476 reg_tx_ipc_msg = <1 4>;
477 reg_rx_head = <1 3>;
478 reg_rx_tail = <1 2>;
479 reg_tx_head = <1 1>;
480 reg_tx_tail = <1 0>;
481 fault_info = <1 0x200000 0x180000>;
482
483 shmem,ipc_offset = <0x380000>;
484 shmem,ipc_size = <0x80000>;
485 shmem,ipc_reg_cnt = <32>;
486 };
487
488 gpio_keys {
489 status = "okay";
490 compatible = "gpio-keys";
491 #address-cells = <1>;
492 #size-cells = <0>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&key_voldown &key_volup &key_power>;
495 button@1 {
496 label = "gpio-keys: KEY_VOLUMEDOWN";
497 linux,code = <114>;
498 gpios = <&gpa1 6 0xf>;
499 };
500 button@2 {
501 label = "gpio-keys: KEY_VOLUMEUP";
502 linux,code = <115>;
503 gpios = <&gpa1 5 0xf>;
504 };
505 button@3 {
506 label = "gpio-keys: KEY_POWER";
507 linux,code = <116>;
508 gpios = <&gpa1 7 0xf>;
509 gpio-key,wakeup = <1>;
510 };
511 };
512
513 dwmmc2@13550000 {
514 status = "okay";
515 num-slots = <1>;
516 supports-4bit;
517 supports-cmd23;
518 supports-erase;
519 supports-highspeed;
520 sd-uhs-sdr50;
521 sd-uhs-sdr104;
522 card-detect-invert;
523 card-detect-gpio;
524 bypass-for-allpass;
525 card-init-hwacg-ctrl;
526 skip-init-mmc-scan;
527 qos-dvfs-level = <100000>;
528 fifo-depth = <0x40>;
529 desc-size = <4>;
530 card-detect-delay = <200>;
531 data-timeout = <200>;
532 hto-timeout = <80>;
533 samsung,dw-mshc-ciu-div = <3>;
534 clock-frequency = <800000000>;
535 samsung,dw-mshc-sdr-timing = <3 0 2 0>;
536 samsung,dw-mshc-ddr-timing = <3 0 2 1>;
537 samsung,dw-mshc-sdr50-timing = <3 0 4 2>;
538 samsung,dw-mshc-sdr104-timing = <3 0 3 0>;
539
540 num-ref-clks = <9>;
541 ciu_clkin = <25 50 50 25 50 100 200 50 50>;
542
543 /* Swapping clock drive strength */
544 clk-drive-number = <4>;
545 pinctrl-names = "default",
546 "fast-slew-rate-1x",
547 "fast-slew-rate-2x",
548 "fast-slew-rate-3x",
549 "fast-slew-rate-4x";
550 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &dwmmc2_cd_ext_irq>;
551 pinctrl-1 = <&sd2_clk_fast_slew_rate_1x>;
552 pinctrl-2 = <&sd2_clk_fast_slew_rate_2x>;
553 pinctrl-3 = <&sd2_clk_fast_slew_rate_3x>;
554 pinctrl-4 = <&sd2_clk_fast_slew_rate_4x>;
555
556 card-detect = <&gpa0 7 0xf>;
557 #address-cells = <1>;
558 #size-cells = <0>;
559 slot@0 {
560 reg = <0>;
561 bus-width = <4>;
562 disable-wp;
563 };
564 };
565
566 usb_notifier {
567 compatible = "samsung,usb-notifier";
568 udc = <&udc>;
569 };
570
571 usb_hs_tune:usb_hs_tune {
572 hs_tune_cnt = <12>;
573
574 /* value = <device host> */
575 hs_tune1 {
576 tune_name = "tx_vref";
577 tune_value = <0xf 0xf>;
578 };
579
580 hs_tune2 {
581 tune_name = "tx_pre_emp";
582 tune_value = <0x3 0x3>;
583 };
584
585 hs_tune3 {
586 tune_name = "tx_pre_emp_plus";
587 tune_value = <0x0 0x0>;
588 };
589
590 hs_tune4 {
591 tune_name = "tx_res";
592 tune_value = <0x3 0x3>;
593 };
594
595 hs_tune5 {
596 tune_name = "tx_rise";
597 tune_value = <0x3 0x3>;
598 };
599
600 hs_tune6 {
601 tune_name = "tx_hsxv";
602 tune_value = <0x3 0x3>;
603 };
604
605 hs_tune7 {
606 tune_name = "tx_fsls";
607 tune_value = <0x3 0x3>;
608 };
609
610 hs_tune8 {
611 tune_name = "rx_sqrx";
612 tune_value = <0x7 0x7>;
613 };
614
615 hs_tune9 {
616 tune_name = "compdis";
617 tune_value = <0x7 0x7>;
618 };
619
620 hs_tune10 {
621 tune_name = "otg";
622 tune_value = <0x2 0x2>;
623 };
624
625 hs_tune11 {
626 /* true : 1, false: 0 */
627 /* <enable_user_imp user_imp_value> */
628 tune_name = "enable_user_imp";
629 tune_value = <0x0 0x0>;
630 };
631
632 hs_tune12 {
633 /* PHY clk : 1 , FREE clk : 0 */
634 tune_name = "is_phyclock";
635 tune_value = <0x1 0x1>;
636 };
637 };
638
639 usb3_ss_tune:ss_tune {
640 ss_tune_cnt = <15>;
641
642 /* value = <device host> */
643 ss_tune1 {
644 tune_name = "tx0_term_offset";
645 tune_value = <0x0 0x0>;
646 };
647
648 ss_tune2 {
649 tune_name = "pcs_tx_swing_full";
650 tune_value = <0x7f 0x7f>;
651 };
652
653 ss_tune3 {
654 tune_name = "pcs_tx_deemph_6db";
655 tune_value = <0x1c 0x1c>;
656 };
657
658 ss_tune4 {
659 tune_name = "pcs_tx_deemph_3p5db";
660 tune_value = <0x1c 0x1c>;
661 };
662
663 ss_tune5 {
664 tune_name = "tx_vboost_lvl_sstx";
665 tune_value = <0x7 0x7>;
666 };
667
668 ss_tune6 {
669 tune_name = "tx_vboost_lvl";
670 tune_value = <0x4 0x4>;
671 };
672
673 ss_tune7 {
674 tune_name = "los_level";
675 tune_value = <0x9 0x9>;
676 };
677
678 ss_tune8 {
679 tune_name = "los_bias";
680 tune_value = <0x5 0x5>;
681 };
682
683 ss_tune9 {
684 tune_name = "pcs_rx_los_mask_val";
685 tune_value = <0x104 0x104>;
686 };
687
688 ss_tune10 {
689 tune_name = "tx_eye_height_cntl_en";
690 tune_value = <0x1 0x1>;
691 };
692
693 ss_tune11 {
694 tune_name = "pipe_tx_deemph_update_delay";
695 tune_value = <0x2 0x2>;
696 };
697
698 ss_tune12 {
699 tune_name = "pcs_tx_swing_full_sstx";
700 tune_value = <0x7f 0x7f>;
701 };
702 ss_tune13 {
703 tune_name = "rx_eq_fix_val";
704 tune_value = <0x2 0x2>;
705 };
706
707 ss_tune14 {
708 tune_name = "rx_decode_mode";
709 tune_value = <0x1 0x1>;
710 };
711
712 ss_tune15 {
713 tune_name = "decrese_ss_tx_imp";
714 tune_value = <0x1 0x1>;
715 };
716 };
717
718 usb3_hs_tune:usb3_hs_tune {
719 hs_tune_cnt = <10>;
720
721 /* value = <device host> */
722 hs_tune1 {
723 tune_name = "tx_pre_emp";
724 tune_value = <0x3 0x3>;
725 };
726
727 hs_tune2 {
728 tune_name = "tx_pre_emp_plus";
729 tune_value = <0x0 0x0>;
730 };
731
732 hs_tune3 {
733 tune_name = "tx_vref";
734 tune_value = <0x7 0x7>;
735 };
736
737 hs_tune4 {
738 tune_name = "rx_sqrx";
739 tune_value = <0x7 0x7>;
740 };
741
742 hs_tune5 {
743 tune_name = "tx_rise";
744 tune_value = <0x3 0x3>;
745 };
746
747 hs_tune6 {
748 tune_name = "compdis";
749 tune_value = <0x7 0x7>;
750 };
751
752 hs_tune7 {
753 tune_name = "tx_hsxv";
754 tune_value = <0x3 0x3>;
755 };
756
757 hs_tune8 {
758 tune_name = "tx_fsls";
759 tune_value = <0x3 0x3>;
760 };
761
762 hs_tune9 {
763 tune_name = "tx_res";
764 tune_value = <0x3 0x3>;
765 };
766
767 hs_tune10 {
768 tune_name = "utim_clk";
769 tune_value = <0x1 0x1>;
770 };
771 };
772
773 /* Secure RPMB */
774 ufs-srpmb {
775 compatible = "samsung,ufs-srpmb";
776 interrupts = <0 460 0>;
777 };
778
779 V_SYS: fixedregulator@0 {
780 compatible = "regulator-fixed";
781 regulator-name = "V_SYS";
782 regulator-min-microvolt = <4200000>;
783 regulator-max-microvolt = <4200000>;
784 regulator-boot-on;
785 regulator-always-on;
786 };
787
788
789 dummy_audio_codec: audio_codec_dummy {
790 status = "okay";
791 compatible = "snd-soc-dummy";
792 };
793
794 dummy_audio_cpu: audio_cpu_dummy {
795 compatible = "samsung,dummy-cpu";
796 status = "okay";
797 };
798
799 sound {
800 status = "okay";
801 compatible = "samsung,exynos9610-madera";
802
803 clock-names = "xclkout";
804 clocks = <&clock OSC_AUD>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&xclkout0>;
807
808 cirrus,sysclk = <1 4 98304000>;
809 cirrus,dspclk = <8 4 147456000>;
810 cirrus,fll1-refclk = <1 0 26000000 98304000>;
811
812 cirrus,opclk = <3 0 12288000>;
813
814 samsung,routing =
815 "HEADSETMIC", "MICBIAS1B",
816 "IN1BR", "HEADSETMIC",
817 "DMIC1", "MICBIAS2A",
818 "IN1AL", "DMIC1",
819 "DMIC2", "MICBIAS2A",
820 "IN2L", "DMIC2",
821 "DMIC3", "MICBIAS2B",
822 "IN2R", "DMIC3",
823 "RECEIVER", "EPOUTN",
824 "RECEIVER", "EPOUTP",
825 "HEADPHONE", "HPOUTL",
826 "HEADPHONE", "HPOUTR",
827 "AIF2 Playback", "OPCLK",
828 "AIF2 Capture", "OPCLK",
829 "VOUTPUT", "ABOX UAIF0 Playback",
830 "SPEAKER", "Left SPK",
831 "VOUTPUTCALL", "ABOX SIFS0 Playback",
832 "ABOX SIFS0 Capture", "VINPUTCALL";
833
834 samsung,codec = <&abox &abox_uaif_0 &abox_uaif_1 &abox_uaif_2
835 &abox_uaif_4 &abox_dsif &abox_spdy>; /*&cs35l41_left*/
836 samsung,prefix = "ABOX", "ABOX", "ABOX", "ABOX",
837 "ABOX", "ABOX", "ABOX", "Left";
838 samsung,aux = <&abox_effect &abox_bt>;
839
840 rdma@0 {
841 cpu {
842 sound-dai = <&abox 0>;
843 };
844 platform {
845 sound-dai = <&abox_rdma_0>;
846 };
847 codec {
848 sound-dai = <&dummy_audio_codec>;
849 };
850 };
851 rdma@1 {
852 cpu {
853 sound-dai = <&abox 1>;
854 };
855 platform {
856 sound-dai = <&abox_rdma_1>;
857 };
858 codec {
859 sound-dai = <&dummy_audio_codec>;
860 };
861 };
862 rdma@2 {
863 cpu {
864 sound-dai = <&abox 2>;
865 };
866 platform {
867 sound-dai = <&abox_rdma_2>;
868 };
869 codec {
870 sound-dai = <&dummy_audio_codec>;
871 };
872 };
873 rdma@3 {
874 cpu {
875 sound-dai = <&abox 3>;
876 };
877 platform {
878 sound-dai = <&abox_rdma_3>;
879 };
880 codec {
881 sound-dai = <&dummy_audio_codec>;
882 };
883 };
884 rdma@4 {
885 cpu {
886 sound-dai = <&abox 4>;
887 };
888 platform {
889 sound-dai = <&abox_rdma_4>;
890 };
891 codec {
892 sound-dai = <&dummy_audio_codec>;
893 };
894 };
895 rdma@5 {
896 cpu {
897 sound-dai = <&abox 5>;
898 };
899 platform {
900 sound-dai = <&abox_rdma_5>;
901 };
902 codec {
903 sound-dai = <&dummy_audio_codec>;
904 };
905 };
906 rdma@6 {
907 cpu {
908 sound-dai = <&abox 6>;
909 };
910 platform {
911 sound-dai = <&abox_rdma_6>;
912 };
913 codec {
914 sound-dai = <&dummy_audio_codec>;
915 };
916 };
917 rdma@7 {
918 cpu {
919 sound-dai = <&abox 7>;
920 };
921 platform {
922 sound-dai = <&abox_rdma_7>;
923 };
924 codec {
925 sound-dai = <&dummy_audio_codec>;
926 };
927 };
928 wdma@0 {
929 cpu {
930 sound-dai = <&abox 8>;
931 };
932 platform {
933 sound-dai = <&abox_wdma_0>;
934 };
935 codec {
936 sound-dai = <&dummy_audio_codec>;
937 };
938 };
939 wdma@1 {
940 cpu {
941 sound-dai = <&abox 9>;
942 };
943 platform {
944 sound-dai = <&abox_wdma_1>;
945 };
946 codec {
947 sound-dai = <&dummy_audio_codec>;
948 };
949 };
950 wdma@2 {
951 cpu {
952 sound-dai = <&abox 10>;
953 };
954 platform {
955 sound-dai = <&abox_wdma_2>;
956 };
957 codec {
958 sound-dai = <&dummy_audio_codec>;
959 };
960 };
961 wdma@3 {
962 cpu {
963 sound-dai = <&abox 11>;
964 };
965 platform {
966 sound-dai = <&abox_wdma_3>;
967 };
968 codec {
969 sound-dai = <&dummy_audio_codec>;
970 };
971 };
972 wdma@4 {
973 cpu {
974 sound-dai = <&abox 12>;
975 };
976 platform {
977 sound-dai = <&abox_wdma_4>;
978 };
979 codec {
980 sound-dai = <&dummy_audio_codec>;
981 };
982 };
983 /** ToDo: enable dp_audio link after enabling DP Audio
984 * dp_audio@0 {
985 * cpu {
986 * sound-dai = <&dummy_audio_cpu>;
987 * };
988 * codec {
989 * sound-dai = <&dummy_audio_codec>;
990 * };
991 * };
992 */
993 uaif@0 {
994 format = "i2s";
995 cpu {
996 sound-dai = <&abox_uaif_0>;
997 };
998 codec {
999 sound-dai = <&cs47l35 0>;
1000 };
1001 };
1002 uaif@1 {
1003 format = "i2s";
1004 cpu {
1005 sound-dai = <&abox_uaif_1>;
1006 };
1007 codec {
1008 sound-dai = <&dummy_audio_codec>;
1009 };
1010 };
1011 uaif@2 {
1012 format = "i2s";
1013 cpu {
1014 sound-dai = <&abox_uaif_2>;
1015 };
1016 codec {
1017 sound-dai = <&cs47l35 2>;
1018 };
1019 };
1020 uaif@4 {
1021 format = "i2s";
1022 bitclock-master;
1023 frame-master;
1024 cpu {
1025 sound-dai = <&abox_uaif_4>;
1026 };
1027 codec {
1028 sound-dai = <&dummy_audio_codec>;
1029 };
1030 };
1031 dsif@0 {
1032 format = "pdm";
1033 cpu {
1034 sound-dai = <&abox_dsif>;
1035 };
1036 codec {
1037 sound-dai = <&dummy_audio_codec>;
1038 };
1039 };
1040 spdy@0 {
1041 cpu {
1042 sound-dai = <&abox_spdy>;
1043 };
1044 codec {
1045 sound-dai = <&dummy_audio_codec>;
1046 };
1047 };
1048 sifs0@0 {
1049 cpu {
1050 sound-dai = <&abox 13>;
1051 };
1052 codec {
1053 sound-dai = <&dummy_audio_codec>;
1054 };
1055 };
1056 sifs1@0 {
1057 cpu {
1058 sound-dai = <&abox 14>;
1059 };
1060 codec {
1061 sound-dai = <&dummy_audio_codec>;
1062 };
1063 };
1064 sifs2@0 {
1065 cpu {
1066 sound-dai = <&abox 15>;
1067 };
1068 codec {
1069 sound-dai = <&dummy_audio_codec>;
1070 };
1071 };
1072
1073 #if 0 /*ToDo: enable speaker amp on EVB board*/
1074 codec-left-amp@0 {
1075 format = "i2s";
1076
1077 cpu {
1078 sound-dai = <&cs47l35 1>;
1079 };
1080 codec {
1081 sound-dai = <&cs35l41_left 0>;
1082 };
1083 };
1084 #endif
1085 };
1086
1087
1088 #if 0
1089 fimc_is@144B0000 {
1090 vender {
1091 rear_sensor_id = <47>; /* 46: RPB, 20: 2P8, 47: 2P7SQ */
1092 front_sensor_id = <7>; /* 6B2 */
1093 rear_second_sensor_id = <48>; /* 48: 2T7SX */
1094 secure_sensor_id = <22>; /* 5E2 */
1095 };
1096
1097 fimc_is_dvfs {
1098 #define DVFS_INT_CAM_L0 690000
1099 #define DVFS_INT_CAM_L1 680000
1100 #define DVFS_INT_CAM_L2 670000
1101 #define DVFS_INT_CAM_L3 660000
1102 #define DVFS_INT_CAM_L4 650000
1103
1104 #define DVFS_INT_L0 667000
1105 #define DVFS_INT_L1 533000
1106 #define DVFS_INT_L2 400000
1107 #define DVFS_INT_L3 200000
1108 #define DVFS_INT_L4 100000
1109
1110 #define DVFS_CAM_L0 690000
1111 #define DVFS_CAM_L1 680000
1112 #define DVFS_CAM_L2 670000
1113 #define DVFS_CAM_L3 660000
1114 #define DVFS_CAM_L4 650000
1115 #define DVFS_CAM_L5 640000
1116
1117 #define DVFS_MIF_L0 2093000
1118 #define DVFS_MIF_L1 2002000
1119 #define DVFS_MIF_L2 1794000
1120 #define DVFS_MIF_L3 1539000
1121 #define DVFS_MIF_L4 1352000
1122 #define DVFS_MIF_L5 1014000
1123 #define DVFS_MIF_L6 845000
1124 #define DVFS_MIF_L7 676000
1125 #define DVFS_MIF_L8 546000
1126 #define DVFS_MIF_L9 419000
1127
1128 table0 {
1129 desc = "dvfs table v0.0 for 16M/2M";
1130
1131 default_int_cam = <DVFS_INT_CAM_L0>;
1132 default_cam = <DVFS_CAM_L0>;
1133 default_mif = <DVFS_MIF_L0>;
1134 default_int = <DVFS_INT_L0>;
1135 default_hpg = <1>;
1136
1137 front_preview_int_cam = <DVFS_INT_CAM_L0>;
1138 front_preview_cam = <DVFS_CAM_L0>;
1139 front_preview_mif = <DVFS_MIF_L0>;
1140 front_preview_int = <DVFS_INT_L0>;
1141 front_preview_hpg = <1>;
1142
1143 front_preview_full_int_cam = <DVFS_INT_CAM_L0>;
1144 front_preview_full_cam = <DVFS_CAM_L0>;
1145 front_preview_full_mif = <DVFS_MIF_L0>;
1146 front_preview_full_int = <DVFS_INT_L0>;
1147 front_preview_full_hpg = <1>;
1148
1149 front_capture_int_cam = <DVFS_INT_CAM_L0>;
1150 front_capture_cam = <DVFS_CAM_L0>;
1151 front_capture_mif = <DVFS_MIF_L0>;
1152 front_capture_int = <DVFS_INT_L0>;
1153 front_capture_hpg = <1>;
1154
1155 front_video_int_cam = <DVFS_INT_CAM_L0>;
1156 front_video_cam = <DVFS_CAM_L0>;
1157 front_video_mif = <DVFS_MIF_L0>;
1158 front_video_int = <DVFS_INT_L0>;
1159 front_video_hpg = <1>;
1160
1161 front_video_capture_int_cam = <DVFS_INT_CAM_L0>;
1162 front_video_capture_cam = <DVFS_CAM_L0>;
1163 front_video_capture_mif = <DVFS_MIF_L0>;
1164 front_video_capture_int = <DVFS_INT_L0>;
1165 front_video_capture_hpg = <1>;
1166
1167 front_wide_selfie_int_cam = <DVFS_INT_CAM_L0>;
1168 front_wide_selfie_cam = <DVFS_CAM_L0>;
1169 front_wide_selfie_mif = <DVFS_MIF_L0>;
1170 front_wide_selfie_int = <DVFS_INT_L0>;
1171 front_wide_selfie_hpg = <1>;
1172
1173 front_vt1_int_cam = <DVFS_INT_CAM_L0>;
1174 front_vt1_cam = <DVFS_CAM_L0>;
1175 front_vt1_mif = <DVFS_MIF_L0>;
1176 front_vt1_int = <DVFS_INT_L0>;
1177 front_vt1_hpg = <1>;
1178
1179 front_vt2_int_cam = <DVFS_INT_CAM_L0>;
1180 front_vt2_cam = <DVFS_CAM_L0>;
1181 front_vt2_mif = <DVFS_MIF_L0>;
1182 front_vt2_int = <DVFS_INT_L0>;
1183 front_vt2_hpg = <1>;
1184
1185 front_vt4_int_cam = <DVFS_INT_CAM_L0>;
1186 front_vt4_cam = <DVFS_CAM_L0>;
1187 front_vt4_mif = <DVFS_MIF_L0>;
1188 front_vt4_int = <DVFS_INT_L0>;
1189 front_vt4_hpg = <1>;
1190
1191 rear_preview_fhd_int_cam = <DVFS_INT_CAM_L0>;
1192 rear_preview_fhd_cam = <DVFS_CAM_L0>;
1193 rear_preview_fhd_mif = <DVFS_MIF_L0>;
1194 rear_preview_fhd_int = <DVFS_INT_L0>;
1195 rear_preview_fhd_hpg = <1>;
1196
1197 rear_preview_hd_int_cam = <DVFS_INT_CAM_L0>;
1198 rear_preview_hd_cam = <DVFS_CAM_L0>;
1199 rear_preview_hd_mif = <DVFS_MIF_L0>;
1200 rear_preview_hd_int = <DVFS_INT_L0>;
1201 rear_preview_hd_hpg = <1>;
1202
1203 rear_preview_uhd_int_cam = <DVFS_INT_CAM_L0>;
1204 rear_preview_uhd_cam = <DVFS_CAM_L0>;
1205 rear_preview_uhd_mif = <DVFS_MIF_L0>;
1206 rear_preview_uhd_int = <DVFS_INT_L0>;
1207 rear_preview_uhd_hpg = <1>;
1208
1209 rear_preview_full_int_cam = <DVFS_INT_CAM_L0>;
1210 rear_preview_full_cam = <DVFS_CAM_L0>;
1211 rear_preview_full_mif = <DVFS_MIF_L0>;
1212 rear_preview_full_int = <DVFS_INT_L0>;
1213 rear_preview_full_hpg = <1>;
1214
1215 rear_capture_int_cam = <DVFS_INT_CAM_L0>;
1216 rear_capture_cam = <DVFS_CAM_L0>;
1217 rear_capture_mif = <DVFS_MIF_L0>;
1218 rear_capture_int = <DVFS_INT_L0>;
1219 rear_capture_hpg = <1>;
1220
1221 rear_video_fhd_int_cam = <DVFS_INT_CAM_L0>;
1222 rear_video_fhd_cam = <DVFS_CAM_L0>;
1223 rear_video_fhd_mif = <DVFS_MIF_L0>;
1224 rear_video_fhd_int = <DVFS_INT_L0>;
1225 rear_video_fhd_hpg = <1>;
1226
1227 rear_video_hd_int_cam = <DVFS_INT_CAM_L0>;
1228 rear_video_hd_cam = <DVFS_CAM_L0>;
1229 rear_video_hd_mif = <DVFS_MIF_L0>;
1230 rear_video_hd_int = <DVFS_INT_L0>;
1231 rear_video_hd_hpg = <1>;
1232
1233 rear_video_uhd_int_cam = <DVFS_INT_CAM_L0>;
1234 rear_video_uhd_cam = <DVFS_CAM_L0>;
1235 rear_video_uhd_mif = <DVFS_MIF_L0>;
1236 rear_video_uhd_int = <DVFS_INT_L0>;
1237 rear_video_uhd_hpg = <1>;
1238
1239 rear_video_fhd_capture_int_cam = <DVFS_INT_CAM_L0>;
1240 rear_video_fhd_capture_cam = <DVFS_CAM_L0>;
1241 rear_video_fhd_capture_mif = <DVFS_MIF_L0>;
1242 rear_video_fhd_capture_int = <DVFS_INT_L0>;
1243 rear_video_fhd_capture_hpg = <1>;
1244
1245 rear_video_hd_capture_int_cam = <DVFS_INT_CAM_L0>;
1246 rear_video_hd_capture_cam = <DVFS_CAM_L0>;
1247 rear_video_hd_capture_mif = <DVFS_MIF_L0>;
1248 rear_video_hd_capture_int = <DVFS_INT_L0>;
1249 rear_video_hd_capture_hpg = <1>;
1250
1251 rear_video_uhd_capture_int_cam = <DVFS_INT_CAM_L0>;
1252 rear_video_uhd_capture_cam = <DVFS_CAM_L0>;
1253 rear_video_uhd_capture_mif = <DVFS_MIF_L0>;
1254 rear_video_uhd_capture_int = <DVFS_INT_L0>;
1255 rear_video_uhd_capture_hpg = <1>;
1256
1257 secure_front_int_cam = <DVFS_INT_CAM_L0>;
1258 secure_front_cam = <DVFS_CAM_L0>;
1259 secure_front_mif = <DVFS_MIF_L0>;
1260 secure_front_int = <DVFS_INT_L0>;
1261 secure_front_hpg = <1>;
1262
1263 pip_preview_int_cam = <DVFS_INT_CAM_L0>;
1264 pip_preview_cam = <DVFS_CAM_L0>;
1265 pip_preview_mif = <DVFS_MIF_L0>;
1266 pip_preview_int = <DVFS_INT_L0>;
1267 pip_preview_hpg = <1>;
1268
1269 pip_capture_int_cam = <DVFS_INT_CAM_L0>;
1270 pip_capture_cam = <DVFS_CAM_L0>;
1271 pip_capture_mif = <DVFS_MIF_L0>;
1272 pip_capture_int = <DVFS_INT_L0>;
1273 pip_capture_hpg = <1>;
1274
1275 pip_video_int_cam = <DVFS_INT_CAM_L0>;
1276 pip_video_cam = <DVFS_CAM_L0>;
1277 pip_video_mif = <DVFS_MIF_L0>;
1278 pip_video_int = <DVFS_INT_L0>;
1279 pip_video_hpg = <1>;
1280
1281 pip_video_capture_int_cam = <DVFS_INT_CAM_L0>;
1282 pip_video_capture_cam = <DVFS_CAM_L0>;
1283 pip_video_capture_mif = <DVFS_MIF_L0>;
1284 pip_video_capture_int = <DVFS_INT_L0>;
1285 pip_video_capture_hpg = <1>;
1286
1287 preview_high_speed_fps_int_cam = <DVFS_INT_CAM_L1>;
1288 preview_high_speed_fps_cam = <DVFS_CAM_L3>;
1289 preview_high_speed_fps_mif = <DVFS_MIF_L5>;
1290 preview_high_speed_fps_int = <DVFS_INT_L0>;
1291 preview_high_speed_fps_hpg = <1>;
1292
1293 video_high_speed_60fps_int_cam = <DVFS_INT_CAM_L0>;
1294 video_high_speed_60fps_cam = <DVFS_CAM_L0>;
1295 video_high_speed_60fps_mif = <DVFS_MIF_L0>;
1296 video_high_speed_60fps_int = <DVFS_INT_L0>;
1297 video_high_speed_60fps_hpg = <1>;
1298
1299 video_high_speed_480fps_int_cam = <DVFS_INT_CAM_L0>;
1300 video_high_speed_480fps_cam = <DVFS_CAM_L0>;
1301 video_high_speed_480fps_mif = <DVFS_MIF_L0>;
1302 video_high_speed_480fps_int = <DVFS_INT_L0>;
1303 video_high_speed_480fps_hpg = <1>;
1304
1305 video_high_speed_60fps_capture_int_cam = <DVFS_INT_CAM_L0>;
1306 video_high_speed_60fps_capture_cam = <DVFS_CAM_L0>;
1307 video_high_speed_60fps_capture_mif = <DVFS_MIF_L0>;
1308 video_high_speed_60fps_capture_int = <DVFS_INT_L0>;
1309 video_high_speed_60fps_capture_hpg = <1>;
1310
1311 ext_front_int_cam = <DVFS_INT_CAM_L0>;
1312 ext_front_cam = <DVFS_CAM_L0>;
1313 ext_front_mif = <DVFS_MIF_L0>;
1314 ext_front_int = <DVFS_INT_L0>;
1315 ext_front_hpg = <1>;
1316
1317 ext_secure_int_cam = <DVFS_INT_CAM_L3>;
1318 ext_secure_cam = <DVFS_CAM_L4>;
1319 ext_secure_mif = <DVFS_MIF_L7>;
1320 ext_secure_int = <DVFS_INT_L4>;
1321 ext_secure_hpg = <1>;
1322
1323 max_int_cam = <DVFS_INT_CAM_L0>;
1324 max_cam = <DVFS_CAM_L0>;
1325 max_mif = <DVFS_MIF_L0>;
1326 max_int = <DVFS_INT_L0>;
1327 max_hpg = <1>;
1328 };
1329 };
1330 };
1331
1332 fimc_is_flash_gpio: fimc-is-flash-gpio@0 {
1333 compatible = "samsung,sensor-flash-gpio";
1334 id = <0>;
1335 status = "okay";
1336
1337 torch-gpio = <&gpg3 1 0x1>;
1338 flash-gpio = <&gpg3 0 0x1>;
1339 };
1340
1341 fimc_is_sensor_2p7sq: fimc-is_sensor_2p7sq@47 {
1342 compatible = "samsung,sensor-module-2p7sq";
1343
1344 pinctrl-names = "pin0", "pin1", "pin2", "release";
1345 pinctrl-0 = <>;
1346 pinctrl-1 = <&fimc_is_mclk0_out>;
1347 pinctrl-2 = <&fimc_is_mclk0_fn>;
1348 pinctrl-3 = <>;
1349
1350 position = <0>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */
1351 id = <0>; /* fimc_is_sensor id */
1352 mclk_ch = <0>;
1353 sensor_i2c_ch = <0>; /* SENSOR_CONTROL_I2C0 */
1354
1355 gpio_mclk = <&gpc2 0 0x1>;
1356 gpio_reset = <&gpc1 0 0x1>; /* sensor reset */
1357
1358 power_seq_id = <1>; /* Rumba S6 Compatible */
1359
1360 status = "okay";
1361
1362 af {
1363 product_name = <20>; /* ACTUATOR_NAME_LC898217 */
1364 i2c_ch = <0>; /* SENSOR_CONTROL_I2C0 */
1365 };
1366
1367 flash {
1368 product_name = <11>; /* FLASH_GPIO */
1369 };
1370 };
1371
1372 fimc_is_sensor_2t7sx: fimc-is_sensor_2t7sx@48 {
1373 compatible = "samsung,sensor-module-2t7sx";
1374
1375 pinctrl-names = "pin0", "pin1", "pin2", "release";
1376 pinctrl-0 = <>;
1377 pinctrl-1 = <&fimc_is_mclk2_out>;
1378 pinctrl-2 = <&fimc_is_mclk2_fn>;
1379 pinctrl-3 = <>;
1380
1381 position = <2>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */
1382 id = <2>; /* fimc_is_sensor id */
1383 mclk_ch = <2>;
1384 sensor_i2c_ch = <1>; /* SENSOR_CONTROL_I2C1 */
1385
1386 gpio_mclk = <&gpc2 2 0x1>;
1387 gpio_reset = <&gpc0 6 0x1>; /* sensor reset */
1388
1389 power_seq_id = <1>; /* Rumba S6 Compatible */
1390
1391 status = "okay";
1392
1393 af {
1394 product_name = <20>; /* ACTUATOR_NAME_LC898217 */
1395 i2c_ch = <1>; /* SENSOR_CONTROL_I2C1 */
1396 };
1397
1398 flash {
1399 product_name = <11>; /* FLASH_GPIO */
1400 };
1401 };
1402
1403 /* FRONT CAMERA */
1404 fimc_is_sensor_6b2: fimc-is_sensor_6b2@7 {
1405 compatible = "samsung,sensor-module-6b2";
1406
1407 pinctrl-names = "pin0", "pin1", "pin2", "release";
1408 pinctrl-0 = <>;
1409 pinctrl-1 = <&fimc_is_mclk1_out>;
1410 pinctrl-2 = <&fimc_is_mclk1_fn>;
1411 pinctrl-3 = <>;
1412
1413 position = <1>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */
1414 id = <1>; /* fimc_is_sensor id */
1415 mclk_ch = <1>;
1416 sensor_i2c_ch = <2>; /* SENSOR_CONTROL_I2C4 */
1417
1418 gpio_mclk = <&gpc2 1 0x1>;
1419 gpio_reset = <&gpc1 2 0x1>; /* sensor reset */
1420 status = "okay";
1421
1422 af {
1423 product_name = <100>; /* NOTHING */
1424 i2c_ch = <2>; /* SENSOR_CONTROL_I2C2 */
1425 };
1426
1427 flash {
1428 product_name = <100>; /* NOTHING */
1429 };
1430
1431 ois {
1432 product_name = <100>; /* NOTHING */
1433 };
1434
1435 internal_vc {
1436 /* DUMMY */
1437 };
1438 };
1439
1440 /* I2C_CAM0 */ /* SENSOR_CONTROL_I2C0 */
1441 hsi2c_12: hsi2c@138A0000 {
1442 gpios = <&gpc0 0 0 &gpc0 1 0>;
1443 status = "okay";
1444 clock-frequency = <400000>;
1445 samsung,reset-before-trans;
1446 samsung,polling-mode;
1447
1448 fimc-is-2p7sq@2d {
1449 compatible = "samsung,exynos5-fimc-is-cis-2p7sq";
1450 reg = <0x2d>; /* 1 bit right shift */
1451 id = <0>; /* matching fimc_is_sensor id */
1452 setfile = "setA";
1453 };
1454
1455 fimc-is-actuator@72 {
1456 compatible = "samsung,exynos5-fimc-is-actuator-lc898217";
1457 reg = <0x72>; /* 1 bit right shift */
1458 id = <0>; /* matching fimc_is_sensor id */
1459 place = <0>;
1460 };
1461 };
1462
1463 /* I2C_CAM1 */ /* SENSOR_CONTROL_I2C1 */
1464 hsi2c_13: hsi2c@138B0000 {
1465 gpios = <&gpc0 2 0 &gpc0 3 0>;
1466 status = "okay";
1467 clock-frequency = <400000>;
1468 samsung,reset-before-trans;
1469 samsung,polling-mode;
1470
1471 fimc-is-2t7sx@10 {
1472 compatible = "samsung,exynos5-fimc-is-cis-2t7sx";
1473 reg = <0x10>; /* 1 bit right shift */
1474 id = <2>; /* matching fimc_is_sensor id */
1475 setfile = "setA";
1476 };
1477
1478 fimc-is-actuator@74 {
1479 compatible = "samsung,exynos5-fimc-is-actuator-lc898217";
1480 reg = <0x74>; /* 1 bit right shift */
1481 id = <2>; /* matching fimc_is_sensor id */
1482 place = <1>; /* HACK */
1483 };
1484 };
1485
1486 /* I2C_CAM2 */ /* SENSOR_CONTROL_I2C2 */
1487 hsi2c_14: hsi2c@138C0000 {
1488 gpios = <&gpc0 4 0 &gpc0 5 0>;
1489 status = "okay";
1490 clock-frequency = <400000>;
1491 samsung,reset-before-trans;
1492
1493 fimc-is-6b2@35 {
1494 compatible = "samsung,exynos5-fimc-is-cis-6b2";
1495 reg = <0x35>; /* 1 bit right shift */
1496 id = <1>; /* matching fimc_is_sensor id */
1497 setfile = "setA";
1498 };
1499 };
1500
1501 /* I2C_CAM3 */ /* SENSOR_CONTROL_I2C3 */
1502 hsi2c_15: hsi2c@138D0000 {
1503 gpios = <&gpc0 6 0 &gpc0 7 0>;
1504 status = "okay";
1505 clock-frequency = <400000>;
1506 samsung,reset-before-trans;
1507
1508 fimc-is-actuator@72 {
1509 compatible = "samsung,exynos5-fimc-is-actuator-dw9780";
1510 reg = <0x72>; /* 1 bit right shift */
1511 id = <0>; /* matching fimc_is_sensor id */
1512 place = <1>; /* HACK */
1513 };
1514 };
1515
1516 fimc_is_sensor0: fimc_is_sensor@14400000 {
1517 scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */
1518 id = <0>;
1519 csi_ch = <0>;
1520 dma_ch = <0 0 0 0 0 1 1 1>;
1521 vc_ch = <0 1 2 3 0 1 2 3>;
1522 flite_ch = <FLITE_ID_NOTHING>;
1523 is_bns = <0>;
1524 /* use_ssvc1_internal; */
1525 /* use_ssvc2_internal; */
1526 status = "okay";
1527 };
1528
1529 fimc_is_sensor1: fimc_is_sensor@14410000 {
1530 scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */
1531 id = <1>;
1532 csi_ch = <1>;
1533 dma_ch = <1 1 1 1 1 1 1 1>;
1534 vc_ch = <0 1 2 3 0 1 2 3>;
1535 flite_ch = <FLITE_ID_NOTHING>;
1536 is_bns = <0>;
1537 status = "okay";
1538 };
1539
1540 fimc_is_sensor2: fimc_is_sensor@14420000 {
1541 scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */
1542 id = <2>;
1543 csi_ch = <2>;
1544 dma_ch = <2 2 2 2>;
1545 vc_ch = <0 1 2 3>;
1546 flite_ch = <FLITE_ID_NOTHING>;
1547 is_bns = <0>;
1548 status = "okay";
1549 };
1550
1551 fimc_is_sensor3: fimc_is_sensor@14430000 {
1552 scenario = <SENSOR_SCENARIO_SECURE>; /* Normal, Vision, OIS etc */
1553 id = <3>;
1554 csi_ch = <3>;
1555 dma_ch = <3 3 3 3>;
1556 vc_ch = <0 1 2 3>;
1557 flite_ch = <FLITE_ID_NOTHING>;
1558 is_bns = <0>;
1559 status = "okay";
1560 };
1561 #endif
1562 }; /* end of __overlay__ */
1563 }; /* end of fragment */
1564 }; /* end of root */
1565
1566 &i2c_0 {
1567 #address-cells = <1>;
1568 #size-cells = <0>;
1569 status = "okay";
1570 s2mu106-fuelgauge@3B {
1571 compatible = "samsung,s2mu106-fuelgauge";
1572 reg = <0x3B>;
1573 pinctrl-names = "default";
1574 pinctrl-0 = <&fuel_irq>;
1575 fuelgauge,fuel_int = <&gpa2 3 0>;
1576 fuelgauge,fuel_alert_vol = <3400>;
1577 fuelgauge,fuel_alert_soc = <1>;
1578 fuelgauge,type_str = "SDI";
1579 fuelgauge,model_type = <1>;
1580 };
1581
1582 usbpd-s2mu106@3C {
1583 compatible = "sec-usbpd,i2c";
1584 reg = <0x3C>;
1585 pinctrl-names = "default";
1586 pinctrl-0 = <&usbpd_irq>;
1587 usbpd,usbpd_int = <&gpa2 2 0>;
1588
1589 pdic-manager {
1590 /* sink */
1591 pdic,max_power = <5000>;
1592 pdic,op_power = <2500>;
1593 pdic,max_voltage = <6000>;
1594 pdic,max_current = <2000>;
1595 pdic,min_current = <500>;
1596
1597 pdic,giveback = <0>;
1598 pdic,usb_com_capable = <1>;
1599 pdic,no_usb_suspend = <1>;
1600
1601 /* source */
1602 source,max_voltage = <5000>;
1603 source,min_voltage = <4000>;
1604 source,max_power = <2500>;
1605
1606 /* sink cap */
1607 sink,capable_max_voltage = <9000>;
1608 };
1609 };
1610 };
1611
1612 &i2c_1 {
1613 #address-cells = <1>;
1614 #size-cells = <0>;
1615 status = "okay";
1616 s2mu106@3d {
1617 compatible = "samsung,s2mu106mfd";
1618 reg = <0x3d>;
1619 pinctrl-names = "default";
1620 pinctrl-0 = <&if_pmic_irq>;
1621 s2mu106,irq-gpio = <&gpa2 1 0>;
1622 s2mu106,wakeup;
1623
1624 muic {
1625 status = "okay";
1626 muic,uart_addr = "11850000.pinctrl";
1627 muic,uart_rxd = "gpq0-3";
1628 muic,uart_txd = "gpq0-4";
1629 };
1630 };
1631
1632 s2mu106-haptic {
1633 status = "okay";
1634 haptic,pwm_id = <1>;
1635 haptic,operation_mode = <2>; /* 0 : ERM_I2C, 1 : ERM_GPIO, 2 : LRA */
1636 haptic,hbst_en;
1637 haptic,hbst_automode;
1638 haptic,boost_level = <5000>;
1639 };
1640
1641 s2mcs02-charger@41 {
1642 compatible = "samsung,s2mcs02-charger";
1643 reg = <0x41>;
1644 default-clk = <100000000>;
1645 };
1646
1647 flash_led {
1648 /* Change here if you want to use FLED_EN pin
1649 fled-en1-gpio = <&gpg1 2 0>;
1650 fled-en2-gpio = <&gpg1 2 0>;
1651 fled-en3-gpio = <&gpg1 2 0>;
1652 fled-en4-gpio = <&gpg1 2 0>;
1653 */
1654 status = "okay";
1655 default_current = <50>;
1656 max_current = <200>;
1657 default_timer = <0>;
1658
1659 s2mu106-channel1 {
1660 id = <0>;
1661 /*
1662 current = <100>;
1663 timer = <200>;
1664 */
1665 };
1666
1667 s2mu106-channel2 {
1668 id = <1>;
1669 /*
1670 current = <100>;
1671 timer = <200>;
1672 */
1673 };
1674
1675 s2mu106-channel3 {
1676 id = <2>;
1677 /*
1678 current = <100>;
1679 timer = <200>;
1680 */
1681 };
1682 };
1683
1684 s2mu106-charger {
1685 status = "okay";
1686 battery,charger_name = "s2mu106-charger";
1687 battery,chg_gpio_en = <0>;
1688 battery,chg_polarity_en = <0>;
1689 battery,chg_gpio_status = <0>;
1690 battery,chg_polarity_status = <0>;
1691 battery,chg_float_voltage = <4350>;
1692 battery,chg_recharge_vcell = <4250>;
1693 battery,chg_full_vcell = <4300>;
1694 battery,full_check_type = <2>;
1695 battery,full_check_type_2nd = <2>;
1696 battery,input_current_limit = <
1697 500 450 500 1200 500 1200 1200 1000 1000 1000
1698 1000 500 500 1200 1000 500 450>;
1699 battery,fast_charging_current = <
1700 500 450 500 1200 500 1200 1200 1000 1000 1000
1701 1000 500 500 1200 1000 500 450>;
1702 battery,full_check_current_1st = <
1703 300 0 300 300 300 300 300 300 300 300
1704 300 300 300 300 300 300 0>;
1705 battery,full_check_current_2nd = <
1706 100 0 100 100 100 100 100 100 100 100
1707 100 100 100 100 100 100 0>;
1708 };
1709 };
1710
1711 &i2c_2 {
1712 #address-cells = <1>;
1713 #size-cells = <0>;
1714 status = "okay";
1715
1716 sec-nfc@27 {
1717 compatible = "sec-nfc";
1718 reg = <0x27>;
1719
1720 sec-nfc,ven-gpio = <&gpg0 0 0>;
1721 sec-nfc,firm-gpio = <&gpg0 2 0>;
1722
1723 sec-nfc,irq-gpio = <&gpa1 2 0>;
1724 sec-nfc,clk_req-gpio = <&gpg0 1 0>;
1725 sec-nfc,ldo_en = <&gpm22 0 0>;
1726
1727 clock-names = "OSC_NFC";
1728 clocks = <&clock OSC_NFC>;
1729 pinctrl-names = "default";
1730 pinctrl-0 = <&xclkout1>;
1731 };
1732 };
1733
1734 &sec_pwm {
1735 status = "okay";
1736 pinctrl-names = "default";
1737 pinctrl-0 = <&motor_pwm>;
1738 };
1739
1740
1741 &fmp_0 {
1742 exynos,block-type = "sda";
1743 exynos,fips-block_offset = <5>;
1744 };
1745
1746 &contexthub_0 {
1747 /* chub irq pin lists */
1748 chub-irq-pin = <162>;
1749 clocks =
1750 /* SHUB */
1751 <&clock UMUX_CLKCMU_SHUB_BUS>,
1752 /* MAG. SENSOR : AK09918C */
1753 <&clock CMGP01_USI>,
1754 /* PROX. SENSOR : TMD3702 */
1755 <&clock CMGP03_USI>,
1756 /* ALS SENSOR : BH1726 */
1757 <&clock CMGP_I2C>;
1758 clock-names =
1759 "chub_bus",
1760 "cmgp_usi01",
1761 "cmgp_usi03",
1762 "cmgp_i2c";
1763 };
1764
1765 &pinctrl_0 {
1766 pmic_irq: pmic-irq {
1767 samsung,pins = "gpa2-0";
1768 samsung,pin-pud = <3>;
1769 samsung,pin-drv = <3>;
1770 };
1771
1772 sub_pmic_irq: sub-pmic-irq {
1773 samsung,pins = "gpa1-3";
1774 samsung,pin-function = <0>;
1775 samsung,pin-pud = <0>;
1776 samsung,pin-drv = <0>;
1777 };
1778
1779
1780 key_voldown: key-voldown {
1781 samsung,pins = "gpa1-6";
1782 samsung,pin-function = <0xf>;
1783 samsung,pin-pud = <0>;
1784 samsung,pin-drv = <0>;
1785 };
1786
1787 key_volup: key-volup {
1788 samsung,pins = "gpa1-5";
1789 samsung,pin-function = <0xf>;
1790 samsung,pin-pud = <0>;
1791 samsung,pin-drv = <0>;
1792 };
1793
1794 key_power: key-power {
1795 samsung,pins = "gpa1-7";
1796 samsung,pin-function = <0xf>;
1797 samsung,pin-pud = <0>;
1798 samsung,pin-drv = <0>;
1799 };
1800
1801 dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq {
1802 samsung,pins = "gpa0-7";
1803 samsung,pin-function = <0xf>;
1804 samsung,pin-pud = <0>;
1805 samsung,pin-drv = <3>;
1806 };
1807
1808 attn_irq: attn-irq {
1809 samsung,pins = "gpa2-4";
1810 samsung,pin-function = <0xf>;
1811 samsung,pin-pud = <0>;
1812 samsung,pin-drv = <0>;
1813 };
1814
1815 attn_input: attn-input {
1816 samsung,pins = "gpa2-4";
1817 samsung,pin-function = <0>;
1818 samsung,pin-pud = <1>;
1819 };
1820
1821 if_pmic_irq: if-pmic-irq {
1822 samsung,pins = "gpa2-1";
1823 samsung,pin-function = <0>;
1824 samsung,pin-pud = <0>;
1825 samsung,pin-drv = <0>;
1826 };
1827
1828 fuel_irq: fuel-irq {
1829 samsung,pins = "gpa2-3";
1830 samsung,pin-function = <0>;
1831 samsung,pin-pud = <0>;
1832 samsung,pin-drv = <0>;
1833 };
1834
1835 usbpd_irq: usbpd-irq {
1836 samsung,pins = "gpa2-2";
1837 samsung,pin-function = <0xf>;
1838 samsung,pin-pud = <3>;
1839 samsung,pin-drv = <3>;
1840 };
1841 /* TODO: Need to check pin number
1842 small_charger_irq: small-charger-irq {
1843 samsung,pins = "gpa2-5";
1844 samsung,pin-function = <0>;
1845 samsung,pin-pud = <0>;
1846 samsung,pin-drv = <0>;
1847 };
1848 */
1849 cap_int_status: cap_int_status {
1850 samsung,pins = "gpa2-6";
1851 samsung,pin-function = <0>;
1852 samsung,pin-val = <1>;
1853 samsung,pin-pud = <1>;
1854 };
1855 };
1856
1857 &pinctrl_4 {
1858 /* Warm reset information from AP */
1859 pm_wrsti: pm-wrsti {
1860 samsung,pins = "gpg0-7";
1861 samsung,pin-con-pdn = <3>;
1862 };
1863
1864 motor_pwm: motor_pwm {
1865 samsung,pins = "gpg4-2";
1866 samsung,pin-function = <2>;
1867 samsung,pin-pud = <1>;
1868 samsung,pin-drv = <0>;
1869 };
1870
1871 vdd_on: vdd-on {
1872 samsung,pins ="gpg3-4";
1873 samsung,pin-function = <1>;
1874 samsung,pin-val = <1>;
1875 samsung,pin-pud = <3>;
1876 };
1877
1878 vdd_off: vdd-off {
1879 samsung,pins ="gpg3-4";
1880 samsung,pin-function = <0>;
1881 samsung,pin-val = <0>;
1882 samsung,pin-pud = <1>;
1883 };
1884
1885 codec_reset: codec-reset {
1886 samsung,pins ="gpg3-2";
1887 samsung,pin-pud = <0>;
1888 samsung,pin-con-pdn =<3>;
1889 samsung,pin-pud-pdn = <0>;
1890 };
1891
1892 codec_en: codec_en {
1893 samsung,pins = "gpg1-1";
1894 samsung,pin-function = <1>;
1895 samsung,pin-pud = <3>;
1896 samsung,pin-val = <1>;
1897 };
1898 #if 0 /*Should be removed: enable speaker amp on EVB board*/
1899 amp_sda: amp-sda {
1900 samsung,pins = "gpp2-2";
1901 samsung,pin-function = <3>;
1902 samsung,pin-pud = <3>;
1903 samsung,pin-drv = <0>;
1904 };
1905 amp_scl: amp-scl {
1906 samsung,pins = "gpp2-1";
1907 samsung,pin-function = <3>;
1908 samsung,pin-pud = <3>;
1909 samsung,pin-drv = <0>;
1910 };
1911 amp_ad1: amp-ad1 {
1912 samsung,pins = "gpp2-0";
1913 samsung,pin-function = <1>;
1914 samsung,pin-val = <0>;
1915 samsung,pin-pud = <1>;
1916 };
1917 amp_ad0: amp-ad0 {
1918 samsung,pins = "gpp2-3";
1919 samsung,pin-function = <1>;
1920 samsung,pin-val = <0>;
1921 samsung,pin-pud = <1>;
1922 };
1923 #endif
1924 };
1925
1926 &udc {
1927 status = "okay";
1928 };
1929
1930 &usbdrd_dwc3 {
1931 dr_mode = "otg";
1932 maximum-speed = "high-speed";
1933 };
1934
1935 &usbdrd_phy {
1936 status = "okay";
1937 usb3phy-isolation = <1>;
1938
1939 hs_tune_param = <&usb_hs_tune>;
1940 };
1941
1942 &usbdrd3_phy {
1943 status = "okay";
1944 usb3phy-isolation = <1>;
1945
1946 hs_tune_param = <&usb3_hs_tune>;
1947 ss_tune_param = <&usb3_ss_tune>;
1948 };
1949
1950 &serial_0 {
1951 status = "okay";
1952 };
1953
1954 &dsim_0 {
1955 lcd_info = <&nt36672a>;
1956 /* reset, lcd_bias_enp, lcd_bias_enn, lcd_bl_en*/
1957 gpios = <&gpg1 4 0x1>, <&gpg3 1 0x1>, <&gpg3 0 0x1>, <&gpg2 1 0x1>;
1958 };
1959
1960 /* USI_0_SHUB */
1961 &usi_0_shub {
1962 usi_v2_mode = "spi";
1963 status = "okay";
1964 };
1965
1966 /* USI_SHUB_0_I2C */
1967 &usi_0_shub_i2c {
1968 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1969 status = "disabled";
1970 };
1971
1972 /* USI_0_CMGP */
1973 &usi_0_cmgp {
1974 /* usi_v2_mode = "i2c" or "spi" or "uart" */
1975 usi_v2_mode = "i2c";
1976 status = "okay";
1977 };
1978
1979 /* USI_0_CMGP_I2C */
1980 &usi_0_cmgp_i2c {
1981 usi_v2_mode = "i2c";
1982 status = "okay";
1983 };
1984
1985 /* USI_1_CMGP */
1986 &usi_1_cmgp {
1987 usi_v2_mode = "i2c";
1988 status = "okay";
1989 };
1990
1991 /* USI_1_CMGP_I2C */
1992 &usi_1_cmgp_i2c {
1993 usi_v2_mode = "i2c";
1994 status = "okay";
1995 };
1996
1997 /* USI_2_CMGP */
1998 &usi_2_cmgp {
1999 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2000 usi_v2_mode = "i2c";
2001 status = "okay";
2002 };
2003
2004 /* USI_2_CMGP_I2C */
2005 &usi_2_cmgp_i2c {
2006 usi_v2_mode = "i2c";
2007 status = "okay";
2008 };
2009
2010 /* USI_3_CMGP */
2011 &usi_3_cmgp {
2012 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2013 status = "disabled";
2014 };
2015
2016 /* USI_3_CMGP_I2C */
2017 &usi_3_cmgp_i2c {
2018 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2019 status = "disabled";
2020 };
2021
2022 /* USI_4_CMGP */
2023 &usi_4_cmgp {
2024 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2025 status = "disabled";
2026 };
2027
2028 /* USI_4_CMGP_I2C */
2029 &usi_4_cmgp_i2c {
2030 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2031 status = "disabled";
2032 };
2033
2034 /* USI_PERI_UART */
2035 &usi_peri_uart {
2036 usi_v2_mode = "uart";
2037 status = "okay";
2038 };
2039
2040 /* USI_PERI_CAMI2C_0 */
2041 &usi_peri_cami2c_0 {
2042 usi_v2_mode = "i2c";
2043 status = "okay";
2044 };
2045
2046 /* USI_PERI_CAMI2C_1 */
2047 &usi_peri_cami2c_1 {
2048 usi_v2_mode = "i2c";
2049 status = "okay";
2050 };
2051
2052 /* USI_PERI_CAMI2C_2 */
2053 &usi_peri_cami2c_2 {
2054 usi_v2_mode = "i2c";
2055 status = "okay";
2056 };
2057
2058 /* USI_PERI_CAMI2C_3 */
2059 &usi_peri_cami2c_3 {
2060 usi_v2_mode = "i2c";
2061 status = "okay";
2062 };
2063
2064 /* USI_PERI_SPI_0 */
2065 &usi_peri_spi_0 {
2066 usi_v2_mode = "spi";
2067 status = "okay";
2068 };
2069
2070 /* USI_PERI_SPI_1 */
2071 &usi_peri_spi_1 {
2072 usi_v2_mode = "spi";
2073 status = "okay";
2074 };
2075
2076 /* USI_PERI_USI_0 */
2077 &usi_peri_usi_0 {
2078 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2079 status = "disabled";
2080 };
2081
2082 /* USI_PERI_USI_0_I2C */
2083 &usi_peri_usi_0_i2c {
2084 /* usi_v2_mode = "i2c" or "spi" or "uart" */
2085 status = "disabled";
2086 };
2087
2088 /* USI_PERI_SPI_2 */
2089 &usi_peri_spi_2 {
2090 usi_v2_mode = "spi";
2091 status = "okay";
2092 };
2093
2094 &spi_6 {
2095 status = "disable";
2096 pinctrl-names = "default";
2097 pinctrl-0 = <&spi6_bus &spi6_cs_func>;
2098 /*cs-gpios = <&gpp2 3 0>;*/
2099 /*gpp2[3]*/
2100 /*num-cs = <1>;*/
2101 #address-cells = <1>;
2102 #size-cells = <0>;
2103 cs35l41_left: cs35l41@0 {
2104 compatible = "cirrus,cs35l41";
2105 reg = <0x0>;
2106
2107 spi-max-frequency = <9600000>;
2108
2109 interrupts = <2 0 0>;
2110 interrupt-controller;
2111 interrupt-parent = <&gpa0>;
2112 reset-gpios = <&gpg3 3 0>;
2113 #sound-dai-cells = <1>;
2114
2115 VA-supply = <&l42_reg>;
2116 VP-supply = <&V_SYS>;
2117
2118 cirrus,boost-peak-milliamp = <4500>;
2119 cirrus,boost-ind-nanohenry = <1000>;
2120 cirrus,boost-cap-microfarad = <15>;
2121 cirrus,asp-sdout-hiz = <0x1>;
2122 cirrus,gpio-config2 {
2123 cirrus,gpio-src-select = <0x4>;
2124 cirrus,gpio-output-enable;
2125 };
2126
2127 controller-data {
2128 /*cs-gpio = <gpm8 0 0>*/
2129 /*cs-gpios = <&gpp2 3 0>;*/
2130 samsung,spi-feedback-delay = <1>;
2131 samsung,spi-chip-select-mode = <0>;
2132 };
2133 };
2134 };
2135
2136 #if 0
2137 &i2c@0 {
2138 status = "okay";
2139 compatible = "i2c-gpio";
2140
2141 pinctrl-names = "default";
2142 pinctrl-0 = <&amp_sda &amp_scl &amp_ad0 &amp_ad1>;
2143
2144 gpios = <&gpp2 2 0 /* sda */
2145 &gpp2 1 0 /* scl */
2146 >;
2147
2148 #address-cells = <1>;
2149 #size-cells = <0>;
2150
2151 cs35l41_left: cs35l41@40 {
2152 compatible = "cirrus,cs35l41";
2153 reg = <0x40>;
2154
2155 interrupts = <2 0 0>;
2156 interrupt-controller;
2157 interrupt-parent = <&gpa0>;
2158 reset-gpios = <&gpg3 3 0>;
2159 #sound-dai-cells = <1>;
2160
2161 VA-supply = <&l42_reg>;
2162 VP-supply = <&V_SYS>;
2163
2164 cirrus,boost-peak-milliamp = <4500>;
2165 cirrus,boost-ind-nanohenry = <1000>;
2166 cirrus,boost-cap-microfarad = <15>;
2167 cirrus,asp-sdout-hiz = <0x1>;
2168 cirrus,gpio-config2 {
2169 cirrus,gpio-src-select = <0x4>;
2170 cirrus,gpio-output-enable;
2171 };
2172 };
2173 };
2174 #endif
2175
2176 &spi_9 {
2177 pinctrl-names = "default";
2178 pinctrl-0 = <&spi9_bus &spi9_cs_func &codec_en>;
2179 status = "okay";
2180 #address-cells = <1>;
2181 #size-cells = <0>;
2182 cs47l35: cs47l35@0 {
2183 compatible = "cirrus,cs47l35";
2184 reg = <0x0>;
2185
2186 spi-max-frequency = <11000000>;
2187
2188 interrupts = <6 0 0>;
2189 interrupt-controller;
2190 #interrupt-cells = <2>;
2191 interrupt-parent = <&gpa0>;
2192 gpio-controller;
2193 #gpio-cells = <2>;
2194 #sound-dai-cells = <1>;
2195
2196 /*l42_reg shoulde be change after board fixed*/
2197 AVDD-supply = <&l42_reg>;
2198 DBVDD1-supply = <&l42_reg>;
2199 DBVDD2-supply = <&l42_reg>;
2200 CPVDD1-supply = <&l42_reg>;
2201 CPVDD2-supply = <&l44_reg>;
2202 DCVDD-supply = <&l44_reg>;
2203 SPKVDD-supply = <&V_SYS>;
2204
2205 reset-gpios = <&gpg3 2 0>;
2206
2207 cirrus,dmic-ref = <0 0 0>;
2208 cirrus,inmode = <
2209 0 0 0 0 /* IN1 */
2210 0 0 0 0 /* IN2 */
2211 >;
2212
2213 cirrus,gpsw = <1 0>;
2214
2215 pinctrl-names = "probe", "active";
2216 pinctrl-0 = <&codec_reset>;
2217 pinctrl-1 = <&codec_reset &cs47l35_defaults>;
2218
2219 madera_pinctrl: madera-pinctrl {
2220 compatible = "cirrus,madera-pinctrl";
2221 cs47l35_defaults: cs47l35-gpio-defaults {
2222 aif1 {
2223 groups = "aif1";
2224 function = "aif1";
2225 bias-bus-hold;
2226 };
2227
2228 aif2 {
2229 groups = "aif2";
2230 function = "aif2";
2231 bias-bus-hold;
2232 };
2233
2234 aif3 {
2235 groups = "aif3";
2236 function = "aif3";
2237 bias-bus-hold;
2238 };
2239
2240 gpio6 { /* Amp Clock */
2241 groups = "gpio6";
2242 function = "opclk";
2243 bias-pull-up;
2244 output-low;
2245 };
2246
2247 gpio5 { /* Mic Polarity Flip */
2248 groups = "gpio5";
2249 function = "io";
2250 };
2251 };
2252 };
2253
2254
2255 micvdd {
2256 regulator-min-microvolt = <3000000>;
2257 regulator-max-microvolt = <3000000>;
2258 };
2259
2260 MICBIAS1 {
2261 regulator-min-microvolt = <2800000>;
2262 regulator-max-microvolt = <2800000>;
2263 cirrus,ext-cap = <1>;
2264 };
2265 MICBIAS1A {
2266 regulator-active-discharge = <1>;
2267 };
2268 MICBIAS1B {
2269 regulator-active-discharge = <1>;
2270 };
2271
2272 MICBIAS2 {
2273 regulator-min-microvolt = <2800000>;
2274 regulator-max-microvolt = <2800000>;
2275 cirrus,ext-cap = <1>;
2276 };
2277
2278 MICBIAS2A {
2279 regulator-active-discharge = <1>;
2280 };
2281 MICBIAS2B {
2282 regulator-active-discharge = <1>;
2283 };
2284
2285 cirrus,accdet {
2286 #address-cells = <1>;
2287 #size-cells = <0>;
2288
2289 acc@1 {
2290 reg = <1>;
2291
2292 cirrus,micd-configs = <
2293 0 0 2 0 0
2294 >;
2295 cirrus,micd-bias-start-time = <8>;
2296 cirrus,micd-rate = <6>;
2297 /*cirrus,micd-pol-gpios = <&cs47l35 4 0>;*/
2298 cirrus,micd-detect-debounce-ms = <500>;
2299 /*cirrus,jd-use-jd2;*/
2300 /*cirrus,micd-clamp-mode = <0x8>;*/
2301 };
2302 };
2303
2304 controller-data {
2305 samsung,spi-feedback-delay = <1>;
2306 samsung,spi-chip-select-mode = <0>;
2307 };
2308 };
2309 };