| 1 | /* |
| 2 | * Dynamic DMA mapping support. |
| 3 | * |
| 4 | * This implementation is a fallback for platforms that do not support |
| 5 | * I/O TLBs (aka DMA address translation hardware). |
| 6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> |
| 7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> |
| 8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co |
| 9 | * David Mosberger-Tang <davidm@hpl.hp.com> |
| 10 | * |
| 11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. |
| 12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid |
| 13 | * unnecessary i-cache flushing. |
| 14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
| 15 | * 05/09/10 linville Add support for syncing ranges, support syncing for |
| 16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. |
| 17 | * 08/12/11 beckyb Add highmem support |
| 18 | */ |
| 19 | |
| 20 | #define pr_fmt(fmt) "software IO TLB: " fmt |
| 21 | |
| 22 | #include <linux/cache.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/mm.h> |
| 25 | #include <linux/export.h> |
| 26 | #include <linux/spinlock.h> |
| 27 | #include <linux/string.h> |
| 28 | #include <linux/swiotlb.h> |
| 29 | #include <linux/pfn.h> |
| 30 | #include <linux/types.h> |
| 31 | #include <linux/ctype.h> |
| 32 | #include <linux/highmem.h> |
| 33 | #include <linux/gfp.h> |
| 34 | #include <linux/scatterlist.h> |
| 35 | #include <linux/mem_encrypt.h> |
| 36 | |
| 37 | #include <asm/io.h> |
| 38 | #include <asm/dma.h> |
| 39 | |
| 40 | #include <linux/init.h> |
| 41 | #include <linux/bootmem.h> |
| 42 | #include <linux/iommu-helper.h> |
| 43 | |
| 44 | #define CREATE_TRACE_POINTS |
| 45 | #include <trace/events/swiotlb.h> |
| 46 | |
| 47 | #define OFFSET(val,align) ((unsigned long) \ |
| 48 | ( (val) & ( (align) - 1))) |
| 49 | |
| 50 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
| 51 | |
| 52 | /* |
| 53 | * Minimum IO TLB size to bother booting with. Systems with mainly |
| 54 | * 64bit capable cards will only lightly use the swiotlb. If we can't |
| 55 | * allocate a contiguous 1MB, we're probably in trouble anyway. |
| 56 | */ |
| 57 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) |
| 58 | |
| 59 | enum swiotlb_force swiotlb_force; |
| 60 | |
| 61 | /* |
| 62 | * Used to do a quick range check in swiotlb_tbl_unmap_single and |
| 63 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this |
| 64 | * API. |
| 65 | */ |
| 66 | static phys_addr_t io_tlb_start, io_tlb_end; |
| 67 | |
| 68 | /* |
| 69 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
| 70 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
| 71 | */ |
| 72 | static unsigned long io_tlb_nslabs; |
| 73 | |
| 74 | /* |
| 75 | * When the IOMMU overflows we return a fallback buffer. This sets the size. |
| 76 | */ |
| 77 | static unsigned long io_tlb_overflow = 32*1024; |
| 78 | |
| 79 | static phys_addr_t io_tlb_overflow_buffer; |
| 80 | |
| 81 | /* |
| 82 | * This is a free list describing the number of free entries available from |
| 83 | * each index |
| 84 | */ |
| 85 | static unsigned int *io_tlb_list; |
| 86 | static unsigned int io_tlb_index; |
| 87 | |
| 88 | /* |
| 89 | * Max segment that we can provide which (if pages are contingous) will |
| 90 | * not be bounced (unless SWIOTLB_FORCE is set). |
| 91 | */ |
| 92 | unsigned int max_segment; |
| 93 | |
| 94 | /* |
| 95 | * We need to save away the original address corresponding to a mapped entry |
| 96 | * for the sync operations. |
| 97 | */ |
| 98 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) |
| 99 | static phys_addr_t *io_tlb_orig_addr; |
| 100 | |
| 101 | /* |
| 102 | * Protect the above data structures in the map and unmap calls |
| 103 | */ |
| 104 | static DEFINE_SPINLOCK(io_tlb_lock); |
| 105 | |
| 106 | static int late_alloc; |
| 107 | |
| 108 | static int __init |
| 109 | setup_io_tlb_npages(char *str) |
| 110 | { |
| 111 | if (isdigit(*str)) { |
| 112 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
| 113 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
| 114 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 115 | } |
| 116 | if (*str == ',') |
| 117 | ++str; |
| 118 | if (!strcmp(str, "force")) { |
| 119 | swiotlb_force = SWIOTLB_FORCE; |
| 120 | } else if (!strcmp(str, "noforce")) { |
| 121 | swiotlb_force = SWIOTLB_NO_FORCE; |
| 122 | io_tlb_nslabs = 1; |
| 123 | } |
| 124 | |
| 125 | return 0; |
| 126 | } |
| 127 | early_param("swiotlb", setup_io_tlb_npages); |
| 128 | /* make io_tlb_overflow tunable too? */ |
| 129 | |
| 130 | unsigned long swiotlb_nr_tbl(void) |
| 131 | { |
| 132 | return io_tlb_nslabs; |
| 133 | } |
| 134 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); |
| 135 | |
| 136 | unsigned int swiotlb_max_segment(void) |
| 137 | { |
| 138 | return max_segment; |
| 139 | } |
| 140 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); |
| 141 | |
| 142 | void swiotlb_set_max_segment(unsigned int val) |
| 143 | { |
| 144 | if (swiotlb_force == SWIOTLB_FORCE) |
| 145 | max_segment = 1; |
| 146 | else |
| 147 | max_segment = rounddown(val, PAGE_SIZE); |
| 148 | } |
| 149 | |
| 150 | /* default to 64MB */ |
| 151 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) |
| 152 | unsigned long swiotlb_size_or_default(void) |
| 153 | { |
| 154 | unsigned long size; |
| 155 | |
| 156 | size = io_tlb_nslabs << IO_TLB_SHIFT; |
| 157 | |
| 158 | return size ? size : (IO_TLB_DEFAULT_SIZE); |
| 159 | } |
| 160 | |
| 161 | void __weak swiotlb_set_mem_attributes(void *vaddr, unsigned long size) { } |
| 162 | |
| 163 | /* For swiotlb, clear memory encryption mask from dma addresses */ |
| 164 | static dma_addr_t swiotlb_phys_to_dma(struct device *hwdev, |
| 165 | phys_addr_t address) |
| 166 | { |
| 167 | return __sme_clr(phys_to_dma(hwdev, address)); |
| 168 | } |
| 169 | |
| 170 | /* Note that this doesn't work with highmem page */ |
| 171 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
| 172 | volatile void *address) |
| 173 | { |
| 174 | return phys_to_dma(hwdev, virt_to_phys(address)); |
| 175 | } |
| 176 | |
| 177 | static bool no_iotlb_memory; |
| 178 | |
| 179 | void swiotlb_print_info(void) |
| 180 | { |
| 181 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 182 | |
| 183 | if (no_iotlb_memory) { |
| 184 | pr_warn("No low mem\n"); |
| 185 | return; |
| 186 | } |
| 187 | |
| 188 | pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n", |
| 189 | (unsigned long long)io_tlb_start, |
| 190 | (unsigned long long)io_tlb_end, |
| 191 | bytes >> 20); |
| 192 | } |
| 193 | |
| 194 | /* |
| 195 | * Early SWIOTLB allocation may be too early to allow an architecture to |
| 196 | * perform the desired operations. This function allows the architecture to |
| 197 | * call SWIOTLB when the operations are possible. It needs to be called |
| 198 | * before the SWIOTLB memory is used. |
| 199 | */ |
| 200 | void __init swiotlb_update_mem_attributes(void) |
| 201 | { |
| 202 | void *vaddr; |
| 203 | unsigned long bytes; |
| 204 | |
| 205 | if (no_iotlb_memory || late_alloc) |
| 206 | return; |
| 207 | |
| 208 | vaddr = phys_to_virt(io_tlb_start); |
| 209 | bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT); |
| 210 | swiotlb_set_mem_attributes(vaddr, bytes); |
| 211 | memset(vaddr, 0, bytes); |
| 212 | |
| 213 | vaddr = phys_to_virt(io_tlb_overflow_buffer); |
| 214 | bytes = PAGE_ALIGN(io_tlb_overflow); |
| 215 | swiotlb_set_mem_attributes(vaddr, bytes); |
| 216 | memset(vaddr, 0, bytes); |
| 217 | } |
| 218 | |
| 219 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
| 220 | { |
| 221 | void *v_overflow_buffer; |
| 222 | unsigned long i, bytes; |
| 223 | |
| 224 | bytes = nslabs << IO_TLB_SHIFT; |
| 225 | |
| 226 | io_tlb_nslabs = nslabs; |
| 227 | io_tlb_start = __pa(tlb); |
| 228 | io_tlb_end = io_tlb_start + bytes; |
| 229 | |
| 230 | /* |
| 231 | * Get the overflow emergency buffer |
| 232 | */ |
| 233 | v_overflow_buffer = memblock_virt_alloc_low_nopanic( |
| 234 | PAGE_ALIGN(io_tlb_overflow), |
| 235 | PAGE_SIZE); |
| 236 | if (!v_overflow_buffer) |
| 237 | return -ENOMEM; |
| 238 | |
| 239 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); |
| 240 | |
| 241 | /* |
| 242 | * Allocate and initialize the free list array. This array is used |
| 243 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE |
| 244 | * between io_tlb_start and io_tlb_end. |
| 245 | */ |
| 246 | io_tlb_list = memblock_virt_alloc( |
| 247 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), |
| 248 | PAGE_SIZE); |
| 249 | io_tlb_orig_addr = memblock_virt_alloc( |
| 250 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), |
| 251 | PAGE_SIZE); |
| 252 | for (i = 0; i < io_tlb_nslabs; i++) { |
| 253 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
| 254 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
| 255 | } |
| 256 | io_tlb_index = 0; |
| 257 | |
| 258 | if (verbose) |
| 259 | swiotlb_print_info(); |
| 260 | |
| 261 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
| 262 | return 0; |
| 263 | } |
| 264 | |
| 265 | /* |
| 266 | * Statically reserve bounce buffer space and initialize bounce buffer data |
| 267 | * structures for the software IO TLB used to implement the DMA API. |
| 268 | */ |
| 269 | void __init |
| 270 | swiotlb_init(int verbose) |
| 271 | { |
| 272 | size_t default_size = IO_TLB_DEFAULT_SIZE; |
| 273 | unsigned char *vstart; |
| 274 | unsigned long bytes; |
| 275 | |
| 276 | if (!io_tlb_nslabs) { |
| 277 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
| 278 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 279 | } |
| 280 | |
| 281 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 282 | |
| 283 | /* Get IO TLB memory from the low pages */ |
| 284 | vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); |
| 285 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) |
| 286 | return; |
| 287 | |
| 288 | if (io_tlb_start) |
| 289 | memblock_free_early(io_tlb_start, |
| 290 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); |
| 291 | pr_warn("Cannot allocate buffer"); |
| 292 | no_iotlb_memory = true; |
| 293 | } |
| 294 | |
| 295 | /* |
| 296 | * Systems with larger DMA zones (those that don't support ISA) can |
| 297 | * initialize the swiotlb later using the slab allocator if needed. |
| 298 | * This should be just like above, but with some error catching. |
| 299 | */ |
| 300 | int |
| 301 | swiotlb_late_init_with_default_size(size_t default_size) |
| 302 | { |
| 303 | unsigned long bytes, req_nslabs = io_tlb_nslabs; |
| 304 | unsigned char *vstart = NULL; |
| 305 | unsigned int order; |
| 306 | int rc = 0; |
| 307 | |
| 308 | if (!io_tlb_nslabs) { |
| 309 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
| 310 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 311 | } |
| 312 | |
| 313 | /* |
| 314 | * Get IO TLB memory from the low pages |
| 315 | */ |
| 316 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
| 317 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
| 318 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 319 | |
| 320 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { |
| 321 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
| 322 | order); |
| 323 | if (vstart) |
| 324 | break; |
| 325 | order--; |
| 326 | } |
| 327 | |
| 328 | if (!vstart) { |
| 329 | io_tlb_nslabs = req_nslabs; |
| 330 | return -ENOMEM; |
| 331 | } |
| 332 | if (order != get_order(bytes)) { |
| 333 | pr_warn("only able to allocate %ld MB\n", |
| 334 | (PAGE_SIZE << order) >> 20); |
| 335 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
| 336 | } |
| 337 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); |
| 338 | if (rc) |
| 339 | free_pages((unsigned long)vstart, order); |
| 340 | |
| 341 | return rc; |
| 342 | } |
| 343 | |
| 344 | int |
| 345 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) |
| 346 | { |
| 347 | unsigned long i, bytes; |
| 348 | unsigned char *v_overflow_buffer; |
| 349 | |
| 350 | bytes = nslabs << IO_TLB_SHIFT; |
| 351 | |
| 352 | io_tlb_nslabs = nslabs; |
| 353 | io_tlb_start = virt_to_phys(tlb); |
| 354 | io_tlb_end = io_tlb_start + bytes; |
| 355 | |
| 356 | swiotlb_set_mem_attributes(tlb, bytes); |
| 357 | memset(tlb, 0, bytes); |
| 358 | |
| 359 | /* |
| 360 | * Get the overflow emergency buffer |
| 361 | */ |
| 362 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, |
| 363 | get_order(io_tlb_overflow)); |
| 364 | if (!v_overflow_buffer) |
| 365 | goto cleanup2; |
| 366 | |
| 367 | swiotlb_set_mem_attributes(v_overflow_buffer, io_tlb_overflow); |
| 368 | memset(v_overflow_buffer, 0, io_tlb_overflow); |
| 369 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); |
| 370 | |
| 371 | /* |
| 372 | * Allocate and initialize the free list array. This array is used |
| 373 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE |
| 374 | * between io_tlb_start and io_tlb_end. |
| 375 | */ |
| 376 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, |
| 377 | get_order(io_tlb_nslabs * sizeof(int))); |
| 378 | if (!io_tlb_list) |
| 379 | goto cleanup3; |
| 380 | |
| 381 | io_tlb_orig_addr = (phys_addr_t *) |
| 382 | __get_free_pages(GFP_KERNEL, |
| 383 | get_order(io_tlb_nslabs * |
| 384 | sizeof(phys_addr_t))); |
| 385 | if (!io_tlb_orig_addr) |
| 386 | goto cleanup4; |
| 387 | |
| 388 | for (i = 0; i < io_tlb_nslabs; i++) { |
| 389 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
| 390 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
| 391 | } |
| 392 | io_tlb_index = 0; |
| 393 | |
| 394 | swiotlb_print_info(); |
| 395 | |
| 396 | late_alloc = 1; |
| 397 | |
| 398 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
| 399 | |
| 400 | return 0; |
| 401 | |
| 402 | cleanup4: |
| 403 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
| 404 | sizeof(int))); |
| 405 | io_tlb_list = NULL; |
| 406 | cleanup3: |
| 407 | free_pages((unsigned long)v_overflow_buffer, |
| 408 | get_order(io_tlb_overflow)); |
| 409 | io_tlb_overflow_buffer = 0; |
| 410 | cleanup2: |
| 411 | io_tlb_end = 0; |
| 412 | io_tlb_start = 0; |
| 413 | io_tlb_nslabs = 0; |
| 414 | max_segment = 0; |
| 415 | return -ENOMEM; |
| 416 | } |
| 417 | |
| 418 | void __init swiotlb_free(void) |
| 419 | { |
| 420 | if (!io_tlb_orig_addr) |
| 421 | return; |
| 422 | |
| 423 | if (late_alloc) { |
| 424 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), |
| 425 | get_order(io_tlb_overflow)); |
| 426 | free_pages((unsigned long)io_tlb_orig_addr, |
| 427 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); |
| 428 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
| 429 | sizeof(int))); |
| 430 | free_pages((unsigned long)phys_to_virt(io_tlb_start), |
| 431 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); |
| 432 | } else { |
| 433 | memblock_free_late(io_tlb_overflow_buffer, |
| 434 | PAGE_ALIGN(io_tlb_overflow)); |
| 435 | memblock_free_late(__pa(io_tlb_orig_addr), |
| 436 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); |
| 437 | memblock_free_late(__pa(io_tlb_list), |
| 438 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); |
| 439 | memblock_free_late(io_tlb_start, |
| 440 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); |
| 441 | } |
| 442 | io_tlb_nslabs = 0; |
| 443 | max_segment = 0; |
| 444 | } |
| 445 | |
| 446 | int is_swiotlb_buffer(phys_addr_t paddr) |
| 447 | { |
| 448 | return paddr >= io_tlb_start && paddr < io_tlb_end; |
| 449 | } |
| 450 | |
| 451 | /* |
| 452 | * Bounce: copy the swiotlb buffer back to the original dma location |
| 453 | */ |
| 454 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, |
| 455 | size_t size, enum dma_data_direction dir) |
| 456 | { |
| 457 | unsigned long pfn = PFN_DOWN(orig_addr); |
| 458 | unsigned char *vaddr = phys_to_virt(tlb_addr); |
| 459 | |
| 460 | if (PageHighMem(pfn_to_page(pfn))) { |
| 461 | /* The buffer does not have a mapping. Map it in and copy */ |
| 462 | unsigned int offset = orig_addr & ~PAGE_MASK; |
| 463 | char *buffer; |
| 464 | unsigned int sz = 0; |
| 465 | unsigned long flags; |
| 466 | |
| 467 | while (size) { |
| 468 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
| 469 | |
| 470 | local_irq_save(flags); |
| 471 | buffer = kmap_atomic(pfn_to_page(pfn)); |
| 472 | if (dir == DMA_TO_DEVICE) |
| 473 | memcpy(vaddr, buffer + offset, sz); |
| 474 | else |
| 475 | memcpy(buffer + offset, vaddr, sz); |
| 476 | kunmap_atomic(buffer); |
| 477 | local_irq_restore(flags); |
| 478 | |
| 479 | size -= sz; |
| 480 | pfn++; |
| 481 | vaddr += sz; |
| 482 | offset = 0; |
| 483 | } |
| 484 | } else if (dir == DMA_TO_DEVICE) { |
| 485 | memcpy(vaddr, phys_to_virt(orig_addr), size); |
| 486 | } else { |
| 487 | memcpy(phys_to_virt(orig_addr), vaddr, size); |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, |
| 492 | dma_addr_t tbl_dma_addr, |
| 493 | phys_addr_t orig_addr, size_t size, |
| 494 | enum dma_data_direction dir, |
| 495 | unsigned long attrs) |
| 496 | { |
| 497 | unsigned long flags; |
| 498 | phys_addr_t tlb_addr; |
| 499 | unsigned int nslots, stride, index, wrap; |
| 500 | int i; |
| 501 | unsigned long mask; |
| 502 | unsigned long offset_slots; |
| 503 | unsigned long max_slots; |
| 504 | |
| 505 | if (no_iotlb_memory) |
| 506 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); |
| 507 | |
| 508 | if (sme_active()) |
| 509 | pr_warn_once("SME is active and system is using DMA bounce buffers\n"); |
| 510 | |
| 511 | mask = dma_get_seg_boundary(hwdev); |
| 512 | |
| 513 | tbl_dma_addr &= mask; |
| 514 | |
| 515 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 516 | |
| 517 | /* |
| 518 | * Carefully handle integer overflow which can occur when mask == ~0UL. |
| 519 | */ |
| 520 | max_slots = mask + 1 |
| 521 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT |
| 522 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); |
| 523 | |
| 524 | /* |
| 525 | * For mappings greater than or equal to a page, we limit the stride |
| 526 | * (and hence alignment) to a page size. |
| 527 | */ |
| 528 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 529 | if (size >= PAGE_SIZE) |
| 530 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); |
| 531 | else |
| 532 | stride = 1; |
| 533 | |
| 534 | BUG_ON(!nslots); |
| 535 | |
| 536 | /* |
| 537 | * Find suitable number of IO TLB entries size that will fit this |
| 538 | * request and allocate a buffer from that IO TLB pool. |
| 539 | */ |
| 540 | spin_lock_irqsave(&io_tlb_lock, flags); |
| 541 | index = ALIGN(io_tlb_index, stride); |
| 542 | if (index >= io_tlb_nslabs) |
| 543 | index = 0; |
| 544 | wrap = index; |
| 545 | |
| 546 | do { |
| 547 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
| 548 | max_slots)) { |
| 549 | index += stride; |
| 550 | if (index >= io_tlb_nslabs) |
| 551 | index = 0; |
| 552 | if (index == wrap) |
| 553 | goto not_found; |
| 554 | } |
| 555 | |
| 556 | /* |
| 557 | * If we find a slot that indicates we have 'nslots' number of |
| 558 | * contiguous buffers, we allocate the buffers from that slot |
| 559 | * and mark the entries as '0' indicating unavailable. |
| 560 | */ |
| 561 | if (io_tlb_list[index] >= nslots) { |
| 562 | int count = 0; |
| 563 | |
| 564 | for (i = index; i < (int) (index + nslots); i++) |
| 565 | io_tlb_list[i] = 0; |
| 566 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) |
| 567 | io_tlb_list[i] = ++count; |
| 568 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); |
| 569 | |
| 570 | /* |
| 571 | * Update the indices to avoid searching in the next |
| 572 | * round. |
| 573 | */ |
| 574 | io_tlb_index = ((index + nslots) < io_tlb_nslabs |
| 575 | ? (index + nslots) : 0); |
| 576 | |
| 577 | goto found; |
| 578 | } |
| 579 | index += stride; |
| 580 | if (index >= io_tlb_nslabs) |
| 581 | index = 0; |
| 582 | } while (index != wrap); |
| 583 | |
| 584 | not_found: |
| 585 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 586 | if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) |
| 587 | dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); |
| 588 | return SWIOTLB_MAP_ERROR; |
| 589 | found: |
| 590 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 591 | |
| 592 | /* |
| 593 | * Save away the mapping from the original address to the DMA address. |
| 594 | * This is needed when we sync the memory. Then we sync the buffer if |
| 595 | * needed. |
| 596 | */ |
| 597 | for (i = 0; i < nslots; i++) |
| 598 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); |
| 599 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
| 600 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 601 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); |
| 602 | |
| 603 | return tlb_addr; |
| 604 | } |
| 605 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); |
| 606 | |
| 607 | /* |
| 608 | * Allocates bounce buffer and returns its kernel virtual address. |
| 609 | */ |
| 610 | |
| 611 | static phys_addr_t |
| 612 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, |
| 613 | enum dma_data_direction dir, unsigned long attrs) |
| 614 | { |
| 615 | dma_addr_t start_dma_addr; |
| 616 | |
| 617 | if (swiotlb_force == SWIOTLB_NO_FORCE) { |
| 618 | dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n", |
| 619 | &phys); |
| 620 | return SWIOTLB_MAP_ERROR; |
| 621 | } |
| 622 | |
| 623 | start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start); |
| 624 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, |
| 625 | dir, attrs); |
| 626 | } |
| 627 | |
| 628 | /* |
| 629 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. |
| 630 | */ |
| 631 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, |
| 632 | size_t size, enum dma_data_direction dir, |
| 633 | unsigned long attrs) |
| 634 | { |
| 635 | unsigned long flags; |
| 636 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 637 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
| 638 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; |
| 639 | |
| 640 | /* |
| 641 | * First, sync the memory before unmapping the entry |
| 642 | */ |
| 643 | if (orig_addr != INVALID_PHYS_ADDR && |
| 644 | !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
| 645 | ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
| 646 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); |
| 647 | |
| 648 | /* |
| 649 | * Return the buffer to the free list by setting the corresponding |
| 650 | * entries to indicate the number of contiguous entries available. |
| 651 | * While returning the entries to the free list, we merge the entries |
| 652 | * with slots below and above the pool being returned. |
| 653 | */ |
| 654 | spin_lock_irqsave(&io_tlb_lock, flags); |
| 655 | { |
| 656 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? |
| 657 | io_tlb_list[index + nslots] : 0); |
| 658 | /* |
| 659 | * Step 1: return the slots to the free list, merging the |
| 660 | * slots with superceeding slots |
| 661 | */ |
| 662 | for (i = index + nslots - 1; i >= index; i--) { |
| 663 | io_tlb_list[i] = ++count; |
| 664 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
| 665 | } |
| 666 | /* |
| 667 | * Step 2: merge the returned slots with the preceding slots, |
| 668 | * if available (non zero) |
| 669 | */ |
| 670 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) |
| 671 | io_tlb_list[i] = ++count; |
| 672 | } |
| 673 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 674 | } |
| 675 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); |
| 676 | |
| 677 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, |
| 678 | size_t size, enum dma_data_direction dir, |
| 679 | enum dma_sync_target target) |
| 680 | { |
| 681 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
| 682 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; |
| 683 | |
| 684 | if (orig_addr == INVALID_PHYS_ADDR) |
| 685 | return; |
| 686 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); |
| 687 | |
| 688 | switch (target) { |
| 689 | case SYNC_FOR_CPU: |
| 690 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 691 | swiotlb_bounce(orig_addr, tlb_addr, |
| 692 | size, DMA_FROM_DEVICE); |
| 693 | else |
| 694 | BUG_ON(dir != DMA_TO_DEVICE); |
| 695 | break; |
| 696 | case SYNC_FOR_DEVICE: |
| 697 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 698 | swiotlb_bounce(orig_addr, tlb_addr, |
| 699 | size, DMA_TO_DEVICE); |
| 700 | else |
| 701 | BUG_ON(dir != DMA_FROM_DEVICE); |
| 702 | break; |
| 703 | default: |
| 704 | BUG(); |
| 705 | } |
| 706 | } |
| 707 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); |
| 708 | |
| 709 | void * |
| 710 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, |
| 711 | dma_addr_t *dma_handle, gfp_t flags) |
| 712 | { |
| 713 | bool warn = !(flags & __GFP_NOWARN); |
| 714 | dma_addr_t dev_addr; |
| 715 | void *ret; |
| 716 | int order = get_order(size); |
| 717 | u64 dma_mask = DMA_BIT_MASK(32); |
| 718 | |
| 719 | if (hwdev && hwdev->coherent_dma_mask) |
| 720 | dma_mask = hwdev->coherent_dma_mask; |
| 721 | |
| 722 | ret = (void *)__get_free_pages(flags, order); |
| 723 | if (ret) { |
| 724 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
| 725 | if (dev_addr + size - 1 > dma_mask) { |
| 726 | /* |
| 727 | * The allocated memory isn't reachable by the device. |
| 728 | */ |
| 729 | free_pages((unsigned long) ret, order); |
| 730 | ret = NULL; |
| 731 | } |
| 732 | } |
| 733 | if (!ret) { |
| 734 | /* |
| 735 | * We are either out of memory or the device can't DMA to |
| 736 | * GFP_DMA memory; fall back on map_single(), which |
| 737 | * will grab memory from the lowest available address range. |
| 738 | */ |
| 739 | phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE, |
| 740 | warn ? 0 : DMA_ATTR_NO_WARN); |
| 741 | if (paddr == SWIOTLB_MAP_ERROR) |
| 742 | goto err_warn; |
| 743 | |
| 744 | ret = phys_to_virt(paddr); |
| 745 | dev_addr = swiotlb_phys_to_dma(hwdev, paddr); |
| 746 | |
| 747 | /* Confirm address can be DMA'd by device */ |
| 748 | if (dev_addr + size - 1 > dma_mask) { |
| 749 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
| 750 | (unsigned long long)dma_mask, |
| 751 | (unsigned long long)dev_addr); |
| 752 | |
| 753 | /* |
| 754 | * DMA_TO_DEVICE to avoid memcpy in unmap_single. |
| 755 | * The DMA_ATTR_SKIP_CPU_SYNC is optional. |
| 756 | */ |
| 757 | swiotlb_tbl_unmap_single(hwdev, paddr, |
| 758 | size, DMA_TO_DEVICE, |
| 759 | DMA_ATTR_SKIP_CPU_SYNC); |
| 760 | goto err_warn; |
| 761 | } |
| 762 | } |
| 763 | |
| 764 | *dma_handle = dev_addr; |
| 765 | memset(ret, 0, size); |
| 766 | |
| 767 | return ret; |
| 768 | |
| 769 | err_warn: |
| 770 | if (warn && printk_ratelimit()) { |
| 771 | pr_warn("coherent allocation failed for device %s size=%zu\n", |
| 772 | dev_name(hwdev), size); |
| 773 | dump_stack(); |
| 774 | } |
| 775 | |
| 776 | return NULL; |
| 777 | } |
| 778 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
| 779 | |
| 780 | void |
| 781 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, |
| 782 | dma_addr_t dev_addr) |
| 783 | { |
| 784 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
| 785 | |
| 786 | WARN_ON(irqs_disabled()); |
| 787 | if (!is_swiotlb_buffer(paddr)) |
| 788 | free_pages((unsigned long)vaddr, get_order(size)); |
| 789 | else |
| 790 | /* |
| 791 | * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single. |
| 792 | * DMA_ATTR_SKIP_CPU_SYNC is optional. |
| 793 | */ |
| 794 | swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE, |
| 795 | DMA_ATTR_SKIP_CPU_SYNC); |
| 796 | } |
| 797 | EXPORT_SYMBOL(swiotlb_free_coherent); |
| 798 | |
| 799 | static void |
| 800 | swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir, |
| 801 | int do_panic) |
| 802 | { |
| 803 | if (swiotlb_force == SWIOTLB_NO_FORCE) |
| 804 | return; |
| 805 | |
| 806 | /* |
| 807 | * Ran out of IOMMU space for this operation. This is very bad. |
| 808 | * Unfortunately the drivers cannot handle this operation properly. |
| 809 | * unless they check for dma_mapping_error (most don't) |
| 810 | * When the mapping is small enough return a static buffer to limit |
| 811 | * the damage, or panic when the transfer is too big. |
| 812 | */ |
| 813 | dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n", |
| 814 | size); |
| 815 | |
| 816 | if (size <= io_tlb_overflow || !do_panic) |
| 817 | return; |
| 818 | |
| 819 | if (dir == DMA_BIDIRECTIONAL) |
| 820 | panic("DMA: Random memory could be DMA accessed\n"); |
| 821 | if (dir == DMA_FROM_DEVICE) |
| 822 | panic("DMA: Random memory could be DMA written\n"); |
| 823 | if (dir == DMA_TO_DEVICE) |
| 824 | panic("DMA: Random memory could be DMA read\n"); |
| 825 | } |
| 826 | |
| 827 | /* |
| 828 | * Map a single buffer of the indicated size for DMA in streaming mode. The |
| 829 | * physical address to use is returned. |
| 830 | * |
| 831 | * Once the device is given the dma address, the device owns this memory until |
| 832 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
| 833 | */ |
| 834 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
| 835 | unsigned long offset, size_t size, |
| 836 | enum dma_data_direction dir, |
| 837 | unsigned long attrs) |
| 838 | { |
| 839 | phys_addr_t map, phys = page_to_phys(page) + offset; |
| 840 | dma_addr_t dev_addr = phys_to_dma(dev, phys); |
| 841 | |
| 842 | BUG_ON(dir == DMA_NONE); |
| 843 | /* |
| 844 | * If the address happens to be in the device's DMA window, |
| 845 | * we can safely return the device addr and not worry about bounce |
| 846 | * buffering it. |
| 847 | */ |
| 848 | if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE) |
| 849 | return dev_addr; |
| 850 | |
| 851 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); |
| 852 | |
| 853 | /* Oh well, have to allocate and map a bounce buffer. */ |
| 854 | map = map_single(dev, phys, size, dir, attrs); |
| 855 | if (map == SWIOTLB_MAP_ERROR) { |
| 856 | swiotlb_full(dev, size, dir, 1); |
| 857 | return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer); |
| 858 | } |
| 859 | |
| 860 | dev_addr = swiotlb_phys_to_dma(dev, map); |
| 861 | |
| 862 | /* Ensure that the address returned is DMA'ble */ |
| 863 | if (dma_capable(dev, dev_addr, size)) |
| 864 | return dev_addr; |
| 865 | |
| 866 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
| 867 | swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); |
| 868 | |
| 869 | return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer); |
| 870 | } |
| 871 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
| 872 | |
| 873 | /* |
| 874 | * Unmap a single streaming mode DMA translation. The dma_addr and size must |
| 875 | * match what was provided for in a previous swiotlb_map_page call. All |
| 876 | * other usages are undefined. |
| 877 | * |
| 878 | * After this call, reads by the cpu to the buffer are guaranteed to see |
| 879 | * whatever the device wrote there. |
| 880 | */ |
| 881 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
| 882 | size_t size, enum dma_data_direction dir, |
| 883 | unsigned long attrs) |
| 884 | { |
| 885 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
| 886 | |
| 887 | BUG_ON(dir == DMA_NONE); |
| 888 | |
| 889 | if (is_swiotlb_buffer(paddr)) { |
| 890 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); |
| 891 | return; |
| 892 | } |
| 893 | |
| 894 | if (dir != DMA_FROM_DEVICE) |
| 895 | return; |
| 896 | |
| 897 | /* |
| 898 | * phys_to_virt doesn't work with hihgmem page but we could |
| 899 | * call dma_mark_clean() with hihgmem page here. However, we |
| 900 | * are fine since dma_mark_clean() is null on POWERPC. We can |
| 901 | * make dma_mark_clean() take a physical address if necessary. |
| 902 | */ |
| 903 | dma_mark_clean(phys_to_virt(paddr), size); |
| 904 | } |
| 905 | |
| 906 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, |
| 907 | size_t size, enum dma_data_direction dir, |
| 908 | unsigned long attrs) |
| 909 | { |
| 910 | unmap_single(hwdev, dev_addr, size, dir, attrs); |
| 911 | } |
| 912 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
| 913 | |
| 914 | /* |
| 915 | * Make physical memory consistent for a single streaming mode DMA translation |
| 916 | * after a transfer. |
| 917 | * |
| 918 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
| 919 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
| 920 | * call this function before doing so. At the next point you give the dma |
| 921 | * address back to the card, you must first perform a |
| 922 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer |
| 923 | */ |
| 924 | static void |
| 925 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
| 926 | size_t size, enum dma_data_direction dir, |
| 927 | enum dma_sync_target target) |
| 928 | { |
| 929 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); |
| 930 | |
| 931 | BUG_ON(dir == DMA_NONE); |
| 932 | |
| 933 | if (is_swiotlb_buffer(paddr)) { |
| 934 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); |
| 935 | return; |
| 936 | } |
| 937 | |
| 938 | if (dir != DMA_FROM_DEVICE) |
| 939 | return; |
| 940 | |
| 941 | dma_mark_clean(phys_to_virt(paddr), size); |
| 942 | } |
| 943 | |
| 944 | void |
| 945 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, |
| 946 | size_t size, enum dma_data_direction dir) |
| 947 | { |
| 948 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
| 949 | } |
| 950 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
| 951 | |
| 952 | void |
| 953 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, |
| 954 | size_t size, enum dma_data_direction dir) |
| 955 | { |
| 956 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
| 957 | } |
| 958 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
| 959 | |
| 960 | /* |
| 961 | * Map a set of buffers described by scatterlist in streaming mode for DMA. |
| 962 | * This is the scatter-gather version of the above swiotlb_map_page |
| 963 | * interface. Here the scatter gather list elements are each tagged with the |
| 964 | * appropriate dma address and length. They are obtained via |
| 965 | * sg_dma_{address,length}(SG). |
| 966 | * |
| 967 | * NOTE: An implementation may be able to use a smaller number of |
| 968 | * DMA address/length pairs than there are SG table elements. |
| 969 | * (for example via virtual mapping capabilities) |
| 970 | * The routine returns the number of addr/length pairs actually |
| 971 | * used, at most nents. |
| 972 | * |
| 973 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
| 974 | * same here. |
| 975 | */ |
| 976 | int |
| 977 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
| 978 | enum dma_data_direction dir, unsigned long attrs) |
| 979 | { |
| 980 | struct scatterlist *sg; |
| 981 | int i; |
| 982 | |
| 983 | BUG_ON(dir == DMA_NONE); |
| 984 | |
| 985 | for_each_sg(sgl, sg, nelems, i) { |
| 986 | phys_addr_t paddr = sg_phys(sg); |
| 987 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); |
| 988 | |
| 989 | if (swiotlb_force == SWIOTLB_FORCE || |
| 990 | !dma_capable(hwdev, dev_addr, sg->length)) { |
| 991 | phys_addr_t map = map_single(hwdev, sg_phys(sg), |
| 992 | sg->length, dir, attrs); |
| 993 | if (map == SWIOTLB_MAP_ERROR) { |
| 994 | /* Don't panic here, we expect map_sg users |
| 995 | to do proper error handling. */ |
| 996 | swiotlb_full(hwdev, sg->length, dir, 0); |
| 997 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; |
| 998 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
| 999 | attrs); |
| 1000 | sg_dma_len(sgl) = 0; |
| 1001 | return 0; |
| 1002 | } |
| 1003 | sg->dma_address = swiotlb_phys_to_dma(hwdev, map); |
| 1004 | } else |
| 1005 | sg->dma_address = dev_addr; |
| 1006 | sg_dma_len(sg) = sg->length; |
| 1007 | } |
| 1008 | return nelems; |
| 1009 | } |
| 1010 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
| 1011 | |
| 1012 | /* |
| 1013 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules |
| 1014 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
| 1015 | */ |
| 1016 | void |
| 1017 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
| 1018 | int nelems, enum dma_data_direction dir, |
| 1019 | unsigned long attrs) |
| 1020 | { |
| 1021 | struct scatterlist *sg; |
| 1022 | int i; |
| 1023 | |
| 1024 | BUG_ON(dir == DMA_NONE); |
| 1025 | |
| 1026 | for_each_sg(sgl, sg, nelems, i) |
| 1027 | unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, |
| 1028 | attrs); |
| 1029 | } |
| 1030 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
| 1031 | |
| 1032 | /* |
| 1033 | * Make physical memory consistent for a set of streaming mode DMA translations |
| 1034 | * after a transfer. |
| 1035 | * |
| 1036 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules |
| 1037 | * and usage. |
| 1038 | */ |
| 1039 | static void |
| 1040 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
| 1041 | int nelems, enum dma_data_direction dir, |
| 1042 | enum dma_sync_target target) |
| 1043 | { |
| 1044 | struct scatterlist *sg; |
| 1045 | int i; |
| 1046 | |
| 1047 | for_each_sg(sgl, sg, nelems, i) |
| 1048 | swiotlb_sync_single(hwdev, sg->dma_address, |
| 1049 | sg_dma_len(sg), dir, target); |
| 1050 | } |
| 1051 | |
| 1052 | void |
| 1053 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, |
| 1054 | int nelems, enum dma_data_direction dir) |
| 1055 | { |
| 1056 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
| 1057 | } |
| 1058 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
| 1059 | |
| 1060 | void |
| 1061 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, |
| 1062 | int nelems, enum dma_data_direction dir) |
| 1063 | { |
| 1064 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
| 1065 | } |
| 1066 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
| 1067 | |
| 1068 | int |
| 1069 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
| 1070 | { |
| 1071 | return (dma_addr == swiotlb_phys_to_dma(hwdev, io_tlb_overflow_buffer)); |
| 1072 | } |
| 1073 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
| 1074 | |
| 1075 | /* |
| 1076 | * Return whether the given device DMA address mask can be supported |
| 1077 | * properly. For example, if your device can only drive the low 24-bits |
| 1078 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
| 1079 | * this function. |
| 1080 | */ |
| 1081 | int |
| 1082 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
| 1083 | { |
| 1084 | return swiotlb_phys_to_dma(hwdev, io_tlb_end - 1) <= mask; |
| 1085 | } |
| 1086 | EXPORT_SYMBOL(swiotlb_dma_supported); |