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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / cio / qdio_main.c
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1/*
2 * Linux for s390 qdio support, buffer handling, qdio API and module support.
3 *
4 * Copyright IBM Corp. 2000, 2008
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
8 */
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/timer.h>
13#include <linux/delay.h>
14#include <linux/gfp.h>
15#include <linux/io.h>
16#include <linux/atomic.h>
17#include <asm/debug.h>
18#include <asm/qdio.h>
19#include <asm/ipl.h>
20
21#include "cio.h"
22#include "css.h"
23#include "device.h"
24#include "qdio.h"
25#include "qdio_debug.h"
26
27MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>");
29MODULE_DESCRIPTION("QDIO base support");
30MODULE_LICENSE("GPL");
31
32static inline int do_siga_sync(unsigned long schid,
33 unsigned int out_mask, unsigned int in_mask,
34 unsigned int fc)
35{
36 register unsigned long __fc asm ("0") = fc;
37 register unsigned long __schid asm ("1") = schid;
38 register unsigned long out asm ("2") = out_mask;
39 register unsigned long in asm ("3") = in_mask;
40 int cc;
41
42 asm volatile(
43 " siga 0\n"
44 " ipm %0\n"
45 " srl %0,28\n"
46 : "=d" (cc)
47 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
48 return cc;
49}
50
51static inline int do_siga_input(unsigned long schid, unsigned int mask,
52 unsigned int fc)
53{
54 register unsigned long __fc asm ("0") = fc;
55 register unsigned long __schid asm ("1") = schid;
56 register unsigned long __mask asm ("2") = mask;
57 int cc;
58
59 asm volatile(
60 " siga 0\n"
61 " ipm %0\n"
62 " srl %0,28\n"
63 : "=d" (cc)
64 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
65 return cc;
66}
67
68/**
69 * do_siga_output - perform SIGA-w/wt function
70 * @schid: subchannel id or in case of QEBSM the subchannel token
71 * @mask: which output queues to process
72 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
73 * @fc: function code to perform
74 *
75 * Returns condition code.
76 * Note: For IQDC unicast queues only the highest priority queue is processed.
77 */
78static inline int do_siga_output(unsigned long schid, unsigned long mask,
79 unsigned int *bb, unsigned int fc,
80 unsigned long aob)
81{
82 register unsigned long __fc asm("0") = fc;
83 register unsigned long __schid asm("1") = schid;
84 register unsigned long __mask asm("2") = mask;
85 register unsigned long __aob asm("3") = aob;
86 int cc;
87
88 asm volatile(
89 " siga 0\n"
90 " ipm %0\n"
91 " srl %0,28\n"
92 : "=d" (cc), "+d" (__fc), "+d" (__aob)
93 : "d" (__schid), "d" (__mask)
94 : "cc");
95 *bb = __fc >> 31;
96 return cc;
97}
98
99static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
100{
101 /* all done or next buffer state different */
102 if (ccq == 0 || ccq == 32)
103 return 0;
104 /* no buffer processed */
105 if (ccq == 97)
106 return 1;
107 /* not all buffers processed */
108 if (ccq == 96)
109 return 2;
110 /* notify devices immediately */
111 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
112 return -EIO;
113}
114
115/**
116 * qdio_do_eqbs - extract buffer states for QEBSM
117 * @q: queue to manipulate
118 * @state: state of the extracted buffers
119 * @start: buffer number to start at
120 * @count: count of buffers to examine
121 * @auto_ack: automatically acknowledge buffers
122 *
123 * Returns the number of successfully extracted equal buffer states.
124 * Stops processing if a state is different from the last buffers state.
125 */
126static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
127 int start, int count, int auto_ack)
128{
129 int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
130 unsigned int ccq = 0;
131
132 qperf_inc(q, eqbs);
133
134 if (!q->is_input_q)
135 nr += q->irq_ptr->nr_input_qs;
136again:
137 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
138 auto_ack);
139 rc = qdio_check_ccq(q, ccq);
140 if (!rc)
141 return count - tmp_count;
142
143 if (rc == 1) {
144 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
145 goto again;
146 }
147
148 if (rc == 2) {
149 qperf_inc(q, eqbs_partial);
150 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
151 tmp_count);
152 /*
153 * Retry once, if that fails bail out and process the
154 * extracted buffers before trying again.
155 */
156 if (!retried++)
157 goto again;
158 else
159 return count - tmp_count;
160 }
161
162 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
163 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
164 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
165 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
166 return 0;
167}
168
169/**
170 * qdio_do_sqbs - set buffer states for QEBSM
171 * @q: queue to manipulate
172 * @state: new state of the buffers
173 * @start: first buffer number to change
174 * @count: how many buffers to change
175 *
176 * Returns the number of successfully changed buffers.
177 * Does retrying until the specified count of buffer states is set or an
178 * error occurs.
179 */
180static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
181 int count)
182{
183 unsigned int ccq = 0;
184 int tmp_count = count, tmp_start = start;
185 int nr = q->nr;
186 int rc;
187
188 if (!count)
189 return 0;
190 qperf_inc(q, sqbs);
191
192 if (!q->is_input_q)
193 nr += q->irq_ptr->nr_input_qs;
194again:
195 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
196 rc = qdio_check_ccq(q, ccq);
197 if (!rc) {
198 WARN_ON_ONCE(tmp_count);
199 return count - tmp_count;
200 }
201
202 if (rc == 1 || rc == 2) {
203 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
204 qperf_inc(q, sqbs_partial);
205 goto again;
206 }
207
208 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
209 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
210 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
211 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
212 return 0;
213}
214
215/* returns number of examined buffers and their common state in *state */
216static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
217 unsigned char *state, unsigned int count,
218 int auto_ack, int merge_pending)
219{
220 unsigned char __state = 0;
221 int i;
222
223 if (is_qebsm(q))
224 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
225
226 for (i = 0; i < count; i++) {
227 if (!__state) {
228 __state = q->slsb.val[bufnr];
229 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
230 __state = SLSB_P_OUTPUT_EMPTY;
231 } else if (merge_pending) {
232 if ((q->slsb.val[bufnr] & __state) != __state)
233 break;
234 } else if (q->slsb.val[bufnr] != __state)
235 break;
236 bufnr = next_buf(bufnr);
237 }
238 *state = __state;
239 return i;
240}
241
242static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
243 unsigned char *state, int auto_ack)
244{
245 return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
246}
247
248/* wrap-around safe setting of slsb states, returns number of changed buffers */
249static inline int set_buf_states(struct qdio_q *q, int bufnr,
250 unsigned char state, int count)
251{
252 int i;
253
254 if (is_qebsm(q))
255 return qdio_do_sqbs(q, state, bufnr, count);
256
257 for (i = 0; i < count; i++) {
258 xchg(&q->slsb.val[bufnr], state);
259 bufnr = next_buf(bufnr);
260 }
261 return count;
262}
263
264static inline int set_buf_state(struct qdio_q *q, int bufnr,
265 unsigned char state)
266{
267 return set_buf_states(q, bufnr, state, 1);
268}
269
270/* set slsb states to initial state */
271static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
272{
273 struct qdio_q *q;
274 int i;
275
276 for_each_input_queue(irq_ptr, q, i)
277 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
278 QDIO_MAX_BUFFERS_PER_Q);
279 for_each_output_queue(irq_ptr, q, i)
280 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
281 QDIO_MAX_BUFFERS_PER_Q);
282}
283
284static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
285 unsigned int input)
286{
287 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
288 unsigned int fc = QDIO_SIGA_SYNC;
289 int cc;
290
291 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
292 qperf_inc(q, siga_sync);
293
294 if (is_qebsm(q)) {
295 schid = q->irq_ptr->sch_token;
296 fc |= QDIO_SIGA_QEBSM_FLAG;
297 }
298
299 cc = do_siga_sync(schid, output, input, fc);
300 if (unlikely(cc))
301 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
302 return (cc) ? -EIO : 0;
303}
304
305static inline int qdio_siga_sync_q(struct qdio_q *q)
306{
307 if (q->is_input_q)
308 return qdio_siga_sync(q, 0, q->mask);
309 else
310 return qdio_siga_sync(q, q->mask, 0);
311}
312
313static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
314 unsigned long aob)
315{
316 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
317 unsigned int fc = QDIO_SIGA_WRITE;
318 u64 start_time = 0;
319 int retries = 0, cc;
320 unsigned long laob = 0;
321
322 if (q->u.out.use_cq && aob != 0) {
323 fc = QDIO_SIGA_WRITEQ;
324 laob = aob;
325 }
326
327 if (is_qebsm(q)) {
328 schid = q->irq_ptr->sch_token;
329 fc |= QDIO_SIGA_QEBSM_FLAG;
330 }
331again:
332 WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
333 (aob && fc != QDIO_SIGA_WRITEQ));
334 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
335
336 /* hipersocket busy condition */
337 if (unlikely(*busy_bit)) {
338 retries++;
339
340 if (!start_time) {
341 start_time = get_tod_clock();
342 goto again;
343 }
344 if ((get_tod_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
345 goto again;
346 }
347 if (retries) {
348 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
349 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
350 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
351 }
352 return cc;
353}
354
355static inline int qdio_siga_input(struct qdio_q *q)
356{
357 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
358 unsigned int fc = QDIO_SIGA_READ;
359 int cc;
360
361 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
362 qperf_inc(q, siga_read);
363
364 if (is_qebsm(q)) {
365 schid = q->irq_ptr->sch_token;
366 fc |= QDIO_SIGA_QEBSM_FLAG;
367 }
368
369 cc = do_siga_input(schid, q->mask, fc);
370 if (unlikely(cc))
371 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
372 return (cc) ? -EIO : 0;
373}
374
375#define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
376#define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
377
378static inline void qdio_sync_queues(struct qdio_q *q)
379{
380 /* PCI capable outbound queues will also be scanned so sync them too */
381 if (pci_out_supported(q))
382 qdio_siga_sync_all(q);
383 else
384 qdio_siga_sync_q(q);
385}
386
387int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
388 unsigned char *state)
389{
390 if (need_siga_sync(q))
391 qdio_siga_sync_q(q);
392 return get_buf_states(q, bufnr, state, 1, 0, 0);
393}
394
395static inline void qdio_stop_polling(struct qdio_q *q)
396{
397 if (!q->u.in.polling)
398 return;
399
400 q->u.in.polling = 0;
401 qperf_inc(q, stop_polling);
402
403 /* show the card that we are not polling anymore */
404 if (is_qebsm(q)) {
405 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
406 q->u.in.ack_count);
407 q->u.in.ack_count = 0;
408 } else
409 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
410}
411
412static inline void account_sbals(struct qdio_q *q, int count)
413{
414 int pos = 0;
415
416 q->q_stats.nr_sbal_total += count;
417 if (count == QDIO_MAX_BUFFERS_MASK) {
418 q->q_stats.nr_sbals[7]++;
419 return;
420 }
421 while (count >>= 1)
422 pos++;
423 q->q_stats.nr_sbals[pos]++;
424}
425
426static void process_buffer_error(struct qdio_q *q, int count)
427{
428 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
429 SLSB_P_OUTPUT_NOT_INIT;
430
431 q->qdio_error = QDIO_ERROR_SLSB_STATE;
432
433 /* special handling for no target buffer empty */
434 if ((!q->is_input_q &&
435 (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
436 qperf_inc(q, target_full);
437 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
438 q->first_to_check);
439 goto set;
440 }
441
442 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
443 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
444 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
445 DBF_ERROR("F14:%2x F15:%2x",
446 q->sbal[q->first_to_check]->element[14].sflags,
447 q->sbal[q->first_to_check]->element[15].sflags);
448
449set:
450 /*
451 * Interrupts may be avoided as long as the error is present
452 * so change the buffer state immediately to avoid starvation.
453 */
454 set_buf_states(q, q->first_to_check, state, count);
455}
456
457static inline void inbound_primed(struct qdio_q *q, int count)
458{
459 int new;
460
461 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
462
463 /* for QEBSM the ACK was already set by EQBS */
464 if (is_qebsm(q)) {
465 if (!q->u.in.polling) {
466 q->u.in.polling = 1;
467 q->u.in.ack_count = count;
468 q->u.in.ack_start = q->first_to_check;
469 return;
470 }
471
472 /* delete the previous ACK's */
473 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
474 q->u.in.ack_count);
475 q->u.in.ack_count = count;
476 q->u.in.ack_start = q->first_to_check;
477 return;
478 }
479
480 /*
481 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
482 * or by the next inbound run.
483 */
484 new = add_buf(q->first_to_check, count - 1);
485 if (q->u.in.polling) {
486 /* reset the previous ACK but first set the new one */
487 set_buf_state(q, new, SLSB_P_INPUT_ACK);
488 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
489 } else {
490 q->u.in.polling = 1;
491 set_buf_state(q, new, SLSB_P_INPUT_ACK);
492 }
493
494 q->u.in.ack_start = new;
495 count--;
496 if (!count)
497 return;
498 /* need to change ALL buffers to get more interrupts */
499 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
500}
501
502static int get_inbound_buffer_frontier(struct qdio_q *q)
503{
504 int count, stop;
505 unsigned char state = 0;
506
507 q->timestamp = get_tod_clock();
508
509 /*
510 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
511 * would return 0.
512 */
513 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
514 stop = add_buf(q->first_to_check, count);
515
516 if (q->first_to_check == stop)
517 goto out;
518
519 /*
520 * No siga sync here, as a PCI or we after a thin interrupt
521 * already sync'ed the queues.
522 */
523 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
524 if (!count)
525 goto out;
526
527 switch (state) {
528 case SLSB_P_INPUT_PRIMED:
529 inbound_primed(q, count);
530 q->first_to_check = add_buf(q->first_to_check, count);
531 if (atomic_sub(count, &q->nr_buf_used) == 0)
532 qperf_inc(q, inbound_queue_full);
533 if (q->irq_ptr->perf_stat_enabled)
534 account_sbals(q, count);
535 break;
536 case SLSB_P_INPUT_ERROR:
537 process_buffer_error(q, count);
538 q->first_to_check = add_buf(q->first_to_check, count);
539 atomic_sub(count, &q->nr_buf_used);
540 if (q->irq_ptr->perf_stat_enabled)
541 account_sbals_error(q, count);
542 break;
543 case SLSB_CU_INPUT_EMPTY:
544 case SLSB_P_INPUT_NOT_INIT:
545 case SLSB_P_INPUT_ACK:
546 if (q->irq_ptr->perf_stat_enabled)
547 q->q_stats.nr_sbal_nop++;
548 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
549 break;
550 default:
551 WARN_ON_ONCE(1);
552 }
553out:
554 return q->first_to_check;
555}
556
557static int qdio_inbound_q_moved(struct qdio_q *q)
558{
559 int bufnr;
560
561 bufnr = get_inbound_buffer_frontier(q);
562
563 if (bufnr != q->last_move) {
564 q->last_move = bufnr;
565 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
566 q->u.in.timestamp = get_tod_clock();
567 return 1;
568 } else
569 return 0;
570}
571
572static inline int qdio_inbound_q_done(struct qdio_q *q)
573{
574 unsigned char state = 0;
575
576 if (!atomic_read(&q->nr_buf_used))
577 return 1;
578
579 if (need_siga_sync(q))
580 qdio_siga_sync_q(q);
581 get_buf_state(q, q->first_to_check, &state, 0);
582
583 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
584 /* more work coming */
585 return 0;
586
587 if (is_thinint_irq(q->irq_ptr))
588 return 1;
589
590 /* don't poll under z/VM */
591 if (MACHINE_IS_VM)
592 return 1;
593
594 /*
595 * At this point we know, that inbound first_to_check
596 * has (probably) not moved (see qdio_inbound_processing).
597 */
598 if (get_tod_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
599 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
600 q->first_to_check);
601 return 1;
602 } else
603 return 0;
604}
605
606static inline int contains_aobs(struct qdio_q *q)
607{
608 return !q->is_input_q && q->u.out.use_cq;
609}
610
611static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
612 int i, struct qaob *aob)
613{
614 int tmp;
615
616 DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
617 (unsigned long) virt_to_phys(aob));
618 DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
619 (unsigned long) aob->res0[0]);
620 DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
621 (unsigned long) aob->res0[1]);
622 DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
623 (unsigned long) aob->res0[2]);
624 DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
625 (unsigned long) aob->res0[3]);
626 DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
627 (unsigned long) aob->res0[4]);
628 DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
629 (unsigned long) aob->res0[5]);
630 DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
631 DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
632 DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
633 DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
634 DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
635 DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
636 DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
637 for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
638 DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
639 (unsigned long) aob->sba[tmp]);
640 DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
641 (unsigned long) q->sbal[i]->element[tmp].addr);
642 DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
643 DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
644 q->sbal[i]->element[tmp].length);
645 }
646 DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
647 for (tmp = 0; tmp < 2; ++tmp) {
648 DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
649 (unsigned long) aob->res4[tmp]);
650 }
651 DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
652 DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
653}
654
655static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
656{
657 unsigned char state = 0;
658 int j, b = start;
659
660 if (!contains_aobs(q))
661 return;
662
663 for (j = 0; j < count; ++j) {
664 get_buf_state(q, b, &state, 0);
665 if (state == SLSB_P_OUTPUT_PENDING) {
666 struct qaob *aob = q->u.out.aobs[b];
667 if (aob == NULL)
668 continue;
669
670 q->u.out.sbal_state[b].flags |=
671 QDIO_OUTBUF_STATE_FLAG_PENDING;
672 q->u.out.aobs[b] = NULL;
673 } else if (state == SLSB_P_OUTPUT_EMPTY) {
674 q->u.out.sbal_state[b].aob = NULL;
675 }
676 b = next_buf(b);
677 }
678}
679
680static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
681 int bufnr)
682{
683 unsigned long phys_aob = 0;
684
685 if (!q->use_cq)
686 goto out;
687
688 if (!q->aobs[bufnr]) {
689 struct qaob *aob = qdio_allocate_aob();
690 q->aobs[bufnr] = aob;
691 }
692 if (q->aobs[bufnr]) {
693 q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
694 q->sbal_state[bufnr].aob = q->aobs[bufnr];
695 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
696 phys_aob = virt_to_phys(q->aobs[bufnr]);
697 WARN_ON_ONCE(phys_aob & 0xFF);
698 }
699
700out:
701 return phys_aob;
702}
703
704static void qdio_kick_handler(struct qdio_q *q)
705{
706 int start = q->first_to_kick;
707 int end = q->first_to_check;
708 int count;
709
710 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
711 return;
712
713 count = sub_buf(end, start);
714
715 if (q->is_input_q) {
716 qperf_inc(q, inbound_handler);
717 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
718 } else {
719 qperf_inc(q, outbound_handler);
720 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
721 start, count);
722 }
723
724 qdio_handle_aobs(q, start, count);
725
726 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
727 q->irq_ptr->int_parm);
728
729 /* for the next time */
730 q->first_to_kick = end;
731 q->qdio_error = 0;
732}
733
734static void __qdio_inbound_processing(struct qdio_q *q)
735{
736 qperf_inc(q, tasklet_inbound);
737
738 if (!qdio_inbound_q_moved(q))
739 return;
740
741 qdio_kick_handler(q);
742
743 if (!qdio_inbound_q_done(q)) {
744 /* means poll time is not yet over */
745 qperf_inc(q, tasklet_inbound_resched);
746 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
747 tasklet_schedule(&q->tasklet);
748 return;
749 }
750 }
751
752 qdio_stop_polling(q);
753 /*
754 * We need to check again to not lose initiative after
755 * resetting the ACK state.
756 */
757 if (!qdio_inbound_q_done(q)) {
758 qperf_inc(q, tasklet_inbound_resched2);
759 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
760 tasklet_schedule(&q->tasklet);
761 }
762}
763
764void qdio_inbound_processing(unsigned long data)
765{
766 struct qdio_q *q = (struct qdio_q *)data;
767 __qdio_inbound_processing(q);
768}
769
770static int get_outbound_buffer_frontier(struct qdio_q *q)
771{
772 int count, stop;
773 unsigned char state = 0;
774
775 q->timestamp = get_tod_clock();
776
777 if (need_siga_sync(q))
778 if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
779 !pci_out_supported(q)) ||
780 (queue_type(q) == QDIO_IQDIO_QFMT &&
781 multicast_outbound(q)))
782 qdio_siga_sync_q(q);
783
784 /*
785 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
786 * would return 0.
787 */
788 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
789 stop = add_buf(q->first_to_check, count);
790 if (q->first_to_check == stop)
791 goto out;
792
793 count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
794 if (!count)
795 goto out;
796
797 switch (state) {
798 case SLSB_P_OUTPUT_EMPTY:
799 /* the adapter got it */
800 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
801 "out empty:%1d %02x", q->nr, count);
802
803 atomic_sub(count, &q->nr_buf_used);
804 q->first_to_check = add_buf(q->first_to_check, count);
805 if (q->irq_ptr->perf_stat_enabled)
806 account_sbals(q, count);
807
808 break;
809 case SLSB_P_OUTPUT_ERROR:
810 process_buffer_error(q, count);
811 q->first_to_check = add_buf(q->first_to_check, count);
812 atomic_sub(count, &q->nr_buf_used);
813 if (q->irq_ptr->perf_stat_enabled)
814 account_sbals_error(q, count);
815 break;
816 case SLSB_CU_OUTPUT_PRIMED:
817 /* the adapter has not fetched the output yet */
818 if (q->irq_ptr->perf_stat_enabled)
819 q->q_stats.nr_sbal_nop++;
820 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
821 q->nr);
822 break;
823 case SLSB_P_OUTPUT_NOT_INIT:
824 case SLSB_P_OUTPUT_HALTED:
825 break;
826 default:
827 WARN_ON_ONCE(1);
828 }
829
830out:
831 return q->first_to_check;
832}
833
834/* all buffers processed? */
835static inline int qdio_outbound_q_done(struct qdio_q *q)
836{
837 return atomic_read(&q->nr_buf_used) == 0;
838}
839
840static inline int qdio_outbound_q_moved(struct qdio_q *q)
841{
842 int bufnr;
843
844 bufnr = get_outbound_buffer_frontier(q);
845
846 if (bufnr != q->last_move) {
847 q->last_move = bufnr;
848 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
849 return 1;
850 } else
851 return 0;
852}
853
854static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
855{
856 int retries = 0, cc;
857 unsigned int busy_bit;
858
859 if (!need_siga_out(q))
860 return 0;
861
862 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
863retry:
864 qperf_inc(q, siga_write);
865
866 cc = qdio_siga_output(q, &busy_bit, aob);
867 switch (cc) {
868 case 0:
869 break;
870 case 2:
871 if (busy_bit) {
872 while (++retries < QDIO_BUSY_BIT_RETRIES) {
873 mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
874 goto retry;
875 }
876 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
877 cc = -EBUSY;
878 } else {
879 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
880 cc = -ENOBUFS;
881 }
882 break;
883 case 1:
884 case 3:
885 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
886 cc = -EIO;
887 break;
888 }
889 if (retries) {
890 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
891 DBF_ERROR("count:%u", retries);
892 }
893 return cc;
894}
895
896static void __qdio_outbound_processing(struct qdio_q *q)
897{
898 qperf_inc(q, tasklet_outbound);
899 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
900
901 if (qdio_outbound_q_moved(q))
902 qdio_kick_handler(q);
903
904 if (queue_type(q) == QDIO_ZFCP_QFMT)
905 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
906 goto sched;
907
908 if (q->u.out.pci_out_enabled)
909 return;
910
911 /*
912 * Now we know that queue type is either qeth without pci enabled
913 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
914 * is noticed and outbound_handler is called after some time.
915 */
916 if (qdio_outbound_q_done(q))
917 del_timer(&q->u.out.timer);
918 else
919 if (!timer_pending(&q->u.out.timer))
920 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
921 return;
922
923sched:
924 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
925 return;
926 tasklet_schedule(&q->tasklet);
927}
928
929/* outbound tasklet */
930void qdio_outbound_processing(unsigned long data)
931{
932 struct qdio_q *q = (struct qdio_q *)data;
933 __qdio_outbound_processing(q);
934}
935
936void qdio_outbound_timer(unsigned long data)
937{
938 struct qdio_q *q = (struct qdio_q *)data;
939
940 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
941 return;
942 tasklet_schedule(&q->tasklet);
943}
944
945static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
946{
947 struct qdio_q *out;
948 int i;
949
950 if (!pci_out_supported(q))
951 return;
952
953 for_each_output_queue(q->irq_ptr, out, i)
954 if (!qdio_outbound_q_done(out))
955 tasklet_schedule(&out->tasklet);
956}
957
958static void __tiqdio_inbound_processing(struct qdio_q *q)
959{
960 qperf_inc(q, tasklet_inbound);
961 if (need_siga_sync(q) && need_siga_sync_after_ai(q))
962 qdio_sync_queues(q);
963
964 /*
965 * The interrupt could be caused by a PCI request. Check the
966 * PCI capable outbound queues.
967 */
968 qdio_check_outbound_after_thinint(q);
969
970 if (!qdio_inbound_q_moved(q))
971 return;
972
973 qdio_kick_handler(q);
974
975 if (!qdio_inbound_q_done(q)) {
976 qperf_inc(q, tasklet_inbound_resched);
977 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
978 tasklet_schedule(&q->tasklet);
979 return;
980 }
981 }
982
983 qdio_stop_polling(q);
984 /*
985 * We need to check again to not lose initiative after
986 * resetting the ACK state.
987 */
988 if (!qdio_inbound_q_done(q)) {
989 qperf_inc(q, tasklet_inbound_resched2);
990 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
991 tasklet_schedule(&q->tasklet);
992 }
993}
994
995void tiqdio_inbound_processing(unsigned long data)
996{
997 struct qdio_q *q = (struct qdio_q *)data;
998 __tiqdio_inbound_processing(q);
999}
1000
1001static inline void qdio_set_state(struct qdio_irq *irq_ptr,
1002 enum qdio_irq_states state)
1003{
1004 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
1005
1006 irq_ptr->state = state;
1007 mb();
1008}
1009
1010static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
1011{
1012 if (irb->esw.esw0.erw.cons) {
1013 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
1014 DBF_ERROR_HEX(irb, 64);
1015 DBF_ERROR_HEX(irb->ecw, 64);
1016 }
1017}
1018
1019/* PCI interrupt handler */
1020static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
1021{
1022 int i;
1023 struct qdio_q *q;
1024
1025 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
1026 return;
1027
1028 for_each_input_queue(irq_ptr, q, i) {
1029 if (q->u.in.queue_start_poll) {
1030 /* skip if polling is enabled or already in work */
1031 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1032 &q->u.in.queue_irq_state)) {
1033 qperf_inc(q, int_discarded);
1034 continue;
1035 }
1036 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
1037 q->irq_ptr->int_parm);
1038 } else {
1039 tasklet_schedule(&q->tasklet);
1040 }
1041 }
1042
1043 if (!pci_out_supported(q))
1044 return;
1045
1046 for_each_output_queue(irq_ptr, q, i) {
1047 if (qdio_outbound_q_done(q))
1048 continue;
1049 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
1050 qdio_siga_sync_q(q);
1051 tasklet_schedule(&q->tasklet);
1052 }
1053}
1054
1055static void qdio_handle_activate_check(struct ccw_device *cdev,
1056 unsigned long intparm, int cstat, int dstat)
1057{
1058 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1059 struct qdio_q *q;
1060 int count;
1061
1062 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
1063 DBF_ERROR("intp :%lx", intparm);
1064 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1065
1066 if (irq_ptr->nr_input_qs) {
1067 q = irq_ptr->input_qs[0];
1068 } else if (irq_ptr->nr_output_qs) {
1069 q = irq_ptr->output_qs[0];
1070 } else {
1071 dump_stack();
1072 goto no_handler;
1073 }
1074
1075 count = sub_buf(q->first_to_check, q->first_to_kick);
1076 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1077 q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1078no_handler:
1079 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1080 /*
1081 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
1082 * Therefore we call the LGR detection function here.
1083 */
1084 lgr_info_log();
1085}
1086
1087static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1088 int dstat)
1089{
1090 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1091
1092 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1093
1094 if (cstat)
1095 goto error;
1096 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1097 goto error;
1098 if (!(dstat & DEV_STAT_DEV_END))
1099 goto error;
1100 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1101 return;
1102
1103error:
1104 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1105 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1106 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1107}
1108
1109/* qdio interrupt handler */
1110void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1111 struct irb *irb)
1112{
1113 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1114 int cstat, dstat;
1115
1116 if (!intparm || !irq_ptr) {
1117 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
1118 return;
1119 }
1120
1121 if (irq_ptr->perf_stat_enabled)
1122 irq_ptr->perf_stat.qdio_int++;
1123
1124 if (IS_ERR(irb)) {
1125 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1126 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1127 wake_up(&cdev->private->wait_q);
1128 return;
1129 }
1130 qdio_irq_check_sense(irq_ptr, irb);
1131 cstat = irb->scsw.cmd.cstat;
1132 dstat = irb->scsw.cmd.dstat;
1133
1134 switch (irq_ptr->state) {
1135 case QDIO_IRQ_STATE_INACTIVE:
1136 qdio_establish_handle_irq(cdev, cstat, dstat);
1137 break;
1138 case QDIO_IRQ_STATE_CLEANUP:
1139 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1140 break;
1141 case QDIO_IRQ_STATE_ESTABLISHED:
1142 case QDIO_IRQ_STATE_ACTIVE:
1143 if (cstat & SCHN_STAT_PCI) {
1144 qdio_int_handler_pci(irq_ptr);
1145 return;
1146 }
1147 if (cstat || dstat)
1148 qdio_handle_activate_check(cdev, intparm, cstat,
1149 dstat);
1150 break;
1151 case QDIO_IRQ_STATE_STOPPED:
1152 break;
1153 default:
1154 WARN_ON_ONCE(1);
1155 }
1156 wake_up(&cdev->private->wait_q);
1157}
1158
1159/**
1160 * qdio_get_ssqd_desc - get qdio subchannel description
1161 * @cdev: ccw device to get description for
1162 * @data: where to store the ssqd
1163 *
1164 * Returns 0 or an error code. The results of the chsc are stored in the
1165 * specified structure.
1166 */
1167int qdio_get_ssqd_desc(struct ccw_device *cdev,
1168 struct qdio_ssqd_desc *data)
1169{
1170
1171 if (!cdev || !cdev->private)
1172 return -EINVAL;
1173
1174 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
1175 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
1176}
1177EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1178
1179static void qdio_shutdown_queues(struct ccw_device *cdev)
1180{
1181 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1182 struct qdio_q *q;
1183 int i;
1184
1185 for_each_input_queue(irq_ptr, q, i)
1186 tasklet_kill(&q->tasklet);
1187
1188 for_each_output_queue(irq_ptr, q, i) {
1189 del_timer(&q->u.out.timer);
1190 tasklet_kill(&q->tasklet);
1191 }
1192}
1193
1194/**
1195 * qdio_shutdown - shut down a qdio subchannel
1196 * @cdev: associated ccw device
1197 * @how: use halt or clear to shutdown
1198 */
1199int qdio_shutdown(struct ccw_device *cdev, int how)
1200{
1201 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1202 int rc;
1203 unsigned long flags;
1204
1205 if (!irq_ptr)
1206 return -ENODEV;
1207
1208 WARN_ON_ONCE(irqs_disabled());
1209 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
1210
1211 mutex_lock(&irq_ptr->setup_mutex);
1212 /*
1213 * Subchannel was already shot down. We cannot prevent being called
1214 * twice since cio may trigger a shutdown asynchronously.
1215 */
1216 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1217 mutex_unlock(&irq_ptr->setup_mutex);
1218 return 0;
1219 }
1220
1221 /*
1222 * Indicate that the device is going down. Scheduling the queue
1223 * tasklets is forbidden from here on.
1224 */
1225 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1226
1227 tiqdio_remove_input_queues(irq_ptr);
1228 qdio_shutdown_queues(cdev);
1229 qdio_shutdown_debug_entries(irq_ptr);
1230
1231 /* cleanup subchannel */
1232 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1233
1234 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1235 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1236 else
1237 /* default behaviour is halt */
1238 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1239 if (rc) {
1240 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1241 DBF_ERROR("rc:%4d", rc);
1242 goto no_cleanup;
1243 }
1244
1245 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1246 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1247 wait_event_interruptible_timeout(cdev->private->wait_q,
1248 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1249 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1250 10 * HZ);
1251 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1252
1253no_cleanup:
1254 qdio_shutdown_thinint(irq_ptr);
1255
1256 /* restore interrupt handler */
1257 if ((void *)cdev->handler == (void *)qdio_int_handler)
1258 cdev->handler = irq_ptr->orig_handler;
1259 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1260
1261 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1262 mutex_unlock(&irq_ptr->setup_mutex);
1263 if (rc)
1264 return rc;
1265 return 0;
1266}
1267EXPORT_SYMBOL_GPL(qdio_shutdown);
1268
1269/**
1270 * qdio_free - free data structures for a qdio subchannel
1271 * @cdev: associated ccw device
1272 */
1273int qdio_free(struct ccw_device *cdev)
1274{
1275 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1276
1277 if (!irq_ptr)
1278 return -ENODEV;
1279
1280 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
1281 mutex_lock(&irq_ptr->setup_mutex);
1282
1283 if (irq_ptr->debug_area != NULL) {
1284 debug_unregister(irq_ptr->debug_area);
1285 irq_ptr->debug_area = NULL;
1286 }
1287 cdev->private->qdio_data = NULL;
1288 mutex_unlock(&irq_ptr->setup_mutex);
1289
1290 qdio_release_memory(irq_ptr);
1291 return 0;
1292}
1293EXPORT_SYMBOL_GPL(qdio_free);
1294
1295/**
1296 * qdio_allocate - allocate qdio queues and associated data
1297 * @init_data: initialization data
1298 */
1299int qdio_allocate(struct qdio_initialize *init_data)
1300{
1301 struct qdio_irq *irq_ptr;
1302
1303 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
1304
1305 if ((init_data->no_input_qs && !init_data->input_handler) ||
1306 (init_data->no_output_qs && !init_data->output_handler))
1307 return -EINVAL;
1308
1309 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1310 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1311 return -EINVAL;
1312
1313 if ((!init_data->input_sbal_addr_array) ||
1314 (!init_data->output_sbal_addr_array))
1315 return -EINVAL;
1316
1317 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1318 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1319 if (!irq_ptr)
1320 goto out_err;
1321
1322 mutex_init(&irq_ptr->setup_mutex);
1323 qdio_allocate_dbf(init_data, irq_ptr);
1324
1325 /*
1326 * Allocate a page for the chsc calls in qdio_establish.
1327 * Must be pre-allocated since a zfcp recovery will call
1328 * qdio_establish. In case of low memory and swap on a zfcp disk
1329 * we may not be able to allocate memory otherwise.
1330 */
1331 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1332 if (!irq_ptr->chsc_page)
1333 goto out_rel;
1334
1335 /* qdr is used in ccw1.cda which is u32 */
1336 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1337 if (!irq_ptr->qdr)
1338 goto out_rel;
1339
1340 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1341 init_data->no_output_qs))
1342 goto out_rel;
1343
1344 init_data->cdev->private->qdio_data = irq_ptr;
1345 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1346 return 0;
1347out_rel:
1348 qdio_release_memory(irq_ptr);
1349out_err:
1350 return -ENOMEM;
1351}
1352EXPORT_SYMBOL_GPL(qdio_allocate);
1353
1354static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1355{
1356 struct qdio_q *q = irq_ptr->input_qs[0];
1357 int i, use_cq = 0;
1358
1359 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1360 use_cq = 1;
1361
1362 for_each_output_queue(irq_ptr, q, i) {
1363 if (use_cq) {
1364 if (qdio_enable_async_operation(&q->u.out) < 0) {
1365 use_cq = 0;
1366 continue;
1367 }
1368 } else
1369 qdio_disable_async_operation(&q->u.out);
1370 }
1371 DBF_EVENT("use_cq:%d", use_cq);
1372}
1373
1374/**
1375 * qdio_establish - establish queues on a qdio subchannel
1376 * @init_data: initialization data
1377 */
1378int qdio_establish(struct qdio_initialize *init_data)
1379{
1380 struct qdio_irq *irq_ptr;
1381 struct ccw_device *cdev = init_data->cdev;
1382 unsigned long saveflags;
1383 int rc;
1384
1385 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
1386
1387 irq_ptr = cdev->private->qdio_data;
1388 if (!irq_ptr)
1389 return -ENODEV;
1390
1391 if (cdev->private->state != DEV_STATE_ONLINE)
1392 return -EINVAL;
1393
1394 mutex_lock(&irq_ptr->setup_mutex);
1395 qdio_setup_irq(init_data);
1396
1397 rc = qdio_establish_thinint(irq_ptr);
1398 if (rc) {
1399 mutex_unlock(&irq_ptr->setup_mutex);
1400 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1401 return rc;
1402 }
1403
1404 /* establish q */
1405 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1406 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1407 irq_ptr->ccw.count = irq_ptr->equeue.count;
1408 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1409
1410 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1411 ccw_device_set_options_mask(cdev, 0);
1412
1413 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1414 if (rc) {
1415 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1416 DBF_ERROR("rc:%4x", rc);
1417 }
1418 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1419
1420 if (rc) {
1421 mutex_unlock(&irq_ptr->setup_mutex);
1422 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1423 return rc;
1424 }
1425
1426 wait_event_interruptible_timeout(cdev->private->wait_q,
1427 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1428 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1429
1430 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1431 mutex_unlock(&irq_ptr->setup_mutex);
1432 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1433 return -EIO;
1434 }
1435
1436 qdio_setup_ssqd_info(irq_ptr);
1437
1438 qdio_detect_hsicq(irq_ptr);
1439
1440 /* qebsm is now setup if available, initialize buffer states */
1441 qdio_init_buf_states(irq_ptr);
1442
1443 mutex_unlock(&irq_ptr->setup_mutex);
1444 qdio_print_subchannel_info(irq_ptr, cdev);
1445 qdio_setup_debug_entries(irq_ptr, cdev);
1446 return 0;
1447}
1448EXPORT_SYMBOL_GPL(qdio_establish);
1449
1450/**
1451 * qdio_activate - activate queues on a qdio subchannel
1452 * @cdev: associated cdev
1453 */
1454int qdio_activate(struct ccw_device *cdev)
1455{
1456 struct qdio_irq *irq_ptr;
1457 int rc;
1458 unsigned long saveflags;
1459
1460 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
1461
1462 irq_ptr = cdev->private->qdio_data;
1463 if (!irq_ptr)
1464 return -ENODEV;
1465
1466 if (cdev->private->state != DEV_STATE_ONLINE)
1467 return -EINVAL;
1468
1469 mutex_lock(&irq_ptr->setup_mutex);
1470 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1471 rc = -EBUSY;
1472 goto out;
1473 }
1474
1475 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1476 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1477 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1478 irq_ptr->ccw.cda = 0;
1479
1480 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1481 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1482
1483 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1484 0, DOIO_DENY_PREFETCH);
1485 if (rc) {
1486 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1487 DBF_ERROR("rc:%4x", rc);
1488 }
1489 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1490
1491 if (rc)
1492 goto out;
1493
1494 if (is_thinint_irq(irq_ptr))
1495 tiqdio_add_input_queues(irq_ptr);
1496
1497 /* wait for subchannel to become active */
1498 msleep(5);
1499
1500 switch (irq_ptr->state) {
1501 case QDIO_IRQ_STATE_STOPPED:
1502 case QDIO_IRQ_STATE_ERR:
1503 rc = -EIO;
1504 break;
1505 default:
1506 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1507 rc = 0;
1508 }
1509out:
1510 mutex_unlock(&irq_ptr->setup_mutex);
1511 return rc;
1512}
1513EXPORT_SYMBOL_GPL(qdio_activate);
1514
1515static inline int buf_in_between(int bufnr, int start, int count)
1516{
1517 int end = add_buf(start, count);
1518
1519 if (end > start) {
1520 if (bufnr >= start && bufnr < end)
1521 return 1;
1522 else
1523 return 0;
1524 }
1525
1526 /* wrap-around case */
1527 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1528 (bufnr < end))
1529 return 1;
1530 else
1531 return 0;
1532}
1533
1534/**
1535 * handle_inbound - reset processed input buffers
1536 * @q: queue containing the buffers
1537 * @callflags: flags
1538 * @bufnr: first buffer to process
1539 * @count: how many buffers are emptied
1540 */
1541static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1542 int bufnr, int count)
1543{
1544 int used, diff;
1545
1546 qperf_inc(q, inbound_call);
1547
1548 if (!q->u.in.polling)
1549 goto set;
1550
1551 /* protect against stop polling setting an ACK for an emptied slsb */
1552 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1553 /* overwriting everything, just delete polling status */
1554 q->u.in.polling = 0;
1555 q->u.in.ack_count = 0;
1556 goto set;
1557 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1558 if (is_qebsm(q)) {
1559 /* partial overwrite, just update ack_start */
1560 diff = add_buf(bufnr, count);
1561 diff = sub_buf(diff, q->u.in.ack_start);
1562 q->u.in.ack_count -= diff;
1563 if (q->u.in.ack_count <= 0) {
1564 q->u.in.polling = 0;
1565 q->u.in.ack_count = 0;
1566 goto set;
1567 }
1568 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1569 }
1570 else
1571 /* the only ACK will be deleted, so stop polling */
1572 q->u.in.polling = 0;
1573 }
1574
1575set:
1576 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1577 used = atomic_add_return(count, &q->nr_buf_used) - count;
1578
1579 if (need_siga_in(q))
1580 return qdio_siga_input(q);
1581
1582 return 0;
1583}
1584
1585/**
1586 * handle_outbound - process filled outbound buffers
1587 * @q: queue containing the buffers
1588 * @callflags: flags
1589 * @bufnr: first buffer to process
1590 * @count: how many buffers are filled
1591 */
1592static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1593 int bufnr, int count)
1594{
1595 unsigned char state = 0;
1596 int used, rc = 0;
1597
1598 qperf_inc(q, outbound_call);
1599
1600 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1601 used = atomic_add_return(count, &q->nr_buf_used);
1602
1603 if (used == QDIO_MAX_BUFFERS_PER_Q)
1604 qperf_inc(q, outbound_queue_full);
1605
1606 if (callflags & QDIO_FLAG_PCI_OUT) {
1607 q->u.out.pci_out_enabled = 1;
1608 qperf_inc(q, pci_request_int);
1609 } else
1610 q->u.out.pci_out_enabled = 0;
1611
1612 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1613 unsigned long phys_aob = 0;
1614
1615 /* One SIGA-W per buffer required for unicast HSI */
1616 WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1617
1618 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1619
1620 rc = qdio_kick_outbound_q(q, phys_aob);
1621 } else if (need_siga_sync(q)) {
1622 rc = qdio_siga_sync_q(q);
1623 } else {
1624 /* try to fast requeue buffers */
1625 get_buf_state(q, prev_buf(bufnr), &state, 0);
1626 if (state != SLSB_CU_OUTPUT_PRIMED)
1627 rc = qdio_kick_outbound_q(q, 0);
1628 else
1629 qperf_inc(q, fast_requeue);
1630 }
1631
1632 /* in case of SIGA errors we must process the error immediately */
1633 if (used >= q->u.out.scan_threshold || rc)
1634 tasklet_schedule(&q->tasklet);
1635 else
1636 /* free the SBALs in case of no further traffic */
1637 if (!timer_pending(&q->u.out.timer))
1638 mod_timer(&q->u.out.timer, jiffies + HZ);
1639 return rc;
1640}
1641
1642/**
1643 * do_QDIO - process input or output buffers
1644 * @cdev: associated ccw_device for the qdio subchannel
1645 * @callflags: input or output and special flags from the program
1646 * @q_nr: queue number
1647 * @bufnr: buffer number
1648 * @count: how many buffers to process
1649 */
1650int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1651 int q_nr, unsigned int bufnr, unsigned int count)
1652{
1653 struct qdio_irq *irq_ptr;
1654
1655 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1656 return -EINVAL;
1657
1658 irq_ptr = cdev->private->qdio_data;
1659 if (!irq_ptr)
1660 return -ENODEV;
1661
1662 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1663 "do%02x b:%02x c:%02x", callflags, bufnr, count);
1664
1665 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1666 return -EIO;
1667 if (!count)
1668 return 0;
1669 if (callflags & QDIO_FLAG_SYNC_INPUT)
1670 return handle_inbound(irq_ptr->input_qs[q_nr],
1671 callflags, bufnr, count);
1672 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1673 return handle_outbound(irq_ptr->output_qs[q_nr],
1674 callflags, bufnr, count);
1675 return -EINVAL;
1676}
1677EXPORT_SYMBOL_GPL(do_QDIO);
1678
1679/**
1680 * qdio_start_irq - process input buffers
1681 * @cdev: associated ccw_device for the qdio subchannel
1682 * @nr: input queue number
1683 *
1684 * Return codes
1685 * 0 - success
1686 * 1 - irqs not started since new data is available
1687 */
1688int qdio_start_irq(struct ccw_device *cdev, int nr)
1689{
1690 struct qdio_q *q;
1691 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1692
1693 if (!irq_ptr)
1694 return -ENODEV;
1695 q = irq_ptr->input_qs[nr];
1696
1697 clear_nonshared_ind(irq_ptr);
1698 qdio_stop_polling(q);
1699 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1700
1701 /*
1702 * We need to check again to not lose initiative after
1703 * resetting the ACK state.
1704 */
1705 if (test_nonshared_ind(irq_ptr))
1706 goto rescan;
1707 if (!qdio_inbound_q_done(q))
1708 goto rescan;
1709 return 0;
1710
1711rescan:
1712 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1713 &q->u.in.queue_irq_state))
1714 return 0;
1715 else
1716 return 1;
1717
1718}
1719EXPORT_SYMBOL(qdio_start_irq);
1720
1721/**
1722 * qdio_get_next_buffers - process input buffers
1723 * @cdev: associated ccw_device for the qdio subchannel
1724 * @nr: input queue number
1725 * @bufnr: first filled buffer number
1726 * @error: buffers are in error state
1727 *
1728 * Return codes
1729 * < 0 - error
1730 * = 0 - no new buffers found
1731 * > 0 - number of processed buffers
1732 */
1733int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1734 int *error)
1735{
1736 struct qdio_q *q;
1737 int start, end;
1738 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1739
1740 if (!irq_ptr)
1741 return -ENODEV;
1742 q = irq_ptr->input_qs[nr];
1743
1744 /*
1745 * Cannot rely on automatic sync after interrupt since queues may
1746 * also be examined without interrupt.
1747 */
1748 if (need_siga_sync(q))
1749 qdio_sync_queues(q);
1750
1751 /* check the PCI capable outbound queues. */
1752 qdio_check_outbound_after_thinint(q);
1753
1754 if (!qdio_inbound_q_moved(q))
1755 return 0;
1756
1757 /* Note: upper-layer MUST stop processing immediately here ... */
1758 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1759 return -EIO;
1760
1761 start = q->first_to_kick;
1762 end = q->first_to_check;
1763 *bufnr = start;
1764 *error = q->qdio_error;
1765
1766 /* for the next time */
1767 q->first_to_kick = end;
1768 q->qdio_error = 0;
1769 return sub_buf(end, start);
1770}
1771EXPORT_SYMBOL(qdio_get_next_buffers);
1772
1773/**
1774 * qdio_stop_irq - disable interrupt processing for the device
1775 * @cdev: associated ccw_device for the qdio subchannel
1776 * @nr: input queue number
1777 *
1778 * Return codes
1779 * 0 - interrupts were already disabled
1780 * 1 - interrupts successfully disabled
1781 */
1782int qdio_stop_irq(struct ccw_device *cdev, int nr)
1783{
1784 struct qdio_q *q;
1785 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1786
1787 if (!irq_ptr)
1788 return -ENODEV;
1789 q = irq_ptr->input_qs[nr];
1790
1791 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1792 &q->u.in.queue_irq_state))
1793 return 0;
1794 else
1795 return 1;
1796}
1797EXPORT_SYMBOL(qdio_stop_irq);
1798
1799static int __init init_QDIO(void)
1800{
1801 int rc;
1802
1803 rc = qdio_debug_init();
1804 if (rc)
1805 return rc;
1806 rc = qdio_setup_init();
1807 if (rc)
1808 goto out_debug;
1809 rc = tiqdio_allocate_memory();
1810 if (rc)
1811 goto out_cache;
1812 rc = tiqdio_register_thinints();
1813 if (rc)
1814 goto out_ti;
1815 return 0;
1816
1817out_ti:
1818 tiqdio_free_memory();
1819out_cache:
1820 qdio_setup_exit();
1821out_debug:
1822 qdio_debug_exit();
1823 return rc;
1824}
1825
1826static void __exit exit_QDIO(void)
1827{
1828 tiqdio_unregister_thinints();
1829 tiqdio_free_memory();
1830 qdio_setup_exit();
1831 qdio_debug_exit();
1832}
1833
1834module_init(init_QDIO);
1835module_exit(exit_QDIO);
kernel source for telekom puls (alcatel/mediatek)