| 1 | /* |
| 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
| 3 | * |
| 4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> |
| 5 | * Copyright (C) 2006 Tower Technologies |
| 6 | * Copyright (C) 2008 Paul Mundt |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/i2c.h> |
| 14 | #include <linux/rtc.h> |
| 15 | #include <linux/bcd.h> |
| 16 | |
| 17 | #define DRV_VERSION "0.6" |
| 18 | |
| 19 | |
| 20 | /* |
| 21 | * Ricoh has a family of I2C based RTCs, which differ only slightly from |
| 22 | * each other. Differences center on pinout (e.g. how many interrupts, |
| 23 | * output clock, etc) and how the control registers are used. The '372 |
| 24 | * is significant only because that's the one this driver first supported. |
| 25 | */ |
| 26 | #define RS5C372_REG_SECS 0 |
| 27 | #define RS5C372_REG_MINS 1 |
| 28 | #define RS5C372_REG_HOURS 2 |
| 29 | #define RS5C372_REG_WDAY 3 |
| 30 | #define RS5C372_REG_DAY 4 |
| 31 | #define RS5C372_REG_MONTH 5 |
| 32 | #define RS5C372_REG_YEAR 6 |
| 33 | #define RS5C372_REG_TRIM 7 |
| 34 | # define RS5C372_TRIM_XSL 0x80 |
| 35 | # define RS5C372_TRIM_MASK 0x7F |
| 36 | |
| 37 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ |
| 38 | #define RS5C_REG_ALARM_A_HOURS 9 |
| 39 | #define RS5C_REG_ALARM_A_WDAY 10 |
| 40 | |
| 41 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ |
| 42 | #define RS5C_REG_ALARM_B_HOURS 12 |
| 43 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ |
| 44 | |
| 45 | #define RS5C_REG_CTRL1 14 |
| 46 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ |
| 47 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ |
| 48 | # define RV5C387_CTRL1_24 (1 << 5) |
| 49 | # define RS5C372A_CTRL1_SL1 (1 << 5) |
| 50 | # define RS5C_CTRL1_CT_MASK (7 << 0) |
| 51 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ |
| 52 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ |
| 53 | #define RS5C_REG_CTRL2 15 |
| 54 | # define RS5C372_CTRL2_24 (1 << 5) |
| 55 | # define R2025_CTRL2_XST (1 << 5) |
| 56 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ |
| 57 | # define RS5C_CTRL2_CTFG (1 << 2) |
| 58 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ |
| 59 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ |
| 60 | |
| 61 | |
| 62 | /* to read (style 1) or write registers starting at R */ |
| 63 | #define RS5C_ADDR(R) (((R) << 4) | 0) |
| 64 | |
| 65 | |
| 66 | enum rtc_type { |
| 67 | rtc_undef = 0, |
| 68 | rtc_r2025sd, |
| 69 | rtc_rs5c372a, |
| 70 | rtc_rs5c372b, |
| 71 | rtc_rv5c386, |
| 72 | rtc_rv5c387a, |
| 73 | }; |
| 74 | |
| 75 | static const struct i2c_device_id rs5c372_id[] = { |
| 76 | { "r2025sd", rtc_r2025sd }, |
| 77 | { "rs5c372a", rtc_rs5c372a }, |
| 78 | { "rs5c372b", rtc_rs5c372b }, |
| 79 | { "rv5c386", rtc_rv5c386 }, |
| 80 | { "rv5c387a", rtc_rv5c387a }, |
| 81 | { } |
| 82 | }; |
| 83 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); |
| 84 | |
| 85 | /* REVISIT: this assumes that: |
| 86 | * - we're in the 21st century, so it's safe to ignore the century |
| 87 | * bit for rv5c38[67] (REG_MONTH bit 7); |
| 88 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) |
| 89 | */ |
| 90 | struct rs5c372 { |
| 91 | struct i2c_client *client; |
| 92 | struct rtc_device *rtc; |
| 93 | enum rtc_type type; |
| 94 | unsigned time24:1; |
| 95 | unsigned has_irq:1; |
| 96 | unsigned smbus:1; |
| 97 | char buf[17]; |
| 98 | char *regs; |
| 99 | }; |
| 100 | |
| 101 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
| 102 | { |
| 103 | struct i2c_client *client = rs5c->client; |
| 104 | struct i2c_msg msgs[] = { |
| 105 | { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf }, |
| 106 | }; |
| 107 | |
| 108 | /* This implements the third reading method from the datasheet, using |
| 109 | * an internal address that's reset after each transaction (by STOP) |
| 110 | * to 0x0f ... so we read extra registers, and skip the first one. |
| 111 | * |
| 112 | * The first method doesn't work with the iop3xx adapter driver, on at |
| 113 | * least 80219 chips; this works around that bug. |
| 114 | * |
| 115 | * The third method on the other hand doesn't work for the SMBus-only |
| 116 | * configurations, so we use the the first method there, stripping off |
| 117 | * the extra register in the process. |
| 118 | */ |
| 119 | if (rs5c->smbus) { |
| 120 | int addr = RS5C_ADDR(RS5C372_REG_SECS); |
| 121 | int size = sizeof(rs5c->buf) - 1; |
| 122 | |
| 123 | if (i2c_smbus_read_i2c_block_data(client, addr, size, |
| 124 | rs5c->buf + 1) != size) { |
| 125 | dev_warn(&client->dev, "can't read registers\n"); |
| 126 | return -EIO; |
| 127 | } |
| 128 | } else { |
| 129 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { |
| 130 | dev_warn(&client->dev, "can't read registers\n"); |
| 131 | return -EIO; |
| 132 | } |
| 133 | } |
| 134 | |
| 135 | dev_dbg(&client->dev, |
| 136 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " |
| 137 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", |
| 138 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], |
| 139 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], |
| 140 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], |
| 141 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
| 147 | { |
| 148 | unsigned hour; |
| 149 | |
| 150 | if (rs5c->time24) |
| 151 | return bcd2bin(reg & 0x3f); |
| 152 | |
| 153 | hour = bcd2bin(reg & 0x1f); |
| 154 | if (hour == 12) |
| 155 | hour = 0; |
| 156 | if (reg & 0x20) |
| 157 | hour += 12; |
| 158 | return hour; |
| 159 | } |
| 160 | |
| 161 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) |
| 162 | { |
| 163 | if (rs5c->time24) |
| 164 | return bin2bcd(hour); |
| 165 | |
| 166 | if (hour > 12) |
| 167 | return 0x20 | bin2bcd(hour - 12); |
| 168 | if (hour == 12) |
| 169 | return 0x20 | bin2bcd(12); |
| 170 | if (hour == 0) |
| 171 | return bin2bcd(12); |
| 172 | return bin2bcd(hour); |
| 173 | } |
| 174 | |
| 175 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
| 176 | { |
| 177 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 178 | int status = rs5c_get_regs(rs5c); |
| 179 | |
| 180 | if (status < 0) |
| 181 | return status; |
| 182 | |
| 183 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
| 184 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); |
| 185 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
| 186 | |
| 187 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
| 188 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); |
| 189 | |
| 190 | /* tm->tm_mon is zero-based */ |
| 191 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
| 192 | |
| 193 | /* year is 1900 + tm->tm_year */ |
| 194 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
| 195 | |
| 196 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
| 197 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 198 | __func__, |
| 199 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 200 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 201 | |
| 202 | /* rtc might need initialization */ |
| 203 | return rtc_valid_tm(tm); |
| 204 | } |
| 205 | |
| 206 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) |
| 207 | { |
| 208 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 209 | unsigned char buf[8]; |
| 210 | int addr; |
| 211 | |
| 212 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
| 213 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 214 | __func__, |
| 215 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 216 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 217 | |
| 218 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
| 219 | buf[0] = bin2bcd(tm->tm_sec); |
| 220 | buf[1] = bin2bcd(tm->tm_min); |
| 221 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
| 222 | buf[3] = bin2bcd(tm->tm_wday); |
| 223 | buf[4] = bin2bcd(tm->tm_mday); |
| 224 | buf[5] = bin2bcd(tm->tm_mon + 1); |
| 225 | buf[6] = bin2bcd(tm->tm_year - 100); |
| 226 | |
| 227 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
| 228 | dev_err(&client->dev, "%s: write error\n", __func__); |
| 229 | return -EIO; |
| 230 | } |
| 231 | |
| 232 | return 0; |
| 233 | } |
| 234 | |
| 235 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
| 236 | #define NEED_TRIM |
| 237 | #endif |
| 238 | |
| 239 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
| 240 | #define NEED_TRIM |
| 241 | #endif |
| 242 | |
| 243 | #ifdef NEED_TRIM |
| 244 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
| 245 | { |
| 246 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
| 247 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
| 248 | |
| 249 | if (osc) |
| 250 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
| 251 | |
| 252 | if (trim) { |
| 253 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
| 254 | tmp &= RS5C372_TRIM_MASK; |
| 255 | if (tmp & 0x3e) { |
| 256 | int t = tmp & 0x3f; |
| 257 | |
| 258 | if (tmp & 0x40) |
| 259 | t = (~t | (s8)0xc0) + 1; |
| 260 | else |
| 261 | t = t - 1; |
| 262 | |
| 263 | tmp = t * 2; |
| 264 | } else |
| 265 | tmp = 0; |
| 266 | *trim = tmp; |
| 267 | } |
| 268 | |
| 269 | return 0; |
| 270 | } |
| 271 | #endif |
| 272 | |
| 273 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 274 | { |
| 275 | return rs5c372_get_datetime(to_i2c_client(dev), tm); |
| 276 | } |
| 277 | |
| 278 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 279 | { |
| 280 | return rs5c372_set_datetime(to_i2c_client(dev), tm); |
| 281 | } |
| 282 | |
| 283 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
| 284 | |
| 285 | static int |
| 286 | rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
| 287 | { |
| 288 | struct i2c_client *client = to_i2c_client(dev); |
| 289 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 290 | unsigned char buf; |
| 291 | int status, addr; |
| 292 | |
| 293 | buf = rs5c->regs[RS5C_REG_CTRL1]; |
| 294 | switch (cmd) { |
| 295 | case RTC_UIE_OFF: |
| 296 | case RTC_UIE_ON: |
| 297 | /* some 327a modes use a different IRQ pin for 1Hz irqs */ |
| 298 | if (rs5c->type == rtc_rs5c372a |
| 299 | && (buf & RS5C372A_CTRL1_SL1)) |
| 300 | return -ENOIOCTLCMD; |
| 301 | case RTC_AIE_OFF: |
| 302 | case RTC_AIE_ON: |
| 303 | /* these irq management calls only make sense for chips |
| 304 | * which are wired up to an IRQ. |
| 305 | */ |
| 306 | if (!rs5c->has_irq) |
| 307 | return -ENOIOCTLCMD; |
| 308 | break; |
| 309 | default: |
| 310 | return -ENOIOCTLCMD; |
| 311 | } |
| 312 | |
| 313 | status = rs5c_get_regs(rs5c); |
| 314 | if (status < 0) |
| 315 | return status; |
| 316 | |
| 317 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 318 | switch (cmd) { |
| 319 | case RTC_AIE_OFF: /* alarm off */ |
| 320 | buf &= ~RS5C_CTRL1_AALE; |
| 321 | break; |
| 322 | case RTC_AIE_ON: /* alarm on */ |
| 323 | buf |= RS5C_CTRL1_AALE; |
| 324 | break; |
| 325 | case RTC_UIE_OFF: /* update off */ |
| 326 | buf &= ~RS5C_CTRL1_CT_MASK; |
| 327 | break; |
| 328 | case RTC_UIE_ON: /* update on */ |
| 329 | buf &= ~RS5C_CTRL1_CT_MASK; |
| 330 | buf |= RS5C_CTRL1_CT4; |
| 331 | break; |
| 332 | } |
| 333 | |
| 334 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { |
| 335 | printk(KERN_WARNING "%s: can't update alarm\n", |
| 336 | rs5c->rtc->name); |
| 337 | status = -EIO; |
| 338 | } else |
| 339 | rs5c->regs[RS5C_REG_CTRL1] = buf; |
| 340 | |
| 341 | return status; |
| 342 | } |
| 343 | |
| 344 | #else |
| 345 | #define rs5c_rtc_ioctl NULL |
| 346 | #endif |
| 347 | |
| 348 | |
| 349 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
| 350 | * which only exposes a polled programming interface; and since |
| 351 | * these calls map directly to those EFI requests; we don't demand |
| 352 | * we have an IRQ for this chip when we go through this API. |
| 353 | * |
| 354 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs |
| 355 | * though, managed through RTC_AIE_{ON,OFF} requests. |
| 356 | */ |
| 357 | |
| 358 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 359 | { |
| 360 | struct i2c_client *client = to_i2c_client(dev); |
| 361 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 362 | int status; |
| 363 | |
| 364 | status = rs5c_get_regs(rs5c); |
| 365 | if (status < 0) |
| 366 | return status; |
| 367 | |
| 368 | /* report alarm time */ |
| 369 | t->time.tm_sec = 0; |
| 370 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
| 371 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
| 372 | t->time.tm_mday = -1; |
| 373 | t->time.tm_mon = -1; |
| 374 | t->time.tm_year = -1; |
| 375 | t->time.tm_wday = -1; |
| 376 | t->time.tm_yday = -1; |
| 377 | t->time.tm_isdst = -1; |
| 378 | |
| 379 | /* ... and status */ |
| 380 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); |
| 381 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); |
| 382 | |
| 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 387 | { |
| 388 | struct i2c_client *client = to_i2c_client(dev); |
| 389 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 390 | int status, addr, i; |
| 391 | unsigned char buf[3]; |
| 392 | |
| 393 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ |
| 394 | if (t->time.tm_mday != -1 |
| 395 | || t->time.tm_mon != -1 |
| 396 | || t->time.tm_year != -1) |
| 397 | return -EINVAL; |
| 398 | |
| 399 | /* REVISIT: round up tm_sec */ |
| 400 | |
| 401 | /* if needed, disable irq (clears pending status) */ |
| 402 | status = rs5c_get_regs(rs5c); |
| 403 | if (status < 0) |
| 404 | return status; |
| 405 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { |
| 406 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 407 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; |
| 408 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { |
| 409 | pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); |
| 410 | return -EIO; |
| 411 | } |
| 412 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
| 413 | } |
| 414 | |
| 415 | /* set alarm */ |
| 416 | buf[0] = bin2bcd(t->time.tm_min); |
| 417 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
| 418 | buf[2] = 0x7f; /* any/all days */ |
| 419 | |
| 420 | for (i = 0; i < sizeof(buf); i++) { |
| 421 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); |
| 422 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { |
| 423 | pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); |
| 424 | return -EIO; |
| 425 | } |
| 426 | } |
| 427 | |
| 428 | /* ... and maybe enable its irq */ |
| 429 | if (t->enabled) { |
| 430 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 431 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; |
| 432 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) |
| 433 | printk(KERN_WARNING "%s: can't enable alarm\n", |
| 434 | rs5c->rtc->name); |
| 435 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
| 436 | } |
| 437 | |
| 438 | return 0; |
| 439 | } |
| 440 | |
| 441 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
| 442 | |
| 443 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
| 444 | { |
| 445 | int err, osc, trim; |
| 446 | |
| 447 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
| 448 | if (err == 0) { |
| 449 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
| 450 | osc / 1000, osc % 1000); |
| 451 | seq_printf(seq, "trim\t\t: %d\n", trim); |
| 452 | } |
| 453 | |
| 454 | return 0; |
| 455 | } |
| 456 | |
| 457 | #else |
| 458 | #define rs5c372_rtc_proc NULL |
| 459 | #endif |
| 460 | |
| 461 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
| 462 | .proc = rs5c372_rtc_proc, |
| 463 | .ioctl = rs5c_rtc_ioctl, |
| 464 | .read_time = rs5c372_rtc_read_time, |
| 465 | .set_time = rs5c372_rtc_set_time, |
| 466 | .read_alarm = rs5c_read_alarm, |
| 467 | .set_alarm = rs5c_set_alarm, |
| 468 | }; |
| 469 | |
| 470 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
| 471 | |
| 472 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
| 473 | struct device_attribute *attr, char *buf) |
| 474 | { |
| 475 | int err, trim; |
| 476 | |
| 477 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
| 478 | if (err) |
| 479 | return err; |
| 480 | |
| 481 | return sprintf(buf, "%d\n", trim); |
| 482 | } |
| 483 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); |
| 484 | |
| 485 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, |
| 486 | struct device_attribute *attr, char *buf) |
| 487 | { |
| 488 | int err, osc; |
| 489 | |
| 490 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
| 491 | if (err) |
| 492 | return err; |
| 493 | |
| 494 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
| 495 | } |
| 496 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); |
| 497 | |
| 498 | static int rs5c_sysfs_register(struct device *dev) |
| 499 | { |
| 500 | int err; |
| 501 | |
| 502 | err = device_create_file(dev, &dev_attr_trim); |
| 503 | if (err) |
| 504 | return err; |
| 505 | err = device_create_file(dev, &dev_attr_osc); |
| 506 | if (err) |
| 507 | device_remove_file(dev, &dev_attr_trim); |
| 508 | |
| 509 | return err; |
| 510 | } |
| 511 | |
| 512 | static void rs5c_sysfs_unregister(struct device *dev) |
| 513 | { |
| 514 | device_remove_file(dev, &dev_attr_trim); |
| 515 | device_remove_file(dev, &dev_attr_osc); |
| 516 | } |
| 517 | |
| 518 | #else |
| 519 | static int rs5c_sysfs_register(struct device *dev) |
| 520 | { |
| 521 | return 0; |
| 522 | } |
| 523 | |
| 524 | static void rs5c_sysfs_unregister(struct device *dev) |
| 525 | { |
| 526 | /* nothing */ |
| 527 | } |
| 528 | #endif /* SYSFS */ |
| 529 | |
| 530 | static struct i2c_driver rs5c372_driver; |
| 531 | |
| 532 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
| 533 | { |
| 534 | unsigned char buf[2]; |
| 535 | int addr, i, ret = 0; |
| 536 | |
| 537 | if (rs5c372->type == rtc_r2025sd) { |
| 538 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) |
| 539 | return ret; |
| 540 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; |
| 541 | } else { |
| 542 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) |
| 543 | return ret; |
| 544 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; |
| 545 | } |
| 546 | |
| 547 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 548 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; |
| 549 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; |
| 550 | |
| 551 | /* use 24hr mode */ |
| 552 | switch (rs5c372->type) { |
| 553 | case rtc_rs5c372a: |
| 554 | case rtc_rs5c372b: |
| 555 | buf[1] |= RS5C372_CTRL2_24; |
| 556 | rs5c372->time24 = 1; |
| 557 | break; |
| 558 | case rtc_r2025sd: |
| 559 | case rtc_rv5c386: |
| 560 | case rtc_rv5c387a: |
| 561 | buf[0] |= RV5C387_CTRL1_24; |
| 562 | rs5c372->time24 = 1; |
| 563 | break; |
| 564 | default: |
| 565 | /* impossible */ |
| 566 | break; |
| 567 | } |
| 568 | |
| 569 | for (i = 0; i < sizeof(buf); i++) { |
| 570 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); |
| 571 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); |
| 572 | if (unlikely(ret < 0)) |
| 573 | return ret; |
| 574 | } |
| 575 | |
| 576 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; |
| 577 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; |
| 578 | |
| 579 | return 0; |
| 580 | } |
| 581 | |
| 582 | static int rs5c372_probe(struct i2c_client *client, |
| 583 | const struct i2c_device_id *id) |
| 584 | { |
| 585 | int err = 0; |
| 586 | int smbus_mode = 0; |
| 587 | struct rs5c372 *rs5c372; |
| 588 | struct rtc_time tm; |
| 589 | |
| 590 | dev_dbg(&client->dev, "%s\n", __func__); |
| 591 | |
| 592 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
| 593 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { |
| 594 | /* |
| 595 | * If we don't have any master mode adapter, try breaking |
| 596 | * it down in to the barest of capabilities. |
| 597 | */ |
| 598 | if (i2c_check_functionality(client->adapter, |
| 599 | I2C_FUNC_SMBUS_BYTE_DATA | |
| 600 | I2C_FUNC_SMBUS_I2C_BLOCK)) |
| 601 | smbus_mode = 1; |
| 602 | else { |
| 603 | /* Still no good, give up */ |
| 604 | err = -ENODEV; |
| 605 | goto exit; |
| 606 | } |
| 607 | } |
| 608 | |
| 609 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
| 610 | err = -ENOMEM; |
| 611 | goto exit; |
| 612 | } |
| 613 | |
| 614 | rs5c372->client = client; |
| 615 | i2c_set_clientdata(client, rs5c372); |
| 616 | rs5c372->type = id->driver_data; |
| 617 | |
| 618 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
| 619 | rs5c372->regs = &rs5c372->buf[1]; |
| 620 | rs5c372->smbus = smbus_mode; |
| 621 | |
| 622 | err = rs5c_get_regs(rs5c372); |
| 623 | if (err < 0) |
| 624 | goto exit_kfree; |
| 625 | |
| 626 | /* clock may be set for am/pm or 24 hr time */ |
| 627 | switch (rs5c372->type) { |
| 628 | case rtc_rs5c372a: |
| 629 | case rtc_rs5c372b: |
| 630 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. |
| 631 | * so does periodic irq, except some 327a modes. |
| 632 | */ |
| 633 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) |
| 634 | rs5c372->time24 = 1; |
| 635 | break; |
| 636 | case rtc_r2025sd: |
| 637 | case rtc_rv5c386: |
| 638 | case rtc_rv5c387a: |
| 639 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) |
| 640 | rs5c372->time24 = 1; |
| 641 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic |
| 642 | * irq, on both 386 and 387 |
| 643 | */ |
| 644 | break; |
| 645 | default: |
| 646 | dev_err(&client->dev, "unknown RTC type\n"); |
| 647 | goto exit_kfree; |
| 648 | } |
| 649 | |
| 650 | /* if the oscillator lost power and no other software (like |
| 651 | * the bootloader) set it up, do it here. |
| 652 | * |
| 653 | * The R2025S/D does this a little differently than the other |
| 654 | * parts, so we special case that.. |
| 655 | */ |
| 656 | err = rs5c_oscillator_setup(rs5c372); |
| 657 | if (unlikely(err < 0)) { |
| 658 | dev_err(&client->dev, "setup error\n"); |
| 659 | goto exit_kfree; |
| 660 | } |
| 661 | |
| 662 | if (rs5c372_get_datetime(client, &tm) < 0) |
| 663 | dev_warn(&client->dev, "clock needs to be set\n"); |
| 664 | |
| 665 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", |
| 666 | ({ char *s; switch (rs5c372->type) { |
| 667 | case rtc_r2025sd: s = "r2025sd"; break; |
| 668 | case rtc_rs5c372a: s = "rs5c372a"; break; |
| 669 | case rtc_rs5c372b: s = "rs5c372b"; break; |
| 670 | case rtc_rv5c386: s = "rv5c386"; break; |
| 671 | case rtc_rv5c387a: s = "rv5c387a"; break; |
| 672 | default: s = "chip"; break; |
| 673 | }; s;}), |
| 674 | rs5c372->time24 ? "24hr" : "am/pm" |
| 675 | ); |
| 676 | |
| 677 | /* REVISIT use client->irq to register alarm irq ... */ |
| 678 | |
| 679 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
| 680 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); |
| 681 | |
| 682 | if (IS_ERR(rs5c372->rtc)) { |
| 683 | err = PTR_ERR(rs5c372->rtc); |
| 684 | goto exit_kfree; |
| 685 | } |
| 686 | |
| 687 | err = rs5c_sysfs_register(&client->dev); |
| 688 | if (err) |
| 689 | goto exit_devreg; |
| 690 | |
| 691 | return 0; |
| 692 | |
| 693 | exit_devreg: |
| 694 | rtc_device_unregister(rs5c372->rtc); |
| 695 | |
| 696 | exit_kfree: |
| 697 | kfree(rs5c372); |
| 698 | |
| 699 | exit: |
| 700 | return err; |
| 701 | } |
| 702 | |
| 703 | static int rs5c372_remove(struct i2c_client *client) |
| 704 | { |
| 705 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
| 706 | |
| 707 | rtc_device_unregister(rs5c372->rtc); |
| 708 | rs5c_sysfs_unregister(&client->dev); |
| 709 | kfree(rs5c372); |
| 710 | return 0; |
| 711 | } |
| 712 | |
| 713 | static struct i2c_driver rs5c372_driver = { |
| 714 | .driver = { |
| 715 | .name = "rtc-rs5c372", |
| 716 | }, |
| 717 | .probe = rs5c372_probe, |
| 718 | .remove = rs5c372_remove, |
| 719 | .id_table = rs5c372_id, |
| 720 | }; |
| 721 | |
| 722 | static __init int rs5c372_init(void) |
| 723 | { |
| 724 | return i2c_add_driver(&rs5c372_driver); |
| 725 | } |
| 726 | |
| 727 | static __exit void rs5c372_exit(void) |
| 728 | { |
| 729 | i2c_del_driver(&rs5c372_driver); |
| 730 | } |
| 731 | |
| 732 | module_init(rs5c372_init); |
| 733 | module_exit(rs5c372_exit); |
| 734 | |
| 735 | MODULE_AUTHOR( |
| 736 | "Pavel Mironchik <pmironchik@optifacio.net>, " |
| 737 | "Alessandro Zummo <a.zummo@towertech.it>, " |
| 738 | "Paul Mundt <lethal@linux-sh.org>"); |
| 739 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
| 740 | MODULE_LICENSE("GPL"); |
| 741 | MODULE_VERSION(DRV_VERSION); |