| 1 | #ifndef DRIVERS_PCI_H |
| 2 | #define DRIVERS_PCI_H |
| 3 | |
| 4 | #include <linux/workqueue.h> |
| 5 | |
| 6 | #define PCI_CFG_SPACE_SIZE 256 |
| 7 | #define PCI_CFG_SPACE_EXP_SIZE 4096 |
| 8 | |
| 9 | /* Functions internal to the PCI core code */ |
| 10 | |
| 11 | int pci_create_sysfs_dev_files(struct pci_dev *pdev); |
| 12 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev); |
| 13 | #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) |
| 14 | static inline void pci_create_firmware_label_files(struct pci_dev *pdev) |
| 15 | { return; } |
| 16 | static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) |
| 17 | { return; } |
| 18 | #else |
| 19 | void pci_create_firmware_label_files(struct pci_dev *pdev); |
| 20 | void pci_remove_firmware_label_files(struct pci_dev *pdev); |
| 21 | #endif |
| 22 | void pci_cleanup_rom(struct pci_dev *dev); |
| 23 | #ifdef HAVE_PCI_MMAP |
| 24 | enum pci_mmap_api { |
| 25 | PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ |
| 26 | PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ |
| 27 | }; |
| 28 | int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, |
| 29 | enum pci_mmap_api mmap_api); |
| 30 | #endif |
| 31 | int pci_probe_reset_function(struct pci_dev *dev); |
| 32 | |
| 33 | /** |
| 34 | * struct pci_platform_pm_ops - Firmware PM callbacks |
| 35 | * |
| 36 | * @is_manageable: returns 'true' if given device is power manageable by the |
| 37 | * platform firmware |
| 38 | * |
| 39 | * @set_state: invokes the platform firmware to set the device's power state |
| 40 | * |
| 41 | * @choose_state: returns PCI power state of given device preferred by the |
| 42 | * platform; to be used during system-wide transitions from a |
| 43 | * sleeping state to the working state and vice versa |
| 44 | * |
| 45 | * @sleep_wake: enables/disables the system wake up capability of given device |
| 46 | * |
| 47 | * @run_wake: enables/disables the platform to generate run-time wake-up events |
| 48 | * for given device (the device's wake-up capability has to be |
| 49 | * enabled by @sleep_wake for this feature to work) |
| 50 | * |
| 51 | * If given platform is generally capable of power managing PCI devices, all of |
| 52 | * these callbacks are mandatory. |
| 53 | */ |
| 54 | struct pci_platform_pm_ops { |
| 55 | bool (*is_manageable)(struct pci_dev *dev); |
| 56 | int (*set_state)(struct pci_dev *dev, pci_power_t state); |
| 57 | pci_power_t (*choose_state)(struct pci_dev *dev); |
| 58 | int (*sleep_wake)(struct pci_dev *dev, bool enable); |
| 59 | int (*run_wake)(struct pci_dev *dev, bool enable); |
| 60 | }; |
| 61 | |
| 62 | int pci_set_platform_pm(struct pci_platform_pm_ops *ops); |
| 63 | void pci_update_current_state(struct pci_dev *dev, pci_power_t state); |
| 64 | void pci_power_up(struct pci_dev *dev); |
| 65 | void pci_disable_enabled_device(struct pci_dev *dev); |
| 66 | int pci_finish_runtime_suspend(struct pci_dev *dev); |
| 67 | int __pci_pme_wakeup(struct pci_dev *dev, void *ign); |
| 68 | void pci_wakeup_bus(struct pci_bus *bus); |
| 69 | void pci_config_pm_runtime_get(struct pci_dev *dev); |
| 70 | void pci_config_pm_runtime_put(struct pci_dev *dev); |
| 71 | void pci_pm_init(struct pci_dev *dev); |
| 72 | void pci_allocate_cap_save_buffers(struct pci_dev *dev); |
| 73 | void pci_free_cap_save_buffers(struct pci_dev *dev); |
| 74 | |
| 75 | static inline void pci_wakeup_event(struct pci_dev *dev) |
| 76 | { |
| 77 | /* Wait 100 ms before the system can be put into a sleep state. */ |
| 78 | pm_wakeup_event(&dev->dev, 100); |
| 79 | } |
| 80 | |
| 81 | static inline bool pci_is_bridge(struct pci_dev *pci_dev) |
| 82 | { |
| 83 | return !!(pci_dev->subordinate); |
| 84 | } |
| 85 | |
| 86 | struct pci_vpd_ops { |
| 87 | ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
| 88 | ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); |
| 89 | void (*release)(struct pci_dev *dev); |
| 90 | }; |
| 91 | |
| 92 | struct pci_vpd { |
| 93 | unsigned int len; |
| 94 | const struct pci_vpd_ops *ops; |
| 95 | struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ |
| 96 | }; |
| 97 | |
| 98 | int pci_vpd_pci22_init(struct pci_dev *dev); |
| 99 | static inline void pci_vpd_release(struct pci_dev *dev) |
| 100 | { |
| 101 | if (dev->vpd) |
| 102 | dev->vpd->ops->release(dev); |
| 103 | } |
| 104 | |
| 105 | /* PCI /proc functions */ |
| 106 | #ifdef CONFIG_PROC_FS |
| 107 | int pci_proc_attach_device(struct pci_dev *dev); |
| 108 | int pci_proc_detach_device(struct pci_dev *dev); |
| 109 | int pci_proc_detach_bus(struct pci_bus *bus); |
| 110 | #else |
| 111 | static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } |
| 112 | static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } |
| 113 | static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } |
| 114 | #endif |
| 115 | |
| 116 | /* Functions for PCI Hotplug drivers to use */ |
| 117 | int pci_hp_add_bridge(struct pci_dev *dev); |
| 118 | |
| 119 | #ifdef HAVE_PCI_LEGACY |
| 120 | void pci_create_legacy_files(struct pci_bus *bus); |
| 121 | void pci_remove_legacy_files(struct pci_bus *bus); |
| 122 | #else |
| 123 | static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } |
| 124 | static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } |
| 125 | #endif |
| 126 | |
| 127 | /* Lock for read/write access to pci device and bus lists */ |
| 128 | extern struct rw_semaphore pci_bus_sem; |
| 129 | |
| 130 | extern raw_spinlock_t pci_lock; |
| 131 | |
| 132 | extern unsigned int pci_pm_d3_delay; |
| 133 | |
| 134 | #ifdef CONFIG_PCI_MSI |
| 135 | void pci_no_msi(void); |
| 136 | void pci_msi_init_pci_dev(struct pci_dev *dev); |
| 137 | #else |
| 138 | static inline void pci_no_msi(void) { } |
| 139 | static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } |
| 140 | #endif |
| 141 | |
| 142 | void pci_realloc_get_opt(char *); |
| 143 | |
| 144 | static inline int pci_no_d1d2(struct pci_dev *dev) |
| 145 | { |
| 146 | unsigned int parent_dstates = 0; |
| 147 | |
| 148 | if (dev->bus->self) |
| 149 | parent_dstates = dev->bus->self->no_d1d2; |
| 150 | return (dev->no_d1d2 || parent_dstates); |
| 151 | |
| 152 | } |
| 153 | extern struct device_attribute pci_dev_attrs[]; |
| 154 | extern struct device_attribute pcibus_dev_attrs[]; |
| 155 | extern struct device_type pci_dev_type; |
| 156 | extern struct bus_attribute pci_bus_attrs[]; |
| 157 | |
| 158 | |
| 159 | /** |
| 160 | * pci_match_one_device - Tell if a PCI device structure has a matching |
| 161 | * PCI device id structure |
| 162 | * @id: single PCI device id structure to match |
| 163 | * @dev: the PCI device structure to match against |
| 164 | * |
| 165 | * Returns the matching pci_device_id structure or %NULL if there is no match. |
| 166 | */ |
| 167 | static inline const struct pci_device_id * |
| 168 | pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) |
| 169 | { |
| 170 | if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && |
| 171 | (id->device == PCI_ANY_ID || id->device == dev->device) && |
| 172 | (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && |
| 173 | (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && |
| 174 | !((id->class ^ dev->class) & id->class_mask)) |
| 175 | return id; |
| 176 | return NULL; |
| 177 | } |
| 178 | |
| 179 | /* PCI slot sysfs helper code */ |
| 180 | #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) |
| 181 | |
| 182 | extern struct kset *pci_slots_kset; |
| 183 | |
| 184 | struct pci_slot_attribute { |
| 185 | struct attribute attr; |
| 186 | ssize_t (*show)(struct pci_slot *, char *); |
| 187 | ssize_t (*store)(struct pci_slot *, const char *, size_t); |
| 188 | }; |
| 189 | #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) |
| 190 | |
| 191 | enum pci_bar_type { |
| 192 | pci_bar_unknown, /* Standard PCI BAR probe */ |
| 193 | pci_bar_io, /* An io port BAR */ |
| 194 | pci_bar_mem32, /* A 32-bit memory BAR */ |
| 195 | pci_bar_mem64, /* A 64-bit memory BAR */ |
| 196 | }; |
| 197 | |
| 198 | bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, |
| 199 | int crs_timeout); |
| 200 | int pci_setup_device(struct pci_dev *dev); |
| 201 | int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, |
| 202 | struct resource *res, unsigned int reg); |
| 203 | int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type); |
| 204 | void pci_configure_ari(struct pci_dev *dev); |
| 205 | void __ref __pci_bus_size_bridges(struct pci_bus *bus, |
| 206 | struct list_head *realloc_head); |
| 207 | void __ref __pci_bus_assign_resources(const struct pci_bus *bus, |
| 208 | struct list_head *realloc_head, |
| 209 | struct list_head *fail_head); |
| 210 | |
| 211 | /** |
| 212 | * pci_ari_enabled - query ARI forwarding status |
| 213 | * @bus: the PCI bus |
| 214 | * |
| 215 | * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; |
| 216 | */ |
| 217 | static inline int pci_ari_enabled(struct pci_bus *bus) |
| 218 | { |
| 219 | return bus->self && bus->self->ari_enabled; |
| 220 | } |
| 221 | |
| 222 | void pci_reassigndev_resource_alignment(struct pci_dev *dev); |
| 223 | void pci_disable_bridge_window(struct pci_dev *dev); |
| 224 | |
| 225 | /* Single Root I/O Virtualization */ |
| 226 | struct pci_sriov { |
| 227 | int pos; /* capability position */ |
| 228 | int nres; /* number of resources */ |
| 229 | u32 cap; /* SR-IOV Capabilities */ |
| 230 | u16 ctrl; /* SR-IOV Control */ |
| 231 | u16 total_VFs; /* total VFs associated with the PF */ |
| 232 | u16 initial_VFs; /* initial VFs associated with the PF */ |
| 233 | u16 num_VFs; /* number of VFs available */ |
| 234 | u16 offset; /* first VF Routing ID offset */ |
| 235 | u16 stride; /* following VF stride */ |
| 236 | u32 pgsz; /* page size for BAR alignment */ |
| 237 | u8 link; /* Function Dependency Link */ |
| 238 | u16 driver_max_VFs; /* max num VFs driver supports */ |
| 239 | struct pci_dev *dev; /* lowest numbered PF */ |
| 240 | struct pci_dev *self; /* this PF */ |
| 241 | struct mutex lock; /* lock for VF bus */ |
| 242 | struct work_struct mtask; /* VF Migration task */ |
| 243 | u8 __iomem *mstate; /* VF Migration State Array */ |
| 244 | }; |
| 245 | |
| 246 | #ifdef CONFIG_PCI_ATS |
| 247 | void pci_restore_ats_state(struct pci_dev *dev); |
| 248 | #else |
| 249 | static inline void pci_restore_ats_state(struct pci_dev *dev) |
| 250 | { |
| 251 | } |
| 252 | #endif /* CONFIG_PCI_ATS */ |
| 253 | |
| 254 | #ifdef CONFIG_PCI_IOV |
| 255 | int pci_iov_init(struct pci_dev *dev); |
| 256 | void pci_iov_release(struct pci_dev *dev); |
| 257 | int pci_iov_resource_bar(struct pci_dev *dev, int resno, |
| 258 | enum pci_bar_type *type); |
| 259 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno); |
| 260 | void pci_restore_iov_state(struct pci_dev *dev); |
| 261 | int pci_iov_bus_range(struct pci_bus *bus); |
| 262 | |
| 263 | #else |
| 264 | static inline int pci_iov_init(struct pci_dev *dev) |
| 265 | { |
| 266 | return -ENODEV; |
| 267 | } |
| 268 | static inline void pci_iov_release(struct pci_dev *dev) |
| 269 | |
| 270 | { |
| 271 | } |
| 272 | static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, |
| 273 | enum pci_bar_type *type) |
| 274 | { |
| 275 | return 0; |
| 276 | } |
| 277 | static inline void pci_restore_iov_state(struct pci_dev *dev) |
| 278 | { |
| 279 | } |
| 280 | static inline int pci_iov_bus_range(struct pci_bus *bus) |
| 281 | { |
| 282 | return 0; |
| 283 | } |
| 284 | |
| 285 | #endif /* CONFIG_PCI_IOV */ |
| 286 | |
| 287 | unsigned long pci_cardbus_resource_alignment(struct resource *); |
| 288 | |
| 289 | static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, |
| 290 | struct resource *res) |
| 291 | { |
| 292 | #ifdef CONFIG_PCI_IOV |
| 293 | int resno = res - dev->resource; |
| 294 | |
| 295 | if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) |
| 296 | return pci_sriov_resource_alignment(dev, resno); |
| 297 | #endif |
| 298 | if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) |
| 299 | return pci_cardbus_resource_alignment(res); |
| 300 | return resource_alignment(res); |
| 301 | } |
| 302 | |
| 303 | void pci_enable_acs(struct pci_dev *dev); |
| 304 | |
| 305 | struct pci_dev_reset_methods { |
| 306 | u16 vendor; |
| 307 | u16 device; |
| 308 | int (*reset)(struct pci_dev *dev, int probe); |
| 309 | }; |
| 310 | |
| 311 | #ifdef CONFIG_PCI_QUIRKS |
| 312 | int pci_dev_specific_reset(struct pci_dev *dev, int probe); |
| 313 | #else |
| 314 | static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) |
| 315 | { |
| 316 | return -ENOTTY; |
| 317 | } |
| 318 | #endif |
| 319 | |
| 320 | #endif /* DRIVERS_PCI_H */ |