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PCI: SR-IOV quirk for Intel 82576 NIC
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / pci-sysfs.c
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1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
24#include <linux/capability.h>
25#include <linux/pci-aspm.h>
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
61 unsigned long val;
62
63 if (strict_strtoul(buf, 0, &val) < 0)
64 return -EINVAL;
65
66 pdev->broken_parity_status = !!val;
67
68 return count;
69}
70
71static ssize_t local_cpus_show(struct device *dev,
72 struct device_attribute *attr, char *buf)
73{
74 const struct cpumask *mask;
75 int len;
76
77 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
78 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
79 buf[len++] = '\n';
80 buf[len] = '\0';
81 return len;
82}
83
84
85static ssize_t local_cpulist_show(struct device *dev,
86 struct device_attribute *attr, char *buf)
87{
88 const struct cpumask *mask;
89 int len;
90
91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
92 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
93 buf[len++] = '\n';
94 buf[len] = '\0';
95 return len;
96}
97
98/* show resources */
99static ssize_t
100resource_show(struct device * dev, struct device_attribute *attr, char * buf)
101{
102 struct pci_dev * pci_dev = to_pci_dev(dev);
103 char * str = buf;
104 int i;
105 int max;
106 resource_size_t start, end;
107
108 if (pci_dev->subordinate)
109 max = DEVICE_COUNT_RESOURCE;
110 else
111 max = PCI_BRIDGE_RESOURCES;
112
113 for (i = 0; i < max; i++) {
114 struct resource *res = &pci_dev->resource[i];
115 pci_resource_to_user(pci_dev, i, res, &start, &end);
116 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
117 (unsigned long long)start,
118 (unsigned long long)end,
119 (unsigned long long)res->flags);
120 }
121 return (str - buf);
122}
123
124static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
125{
126 struct pci_dev *pci_dev = to_pci_dev(dev);
127
128 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
129 pci_dev->vendor, pci_dev->device,
130 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
131 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
132 (u8)(pci_dev->class));
133}
134
135static ssize_t is_enabled_store(struct device *dev,
136 struct device_attribute *attr, const char *buf,
137 size_t count)
138{
139 struct pci_dev *pdev = to_pci_dev(dev);
140 unsigned long val;
141 ssize_t result = strict_strtoul(buf, 0, &val);
142
143 if (result < 0)
144 return result;
145
146 /* this can crash the machine when done on the "wrong" device */
147 if (!capable(CAP_SYS_ADMIN))
148 return -EPERM;
149
150 if (!val) {
151 if (atomic_read(&pdev->enable_cnt) != 0)
152 pci_disable_device(pdev);
153 else
154 result = -EIO;
155 } else
156 result = pci_enable_device(pdev);
157
158 return result < 0 ? result : count;
159}
160
161static ssize_t is_enabled_show(struct device *dev,
162 struct device_attribute *attr, char *buf)
163{
164 struct pci_dev *pdev;
165
166 pdev = to_pci_dev (dev);
167 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
168}
169
170#ifdef CONFIG_NUMA
171static ssize_t
172numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
173{
174 return sprintf (buf, "%d\n", dev->numa_node);
175}
176#endif
177
178static ssize_t
179msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
180{
181 struct pci_dev *pdev = to_pci_dev(dev);
182
183 if (!pdev->subordinate)
184 return 0;
185
186 return sprintf (buf, "%u\n",
187 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
188}
189
190static ssize_t
191msi_bus_store(struct device *dev, struct device_attribute *attr,
192 const char *buf, size_t count)
193{
194 struct pci_dev *pdev = to_pci_dev(dev);
195 unsigned long val;
196
197 if (strict_strtoul(buf, 0, &val) < 0)
198 return -EINVAL;
199
200 /* bad things may happen if the no_msi flag is changed
201 * while some drivers are loaded */
202 if (!capable(CAP_SYS_ADMIN))
203 return -EPERM;
204
205 /* Maybe pci devices without subordinate busses shouldn't even have this
206 * attribute in the first place? */
207 if (!pdev->subordinate)
208 return count;
209
210 /* Is the flag going to change, or keep the value it already had? */
211 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
212 !!val) {
213 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
214
215 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
216 " bad things could happen\n", val ? "" : " not");
217 }
218
219 return count;
220}
221
222#ifdef CONFIG_HOTPLUG
223static DEFINE_MUTEX(pci_remove_rescan_mutex);
224static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
225 size_t count)
226{
227 unsigned long val;
228 struct pci_bus *b = NULL;
229
230 if (strict_strtoul(buf, 0, &val) < 0)
231 return -EINVAL;
232
233 if (val) {
234 mutex_lock(&pci_remove_rescan_mutex);
235 while ((b = pci_find_next_bus(b)) != NULL)
236 pci_rescan_bus(b);
237 mutex_unlock(&pci_remove_rescan_mutex);
238 }
239 return count;
240}
241
242struct bus_attribute pci_bus_attrs[] = {
243 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
244 __ATTR_NULL
245};
246
247static ssize_t
248dev_rescan_store(struct device *dev, struct device_attribute *attr,
249 const char *buf, size_t count)
250{
251 unsigned long val;
252 struct pci_dev *pdev = to_pci_dev(dev);
253
254 if (strict_strtoul(buf, 0, &val) < 0)
255 return -EINVAL;
256
257 if (val) {
258 mutex_lock(&pci_remove_rescan_mutex);
259 pci_rescan_bus(pdev->bus);
260 mutex_unlock(&pci_remove_rescan_mutex);
261 }
262 return count;
263}
264
265static void remove_callback(struct device *dev)
266{
267 struct pci_dev *pdev = to_pci_dev(dev);
268
269 mutex_lock(&pci_remove_rescan_mutex);
270 pci_remove_bus_device(pdev);
271 mutex_unlock(&pci_remove_rescan_mutex);
272}
273
274static ssize_t
275remove_store(struct device *dev, struct device_attribute *dummy,
276 const char *buf, size_t count)
277{
278 int ret = 0;
279 unsigned long val;
280 struct pci_dev *pdev = to_pci_dev(dev);
281
282 if (strict_strtoul(buf, 0, &val) < 0)
283 return -EINVAL;
284
285 if (pci_is_root_bus(pdev->bus))
286 return -EBUSY;
287
288 /* An attribute cannot be unregistered by one of its own methods,
289 * so we have to use this roundabout approach.
290 */
291 if (val)
292 ret = device_schedule_callback(dev, remove_callback);
293 if (ret)
294 count = ret;
295 return count;
296}
297#endif
298
299struct device_attribute pci_dev_attrs[] = {
300 __ATTR_RO(resource),
301 __ATTR_RO(vendor),
302 __ATTR_RO(device),
303 __ATTR_RO(subsystem_vendor),
304 __ATTR_RO(subsystem_device),
305 __ATTR_RO(class),
306 __ATTR_RO(irq),
307 __ATTR_RO(local_cpus),
308 __ATTR_RO(local_cpulist),
309 __ATTR_RO(modalias),
310#ifdef CONFIG_NUMA
311 __ATTR_RO(numa_node),
312#endif
313 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
314 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
315 broken_parity_status_show,broken_parity_status_store),
316 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
317#ifdef CONFIG_HOTPLUG
318 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
319 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
320#endif
321 __ATTR_NULL,
322};
323
324static ssize_t
325boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
326{
327 struct pci_dev *pdev = to_pci_dev(dev);
328
329 return sprintf(buf, "%u\n",
330 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
331 IORESOURCE_ROM_SHADOW));
332}
333struct device_attribute vga_attr = __ATTR_RO(boot_vga);
334
335static ssize_t
336pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
337 char *buf, loff_t off, size_t count)
338{
339 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
340 unsigned int size = 64;
341 loff_t init_off = off;
342 u8 *data = (u8*) buf;
343
344 /* Several chips lock up trying to read undefined config space */
345 if (capable(CAP_SYS_ADMIN)) {
346 size = dev->cfg_size;
347 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
348 size = 128;
349 }
350
351 if (off > size)
352 return 0;
353 if (off + count > size) {
354 size -= off;
355 count = size;
356 } else {
357 size = count;
358 }
359
360 if ((off & 1) && size) {
361 u8 val;
362 pci_user_read_config_byte(dev, off, &val);
363 data[off - init_off] = val;
364 off++;
365 size--;
366 }
367
368 if ((off & 3) && size > 2) {
369 u16 val;
370 pci_user_read_config_word(dev, off, &val);
371 data[off - init_off] = val & 0xff;
372 data[off - init_off + 1] = (val >> 8) & 0xff;
373 off += 2;
374 size -= 2;
375 }
376
377 while (size > 3) {
378 u32 val;
379 pci_user_read_config_dword(dev, off, &val);
380 data[off - init_off] = val & 0xff;
381 data[off - init_off + 1] = (val >> 8) & 0xff;
382 data[off - init_off + 2] = (val >> 16) & 0xff;
383 data[off - init_off + 3] = (val >> 24) & 0xff;
384 off += 4;
385 size -= 4;
386 }
387
388 if (size >= 2) {
389 u16 val;
390 pci_user_read_config_word(dev, off, &val);
391 data[off - init_off] = val & 0xff;
392 data[off - init_off + 1] = (val >> 8) & 0xff;
393 off += 2;
394 size -= 2;
395 }
396
397 if (size > 0) {
398 u8 val;
399 pci_user_read_config_byte(dev, off, &val);
400 data[off - init_off] = val;
401 off++;
402 --size;
403 }
404
405 return count;
406}
407
408static ssize_t
409pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
410 char *buf, loff_t off, size_t count)
411{
412 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
413 unsigned int size = count;
414 loff_t init_off = off;
415 u8 *data = (u8*) buf;
416
417 if (off > dev->cfg_size)
418 return 0;
419 if (off + count > dev->cfg_size) {
420 size = dev->cfg_size - off;
421 count = size;
422 }
423
424 if ((off & 1) && size) {
425 pci_user_write_config_byte(dev, off, data[off - init_off]);
426 off++;
427 size--;
428 }
429
430 if ((off & 3) && size > 2) {
431 u16 val = data[off - init_off];
432 val |= (u16) data[off - init_off + 1] << 8;
433 pci_user_write_config_word(dev, off, val);
434 off += 2;
435 size -= 2;
436 }
437
438 while (size > 3) {
439 u32 val = data[off - init_off];
440 val |= (u32) data[off - init_off + 1] << 8;
441 val |= (u32) data[off - init_off + 2] << 16;
442 val |= (u32) data[off - init_off + 3] << 24;
443 pci_user_write_config_dword(dev, off, val);
444 off += 4;
445 size -= 4;
446 }
447
448 if (size >= 2) {
449 u16 val = data[off - init_off];
450 val |= (u16) data[off - init_off + 1] << 8;
451 pci_user_write_config_word(dev, off, val);
452 off += 2;
453 size -= 2;
454 }
455
456 if (size) {
457 pci_user_write_config_byte(dev, off, data[off - init_off]);
458 off++;
459 --size;
460 }
461
462 return count;
463}
464
465static ssize_t
466read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
467 char *buf, loff_t off, size_t count)
468{
469 struct pci_dev *dev =
470 to_pci_dev(container_of(kobj, struct device, kobj));
471
472 if (off > bin_attr->size)
473 count = 0;
474 else if (count > bin_attr->size - off)
475 count = bin_attr->size - off;
476
477 return pci_read_vpd(dev, off, count, buf);
478}
479
480static ssize_t
481write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
482 char *buf, loff_t off, size_t count)
483{
484 struct pci_dev *dev =
485 to_pci_dev(container_of(kobj, struct device, kobj));
486
487 if (off > bin_attr->size)
488 count = 0;
489 else if (count > bin_attr->size - off)
490 count = bin_attr->size - off;
491
492 return pci_write_vpd(dev, off, count, buf);
493}
494
495#ifdef HAVE_PCI_LEGACY
496/**
497 * pci_read_legacy_io - read byte(s) from legacy I/O port space
498 * @kobj: kobject corresponding to file to read from
499 * @buf: buffer to store results
500 * @off: offset into legacy I/O port space
501 * @count: number of bytes to read
502 *
503 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
504 * callback routine (pci_legacy_read).
505 */
506static ssize_t
507pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
508 char *buf, loff_t off, size_t count)
509{
510 struct pci_bus *bus = to_pci_bus(container_of(kobj,
511 struct device,
512 kobj));
513
514 /* Only support 1, 2 or 4 byte accesses */
515 if (count != 1 && count != 2 && count != 4)
516 return -EINVAL;
517
518 return pci_legacy_read(bus, off, (u32 *)buf, count);
519}
520
521/**
522 * pci_write_legacy_io - write byte(s) to legacy I/O port space
523 * @kobj: kobject corresponding to file to read from
524 * @buf: buffer containing value to be written
525 * @off: offset into legacy I/O port space
526 * @count: number of bytes to write
527 *
528 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
529 * callback routine (pci_legacy_write).
530 */
531static ssize_t
532pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
533 char *buf, loff_t off, size_t count)
534{
535 struct pci_bus *bus = to_pci_bus(container_of(kobj,
536 struct device,
537 kobj));
538 /* Only support 1, 2 or 4 byte accesses */
539 if (count != 1 && count != 2 && count != 4)
540 return -EINVAL;
541
542 return pci_legacy_write(bus, off, *(u32 *)buf, count);
543}
544
545/**
546 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
547 * @kobj: kobject corresponding to device to be mapped
548 * @attr: struct bin_attribute for this file
549 * @vma: struct vm_area_struct passed to mmap
550 *
551 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
552 * legacy memory space (first meg of bus space) into application virtual
553 * memory space.
554 */
555static int
556pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
557 struct vm_area_struct *vma)
558{
559 struct pci_bus *bus = to_pci_bus(container_of(kobj,
560 struct device,
561 kobj));
562
563 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
564}
565
566/**
567 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
568 * @kobj: kobject corresponding to device to be mapped
569 * @attr: struct bin_attribute for this file
570 * @vma: struct vm_area_struct passed to mmap
571 *
572 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
573 * legacy IO space (first meg of bus space) into application virtual
574 * memory space. Returns -ENOSYS if the operation isn't supported
575 */
576static int
577pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
578 struct vm_area_struct *vma)
579{
580 struct pci_bus *bus = to_pci_bus(container_of(kobj,
581 struct device,
582 kobj));
583
584 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
585}
586
587/**
588 * pci_adjust_legacy_attr - adjustment of legacy file attributes
589 * @b: bus to create files under
590 * @mmap_type: I/O port or memory
591 *
592 * Stub implementation. Can be overridden by arch if necessary.
593 */
594void __weak
595pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
596{
597 return;
598}
599
600/**
601 * pci_create_legacy_files - create legacy I/O port and memory files
602 * @b: bus to create files under
603 *
604 * Some platforms allow access to legacy I/O port and ISA memory space on
605 * a per-bus basis. This routine creates the files and ties them into
606 * their associated read, write and mmap files from pci-sysfs.c
607 *
608 * On error unwind, but don't propogate the error to the caller
609 * as it is ok to set up the PCI bus without these files.
610 */
611void pci_create_legacy_files(struct pci_bus *b)
612{
613 int error;
614
615 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
616 GFP_ATOMIC);
617 if (!b->legacy_io)
618 goto kzalloc_err;
619
620 b->legacy_io->attr.name = "legacy_io";
621 b->legacy_io->size = 0xffff;
622 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
623 b->legacy_io->read = pci_read_legacy_io;
624 b->legacy_io->write = pci_write_legacy_io;
625 b->legacy_io->mmap = pci_mmap_legacy_io;
626 pci_adjust_legacy_attr(b, pci_mmap_io);
627 error = device_create_bin_file(&b->dev, b->legacy_io);
628 if (error)
629 goto legacy_io_err;
630
631 /* Allocated above after the legacy_io struct */
632 b->legacy_mem = b->legacy_io + 1;
633 b->legacy_mem->attr.name = "legacy_mem";
634 b->legacy_mem->size = 1024*1024;
635 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
636 b->legacy_mem->mmap = pci_mmap_legacy_mem;
637 pci_adjust_legacy_attr(b, pci_mmap_mem);
638 error = device_create_bin_file(&b->dev, b->legacy_mem);
639 if (error)
640 goto legacy_mem_err;
641
642 return;
643
644legacy_mem_err:
645 device_remove_bin_file(&b->dev, b->legacy_io);
646legacy_io_err:
647 kfree(b->legacy_io);
648 b->legacy_io = NULL;
649kzalloc_err:
650 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
651 "and ISA memory resources to sysfs\n");
652 return;
653}
654
655void pci_remove_legacy_files(struct pci_bus *b)
656{
657 if (b->legacy_io) {
658 device_remove_bin_file(&b->dev, b->legacy_io);
659 device_remove_bin_file(&b->dev, b->legacy_mem);
660 kfree(b->legacy_io); /* both are allocated here */
661 }
662}
663#endif /* HAVE_PCI_LEGACY */
664
665#ifdef HAVE_PCI_MMAP
666
667int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
668{
669 unsigned long nr, start, size;
670
671 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
672 start = vma->vm_pgoff;
673 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
674 if (start < size && size - start >= nr)
675 return 1;
676 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
677 current->comm, start, start+nr, pci_name(pdev), resno, size);
678 return 0;
679}
680
681/**
682 * pci_mmap_resource - map a PCI resource into user memory space
683 * @kobj: kobject for mapping
684 * @attr: struct bin_attribute for the file being mapped
685 * @vma: struct vm_area_struct passed into the mmap
686 * @write_combine: 1 for write_combine mapping
687 *
688 * Use the regular PCI mapping routines to map a PCI resource into userspace.
689 */
690static int
691pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
692 struct vm_area_struct *vma, int write_combine)
693{
694 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
695 struct device, kobj));
696 struct resource *res = (struct resource *)attr->private;
697 enum pci_mmap_state mmap_type;
698 resource_size_t start, end;
699 int i;
700
701 for (i = 0; i < PCI_ROM_RESOURCE; i++)
702 if (res == &pdev->resource[i])
703 break;
704 if (i >= PCI_ROM_RESOURCE)
705 return -ENODEV;
706
707 if (!pci_mmap_fits(pdev, i, vma))
708 return -EINVAL;
709
710 /* pci_mmap_page_range() expects the same kind of entry as coming
711 * from /proc/bus/pci/ which is a "user visible" value. If this is
712 * different from the resource itself, arch will do necessary fixup.
713 */
714 pci_resource_to_user(pdev, i, res, &start, &end);
715 vma->vm_pgoff += start >> PAGE_SHIFT;
716 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
717
718 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
719 return -EINVAL;
720
721 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
722}
723
724static int
725pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
726 struct vm_area_struct *vma)
727{
728 return pci_mmap_resource(kobj, attr, vma, 0);
729}
730
731static int
732pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
733 struct vm_area_struct *vma)
734{
735 return pci_mmap_resource(kobj, attr, vma, 1);
736}
737
738/**
739 * pci_remove_resource_files - cleanup resource files
740 * @dev: dev to cleanup
741 *
742 * If we created resource files for @dev, remove them from sysfs and
743 * free their resources.
744 */
745static void
746pci_remove_resource_files(struct pci_dev *pdev)
747{
748 int i;
749
750 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
751 struct bin_attribute *res_attr;
752
753 res_attr = pdev->res_attr[i];
754 if (res_attr) {
755 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
756 kfree(res_attr);
757 }
758
759 res_attr = pdev->res_attr_wc[i];
760 if (res_attr) {
761 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
762 kfree(res_attr);
763 }
764 }
765}
766
767static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
768{
769 /* allocate attribute structure, piggyback attribute name */
770 int name_len = write_combine ? 13 : 10;
771 struct bin_attribute *res_attr;
772 int retval;
773
774 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
775 if (res_attr) {
776 char *res_attr_name = (char *)(res_attr + 1);
777
778 if (write_combine) {
779 pdev->res_attr_wc[num] = res_attr;
780 sprintf(res_attr_name, "resource%d_wc", num);
781 res_attr->mmap = pci_mmap_resource_wc;
782 } else {
783 pdev->res_attr[num] = res_attr;
784 sprintf(res_attr_name, "resource%d", num);
785 res_attr->mmap = pci_mmap_resource_uc;
786 }
787 res_attr->attr.name = res_attr_name;
788 res_attr->attr.mode = S_IRUSR | S_IWUSR;
789 res_attr->size = pci_resource_len(pdev, num);
790 res_attr->private = &pdev->resource[num];
791 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
792 } else
793 retval = -ENOMEM;
794
795 return retval;
796}
797
798/**
799 * pci_create_resource_files - create resource files in sysfs for @dev
800 * @dev: dev in question
801 *
802 * Walk the resources in @dev creating files for each resource available.
803 */
804static int pci_create_resource_files(struct pci_dev *pdev)
805{
806 int i;
807 int retval;
808
809 /* Expose the PCI resources from this device as files */
810 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
811
812 /* skip empty resources */
813 if (!pci_resource_len(pdev, i))
814 continue;
815
816 retval = pci_create_attr(pdev, i, 0);
817 /* for prefetchable resources, create a WC mappable file */
818 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
819 retval = pci_create_attr(pdev, i, 1);
820
821 if (retval) {
822 pci_remove_resource_files(pdev);
823 return retval;
824 }
825 }
826 return 0;
827}
828#else /* !HAVE_PCI_MMAP */
829int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
830void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
831#endif /* HAVE_PCI_MMAP */
832
833/**
834 * pci_write_rom - used to enable access to the PCI ROM display
835 * @kobj: kernel object handle
836 * @buf: user input
837 * @off: file offset
838 * @count: number of byte in input
839 *
840 * writing anything except 0 enables it
841 */
842static ssize_t
843pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
844 char *buf, loff_t off, size_t count)
845{
846 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
847
848 if ((off == 0) && (*buf == '0') && (count == 2))
849 pdev->rom_attr_enabled = 0;
850 else
851 pdev->rom_attr_enabled = 1;
852
853 return count;
854}
855
856/**
857 * pci_read_rom - read a PCI ROM
858 * @kobj: kernel object handle
859 * @buf: where to put the data we read from the ROM
860 * @off: file offset
861 * @count: number of bytes to read
862 *
863 * Put @count bytes starting at @off into @buf from the ROM in the PCI
864 * device corresponding to @kobj.
865 */
866static ssize_t
867pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
868 char *buf, loff_t off, size_t count)
869{
870 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
871 void __iomem *rom;
872 size_t size;
873
874 if (!pdev->rom_attr_enabled)
875 return -EINVAL;
876
877 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
878 if (!rom || !size)
879 return -EIO;
880
881 if (off >= size)
882 count = 0;
883 else {
884 if (off + count > size)
885 count = size - off;
886
887 memcpy_fromio(buf, rom + off, count);
888 }
889 pci_unmap_rom(pdev, rom);
890
891 return count;
892}
893
894static struct bin_attribute pci_config_attr = {
895 .attr = {
896 .name = "config",
897 .mode = S_IRUGO | S_IWUSR,
898 },
899 .size = PCI_CFG_SPACE_SIZE,
900 .read = pci_read_config,
901 .write = pci_write_config,
902};
903
904static struct bin_attribute pcie_config_attr = {
905 .attr = {
906 .name = "config",
907 .mode = S_IRUGO | S_IWUSR,
908 },
909 .size = PCI_CFG_SPACE_EXP_SIZE,
910 .read = pci_read_config,
911 .write = pci_write_config,
912};
913
914int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
915{
916 return 0;
917}
918
919static int pci_create_capabilities_sysfs(struct pci_dev *dev)
920{
921 int retval;
922 struct bin_attribute *attr;
923
924 /* If the device has VPD, try to expose it in sysfs. */
925 if (dev->vpd) {
926 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
927 if (!attr)
928 return -ENOMEM;
929
930 attr->size = dev->vpd->len;
931 attr->attr.name = "vpd";
932 attr->attr.mode = S_IRUSR | S_IWUSR;
933 attr->read = read_vpd_attr;
934 attr->write = write_vpd_attr;
935 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
936 if (retval) {
937 kfree(dev->vpd->attr);
938 return retval;
939 }
940 dev->vpd->attr = attr;
941 }
942
943 /* Active State Power Management */
944 pcie_aspm_create_sysfs_dev_files(dev);
945
946 return 0;
947}
948
949int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
950{
951 int retval;
952 int rom_size = 0;
953 struct bin_attribute *attr;
954
955 if (!sysfs_initialized)
956 return -EACCES;
957
958 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
959 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
960 else
961 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
962 if (retval)
963 goto err;
964
965 retval = pci_create_resource_files(pdev);
966 if (retval)
967 goto err_config_file;
968
969 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
970 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
971 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
972 rom_size = 0x20000;
973
974 /* If the device has a ROM, try to expose it in sysfs. */
975 if (rom_size) {
976 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
977 if (!attr) {
978 retval = -ENOMEM;
979 goto err_resource_files;
980 }
981 attr->size = rom_size;
982 attr->attr.name = "rom";
983 attr->attr.mode = S_IRUSR;
984 attr->read = pci_read_rom;
985 attr->write = pci_write_rom;
986 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
987 if (retval) {
988 kfree(attr);
989 goto err_resource_files;
990 }
991 pdev->rom_attr = attr;
992 }
993
994 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
995 retval = device_create_file(&pdev->dev, &vga_attr);
996 if (retval)
997 goto err_rom_file;
998 }
999
1000 /* add platform-specific attributes */
1001 retval = pcibios_add_platform_entries(pdev);
1002 if (retval)
1003 goto err_vga_file;
1004
1005 /* add sysfs entries for various capabilities */
1006 retval = pci_create_capabilities_sysfs(pdev);
1007 if (retval)
1008 goto err_vga_file;
1009
1010 return 0;
1011
1012err_vga_file:
1013 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1014 device_remove_file(&pdev->dev, &vga_attr);
1015err_rom_file:
1016 if (rom_size) {
1017 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1018 kfree(pdev->rom_attr);
1019 pdev->rom_attr = NULL;
1020 }
1021err_resource_files:
1022 pci_remove_resource_files(pdev);
1023err_config_file:
1024 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1025 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1026 else
1027 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1028err:
1029 return retval;
1030}
1031
1032static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1033{
1034 if (dev->vpd && dev->vpd->attr) {
1035 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1036 kfree(dev->vpd->attr);
1037 }
1038
1039 pcie_aspm_remove_sysfs_dev_files(dev);
1040}
1041
1042/**
1043 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1044 * @pdev: device whose entries we should free
1045 *
1046 * Cleanup when @pdev is removed from sysfs.
1047 */
1048void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1049{
1050 int rom_size = 0;
1051
1052 if (!sysfs_initialized)
1053 return;
1054
1055 pci_remove_capabilities_sysfs(pdev);
1056
1057 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1058 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1059 else
1060 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1061
1062 pci_remove_resource_files(pdev);
1063
1064 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1065 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1066 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1067 rom_size = 0x20000;
1068
1069 if (rom_size && pdev->rom_attr) {
1070 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1071 kfree(pdev->rom_attr);
1072 }
1073}
1074
1075static int __init pci_sysfs_init(void)
1076{
1077 struct pci_dev *pdev = NULL;
1078 int retval;
1079
1080 sysfs_initialized = 1;
1081 for_each_pci_dev(pdev) {
1082 retval = pci_create_sysfs_dev_files(pdev);
1083 if (retval) {
1084 pci_dev_put(pdev);
1085 return retval;
1086 }
1087 }
1088
1089 return 0;
1090}
1091
1092late_initcall(pci_sysfs_init);
kernel source for telekom puls (alcatel/mediatek)