| 1 | /* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux. |
| 2 | |
| 3 | Written 1994 by David C. Davies. |
| 4 | |
| 5 | Copyright 1994 Digital Equipment Corporation. |
| 6 | |
| 7 | This software may be used and distributed according to the terms of |
| 8 | the GNU General Public License, incorporated herein by reference. |
| 9 | |
| 10 | This driver is written for the Digital Equipment Corporation series |
| 11 | of EtherWORKS ethernet cards: |
| 12 | |
| 13 | DE203 Turbo (BNC) |
| 14 | DE204 Turbo (TP) |
| 15 | DE205 Turbo (TP BNC) |
| 16 | |
| 17 | The driver has been tested on a relatively busy network using the DE205 |
| 18 | card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s |
| 19 | (7.8Mb/s) to a DECstation 5000/200. |
| 20 | |
| 21 | The author may be reached at davies@maniac.ultranet.com. |
| 22 | |
| 23 | ========================================================================= |
| 24 | This driver has been written substantially from scratch, although its |
| 25 | inheritance of style and stack interface from 'depca.c' and in turn from |
| 26 | Donald Becker's 'lance.c' should be obvious. |
| 27 | |
| 28 | The DE203/4/5 boards all use a new proprietary chip in place of the |
| 29 | LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422). |
| 30 | Use the depca.c driver in the standard distribution for the LANCE based |
| 31 | cards from DIGITAL; this driver will not work with them. |
| 32 | |
| 33 | The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O |
| 34 | only makes all the card accesses through I/O transactions and no high |
| 35 | (shared) memory is used. This mode provides a >48% performance penalty |
| 36 | and is deprecated in this driver, although allowed to provide initial |
| 37 | setup when hardstrapped. |
| 38 | |
| 39 | The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is |
| 40 | no point in using any mode other than the 2kB mode - their performances |
| 41 | are virtually identical, although the driver has been tested in the 2kB |
| 42 | and 32kB modes. I would suggest you uncomment the line: |
| 43 | |
| 44 | FORCE_2K_MODE; |
| 45 | |
| 46 | to allow the driver to configure the card as a 2kB card at your current |
| 47 | base address, thus leaving more room to clutter your system box with |
| 48 | other memory hungry boards. |
| 49 | |
| 50 | As many ISA and EISA cards can be supported under this driver as you |
| 51 | wish, limited primarily by the available IRQ lines, rather than by the |
| 52 | available I/O addresses (24 ISA, 16 EISA). I have checked different |
| 53 | configurations of multiple depca cards and ewrk3 cards and have not |
| 54 | found a problem yet (provided you have at least depca.c v0.38) ... |
| 55 | |
| 56 | The board IRQ setting must be at an unused IRQ which is auto-probed |
| 57 | using Donald Becker's autoprobe routines. All these cards are at |
| 58 | {5,10,11,15}. |
| 59 | |
| 60 | No 16MB memory limitation should exist with this driver as DMA is not |
| 61 | used and the common memory area is in low memory on the network card (my |
| 62 | current system has 20MB and I've not had problems yet). |
| 63 | |
| 64 | The ability to load this driver as a loadable module has been included |
| 65 | and used extensively during the driver development (to save those long |
| 66 | reboot sequences). To utilise this ability, you have to do 8 things: |
| 67 | |
| 68 | 0) have a copy of the loadable modules code installed on your system. |
| 69 | 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite |
| 70 | temporary directory. |
| 71 | 2) edit the source code near line 1898 to reflect the I/O address and |
| 72 | IRQ you're using. |
| 73 | 3) compile ewrk3.c, but include -DMODULE in the command line to ensure |
| 74 | that the correct bits are compiled (see end of source code). |
| 75 | 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a |
| 76 | kernel with the ewrk3 configuration turned off and reboot. |
| 77 | 5) insmod ewrk3.o |
| 78 | [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y] |
| 79 | [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards] |
| 80 | 6) run the net startup bits for your new eth?? interface manually |
| 81 | (usually /etc/rc.inet[12] at boot time). |
| 82 | 7) enjoy! |
| 83 | |
| 84 | Note that autoprobing is not allowed in loadable modules - the system is |
| 85 | already up and running and you're messing with interrupts. |
| 86 | |
| 87 | To unload a module, turn off the associated interface |
| 88 | 'ifconfig eth?? down' then 'rmmod ewrk3'. |
| 89 | |
| 90 | Promiscuous mode has been turned off in this driver, but all the |
| 91 | multicast address bits have been turned on. This improved the send |
| 92 | performance on a busy network by about 13%. |
| 93 | |
| 94 | Ioctl's have now been provided (primarily because I wanted to grab some |
| 95 | packet size statistics). They are patterned after 'plipconfig.c' from a |
| 96 | suggestion by Alan Cox. Using these ioctls, you can enable promiscuous |
| 97 | mode, add/delete multicast addresses, change the hardware address, get |
| 98 | packet size distribution statistics and muck around with the control and |
| 99 | status register. I'll add others if and when the need arises. |
| 100 | |
| 101 | TO DO: |
| 102 | ------ |
| 103 | |
| 104 | |
| 105 | Revision History |
| 106 | ---------------- |
| 107 | |
| 108 | Version Date Description |
| 109 | |
| 110 | 0.1 26-aug-94 Initial writing. ALPHA code release. |
| 111 | 0.11 31-aug-94 Fixed: 2k mode memory base calc., |
| 112 | LeMAC version calc., |
| 113 | IRQ vector assignments during autoprobe. |
| 114 | 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card. |
| 115 | Fixed up MCA hash table algorithm. |
| 116 | 0.20 4-sep-94 Added IOCTL functionality. |
| 117 | 0.21 14-sep-94 Added I/O mode. |
| 118 | 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0. |
| 119 | 0.22 16-sep-94 Added more IOCTLs & tidied up. |
| 120 | 0.23 21-sep-94 Added transmit cut through. |
| 121 | 0.24 31-oct-94 Added uid checks in some ioctls. |
| 122 | 0.30 1-nov-94 BETA code release. |
| 123 | 0.31 5-dec-94 Added check/allocate region code. |
| 124 | 0.32 16-jan-95 Broadcast packet fix. |
| 125 | 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>. |
| 126 | 0.40 27-Dec-95 Rationalise MODULE and autoprobe code. |
| 127 | Rewrite for portability & updated. |
| 128 | ALPHA support from <jestabro@amt.tay1.dec.com> |
| 129 | Added verify_area() calls in ewrk3_ioctl() from |
| 130 | suggestion by <heiko@colossus.escape.de>. |
| 131 | Add new multicasting code. |
| 132 | 0.41 20-Jan-96 Fix IRQ set up problem reported by |
| 133 | <kenneth@bbs.sas.ntu.ac.sg>. |
| 134 | 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi> |
| 135 | 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c |
| 136 | 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com> |
| 137 | 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net> |
| 138 | 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com> |
| 139 | 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com> |
| 140 | 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua> |
| 141 | ioctl locking, signature search cleanup <akropel1@rochester.rr.com> |
| 142 | |
| 143 | ========================================================================= |
| 144 | */ |
| 145 | |
| 146 | #include <linux/module.h> |
| 147 | #include <linux/kernel.h> |
| 148 | #include <linux/string.h> |
| 149 | #include <linux/errno.h> |
| 150 | #include <linux/ioport.h> |
| 151 | #include <linux/slab.h> |
| 152 | #include <linux/interrupt.h> |
| 153 | #include <linux/delay.h> |
| 154 | #include <linux/init.h> |
| 155 | #include <linux/crc32.h> |
| 156 | #include <linux/netdevice.h> |
| 157 | #include <linux/etherdevice.h> |
| 158 | #include <linux/skbuff.h> |
| 159 | #include <linux/ethtool.h> |
| 160 | #include <linux/time.h> |
| 161 | #include <linux/types.h> |
| 162 | #include <linux/unistd.h> |
| 163 | #include <linux/ctype.h> |
| 164 | #include <linux/bitops.h> |
| 165 | |
| 166 | #include <asm/io.h> |
| 167 | #include <asm/dma.h> |
| 168 | #include <asm/uaccess.h> |
| 169 | |
| 170 | #include "ewrk3.h" |
| 171 | |
| 172 | #define DRV_NAME "ewrk3" |
| 173 | #define DRV_VERSION "0.48" |
| 174 | |
| 175 | static char version[] __initdata = |
| 176 | DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n"; |
| 177 | |
| 178 | #ifdef EWRK3_DEBUG |
| 179 | static int ewrk3_debug = EWRK3_DEBUG; |
| 180 | #else |
| 181 | static int ewrk3_debug = 1; |
| 182 | #endif |
| 183 | |
| 184 | #define EWRK3_NDA 0xffe0 /* No Device Address */ |
| 185 | |
| 186 | #define PROBE_LENGTH 32 |
| 187 | #define ETH_PROM_SIG 0xAA5500FFUL |
| 188 | |
| 189 | #ifndef EWRK3_SIGNATURE |
| 190 | #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""} |
| 191 | #define EWRK3_STRLEN 8 |
| 192 | #endif |
| 193 | |
| 194 | #ifndef EWRK3_RAM_BASE_ADDRESSES |
| 195 | #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000} |
| 196 | #endif |
| 197 | |
| 198 | /* |
| 199 | ** Sets up the I/O area for the autoprobe. |
| 200 | */ |
| 201 | #define EWRK3_IO_BASE 0x100 /* Start address for probe search */ |
| 202 | #define EWRK3_IOP_INC 0x20 /* I/O address increment */ |
| 203 | #define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */ |
| 204 | |
| 205 | #ifndef MAX_NUM_EWRK3S |
| 206 | #define MAX_NUM_EWRK3S 21 |
| 207 | #endif |
| 208 | |
| 209 | #ifndef EWRK3_EISA_IO_PORTS |
| 210 | #define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ |
| 211 | #endif |
| 212 | |
| 213 | #ifndef MAX_EISA_SLOTS |
| 214 | #define MAX_EISA_SLOTS 16 |
| 215 | #define EISA_SLOT_INC 0x1000 |
| 216 | #endif |
| 217 | |
| 218 | #define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */ |
| 219 | |
| 220 | /* |
| 221 | ** EtherWORKS 3 shared memory window sizes |
| 222 | */ |
| 223 | #define IO_ONLY 0x00 |
| 224 | #define SHMEM_2K 0x800 |
| 225 | #define SHMEM_32K 0x8000 |
| 226 | #define SHMEM_64K 0x10000 |
| 227 | |
| 228 | /* |
| 229 | ** EtherWORKS 3 IRQ ENABLE/DISABLE |
| 230 | */ |
| 231 | #define ENABLE_IRQs { \ |
| 232 | icr |= lp->irq_mask;\ |
| 233 | outb(icr, EWRK3_ICR); /* Enable the IRQs */\ |
| 234 | } |
| 235 | |
| 236 | #define DISABLE_IRQs { \ |
| 237 | icr = inb(EWRK3_ICR);\ |
| 238 | icr &= ~lp->irq_mask;\ |
| 239 | outb(icr, EWRK3_ICR); /* Disable the IRQs */\ |
| 240 | } |
| 241 | |
| 242 | /* |
| 243 | ** EtherWORKS 3 START/STOP |
| 244 | */ |
| 245 | #define START_EWRK3 { \ |
| 246 | csr = inb(EWRK3_CSR);\ |
| 247 | csr &= ~(CSR_TXD|CSR_RXD);\ |
| 248 | outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\ |
| 249 | } |
| 250 | |
| 251 | #define STOP_EWRK3 { \ |
| 252 | csr = (CSR_TXD|CSR_RXD);\ |
| 253 | outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\ |
| 254 | } |
| 255 | |
| 256 | /* |
| 257 | ** The EtherWORKS 3 private structure |
| 258 | */ |
| 259 | #define EWRK3_PKT_STAT_SZ 16 |
| 260 | #define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you |
| 261 | increase EWRK3_PKT_STAT_SZ */ |
| 262 | |
| 263 | struct ewrk3_stats { |
| 264 | u32 bins[EWRK3_PKT_STAT_SZ]; |
| 265 | u32 unicast; |
| 266 | u32 multicast; |
| 267 | u32 broadcast; |
| 268 | u32 excessive_collisions; |
| 269 | u32 tx_underruns; |
| 270 | u32 excessive_underruns; |
| 271 | }; |
| 272 | |
| 273 | struct ewrk3_private { |
| 274 | char adapter_name[80]; /* Name exported to /proc/ioports */ |
| 275 | u_long shmem_base; /* Shared memory start address */ |
| 276 | void __iomem *shmem; |
| 277 | u_long shmem_length; /* Shared memory window length */ |
| 278 | struct ewrk3_stats pktStats; /* Private stats counters */ |
| 279 | u_char irq_mask; /* Adapter IRQ mask bits */ |
| 280 | u_char mPage; /* Maximum 2kB Page number */ |
| 281 | u_char lemac; /* Chip rev. level */ |
| 282 | u_char hard_strapped; /* Don't allow a full open */ |
| 283 | u_char txc; /* Transmit cut through */ |
| 284 | void __iomem *mctbl; /* Pointer to the multicast table */ |
| 285 | u_char led_mask; /* Used to reserve LED access for ethtool */ |
| 286 | spinlock_t hw_lock; |
| 287 | }; |
| 288 | |
| 289 | /* |
| 290 | ** Force the EtherWORKS 3 card to be in 2kB MODE |
| 291 | */ |
| 292 | #define FORCE_2K_MODE { \ |
| 293 | shmem_length = SHMEM_2K;\ |
| 294 | outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\ |
| 295 | } |
| 296 | |
| 297 | /* |
| 298 | ** Public Functions |
| 299 | */ |
| 300 | static int ewrk3_open(struct net_device *dev); |
| 301 | static netdev_tx_t ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev); |
| 302 | static irqreturn_t ewrk3_interrupt(int irq, void *dev_id); |
| 303 | static int ewrk3_close(struct net_device *dev); |
| 304 | static void set_multicast_list(struct net_device *dev); |
| 305 | static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 306 | static const struct ethtool_ops ethtool_ops_203; |
| 307 | static const struct ethtool_ops ethtool_ops; |
| 308 | |
| 309 | /* |
| 310 | ** Private functions |
| 311 | */ |
| 312 | static int ewrk3_hw_init(struct net_device *dev, u_long iobase); |
| 313 | static void ewrk3_init(struct net_device *dev); |
| 314 | static int ewrk3_rx(struct net_device *dev); |
| 315 | static int ewrk3_tx(struct net_device *dev); |
| 316 | static void ewrk3_timeout(struct net_device *dev); |
| 317 | |
| 318 | static void EthwrkSignature(char *name, char *eeprom_image); |
| 319 | static int DevicePresent(u_long iobase); |
| 320 | static void SetMulticastFilter(struct net_device *dev); |
| 321 | static int EISA_signature(char *name, s32 eisa_id); |
| 322 | |
| 323 | static int Read_EEPROM(u_long iobase, u_char eaddr); |
| 324 | static int Write_EEPROM(short data, u_long iobase, u_char eaddr); |
| 325 | static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType); |
| 326 | |
| 327 | static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq); |
| 328 | static int isa_probe(struct net_device *dev, u_long iobase); |
| 329 | static int eisa_probe(struct net_device *dev, u_long iobase); |
| 330 | |
| 331 | static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12}; |
| 332 | |
| 333 | static char name[EWRK3_STRLEN + 1]; |
| 334 | static int num_ewrks3s; |
| 335 | |
| 336 | /* |
| 337 | ** Miscellaneous defines... |
| 338 | */ |
| 339 | #define INIT_EWRK3 {\ |
| 340 | outb(EEPROM_INIT, EWRK3_IOPR);\ |
| 341 | mdelay(1);\ |
| 342 | } |
| 343 | |
| 344 | #ifndef MODULE |
| 345 | struct net_device * __init ewrk3_probe(int unit) |
| 346 | { |
| 347 | struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private)); |
| 348 | int err; |
| 349 | |
| 350 | if (!dev) |
| 351 | return ERR_PTR(-ENOMEM); |
| 352 | |
| 353 | if (unit >= 0) { |
| 354 | sprintf(dev->name, "eth%d", unit); |
| 355 | netdev_boot_setup_check(dev); |
| 356 | } |
| 357 | |
| 358 | err = ewrk3_probe1(dev, dev->base_addr, dev->irq); |
| 359 | if (err) |
| 360 | goto out; |
| 361 | return dev; |
| 362 | out: |
| 363 | free_netdev(dev); |
| 364 | return ERR_PTR(err); |
| 365 | |
| 366 | } |
| 367 | #endif |
| 368 | |
| 369 | static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq) |
| 370 | { |
| 371 | int err; |
| 372 | |
| 373 | dev->base_addr = iobase; |
| 374 | dev->irq = irq; |
| 375 | |
| 376 | /* Address PROM pattern */ |
| 377 | err = isa_probe(dev, iobase); |
| 378 | if (err != 0) |
| 379 | err = eisa_probe(dev, iobase); |
| 380 | |
| 381 | if (err) |
| 382 | return err; |
| 383 | |
| 384 | err = register_netdev(dev); |
| 385 | if (err) |
| 386 | release_region(dev->base_addr, EWRK3_TOTAL_SIZE); |
| 387 | |
| 388 | return err; |
| 389 | } |
| 390 | |
| 391 | static const struct net_device_ops ewrk3_netdev_ops = { |
| 392 | .ndo_open = ewrk3_open, |
| 393 | .ndo_start_xmit = ewrk3_queue_pkt, |
| 394 | .ndo_stop = ewrk3_close, |
| 395 | .ndo_set_multicast_list = set_multicast_list, |
| 396 | .ndo_do_ioctl = ewrk3_ioctl, |
| 397 | .ndo_tx_timeout = ewrk3_timeout, |
| 398 | .ndo_change_mtu = eth_change_mtu, |
| 399 | .ndo_set_mac_address = eth_mac_addr, |
| 400 | .ndo_validate_addr = eth_validate_addr, |
| 401 | }; |
| 402 | |
| 403 | static int __init |
| 404 | ewrk3_hw_init(struct net_device *dev, u_long iobase) |
| 405 | { |
| 406 | struct ewrk3_private *lp; |
| 407 | int i, status = 0; |
| 408 | u_long mem_start, shmem_length; |
| 409 | u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0; |
| 410 | u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0; |
| 411 | |
| 412 | /* |
| 413 | ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot. |
| 414 | ** This also disables the EISA_ENABLE bit in the EISA Control Register. |
| 415 | */ |
| 416 | if (iobase > 0x400) |
| 417 | eisa_cr = inb(EISA_CR); |
| 418 | INIT_EWRK3; |
| 419 | |
| 420 | nicsr = inb(EWRK3_CSR); |
| 421 | |
| 422 | icr = inb(EWRK3_ICR); |
| 423 | icr &= 0x70; |
| 424 | outb(icr, EWRK3_ICR); /* Disable all the IRQs */ |
| 425 | |
| 426 | if (nicsr != (CSR_TXD | CSR_RXD)) |
| 427 | return -ENXIO; |
| 428 | |
| 429 | /* Check that the EEPROM is alive and well and not living on Pluto... */ |
| 430 | for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) { |
| 431 | union { |
| 432 | short val; |
| 433 | char c[2]; |
| 434 | } tmp; |
| 435 | |
| 436 | tmp.val = (short) Read_EEPROM(iobase, (i >> 1)); |
| 437 | eeprom_image[i] = tmp.c[0]; |
| 438 | eeprom_image[i + 1] = tmp.c[1]; |
| 439 | chksum += eeprom_image[i] + eeprom_image[i + 1]; |
| 440 | } |
| 441 | |
| 442 | if (chksum != 0) { /* Bad EEPROM Data! */ |
| 443 | printk("%s: Device has a bad on-board EEPROM.\n", dev->name); |
| 444 | return -ENXIO; |
| 445 | } |
| 446 | |
| 447 | EthwrkSignature(name, eeprom_image); |
| 448 | if (*name == '\0') |
| 449 | return -ENXIO; |
| 450 | |
| 451 | dev->base_addr = iobase; |
| 452 | |
| 453 | if (iobase > 0x400) { |
| 454 | outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */ |
| 455 | } |
| 456 | lemac = eeprom_image[EEPROM_CHIPVER]; |
| 457 | cmr = inb(EWRK3_CMR); |
| 458 | |
| 459 | if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) || |
| 460 | ((lemac == LeMAC2) && !(cmr & CMR_HS))) { |
| 461 | printk("%s: %s at %#4lx", dev->name, name, iobase); |
| 462 | hard_strapped = 1; |
| 463 | } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) { |
| 464 | /* EISA slot address */ |
| 465 | printk("%s: %s at %#4lx (EISA slot %ld)", |
| 466 | dev->name, name, iobase, ((iobase >> 12) & 0x0f)); |
| 467 | } else { /* ISA port address */ |
| 468 | printk("%s: %s at %#4lx", dev->name, name, iobase); |
| 469 | } |
| 470 | |
| 471 | printk(", h/w address "); |
| 472 | if (lemac != LeMAC2) |
| 473 | DevicePresent(iobase); /* need after EWRK3_INIT */ |
| 474 | status = get_hw_addr(dev, eeprom_image, lemac); |
| 475 | printk("%pM\n", dev->dev_addr); |
| 476 | |
| 477 | if (status) { |
| 478 | printk(" which has an EEPROM CRC error.\n"); |
| 479 | return -ENXIO; |
| 480 | } |
| 481 | |
| 482 | if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */ |
| 483 | cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS); |
| 484 | if (eeprom_image[EEPROM_MISC0] & READ_AHEAD) |
| 485 | cmr |= CMR_RA; |
| 486 | if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND) |
| 487 | cmr |= CMR_WB; |
| 488 | if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL) |
| 489 | cmr |= CMR_POLARITY; |
| 490 | if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK) |
| 491 | cmr |= CMR_LINK; |
| 492 | if (eeprom_image[EEPROM_MISC0] & _0WS_ENA) |
| 493 | cmr |= CMR_0WS; |
| 494 | } |
| 495 | if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM) |
| 496 | cmr |= CMR_DRAM; |
| 497 | outb(cmr, EWRK3_CMR); |
| 498 | |
| 499 | cr = inb(EWRK3_CR); /* Set up the Control Register */ |
| 500 | cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD; |
| 501 | if (cr & SETUP_APD) |
| 502 | cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS; |
| 503 | cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS; |
| 504 | cr |= eeprom_image[EEPROM_MISC0] & ENA_16; |
| 505 | outb(cr, EWRK3_CR); |
| 506 | |
| 507 | /* |
| 508 | ** Determine the base address and window length for the EWRK3 |
| 509 | ** RAM from the memory base register. |
| 510 | */ |
| 511 | mem_start = inb(EWRK3_MBR); |
| 512 | shmem_length = 0; |
| 513 | if (mem_start != 0) { |
| 514 | if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) { |
| 515 | mem_start *= SHMEM_64K; |
| 516 | shmem_length = SHMEM_64K; |
| 517 | } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) { |
| 518 | mem_start *= SHMEM_32K; |
| 519 | shmem_length = SHMEM_32K; |
| 520 | } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) { |
| 521 | mem_start = mem_start * SHMEM_2K + 0x80000; |
| 522 | shmem_length = SHMEM_2K; |
| 523 | } else { |
| 524 | return -ENXIO; |
| 525 | } |
| 526 | } |
| 527 | /* |
| 528 | ** See the top of this source code for comments about |
| 529 | ** uncommenting this line. |
| 530 | */ |
| 531 | /* FORCE_2K_MODE; */ |
| 532 | |
| 533 | if (hard_strapped) { |
| 534 | printk(" is hard strapped.\n"); |
| 535 | } else if (mem_start) { |
| 536 | printk(" has a %dk RAM window", (int) (shmem_length >> 10)); |
| 537 | printk(" at 0x%.5lx", mem_start); |
| 538 | } else { |
| 539 | printk(" is in I/O only mode"); |
| 540 | } |
| 541 | |
| 542 | lp = netdev_priv(dev); |
| 543 | lp->shmem_base = mem_start; |
| 544 | lp->shmem = ioremap(mem_start, shmem_length); |
| 545 | if (!lp->shmem) |
| 546 | return -ENOMEM; |
| 547 | lp->shmem_length = shmem_length; |
| 548 | lp->lemac = lemac; |
| 549 | lp->hard_strapped = hard_strapped; |
| 550 | lp->led_mask = CR_LED; |
| 551 | spin_lock_init(&lp->hw_lock); |
| 552 | |
| 553 | lp->mPage = 64; |
| 554 | if (cmr & CMR_DRAM) |
| 555 | lp->mPage <<= 1; /* 2 DRAMS on module */ |
| 556 | |
| 557 | sprintf(lp->adapter_name, "%s (%s)", name, dev->name); |
| 558 | |
| 559 | lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM; |
| 560 | |
| 561 | if (!hard_strapped) { |
| 562 | /* |
| 563 | ** Enable EWRK3 board interrupts for autoprobing |
| 564 | */ |
| 565 | icr |= ICR_IE; /* Enable interrupts */ |
| 566 | outb(icr, EWRK3_ICR); |
| 567 | |
| 568 | /* The DMA channel may be passed in on this parameter. */ |
| 569 | dev->dma = 0; |
| 570 | |
| 571 | /* To auto-IRQ we enable the initialization-done and DMA err, |
| 572 | interrupts. For now we will always get a DMA error. */ |
| 573 | if (dev->irq < 2) { |
| 574 | #ifndef MODULE |
| 575 | u_char irqnum; |
| 576 | unsigned long irq_mask; |
| 577 | |
| 578 | |
| 579 | irq_mask = probe_irq_on(); |
| 580 | |
| 581 | /* |
| 582 | ** Trigger a TNE interrupt. |
| 583 | */ |
| 584 | icr |= ICR_TNEM; |
| 585 | outb(1, EWRK3_TDQ); /* Write to the TX done queue */ |
| 586 | outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */ |
| 587 | |
| 588 | irqnum = irq[((icr & IRQ_SEL) >> 4)]; |
| 589 | |
| 590 | mdelay(20); |
| 591 | dev->irq = probe_irq_off(irq_mask); |
| 592 | if ((dev->irq) && (irqnum == dev->irq)) { |
| 593 | printk(" and uses IRQ%d.\n", dev->irq); |
| 594 | } else { |
| 595 | if (!dev->irq) { |
| 596 | printk(" and failed to detect IRQ line.\n"); |
| 597 | } else if ((irqnum == 1) && (lemac == LeMAC2)) { |
| 598 | printk(" and an illegal IRQ line detected.\n"); |
| 599 | } else { |
| 600 | printk(", but incorrect IRQ line detected.\n"); |
| 601 | } |
| 602 | iounmap(lp->shmem); |
| 603 | return -ENXIO; |
| 604 | } |
| 605 | |
| 606 | DISABLE_IRQs; /* Mask all interrupts */ |
| 607 | |
| 608 | #endif /* MODULE */ |
| 609 | } else { |
| 610 | printk(" and requires IRQ%d.\n", dev->irq); |
| 611 | } |
| 612 | } |
| 613 | |
| 614 | if (ewrk3_debug > 1) { |
| 615 | printk(version); |
| 616 | } |
| 617 | /* The EWRK3-specific entries in the device structure. */ |
| 618 | dev->netdev_ops = &ewrk3_netdev_ops; |
| 619 | if (lp->adapter_name[4] == '3') |
| 620 | SET_ETHTOOL_OPS(dev, ðtool_ops_203); |
| 621 | else |
| 622 | SET_ETHTOOL_OPS(dev, ðtool_ops); |
| 623 | dev->watchdog_timeo = QUEUE_PKT_TIMEOUT; |
| 624 | |
| 625 | dev->mem_start = 0; |
| 626 | |
| 627 | return 0; |
| 628 | } |
| 629 | |
| 630 | |
| 631 | static int ewrk3_open(struct net_device *dev) |
| 632 | { |
| 633 | struct ewrk3_private *lp = netdev_priv(dev); |
| 634 | u_long iobase = dev->base_addr; |
| 635 | int status = 0; |
| 636 | u_char icr, csr; |
| 637 | |
| 638 | /* |
| 639 | ** Stop the TX and RX... |
| 640 | */ |
| 641 | STOP_EWRK3; |
| 642 | |
| 643 | if (!lp->hard_strapped) { |
| 644 | if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) { |
| 645 | printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq); |
| 646 | status = -EAGAIN; |
| 647 | } else { |
| 648 | |
| 649 | /* |
| 650 | ** Re-initialize the EWRK3... |
| 651 | */ |
| 652 | ewrk3_init(dev); |
| 653 | |
| 654 | if (ewrk3_debug > 1) { |
| 655 | printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq); |
| 656 | printk(" physical address: %pM\n", dev->dev_addr); |
| 657 | if (lp->shmem_length == 0) { |
| 658 | printk(" no shared memory, I/O only mode\n"); |
| 659 | } else { |
| 660 | printk(" start of shared memory: 0x%08lx\n", lp->shmem_base); |
| 661 | printk(" window length: 0x%04lx\n", lp->shmem_length); |
| 662 | } |
| 663 | printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1)); |
| 664 | printk(" csr: 0x%02x\n", inb(EWRK3_CSR)); |
| 665 | printk(" cr: 0x%02x\n", inb(EWRK3_CR)); |
| 666 | printk(" icr: 0x%02x\n", inb(EWRK3_ICR)); |
| 667 | printk(" cmr: 0x%02x\n", inb(EWRK3_CMR)); |
| 668 | printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC)); |
| 669 | } |
| 670 | netif_start_queue(dev); |
| 671 | /* |
| 672 | ** Unmask EWRK3 board interrupts |
| 673 | */ |
| 674 | icr = inb(EWRK3_ICR); |
| 675 | ENABLE_IRQs; |
| 676 | |
| 677 | } |
| 678 | } else { |
| 679 | printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name); |
| 680 | printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n"); |
| 681 | return -EINVAL; |
| 682 | } |
| 683 | |
| 684 | return status; |
| 685 | } |
| 686 | |
| 687 | /* |
| 688 | ** Initialize the EtherWORKS 3 operating conditions |
| 689 | */ |
| 690 | static void ewrk3_init(struct net_device *dev) |
| 691 | { |
| 692 | struct ewrk3_private *lp = netdev_priv(dev); |
| 693 | u_char csr, page; |
| 694 | u_long iobase = dev->base_addr; |
| 695 | int i; |
| 696 | |
| 697 | /* |
| 698 | ** Enable any multicasts |
| 699 | */ |
| 700 | set_multicast_list(dev); |
| 701 | |
| 702 | /* |
| 703 | ** Set hardware MAC address. Address is initialized from the EEPROM |
| 704 | ** during startup but may have since been changed by the user. |
| 705 | */ |
| 706 | for (i=0; i<ETH_ALEN; i++) |
| 707 | outb(dev->dev_addr[i], EWRK3_PAR0 + i); |
| 708 | |
| 709 | /* |
| 710 | ** Clean out any remaining entries in all the queues here |
| 711 | */ |
| 712 | while (inb(EWRK3_TQ)); |
| 713 | while (inb(EWRK3_TDQ)); |
| 714 | while (inb(EWRK3_RQ)); |
| 715 | while (inb(EWRK3_FMQ)); |
| 716 | |
| 717 | /* |
| 718 | ** Write a clean free memory queue |
| 719 | */ |
| 720 | for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */ |
| 721 | outb(page, EWRK3_FMQ); /* to the Free Memory Queue */ |
| 722 | } |
| 723 | |
| 724 | START_EWRK3; /* Enable the TX and/or RX */ |
| 725 | } |
| 726 | |
| 727 | /* |
| 728 | * Transmit timeout |
| 729 | */ |
| 730 | |
| 731 | static void ewrk3_timeout(struct net_device *dev) |
| 732 | { |
| 733 | struct ewrk3_private *lp = netdev_priv(dev); |
| 734 | u_char icr, csr; |
| 735 | u_long iobase = dev->base_addr; |
| 736 | |
| 737 | if (!lp->hard_strapped) |
| 738 | { |
| 739 | printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n", |
| 740 | dev->name, inb(EWRK3_CSR)); |
| 741 | |
| 742 | /* |
| 743 | ** Mask all board interrupts |
| 744 | */ |
| 745 | DISABLE_IRQs; |
| 746 | |
| 747 | /* |
| 748 | ** Stop the TX and RX... |
| 749 | */ |
| 750 | STOP_EWRK3; |
| 751 | |
| 752 | ewrk3_init(dev); |
| 753 | |
| 754 | /* |
| 755 | ** Unmask EWRK3 board interrupts |
| 756 | */ |
| 757 | ENABLE_IRQs; |
| 758 | |
| 759 | dev->trans_start = jiffies; |
| 760 | netif_wake_queue(dev); |
| 761 | } |
| 762 | } |
| 763 | |
| 764 | /* |
| 765 | ** Writes a socket buffer to the free page queue |
| 766 | */ |
| 767 | static netdev_tx_t ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev) |
| 768 | { |
| 769 | struct ewrk3_private *lp = netdev_priv(dev); |
| 770 | u_long iobase = dev->base_addr; |
| 771 | void __iomem *buf = NULL; |
| 772 | u_char icr; |
| 773 | u_char page; |
| 774 | |
| 775 | spin_lock_irq (&lp->hw_lock); |
| 776 | DISABLE_IRQs; |
| 777 | |
| 778 | /* if no resources available, exit, request packet be queued */ |
| 779 | if (inb (EWRK3_FMQC) == 0) { |
| 780 | printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n", |
| 781 | dev->name); |
| 782 | printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n", |
| 783 | dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR), |
| 784 | inb (EWRK3_FMQC)); |
| 785 | goto err_out; |
| 786 | } |
| 787 | |
| 788 | /* |
| 789 | ** Get a free page from the FMQ |
| 790 | */ |
| 791 | if ((page = inb (EWRK3_FMQ)) >= lp->mPage) { |
| 792 | printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n", |
| 793 | (u_char) page); |
| 794 | goto err_out; |
| 795 | } |
| 796 | |
| 797 | |
| 798 | /* |
| 799 | ** Set up shared memory window and pointer into the window |
| 800 | */ |
| 801 | if (lp->shmem_length == IO_ONLY) { |
| 802 | outb (page, EWRK3_IOPR); |
| 803 | } else if (lp->shmem_length == SHMEM_2K) { |
| 804 | buf = lp->shmem; |
| 805 | outb (page, EWRK3_MPR); |
| 806 | } else if (lp->shmem_length == SHMEM_32K) { |
| 807 | buf = (((short) page << 11) & 0x7800) + lp->shmem; |
| 808 | outb ((page >> 4), EWRK3_MPR); |
| 809 | } else if (lp->shmem_length == SHMEM_64K) { |
| 810 | buf = (((short) page << 11) & 0xf800) + lp->shmem; |
| 811 | outb ((page >> 5), EWRK3_MPR); |
| 812 | } else { |
| 813 | printk (KERN_ERR "%s: Oops - your private data area is hosed!\n", |
| 814 | dev->name); |
| 815 | BUG (); |
| 816 | } |
| 817 | |
| 818 | /* |
| 819 | ** Set up the buffer control structures and copy the data from |
| 820 | ** the socket buffer to the shared memory . |
| 821 | */ |
| 822 | if (lp->shmem_length == IO_ONLY) { |
| 823 | int i; |
| 824 | u_char *p = skb->data; |
| 825 | outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA); |
| 826 | outb ((char) (skb->len & 0xff), EWRK3_DATA); |
| 827 | outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA); |
| 828 | outb ((char) 0x04, EWRK3_DATA); |
| 829 | for (i = 0; i < skb->len; i++) { |
| 830 | outb (*p++, EWRK3_DATA); |
| 831 | } |
| 832 | outb (page, EWRK3_TQ); /* Start sending pkt */ |
| 833 | } else { |
| 834 | writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */ |
| 835 | buf += 1; |
| 836 | writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */ |
| 837 | buf += 1; |
| 838 | if (lp->txc) { |
| 839 | writeb(((skb->len >> 8) & 0xff) | XCT, buf); |
| 840 | buf += 1; |
| 841 | writeb (0x04, buf); /* index byte */ |
| 842 | buf += 1; |
| 843 | writeb (0x00, (buf + skb->len)); /* Write the XCT flag */ |
| 844 | memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */ |
| 845 | outb (page, EWRK3_TQ); /* Start sending pkt */ |
| 846 | memcpy_toio (buf + PRELOAD, |
| 847 | skb->data + PRELOAD, |
| 848 | skb->len - PRELOAD); |
| 849 | writeb (0xff, (buf + skb->len)); /* Write the XCT flag */ |
| 850 | } else { |
| 851 | writeb ((skb->len >> 8) & 0xff, buf); |
| 852 | buf += 1; |
| 853 | writeb (0x04, buf); /* index byte */ |
| 854 | buf += 1; |
| 855 | memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */ |
| 856 | outb (page, EWRK3_TQ); /* Start sending pkt */ |
| 857 | } |
| 858 | } |
| 859 | |
| 860 | ENABLE_IRQs; |
| 861 | spin_unlock_irq (&lp->hw_lock); |
| 862 | |
| 863 | dev->stats.tx_bytes += skb->len; |
| 864 | dev->trans_start = jiffies; |
| 865 | dev_kfree_skb (skb); |
| 866 | |
| 867 | /* Check for free resources: stop Tx queue if there are none */ |
| 868 | if (inb (EWRK3_FMQC) == 0) |
| 869 | netif_stop_queue (dev); |
| 870 | |
| 871 | return NETDEV_TX_OK; |
| 872 | |
| 873 | err_out: |
| 874 | ENABLE_IRQs; |
| 875 | spin_unlock_irq (&lp->hw_lock); |
| 876 | return NETDEV_TX_BUSY; |
| 877 | } |
| 878 | |
| 879 | /* |
| 880 | ** The EWRK3 interrupt handler. |
| 881 | */ |
| 882 | static irqreturn_t ewrk3_interrupt(int irq, void *dev_id) |
| 883 | { |
| 884 | struct net_device *dev = dev_id; |
| 885 | struct ewrk3_private *lp; |
| 886 | u_long iobase; |
| 887 | u_char icr, cr, csr; |
| 888 | |
| 889 | lp = netdev_priv(dev); |
| 890 | iobase = dev->base_addr; |
| 891 | |
| 892 | /* get the interrupt information */ |
| 893 | csr = inb(EWRK3_CSR); |
| 894 | |
| 895 | /* |
| 896 | ** Mask the EWRK3 board interrupts and turn on the LED |
| 897 | */ |
| 898 | spin_lock(&lp->hw_lock); |
| 899 | DISABLE_IRQs; |
| 900 | |
| 901 | cr = inb(EWRK3_CR); |
| 902 | cr |= lp->led_mask; |
| 903 | outb(cr, EWRK3_CR); |
| 904 | |
| 905 | if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */ |
| 906 | ewrk3_rx(dev); |
| 907 | |
| 908 | if (csr & CSR_TNE) /* Tx interrupt (packet sent) */ |
| 909 | ewrk3_tx(dev); |
| 910 | |
| 911 | /* |
| 912 | ** Now deal with the TX/RX disable flags. These are set when there |
| 913 | ** are no more resources. If resources free up then enable these |
| 914 | ** interrupts, otherwise mask them - failure to do this will result |
| 915 | ** in the system hanging in an interrupt loop. |
| 916 | */ |
| 917 | if (inb(EWRK3_FMQC)) { /* any resources available? */ |
| 918 | lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */ |
| 919 | csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */ |
| 920 | outb(csr, EWRK3_CSR); |
| 921 | netif_wake_queue(dev); |
| 922 | } else { |
| 923 | lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */ |
| 924 | } |
| 925 | |
| 926 | /* Unmask the EWRK3 board interrupts and turn off the LED */ |
| 927 | cr &= ~(lp->led_mask); |
| 928 | outb(cr, EWRK3_CR); |
| 929 | ENABLE_IRQs; |
| 930 | spin_unlock(&lp->hw_lock); |
| 931 | return IRQ_HANDLED; |
| 932 | } |
| 933 | |
| 934 | /* Called with lp->hw_lock held */ |
| 935 | static int ewrk3_rx(struct net_device *dev) |
| 936 | { |
| 937 | struct ewrk3_private *lp = netdev_priv(dev); |
| 938 | u_long iobase = dev->base_addr; |
| 939 | int i, status = 0; |
| 940 | u_char page; |
| 941 | void __iomem *buf = NULL; |
| 942 | |
| 943 | while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */ |
| 944 | if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */ |
| 945 | /* |
| 946 | ** Set up shared memory window and pointer into the window |
| 947 | */ |
| 948 | if (lp->shmem_length == IO_ONLY) { |
| 949 | outb(page, EWRK3_IOPR); |
| 950 | } else if (lp->shmem_length == SHMEM_2K) { |
| 951 | buf = lp->shmem; |
| 952 | outb(page, EWRK3_MPR); |
| 953 | } else if (lp->shmem_length == SHMEM_32K) { |
| 954 | buf = (((short) page << 11) & 0x7800) + lp->shmem; |
| 955 | outb((page >> 4), EWRK3_MPR); |
| 956 | } else if (lp->shmem_length == SHMEM_64K) { |
| 957 | buf = (((short) page << 11) & 0xf800) + lp->shmem; |
| 958 | outb((page >> 5), EWRK3_MPR); |
| 959 | } else { |
| 960 | status = -1; |
| 961 | printk("%s: Oops - your private data area is hosed!\n", dev->name); |
| 962 | } |
| 963 | |
| 964 | if (!status) { |
| 965 | char rx_status; |
| 966 | int pkt_len; |
| 967 | |
| 968 | if (lp->shmem_length == IO_ONLY) { |
| 969 | rx_status = inb(EWRK3_DATA); |
| 970 | pkt_len = inb(EWRK3_DATA); |
| 971 | pkt_len |= ((u_short) inb(EWRK3_DATA) << 8); |
| 972 | } else { |
| 973 | rx_status = readb(buf); |
| 974 | buf += 1; |
| 975 | pkt_len = readw(buf); |
| 976 | buf += 3; |
| 977 | } |
| 978 | |
| 979 | if (!(rx_status & R_ROK)) { /* There was an error. */ |
| 980 | dev->stats.rx_errors++; /* Update the error stats. */ |
| 981 | if (rx_status & R_DBE) |
| 982 | dev->stats.rx_frame_errors++; |
| 983 | if (rx_status & R_CRC) |
| 984 | dev->stats.rx_crc_errors++; |
| 985 | if (rx_status & R_PLL) |
| 986 | dev->stats.rx_fifo_errors++; |
| 987 | } else { |
| 988 | struct sk_buff *skb; |
| 989 | |
| 990 | if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) { |
| 991 | unsigned char *p; |
| 992 | skb_reserve(skb, 2); /* Align to 16 bytes */ |
| 993 | p = skb_put(skb, pkt_len); |
| 994 | |
| 995 | if (lp->shmem_length == IO_ONLY) { |
| 996 | *p = inb(EWRK3_DATA); /* dummy read */ |
| 997 | for (i = 0; i < pkt_len; i++) { |
| 998 | *p++ = inb(EWRK3_DATA); |
| 999 | } |
| 1000 | } else { |
| 1001 | memcpy_fromio(p, buf, pkt_len); |
| 1002 | } |
| 1003 | |
| 1004 | for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) { |
| 1005 | if (pkt_len < i * EWRK3_PKT_BIN_SZ) { |
| 1006 | lp->pktStats.bins[i]++; |
| 1007 | i = EWRK3_PKT_STAT_SZ; |
| 1008 | } |
| 1009 | } |
| 1010 | p = skb->data; /* Look at the dest addr */ |
| 1011 | if (p[0] & 0x01) { /* Multicast/Broadcast */ |
| 1012 | if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) { |
| 1013 | lp->pktStats.broadcast++; |
| 1014 | } else { |
| 1015 | lp->pktStats.multicast++; |
| 1016 | } |
| 1017 | } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) && |
| 1018 | (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) && |
| 1019 | (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) { |
| 1020 | lp->pktStats.unicast++; |
| 1021 | } |
| 1022 | lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */ |
| 1023 | if (lp->pktStats.bins[0] == 0) { /* Reset counters */ |
| 1024 | memset(&lp->pktStats, 0, sizeof(lp->pktStats)); |
| 1025 | } |
| 1026 | /* |
| 1027 | ** Notify the upper protocol layers that there is another |
| 1028 | ** packet to handle |
| 1029 | */ |
| 1030 | skb->protocol = eth_type_trans(skb, dev); |
| 1031 | netif_rx(skb); |
| 1032 | |
| 1033 | /* |
| 1034 | ** Update stats |
| 1035 | */ |
| 1036 | dev->stats.rx_packets++; |
| 1037 | dev->stats.rx_bytes += pkt_len; |
| 1038 | } else { |
| 1039 | printk("%s: Insufficient memory; nuking packet.\n", dev->name); |
| 1040 | dev->stats.rx_dropped++; /* Really, deferred. */ |
| 1041 | break; |
| 1042 | } |
| 1043 | } |
| 1044 | } |
| 1045 | /* |
| 1046 | ** Return the received buffer to the free memory queue |
| 1047 | */ |
| 1048 | outb(page, EWRK3_FMQ); |
| 1049 | } else { |
| 1050 | printk("ewrk3_rx(): Illegal page number, page %d\n", page); |
| 1051 | printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC)); |
| 1052 | } |
| 1053 | } |
| 1054 | return status; |
| 1055 | } |
| 1056 | |
| 1057 | /* |
| 1058 | ** Buffer sent - check for TX buffer errors. |
| 1059 | ** Called with lp->hw_lock held |
| 1060 | */ |
| 1061 | static int ewrk3_tx(struct net_device *dev) |
| 1062 | { |
| 1063 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1064 | u_long iobase = dev->base_addr; |
| 1065 | u_char tx_status; |
| 1066 | |
| 1067 | while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */ |
| 1068 | if (tx_status & T_VSTS) { /* The status is valid */ |
| 1069 | if (tx_status & T_TXE) { |
| 1070 | dev->stats.tx_errors++; |
| 1071 | if (tx_status & T_NCL) |
| 1072 | dev->stats.tx_carrier_errors++; |
| 1073 | if (tx_status & T_LCL) |
| 1074 | dev->stats.tx_window_errors++; |
| 1075 | if (tx_status & T_CTU) { |
| 1076 | if ((tx_status & T_COLL) ^ T_XUR) { |
| 1077 | lp->pktStats.tx_underruns++; |
| 1078 | } else { |
| 1079 | lp->pktStats.excessive_underruns++; |
| 1080 | } |
| 1081 | } else if (tx_status & T_COLL) { |
| 1082 | if ((tx_status & T_COLL) ^ T_XCOLL) { |
| 1083 | dev->stats.collisions++; |
| 1084 | } else { |
| 1085 | lp->pktStats.excessive_collisions++; |
| 1086 | } |
| 1087 | } |
| 1088 | } else { |
| 1089 | dev->stats.tx_packets++; |
| 1090 | } |
| 1091 | } |
| 1092 | } |
| 1093 | |
| 1094 | return 0; |
| 1095 | } |
| 1096 | |
| 1097 | static int ewrk3_close(struct net_device *dev) |
| 1098 | { |
| 1099 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1100 | u_long iobase = dev->base_addr; |
| 1101 | u_char icr, csr; |
| 1102 | |
| 1103 | netif_stop_queue(dev); |
| 1104 | |
| 1105 | if (ewrk3_debug > 1) { |
| 1106 | printk("%s: Shutting down ethercard, status was %2.2x.\n", |
| 1107 | dev->name, inb(EWRK3_CSR)); |
| 1108 | } |
| 1109 | /* |
| 1110 | ** We stop the EWRK3 here... mask interrupts and stop TX & RX |
| 1111 | */ |
| 1112 | DISABLE_IRQs; |
| 1113 | |
| 1114 | STOP_EWRK3; |
| 1115 | |
| 1116 | /* |
| 1117 | ** Clean out the TX and RX queues here (note that one entry |
| 1118 | ** may get added to either the TXD or RX queues if the TX or RX |
| 1119 | ** just starts processing a packet before the STOP_EWRK3 command |
| 1120 | ** is received. This will be flushed in the ewrk3_open() call). |
| 1121 | */ |
| 1122 | while (inb(EWRK3_TQ)); |
| 1123 | while (inb(EWRK3_TDQ)); |
| 1124 | while (inb(EWRK3_RQ)); |
| 1125 | |
| 1126 | if (!lp->hard_strapped) { |
| 1127 | free_irq(dev->irq, dev); |
| 1128 | } |
| 1129 | return 0; |
| 1130 | } |
| 1131 | |
| 1132 | /* |
| 1133 | ** Set or clear the multicast filter for this adapter. |
| 1134 | */ |
| 1135 | static void set_multicast_list(struct net_device *dev) |
| 1136 | { |
| 1137 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1138 | u_long iobase = dev->base_addr; |
| 1139 | u_char csr; |
| 1140 | |
| 1141 | csr = inb(EWRK3_CSR); |
| 1142 | |
| 1143 | if (lp->shmem_length == IO_ONLY) { |
| 1144 | lp->mctbl = NULL; |
| 1145 | } else { |
| 1146 | lp->mctbl = lp->shmem + PAGE0_HTE; |
| 1147 | } |
| 1148 | |
| 1149 | csr &= ~(CSR_PME | CSR_MCE); |
| 1150 | if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ |
| 1151 | csr |= CSR_PME; |
| 1152 | outb(csr, EWRK3_CSR); |
| 1153 | } else { |
| 1154 | SetMulticastFilter(dev); |
| 1155 | csr |= CSR_MCE; |
| 1156 | outb(csr, EWRK3_CSR); |
| 1157 | } |
| 1158 | } |
| 1159 | |
| 1160 | /* |
| 1161 | ** Calculate the hash code and update the logical address filter |
| 1162 | ** from a list of ethernet multicast addresses. |
| 1163 | ** Little endian crc one liner from Matt Thomas, DEC. |
| 1164 | ** |
| 1165 | ** Note that when clearing the table, the broadcast bit must remain asserted |
| 1166 | ** to receive broadcast messages. |
| 1167 | */ |
| 1168 | static void SetMulticastFilter(struct net_device *dev) |
| 1169 | { |
| 1170 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1171 | struct dev_mc_list *dmi = dev->mc_list; |
| 1172 | u_long iobase = dev->base_addr; |
| 1173 | int i; |
| 1174 | char *addrs, bit, byte; |
| 1175 | short __iomem *p = lp->mctbl; |
| 1176 | u16 hashcode; |
| 1177 | u32 crc; |
| 1178 | |
| 1179 | spin_lock_irq(&lp->hw_lock); |
| 1180 | |
| 1181 | if (lp->shmem_length == IO_ONLY) { |
| 1182 | outb(0, EWRK3_IOPR); |
| 1183 | outw(PAGE0_HTE, EWRK3_PIR1); |
| 1184 | } else { |
| 1185 | outb(0, EWRK3_MPR); |
| 1186 | } |
| 1187 | |
| 1188 | if (dev->flags & IFF_ALLMULTI) { |
| 1189 | for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) { |
| 1190 | if (lp->shmem_length == IO_ONLY) { |
| 1191 | outb(0xff, EWRK3_DATA); |
| 1192 | } else { /* memset didn't work here */ |
| 1193 | writew(0xffff, p); |
| 1194 | p++; |
| 1195 | i++; |
| 1196 | } |
| 1197 | } |
| 1198 | } else { |
| 1199 | /* Clear table except for broadcast bit */ |
| 1200 | if (lp->shmem_length == IO_ONLY) { |
| 1201 | for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) { |
| 1202 | outb(0x00, EWRK3_DATA); |
| 1203 | } |
| 1204 | outb(0x80, EWRK3_DATA); |
| 1205 | i++; /* insert the broadcast bit */ |
| 1206 | for (; i < (HASH_TABLE_LEN >> 3); i++) { |
| 1207 | outb(0x00, EWRK3_DATA); |
| 1208 | } |
| 1209 | } else { |
| 1210 | memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3); |
| 1211 | writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1); |
| 1212 | } |
| 1213 | |
| 1214 | /* Update table */ |
| 1215 | for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */ |
| 1216 | addrs = dmi->dmi_addr; |
| 1217 | dmi = dmi->next; |
| 1218 | if ((*addrs & 0x01) == 1) { /* multicast address? */ |
| 1219 | crc = ether_crc_le(ETH_ALEN, addrs); |
| 1220 | hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */ |
| 1221 | |
| 1222 | byte = hashcode >> 3; /* bit[3-8] -> byte in filter */ |
| 1223 | bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */ |
| 1224 | |
| 1225 | if (lp->shmem_length == IO_ONLY) { |
| 1226 | u_char tmp; |
| 1227 | |
| 1228 | outw(PAGE0_HTE + byte, EWRK3_PIR1); |
| 1229 | tmp = inb(EWRK3_DATA); |
| 1230 | tmp |= bit; |
| 1231 | outw(PAGE0_HTE + byte, EWRK3_PIR1); |
| 1232 | outb(tmp, EWRK3_DATA); |
| 1233 | } else { |
| 1234 | writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte); |
| 1235 | } |
| 1236 | } |
| 1237 | } |
| 1238 | } |
| 1239 | |
| 1240 | spin_unlock_irq(&lp->hw_lock); |
| 1241 | } |
| 1242 | |
| 1243 | /* |
| 1244 | ** ISA bus I/O device probe |
| 1245 | */ |
| 1246 | static int __init isa_probe(struct net_device *dev, u_long ioaddr) |
| 1247 | { |
| 1248 | int i = num_ewrks3s, maxSlots; |
| 1249 | int ret = -ENODEV; |
| 1250 | |
| 1251 | u_long iobase; |
| 1252 | |
| 1253 | if (ioaddr >= 0x400) |
| 1254 | goto out; |
| 1255 | |
| 1256 | if (ioaddr == 0) { /* Autoprobing */ |
| 1257 | iobase = EWRK3_IO_BASE; /* Get the first slot address */ |
| 1258 | maxSlots = 24; |
| 1259 | } else { /* Probe a specific location */ |
| 1260 | iobase = ioaddr; |
| 1261 | maxSlots = i + 1; |
| 1262 | } |
| 1263 | |
| 1264 | for (; (i < maxSlots) && (dev != NULL); |
| 1265 | iobase += EWRK3_IOP_INC, i++) |
| 1266 | { |
| 1267 | if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) { |
| 1268 | if (DevicePresent(iobase) == 0) { |
| 1269 | int irq = dev->irq; |
| 1270 | ret = ewrk3_hw_init(dev, iobase); |
| 1271 | if (!ret) |
| 1272 | break; |
| 1273 | dev->irq = irq; |
| 1274 | } |
| 1275 | release_region(iobase, EWRK3_TOTAL_SIZE); |
| 1276 | } |
| 1277 | } |
| 1278 | out: |
| 1279 | |
| 1280 | return ret; |
| 1281 | } |
| 1282 | |
| 1283 | /* |
| 1284 | ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually |
| 1285 | ** the motherboard. |
| 1286 | */ |
| 1287 | static int __init eisa_probe(struct net_device *dev, u_long ioaddr) |
| 1288 | { |
| 1289 | int i, maxSlots; |
| 1290 | u_long iobase; |
| 1291 | int ret = -ENODEV; |
| 1292 | |
| 1293 | if (ioaddr < 0x1000) |
| 1294 | goto out; |
| 1295 | |
| 1296 | iobase = ioaddr; |
| 1297 | i = (ioaddr >> 12); |
| 1298 | maxSlots = i + 1; |
| 1299 | |
| 1300 | for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) { |
| 1301 | if (EISA_signature(name, EISA_ID) == 0) { |
| 1302 | if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) && |
| 1303 | DevicePresent(iobase) == 0) { |
| 1304 | int irq = dev->irq; |
| 1305 | ret = ewrk3_hw_init(dev, iobase); |
| 1306 | if (!ret) |
| 1307 | break; |
| 1308 | dev->irq = irq; |
| 1309 | } |
| 1310 | release_region(iobase, EWRK3_TOTAL_SIZE); |
| 1311 | } |
| 1312 | } |
| 1313 | |
| 1314 | out: |
| 1315 | return ret; |
| 1316 | } |
| 1317 | |
| 1318 | |
| 1319 | /* |
| 1320 | ** Read the EWRK3 EEPROM using this routine |
| 1321 | */ |
| 1322 | static int Read_EEPROM(u_long iobase, u_char eaddr) |
| 1323 | { |
| 1324 | int i; |
| 1325 | |
| 1326 | outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */ |
| 1327 | outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */ |
| 1328 | for (i = 0; i < 5000; i++) |
| 1329 | inb(EWRK3_CSR); /* wait 1msec */ |
| 1330 | |
| 1331 | return inw(EWRK3_EPROM1); /* 16 bits data return */ |
| 1332 | } |
| 1333 | |
| 1334 | /* |
| 1335 | ** Write the EWRK3 EEPROM using this routine |
| 1336 | */ |
| 1337 | static int Write_EEPROM(short data, u_long iobase, u_char eaddr) |
| 1338 | { |
| 1339 | int i; |
| 1340 | |
| 1341 | outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */ |
| 1342 | for (i = 0; i < 5000; i++) |
| 1343 | inb(EWRK3_CSR); /* wait 1msec */ |
| 1344 | outw(data, EWRK3_EPROM1); /* write data to register */ |
| 1345 | outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */ |
| 1346 | outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */ |
| 1347 | for (i = 0; i < 75000; i++) |
| 1348 | inb(EWRK3_CSR); /* wait 15msec */ |
| 1349 | outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */ |
| 1350 | for (i = 0; i < 5000; i++) |
| 1351 | inb(EWRK3_CSR); /* wait 1msec */ |
| 1352 | |
| 1353 | return 0; |
| 1354 | } |
| 1355 | |
| 1356 | /* |
| 1357 | ** Look for a particular board name in the on-board EEPROM. |
| 1358 | */ |
| 1359 | static void __init EthwrkSignature(char *name, char *eeprom_image) |
| 1360 | { |
| 1361 | int i; |
| 1362 | char *signatures[] = EWRK3_SIGNATURE; |
| 1363 | |
| 1364 | for (i=0; *signatures[i] != '\0'; i++) |
| 1365 | if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) ) |
| 1366 | break; |
| 1367 | |
| 1368 | if (*signatures[i] != '\0') { |
| 1369 | memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN); |
| 1370 | name[EWRK3_STRLEN] = '\0'; |
| 1371 | } else |
| 1372 | name[0] = '\0'; |
| 1373 | |
| 1374 | return; |
| 1375 | } |
| 1376 | |
| 1377 | /* |
| 1378 | ** Look for a special sequence in the Ethernet station address PROM that |
| 1379 | ** is common across all EWRK3 products. |
| 1380 | ** |
| 1381 | ** Search the Ethernet address ROM for the signature. Since the ROM address |
| 1382 | ** counter can start at an arbitrary point, the search must include the entire |
| 1383 | ** probe sequence length plus the (length_of_the_signature - 1). |
| 1384 | ** Stop the search IMMEDIATELY after the signature is found so that the |
| 1385 | ** PROM address counter is correctly positioned at the start of the |
| 1386 | ** ethernet address for later read out. |
| 1387 | */ |
| 1388 | |
| 1389 | static int __init DevicePresent(u_long iobase) |
| 1390 | { |
| 1391 | union { |
| 1392 | struct { |
| 1393 | u32 a; |
| 1394 | u32 b; |
| 1395 | } llsig; |
| 1396 | char Sig[sizeof(u32) << 1]; |
| 1397 | } |
| 1398 | dev; |
| 1399 | short sigLength; |
| 1400 | char data; |
| 1401 | int i, j, status = 0; |
| 1402 | |
| 1403 | dev.llsig.a = ETH_PROM_SIG; |
| 1404 | dev.llsig.b = ETH_PROM_SIG; |
| 1405 | sigLength = sizeof(u32) << 1; |
| 1406 | |
| 1407 | for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) { |
| 1408 | data = inb(EWRK3_APROM); |
| 1409 | if (dev.Sig[j] == data) { /* track signature */ |
| 1410 | j++; |
| 1411 | } else { /* lost signature; begin search again */ |
| 1412 | if (data == dev.Sig[0]) { |
| 1413 | j = 1; |
| 1414 | } else { |
| 1415 | j = 0; |
| 1416 | } |
| 1417 | } |
| 1418 | } |
| 1419 | |
| 1420 | if (j != sigLength) { |
| 1421 | status = -ENODEV; /* search failed */ |
| 1422 | } |
| 1423 | return status; |
| 1424 | } |
| 1425 | |
| 1426 | static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType) |
| 1427 | { |
| 1428 | int i, j, k; |
| 1429 | u_short chksum; |
| 1430 | u_char crc, lfsr, sd, status = 0; |
| 1431 | u_long iobase = dev->base_addr; |
| 1432 | u16 tmp; |
| 1433 | |
| 1434 | if (chipType == LeMAC2) { |
| 1435 | for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) { |
| 1436 | sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j]; |
| 1437 | outb(dev->dev_addr[j], EWRK3_PAR0 + j); |
| 1438 | for (k = 0; k < 8; k++, sd >>= 1) { |
| 1439 | lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7; |
| 1440 | crc = (crc >> 1) + lfsr; |
| 1441 | } |
| 1442 | } |
| 1443 | if (crc != eeprom_image[EEPROM_PA_CRC]) |
| 1444 | status = -1; |
| 1445 | } else { |
| 1446 | for (i = 0, k = 0; i < ETH_ALEN;) { |
| 1447 | k <<= 1; |
| 1448 | if (k > 0xffff) |
| 1449 | k -= 0xffff; |
| 1450 | |
| 1451 | k += (u_char) (tmp = inb(EWRK3_APROM)); |
| 1452 | dev->dev_addr[i] = (u_char) tmp; |
| 1453 | outb(dev->dev_addr[i], EWRK3_PAR0 + i); |
| 1454 | i++; |
| 1455 | k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8); |
| 1456 | dev->dev_addr[i] = (u_char) tmp; |
| 1457 | outb(dev->dev_addr[i], EWRK3_PAR0 + i); |
| 1458 | i++; |
| 1459 | |
| 1460 | if (k > 0xffff) |
| 1461 | k -= 0xffff; |
| 1462 | } |
| 1463 | if (k == 0xffff) |
| 1464 | k = 0; |
| 1465 | chksum = inb(EWRK3_APROM); |
| 1466 | chksum |= (inb(EWRK3_APROM) << 8); |
| 1467 | if (k != chksum) |
| 1468 | status = -1; |
| 1469 | } |
| 1470 | |
| 1471 | return status; |
| 1472 | } |
| 1473 | |
| 1474 | /* |
| 1475 | ** Look for a particular board name in the EISA configuration space |
| 1476 | */ |
| 1477 | static int __init EISA_signature(char *name, s32 eisa_id) |
| 1478 | { |
| 1479 | u_long i; |
| 1480 | char *signatures[] = EWRK3_SIGNATURE; |
| 1481 | char ManCode[EWRK3_STRLEN]; |
| 1482 | union { |
| 1483 | s32 ID; |
| 1484 | char Id[4]; |
| 1485 | } Eisa; |
| 1486 | int status = 0; |
| 1487 | |
| 1488 | *name = '\0'; |
| 1489 | for (i = 0; i < 4; i++) { |
| 1490 | Eisa.Id[i] = inb(eisa_id + i); |
| 1491 | } |
| 1492 | |
| 1493 | ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40); |
| 1494 | ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40); |
| 1495 | ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30); |
| 1496 | ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30); |
| 1497 | ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30); |
| 1498 | ManCode[5] = '\0'; |
| 1499 | |
| 1500 | for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) { |
| 1501 | if (strstr(ManCode, signatures[i]) != NULL) { |
| 1502 | strcpy(name, ManCode); |
| 1503 | status = 1; |
| 1504 | } |
| 1505 | } |
| 1506 | |
| 1507 | return status; /* return the device name string */ |
| 1508 | } |
| 1509 | |
| 1510 | static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 1511 | { |
| 1512 | int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL); |
| 1513 | |
| 1514 | strcpy(info->driver, DRV_NAME); |
| 1515 | strcpy(info->version, DRV_VERSION); |
| 1516 | sprintf(info->fw_version, "%d", fwrev); |
| 1517 | strcpy(info->bus_info, "N/A"); |
| 1518 | info->eedump_len = EEPROM_MAX; |
| 1519 | } |
| 1520 | |
| 1521 | static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 1522 | { |
| 1523 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1524 | unsigned long iobase = dev->base_addr; |
| 1525 | u8 cr = inb(EWRK3_CR); |
| 1526 | |
| 1527 | switch (lp->adapter_name[4]) { |
| 1528 | case '3': /* DE203 */ |
| 1529 | ecmd->supported = SUPPORTED_BNC; |
| 1530 | ecmd->port = PORT_BNC; |
| 1531 | break; |
| 1532 | |
| 1533 | case '4': /* DE204 */ |
| 1534 | ecmd->supported = SUPPORTED_TP; |
| 1535 | ecmd->port = PORT_TP; |
| 1536 | break; |
| 1537 | |
| 1538 | case '5': /* DE205 */ |
| 1539 | ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI; |
| 1540 | ecmd->autoneg = !(cr & CR_APD); |
| 1541 | /* |
| 1542 | ** Port is only valid if autoneg is disabled |
| 1543 | ** and even then we don't know if AUI is jumpered. |
| 1544 | */ |
| 1545 | if (!ecmd->autoneg) |
| 1546 | ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP; |
| 1547 | break; |
| 1548 | } |
| 1549 | |
| 1550 | ecmd->supported |= SUPPORTED_10baseT_Half; |
| 1551 | ecmd->speed = SPEED_10; |
| 1552 | ecmd->duplex = DUPLEX_HALF; |
| 1553 | return 0; |
| 1554 | } |
| 1555 | |
| 1556 | static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 1557 | { |
| 1558 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1559 | unsigned long iobase = dev->base_addr; |
| 1560 | unsigned long flags; |
| 1561 | u8 cr; |
| 1562 | |
| 1563 | /* DE205 is the only card with anything to set */ |
| 1564 | if (lp->adapter_name[4] != '5') |
| 1565 | return -EOPNOTSUPP; |
| 1566 | |
| 1567 | /* Sanity-check parameters */ |
| 1568 | if (ecmd->speed != SPEED_10) |
| 1569 | return -EINVAL; |
| 1570 | if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC) |
| 1571 | return -EINVAL; /* AUI is not software-selectable */ |
| 1572 | if (ecmd->transceiver != XCVR_INTERNAL) |
| 1573 | return -EINVAL; |
| 1574 | if (ecmd->duplex != DUPLEX_HALF) |
| 1575 | return -EINVAL; |
| 1576 | if (ecmd->phy_address != 0) |
| 1577 | return -EINVAL; |
| 1578 | |
| 1579 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1580 | cr = inb(EWRK3_CR); |
| 1581 | |
| 1582 | /* If Autoneg is set, change to Auto Port mode */ |
| 1583 | /* Otherwise, disable Auto Port and set port explicitly */ |
| 1584 | if (ecmd->autoneg) { |
| 1585 | cr &= ~CR_APD; |
| 1586 | } else { |
| 1587 | cr |= CR_APD; |
| 1588 | if (ecmd->port == PORT_TP) |
| 1589 | cr &= ~CR_PSEL; /* Force TP */ |
| 1590 | else |
| 1591 | cr |= CR_PSEL; /* Force BNC */ |
| 1592 | } |
| 1593 | |
| 1594 | /* Commit the changes */ |
| 1595 | outb(cr, EWRK3_CR); |
| 1596 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1597 | return 0; |
| 1598 | } |
| 1599 | |
| 1600 | static u32 ewrk3_get_link(struct net_device *dev) |
| 1601 | { |
| 1602 | unsigned long iobase = dev->base_addr; |
| 1603 | u8 cmr = inb(EWRK3_CMR); |
| 1604 | /* DE203 has BNC only and link status does not apply */ |
| 1605 | /* On DE204 this is always valid since TP is the only port. */ |
| 1606 | /* On DE205 this reflects TP status even if BNC or AUI is selected. */ |
| 1607 | return !(cmr & CMR_LINK); |
| 1608 | } |
| 1609 | |
| 1610 | static int ewrk3_phys_id(struct net_device *dev, u32 data) |
| 1611 | { |
| 1612 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1613 | unsigned long iobase = dev->base_addr; |
| 1614 | unsigned long flags; |
| 1615 | u8 cr; |
| 1616 | int count; |
| 1617 | |
| 1618 | /* Toggle LED 4x per second */ |
| 1619 | count = data << 2; |
| 1620 | |
| 1621 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1622 | |
| 1623 | /* Bail if a PHYS_ID is already in progress */ |
| 1624 | if (lp->led_mask == 0) { |
| 1625 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1626 | return -EBUSY; |
| 1627 | } |
| 1628 | |
| 1629 | /* Prevent ISR from twiddling the LED */ |
| 1630 | lp->led_mask = 0; |
| 1631 | |
| 1632 | while (count--) { |
| 1633 | /* Toggle the LED */ |
| 1634 | cr = inb(EWRK3_CR); |
| 1635 | outb(cr ^ CR_LED, EWRK3_CR); |
| 1636 | |
| 1637 | /* Wait a little while */ |
| 1638 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1639 | msleep(250); |
| 1640 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1641 | |
| 1642 | /* Exit if we got a signal */ |
| 1643 | if (signal_pending(current)) |
| 1644 | break; |
| 1645 | } |
| 1646 | |
| 1647 | lp->led_mask = CR_LED; |
| 1648 | cr = inb(EWRK3_CR); |
| 1649 | outb(cr & ~CR_LED, EWRK3_CR); |
| 1650 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1651 | return signal_pending(current) ? -ERESTARTSYS : 0; |
| 1652 | } |
| 1653 | |
| 1654 | static const struct ethtool_ops ethtool_ops_203 = { |
| 1655 | .get_drvinfo = ewrk3_get_drvinfo, |
| 1656 | .get_settings = ewrk3_get_settings, |
| 1657 | .set_settings = ewrk3_set_settings, |
| 1658 | .phys_id = ewrk3_phys_id, |
| 1659 | }; |
| 1660 | |
| 1661 | static const struct ethtool_ops ethtool_ops = { |
| 1662 | .get_drvinfo = ewrk3_get_drvinfo, |
| 1663 | .get_settings = ewrk3_get_settings, |
| 1664 | .set_settings = ewrk3_set_settings, |
| 1665 | .get_link = ewrk3_get_link, |
| 1666 | .phys_id = ewrk3_phys_id, |
| 1667 | }; |
| 1668 | |
| 1669 | /* |
| 1670 | ** Perform IOCTL call functions here. Some are privileged operations and the |
| 1671 | ** effective uid is checked in those cases. |
| 1672 | */ |
| 1673 | static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
| 1674 | { |
| 1675 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1676 | struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru; |
| 1677 | u_long iobase = dev->base_addr; |
| 1678 | int i, j, status = 0; |
| 1679 | u_char csr; |
| 1680 | unsigned long flags; |
| 1681 | union ewrk3_addr { |
| 1682 | u_char addr[HASH_TABLE_LEN * ETH_ALEN]; |
| 1683 | u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1]; |
| 1684 | }; |
| 1685 | |
| 1686 | union ewrk3_addr *tmp; |
| 1687 | |
| 1688 | /* All we handle are private IOCTLs */ |
| 1689 | if (cmd != EWRK3IOCTL) |
| 1690 | return -EOPNOTSUPP; |
| 1691 | |
| 1692 | tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL); |
| 1693 | if(tmp==NULL) |
| 1694 | return -ENOMEM; |
| 1695 | |
| 1696 | switch (ioc->cmd) { |
| 1697 | case EWRK3_GET_HWADDR: /* Get the hardware address */ |
| 1698 | for (i = 0; i < ETH_ALEN; i++) { |
| 1699 | tmp->addr[i] = dev->dev_addr[i]; |
| 1700 | } |
| 1701 | ioc->len = ETH_ALEN; |
| 1702 | if (copy_to_user(ioc->data, tmp->addr, ioc->len)) |
| 1703 | status = -EFAULT; |
| 1704 | break; |
| 1705 | |
| 1706 | case EWRK3_SET_HWADDR: /* Set the hardware address */ |
| 1707 | if (capable(CAP_NET_ADMIN)) { |
| 1708 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1709 | csr = inb(EWRK3_CSR); |
| 1710 | csr |= (CSR_TXD | CSR_RXD); |
| 1711 | outb(csr, EWRK3_CSR); /* Disable the TX and RX */ |
| 1712 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1713 | |
| 1714 | if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) { |
| 1715 | status = -EFAULT; |
| 1716 | break; |
| 1717 | } |
| 1718 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1719 | for (i = 0; i < ETH_ALEN; i++) { |
| 1720 | dev->dev_addr[i] = tmp->addr[i]; |
| 1721 | outb(tmp->addr[i], EWRK3_PAR0 + i); |
| 1722 | } |
| 1723 | |
| 1724 | csr = inb(EWRK3_CSR); |
| 1725 | csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */ |
| 1726 | outb(csr, EWRK3_CSR); |
| 1727 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1728 | } else { |
| 1729 | status = -EPERM; |
| 1730 | } |
| 1731 | |
| 1732 | break; |
| 1733 | case EWRK3_SET_PROM: /* Set Promiscuous Mode */ |
| 1734 | if (capable(CAP_NET_ADMIN)) { |
| 1735 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1736 | csr = inb(EWRK3_CSR); |
| 1737 | csr |= CSR_PME; |
| 1738 | csr &= ~CSR_MCE; |
| 1739 | outb(csr, EWRK3_CSR); |
| 1740 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1741 | } else { |
| 1742 | status = -EPERM; |
| 1743 | } |
| 1744 | |
| 1745 | break; |
| 1746 | case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */ |
| 1747 | if (capable(CAP_NET_ADMIN)) { |
| 1748 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1749 | csr = inb(EWRK3_CSR); |
| 1750 | csr &= ~CSR_PME; |
| 1751 | outb(csr, EWRK3_CSR); |
| 1752 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1753 | } else { |
| 1754 | status = -EPERM; |
| 1755 | } |
| 1756 | |
| 1757 | break; |
| 1758 | case EWRK3_GET_MCA: /* Get the multicast address table */ |
| 1759 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1760 | if (lp->shmem_length == IO_ONLY) { |
| 1761 | outb(0, EWRK3_IOPR); |
| 1762 | outw(PAGE0_HTE, EWRK3_PIR1); |
| 1763 | for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) { |
| 1764 | tmp->addr[i] = inb(EWRK3_DATA); |
| 1765 | } |
| 1766 | } else { |
| 1767 | outb(0, EWRK3_MPR); |
| 1768 | memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3)); |
| 1769 | } |
| 1770 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1771 | |
| 1772 | ioc->len = (HASH_TABLE_LEN >> 3); |
| 1773 | if (copy_to_user(ioc->data, tmp->addr, ioc->len)) |
| 1774 | status = -EFAULT; |
| 1775 | |
| 1776 | break; |
| 1777 | case EWRK3_SET_MCA: /* Set a multicast address */ |
| 1778 | if (capable(CAP_NET_ADMIN)) { |
| 1779 | if (ioc->len > 1024) |
| 1780 | { |
| 1781 | status = -EINVAL; |
| 1782 | break; |
| 1783 | } |
| 1784 | if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) { |
| 1785 | status = -EFAULT; |
| 1786 | break; |
| 1787 | } |
| 1788 | set_multicast_list(dev); |
| 1789 | } else { |
| 1790 | status = -EPERM; |
| 1791 | } |
| 1792 | |
| 1793 | break; |
| 1794 | case EWRK3_CLR_MCA: /* Clear all multicast addresses */ |
| 1795 | if (capable(CAP_NET_ADMIN)) { |
| 1796 | set_multicast_list(dev); |
| 1797 | } else { |
| 1798 | status = -EPERM; |
| 1799 | } |
| 1800 | |
| 1801 | break; |
| 1802 | case EWRK3_MCA_EN: /* Enable multicast addressing */ |
| 1803 | if (capable(CAP_NET_ADMIN)) { |
| 1804 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1805 | csr = inb(EWRK3_CSR); |
| 1806 | csr |= CSR_MCE; |
| 1807 | csr &= ~CSR_PME; |
| 1808 | outb(csr, EWRK3_CSR); |
| 1809 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1810 | } else { |
| 1811 | status = -EPERM; |
| 1812 | } |
| 1813 | |
| 1814 | break; |
| 1815 | case EWRK3_GET_STATS: { /* Get the driver statistics */ |
| 1816 | struct ewrk3_stats *tmp_stats = |
| 1817 | kmalloc(sizeof(lp->pktStats), GFP_KERNEL); |
| 1818 | if (!tmp_stats) { |
| 1819 | status = -ENOMEM; |
| 1820 | break; |
| 1821 | } |
| 1822 | |
| 1823 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1824 | memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats)); |
| 1825 | spin_unlock_irqrestore(&lp->hw_lock, flags); |
| 1826 | |
| 1827 | ioc->len = sizeof(lp->pktStats); |
| 1828 | if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats))) |
| 1829 | status = -EFAULT; |
| 1830 | kfree(tmp_stats); |
| 1831 | break; |
| 1832 | } |
| 1833 | case EWRK3_CLR_STATS: /* Zero out the driver statistics */ |
| 1834 | if (capable(CAP_NET_ADMIN)) { |
| 1835 | spin_lock_irqsave(&lp->hw_lock, flags); |
| 1836 | memset(&lp->pktStats, 0, sizeof(lp->pktStats)); |
| 1837 | spin_unlock_irqrestore(&lp->hw_lock,flags); |
| 1838 | } else { |
| 1839 | status = -EPERM; |
| 1840 | } |
| 1841 | |
| 1842 | break; |
| 1843 | case EWRK3_GET_CSR: /* Get the CSR Register contents */ |
| 1844 | tmp->addr[0] = inb(EWRK3_CSR); |
| 1845 | ioc->len = 1; |
| 1846 | if (copy_to_user(ioc->data, tmp->addr, ioc->len)) |
| 1847 | status = -EFAULT; |
| 1848 | break; |
| 1849 | case EWRK3_SET_CSR: /* Set the CSR Register contents */ |
| 1850 | if (capable(CAP_NET_ADMIN)) { |
| 1851 | if (copy_from_user(tmp->addr, ioc->data, 1)) { |
| 1852 | status = -EFAULT; |
| 1853 | break; |
| 1854 | } |
| 1855 | outb(tmp->addr[0], EWRK3_CSR); |
| 1856 | } else { |
| 1857 | status = -EPERM; |
| 1858 | } |
| 1859 | |
| 1860 | break; |
| 1861 | case EWRK3_GET_EEPROM: /* Get the EEPROM contents */ |
| 1862 | if (capable(CAP_NET_ADMIN)) { |
| 1863 | for (i = 0; i < (EEPROM_MAX >> 1); i++) { |
| 1864 | tmp->val[i] = (short) Read_EEPROM(iobase, i); |
| 1865 | } |
| 1866 | i = EEPROM_MAX; |
| 1867 | tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */ |
| 1868 | for (j = 0; j < ETH_ALEN; j++) { |
| 1869 | tmp->addr[i++] = inb(EWRK3_PAR0 + j); |
| 1870 | } |
| 1871 | ioc->len = EEPROM_MAX + 1 + ETH_ALEN; |
| 1872 | if (copy_to_user(ioc->data, tmp->addr, ioc->len)) |
| 1873 | status = -EFAULT; |
| 1874 | } else { |
| 1875 | status = -EPERM; |
| 1876 | } |
| 1877 | |
| 1878 | break; |
| 1879 | case EWRK3_SET_EEPROM: /* Set the EEPROM contents */ |
| 1880 | if (capable(CAP_NET_ADMIN)) { |
| 1881 | if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) { |
| 1882 | status = -EFAULT; |
| 1883 | break; |
| 1884 | } |
| 1885 | for (i = 0; i < (EEPROM_MAX >> 1); i++) { |
| 1886 | Write_EEPROM(tmp->val[i], iobase, i); |
| 1887 | } |
| 1888 | } else { |
| 1889 | status = -EPERM; |
| 1890 | } |
| 1891 | |
| 1892 | break; |
| 1893 | case EWRK3_GET_CMR: /* Get the CMR Register contents */ |
| 1894 | tmp->addr[0] = inb(EWRK3_CMR); |
| 1895 | ioc->len = 1; |
| 1896 | if (copy_to_user(ioc->data, tmp->addr, ioc->len)) |
| 1897 | status = -EFAULT; |
| 1898 | break; |
| 1899 | case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */ |
| 1900 | if (capable(CAP_NET_ADMIN)) { |
| 1901 | lp->txc = 1; |
| 1902 | } else { |
| 1903 | status = -EPERM; |
| 1904 | } |
| 1905 | |
| 1906 | break; |
| 1907 | case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */ |
| 1908 | if (capable(CAP_NET_ADMIN)) { |
| 1909 | lp->txc = 0; |
| 1910 | } else { |
| 1911 | status = -EPERM; |
| 1912 | } |
| 1913 | |
| 1914 | break; |
| 1915 | default: |
| 1916 | status = -EOPNOTSUPP; |
| 1917 | } |
| 1918 | kfree(tmp); |
| 1919 | return status; |
| 1920 | } |
| 1921 | |
| 1922 | #ifdef MODULE |
| 1923 | static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S]; |
| 1924 | static int ndevs; |
| 1925 | static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, }; |
| 1926 | |
| 1927 | /* '21' below should really be 'MAX_NUM_EWRK3S' */ |
| 1928 | module_param_array(io, int, NULL, 0); |
| 1929 | module_param_array(irq, int, NULL, 0); |
| 1930 | MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)"); |
| 1931 | MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)"); |
| 1932 | |
| 1933 | static __exit void ewrk3_exit_module(void) |
| 1934 | { |
| 1935 | int i; |
| 1936 | |
| 1937 | for( i=0; i<ndevs; i++ ) { |
| 1938 | struct net_device *dev = ewrk3_devs[i]; |
| 1939 | struct ewrk3_private *lp = netdev_priv(dev); |
| 1940 | ewrk3_devs[i] = NULL; |
| 1941 | unregister_netdev(dev); |
| 1942 | release_region(dev->base_addr, EWRK3_TOTAL_SIZE); |
| 1943 | iounmap(lp->shmem); |
| 1944 | free_netdev(dev); |
| 1945 | } |
| 1946 | } |
| 1947 | |
| 1948 | static __init int ewrk3_init_module(void) |
| 1949 | { |
| 1950 | int i=0; |
| 1951 | |
| 1952 | while( io[i] && irq[i] ) { |
| 1953 | struct net_device *dev |
| 1954 | = alloc_etherdev(sizeof(struct ewrk3_private)); |
| 1955 | |
| 1956 | if (!dev) |
| 1957 | break; |
| 1958 | |
| 1959 | if (ewrk3_probe1(dev, io[i], irq[i]) != 0) { |
| 1960 | free_netdev(dev); |
| 1961 | break; |
| 1962 | } |
| 1963 | |
| 1964 | ewrk3_devs[ndevs++] = dev; |
| 1965 | i++; |
| 1966 | } |
| 1967 | |
| 1968 | return ndevs ? 0 : -EIO; |
| 1969 | } |
| 1970 | |
| 1971 | |
| 1972 | /* Hack for breakage in new module stuff */ |
| 1973 | module_exit(ewrk3_exit_module); |
| 1974 | module_init(ewrk3_init_module); |
| 1975 | #endif /* MODULE */ |
| 1976 | MODULE_LICENSE("GPL"); |