| 1 | /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */ |
| 2 | /* |
| 3 | Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de) |
| 4 | |
| 5 | This software may be used and distributed according to the terms |
| 6 | of the GNU General Public License, incorporated herein by reference. |
| 7 | |
| 8 | This drivers was written with the following sources of reference: |
| 9 | - The driver for the Riebl Lance card by the TU Vienna. |
| 10 | - The modified TUW driver for PAM's VME cards |
| 11 | - The PC-Linux driver for Lance cards (but this is for bus master |
| 12 | cards, not the shared memory ones) |
| 13 | - The Amiga Ariadne driver |
| 14 | |
| 15 | v1.0: (in 1.2.13pl4/0.9.13) |
| 16 | Initial version |
| 17 | v1.1: (in 1.2.13pl5) |
| 18 | more comments |
| 19 | deleted some debugging stuff |
| 20 | optimized register access (keep AREG pointing to CSR0) |
| 21 | following AMD, CSR0_STRT should be set only after IDON is detected |
| 22 | use memcpy() for data transfers, that also employs long word moves |
| 23 | better probe procedure for 24-bit systems |
| 24 | non-VME-RieblCards need extra delays in memcpy |
| 25 | must also do write test, since 0xfxe00000 may hit ROM |
| 26 | use 8/32 tx/rx buffers, which should give better NFS performance; |
| 27 | this is made possible by shifting the last packet buffer after the |
| 28 | RieblCard reserved area |
| 29 | v1.2: (in 1.2.13pl8) |
| 30 | again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000 |
| 31 | and thus RAM, in case of no Lance found all memory contents have to |
| 32 | be restored! |
| 33 | Now possible to compile as module. |
| 34 | v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3) |
| 35 | Several little 1.3 adaptions |
| 36 | When the lance is stopped it jumps back into little-endian |
| 37 | mode. It is therefore necessary to put it back where it |
| 38 | belongs, in big endian mode, in order to make things work. |
| 39 | This might be the reason why multicast-mode didn't work |
| 40 | before, but I'm not able to test it as I only got an Amiga |
| 41 | (we had similar problems with the A2065 driver). |
| 42 | |
| 43 | */ |
| 44 | |
| 45 | static char version[] = "atarilance.c: v1.3 04/04/96 " |
| 46 | "Roman.Hodek@informatik.uni-erlangen.de\n"; |
| 47 | |
| 48 | #include <linux/netdevice.h> |
| 49 | #include <linux/etherdevice.h> |
| 50 | #include <linux/module.h> |
| 51 | #include <linux/stddef.h> |
| 52 | #include <linux/kernel.h> |
| 53 | #include <linux/string.h> |
| 54 | #include <linux/errno.h> |
| 55 | #include <linux/skbuff.h> |
| 56 | #include <linux/slab.h> |
| 57 | #include <linux/interrupt.h> |
| 58 | #include <linux/init.h> |
| 59 | #include <linux/bitops.h> |
| 60 | |
| 61 | #include <asm/setup.h> |
| 62 | #include <asm/irq.h> |
| 63 | #include <asm/atarihw.h> |
| 64 | #include <asm/atariints.h> |
| 65 | #include <asm/io.h> |
| 66 | |
| 67 | /* Debug level: |
| 68 | * 0 = silent, print only serious errors |
| 69 | * 1 = normal, print error messages |
| 70 | * 2 = debug, print debug infos |
| 71 | * 3 = debug, print even more debug infos (packet data) |
| 72 | */ |
| 73 | |
| 74 | #define LANCE_DEBUG 1 |
| 75 | |
| 76 | #ifdef LANCE_DEBUG |
| 77 | static int lance_debug = LANCE_DEBUG; |
| 78 | #else |
| 79 | static int lance_debug = 1; |
| 80 | #endif |
| 81 | module_param(lance_debug, int, 0); |
| 82 | MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)"); |
| 83 | MODULE_LICENSE("GPL"); |
| 84 | |
| 85 | /* Print debug messages on probing? */ |
| 86 | #undef LANCE_DEBUG_PROBE |
| 87 | |
| 88 | #define DPRINTK(n,a) \ |
| 89 | do { \ |
| 90 | if (lance_debug >= n) \ |
| 91 | printk a; \ |
| 92 | } while( 0 ) |
| 93 | |
| 94 | #ifdef LANCE_DEBUG_PROBE |
| 95 | # define PROBE_PRINT(a) printk a |
| 96 | #else |
| 97 | # define PROBE_PRINT(a) |
| 98 | #endif |
| 99 | |
| 100 | /* These define the number of Rx and Tx buffers as log2. (Only powers |
| 101 | * of two are valid) |
| 102 | * Much more rx buffers (32) are reserved than tx buffers (8), since receiving |
| 103 | * is more time critical then sending and packets may have to remain in the |
| 104 | * board's memory when main memory is low. |
| 105 | */ |
| 106 | |
| 107 | #define TX_LOG_RING_SIZE 3 |
| 108 | #define RX_LOG_RING_SIZE 5 |
| 109 | |
| 110 | /* These are the derived values */ |
| 111 | |
| 112 | #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) |
| 113 | #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) |
| 114 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
| 115 | |
| 116 | #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) |
| 117 | #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) |
| 118 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
| 119 | |
| 120 | #define TX_TIMEOUT 20 |
| 121 | |
| 122 | /* The LANCE Rx and Tx ring descriptors. */ |
| 123 | struct lance_rx_head { |
| 124 | unsigned short base; /* Low word of base addr */ |
| 125 | volatile unsigned char flag; |
| 126 | unsigned char base_hi; /* High word of base addr (unused) */ |
| 127 | short buf_length; /* This length is 2s complement! */ |
| 128 | volatile short msg_length; /* This length is "normal". */ |
| 129 | }; |
| 130 | |
| 131 | struct lance_tx_head { |
| 132 | unsigned short base; /* Low word of base addr */ |
| 133 | volatile unsigned char flag; |
| 134 | unsigned char base_hi; /* High word of base addr (unused) */ |
| 135 | short length; /* Length is 2s complement! */ |
| 136 | volatile short misc; |
| 137 | }; |
| 138 | |
| 139 | struct ringdesc { |
| 140 | unsigned short adr_lo; /* Low 16 bits of address */ |
| 141 | unsigned char len; /* Length bits */ |
| 142 | unsigned char adr_hi; /* High 8 bits of address (unused) */ |
| 143 | }; |
| 144 | |
| 145 | /* The LANCE initialization block, described in databook. */ |
| 146 | struct lance_init_block { |
| 147 | unsigned short mode; /* Pre-set mode */ |
| 148 | unsigned char hwaddr[6]; /* Physical ethernet address */ |
| 149 | unsigned filter[2]; /* Multicast filter (unused). */ |
| 150 | /* Receive and transmit ring base, along with length bits. */ |
| 151 | struct ringdesc rx_ring; |
| 152 | struct ringdesc tx_ring; |
| 153 | }; |
| 154 | |
| 155 | /* The whole layout of the Lance shared memory */ |
| 156 | struct lance_memory { |
| 157 | struct lance_init_block init; |
| 158 | struct lance_tx_head tx_head[TX_RING_SIZE]; |
| 159 | struct lance_rx_head rx_head[RX_RING_SIZE]; |
| 160 | char packet_area[0]; /* packet data follow after the |
| 161 | * init block and the ring |
| 162 | * descriptors and are located |
| 163 | * at runtime */ |
| 164 | }; |
| 165 | |
| 166 | /* RieblCard specifics: |
| 167 | * The original TOS driver for these cards reserves the area from offset |
| 168 | * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the |
| 169 | * Ethernet address there, and the magic for verifying the data's validity. |
| 170 | * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe |
| 171 | * is reserved for the interrupt vector number. |
| 172 | */ |
| 173 | #define RIEBL_RSVD_START 0xee70 |
| 174 | #define RIEBL_RSVD_END 0xeec0 |
| 175 | #define RIEBL_MAGIC 0x09051990 |
| 176 | #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a)) |
| 177 | #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e)) |
| 178 | #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe)) |
| 179 | |
| 180 | /* This is a default address for the old RieblCards without a battery |
| 181 | * that have no ethernet address at boot time. 00:00:36:04 is the |
| 182 | * prefix for Riebl cards, the 00:00 at the end is arbitrary. |
| 183 | */ |
| 184 | |
| 185 | static unsigned char OldRieblDefHwaddr[6] = { |
| 186 | 0x00, 0x00, 0x36, 0x04, 0x00, 0x00 |
| 187 | }; |
| 188 | |
| 189 | |
| 190 | /* I/O registers of the Lance chip */ |
| 191 | |
| 192 | struct lance_ioreg { |
| 193 | /* base+0x0 */ volatile unsigned short data; |
| 194 | /* base+0x2 */ volatile unsigned short addr; |
| 195 | unsigned char _dummy1[3]; |
| 196 | /* base+0x7 */ volatile unsigned char ivec; |
| 197 | unsigned char _dummy2[5]; |
| 198 | /* base+0xd */ volatile unsigned char eeprom; |
| 199 | unsigned char _dummy3; |
| 200 | /* base+0xf */ volatile unsigned char mem; |
| 201 | }; |
| 202 | |
| 203 | /* Types of boards this driver supports */ |
| 204 | |
| 205 | enum lance_type { |
| 206 | OLD_RIEBL, /* old Riebl card without battery */ |
| 207 | NEW_RIEBL, /* new Riebl card with battery */ |
| 208 | PAM_CARD /* PAM card with EEPROM */ |
| 209 | }; |
| 210 | |
| 211 | static char *lance_names[] = { |
| 212 | "Riebl-Card (without battery)", |
| 213 | "Riebl-Card (with battery)", |
| 214 | "PAM intern card" |
| 215 | }; |
| 216 | |
| 217 | /* The driver's private device structure */ |
| 218 | |
| 219 | struct lance_private { |
| 220 | enum lance_type cardtype; |
| 221 | struct lance_ioreg *iobase; |
| 222 | struct lance_memory *mem; |
| 223 | int cur_rx, cur_tx; /* The next free ring entry */ |
| 224 | int dirty_tx; /* Ring entries to be freed. */ |
| 225 | /* copy function */ |
| 226 | void *(*memcpy_f)( void *, const void *, size_t ); |
| 227 | /* This must be long for set_bit() */ |
| 228 | long tx_full; |
| 229 | spinlock_t devlock; |
| 230 | }; |
| 231 | |
| 232 | /* I/O register access macros */ |
| 233 | |
| 234 | #define MEM lp->mem |
| 235 | #define DREG IO->data |
| 236 | #define AREG IO->addr |
| 237 | #define REGA(a) (*( AREG = (a), &DREG )) |
| 238 | |
| 239 | /* Definitions for packet buffer access: */ |
| 240 | #define PKT_BUF_SZ 1544 |
| 241 | /* Get the address of a packet buffer corresponding to a given buffer head */ |
| 242 | #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base) |
| 243 | |
| 244 | /* Possible memory/IO addresses for probing */ |
| 245 | |
| 246 | static struct lance_addr { |
| 247 | unsigned long memaddr; |
| 248 | unsigned long ioaddr; |
| 249 | int slow_flag; |
| 250 | } lance_addr_list[] = { |
| 251 | { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */ |
| 252 | { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE |
| 253 | (highest byte stripped) */ |
| 254 | { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST |
| 255 | (highest byte stripped) */ |
| 256 | { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to |
| 257 | avoid conflict with ROM |
| 258 | (highest byte stripped) */ |
| 259 | { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE |
| 260 | (highest byte stripped) */ |
| 261 | { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE |
| 262 | (highest byte stripped) */ |
| 263 | }; |
| 264 | |
| 265 | #define N_LANCE_ADDR ARRAY_SIZE(lance_addr_list) |
| 266 | |
| 267 | |
| 268 | /* Definitions for the Lance */ |
| 269 | |
| 270 | /* tx_head flags */ |
| 271 | #define TMD1_ENP 0x01 /* end of packet */ |
| 272 | #define TMD1_STP 0x02 /* start of packet */ |
| 273 | #define TMD1_DEF 0x04 /* deferred */ |
| 274 | #define TMD1_ONE 0x08 /* one retry needed */ |
| 275 | #define TMD1_MORE 0x10 /* more than one retry needed */ |
| 276 | #define TMD1_ERR 0x40 /* error summary */ |
| 277 | #define TMD1_OWN 0x80 /* ownership (set: chip owns) */ |
| 278 | |
| 279 | #define TMD1_OWN_CHIP TMD1_OWN |
| 280 | #define TMD1_OWN_HOST 0 |
| 281 | |
| 282 | /* tx_head misc field */ |
| 283 | #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ |
| 284 | #define TMD3_RTRY 0x0400 /* failed after 16 retries */ |
| 285 | #define TMD3_LCAR 0x0800 /* carrier lost */ |
| 286 | #define TMD3_LCOL 0x1000 /* late collision */ |
| 287 | #define TMD3_UFLO 0x4000 /* underflow (late memory) */ |
| 288 | #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ |
| 289 | |
| 290 | /* rx_head flags */ |
| 291 | #define RMD1_ENP 0x01 /* end of packet */ |
| 292 | #define RMD1_STP 0x02 /* start of packet */ |
| 293 | #define RMD1_BUFF 0x04 /* buffer error */ |
| 294 | #define RMD1_CRC 0x08 /* CRC error */ |
| 295 | #define RMD1_OFLO 0x10 /* overflow */ |
| 296 | #define RMD1_FRAM 0x20 /* framing error */ |
| 297 | #define RMD1_ERR 0x40 /* error summary */ |
| 298 | #define RMD1_OWN 0x80 /* ownership (set: ship owns) */ |
| 299 | |
| 300 | #define RMD1_OWN_CHIP RMD1_OWN |
| 301 | #define RMD1_OWN_HOST 0 |
| 302 | |
| 303 | /* register names */ |
| 304 | #define CSR0 0 /* mode/status */ |
| 305 | #define CSR1 1 /* init block addr (low) */ |
| 306 | #define CSR2 2 /* init block addr (high) */ |
| 307 | #define CSR3 3 /* misc */ |
| 308 | #define CSR8 8 /* address filter */ |
| 309 | #define CSR15 15 /* promiscuous mode */ |
| 310 | |
| 311 | /* CSR0 */ |
| 312 | /* (R=readable, W=writeable, S=set on write, C=clear on write) */ |
| 313 | #define CSR0_INIT 0x0001 /* initialize (RS) */ |
| 314 | #define CSR0_STRT 0x0002 /* start (RS) */ |
| 315 | #define CSR0_STOP 0x0004 /* stop (RS) */ |
| 316 | #define CSR0_TDMD 0x0008 /* transmit demand (RS) */ |
| 317 | #define CSR0_TXON 0x0010 /* transmitter on (R) */ |
| 318 | #define CSR0_RXON 0x0020 /* receiver on (R) */ |
| 319 | #define CSR0_INEA 0x0040 /* interrupt enable (RW) */ |
| 320 | #define CSR0_INTR 0x0080 /* interrupt active (R) */ |
| 321 | #define CSR0_IDON 0x0100 /* initialization done (RC) */ |
| 322 | #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ |
| 323 | #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ |
| 324 | #define CSR0_MERR 0x0800 /* memory error (RC) */ |
| 325 | #define CSR0_MISS 0x1000 /* missed frame (RC) */ |
| 326 | #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ |
| 327 | #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ |
| 328 | #define CSR0_ERR 0x8000 /* error (RC) */ |
| 329 | |
| 330 | /* CSR3 */ |
| 331 | #define CSR3_BCON 0x0001 /* byte control */ |
| 332 | #define CSR3_ACON 0x0002 /* ALE control */ |
| 333 | #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ |
| 334 | |
| 335 | |
| 336 | |
| 337 | /***************************** Prototypes *****************************/ |
| 338 | |
| 339 | static unsigned long lance_probe1( struct net_device *dev, struct lance_addr |
| 340 | *init_rec ); |
| 341 | static int lance_open( struct net_device *dev ); |
| 342 | static void lance_init_ring( struct net_device *dev ); |
| 343 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ); |
| 344 | static irqreturn_t lance_interrupt( int irq, void *dev_id ); |
| 345 | static int lance_rx( struct net_device *dev ); |
| 346 | static int lance_close( struct net_device *dev ); |
| 347 | static void set_multicast_list( struct net_device *dev ); |
| 348 | static int lance_set_mac_address( struct net_device *dev, void *addr ); |
| 349 | static void lance_tx_timeout (struct net_device *dev); |
| 350 | |
| 351 | /************************* End of Prototypes **************************/ |
| 352 | |
| 353 | |
| 354 | |
| 355 | |
| 356 | |
| 357 | static void *slow_memcpy( void *dst, const void *src, size_t len ) |
| 358 | |
| 359 | { char *cto = dst; |
| 360 | const char *cfrom = src; |
| 361 | |
| 362 | while( len-- ) { |
| 363 | *cto++ = *cfrom++; |
| 364 | MFPDELAY(); |
| 365 | } |
| 366 | return( dst ); |
| 367 | } |
| 368 | |
| 369 | |
| 370 | struct net_device * __init atarilance_probe(int unit) |
| 371 | { |
| 372 | int i; |
| 373 | static int found; |
| 374 | struct net_device *dev; |
| 375 | int err = -ENODEV; |
| 376 | |
| 377 | if (!MACH_IS_ATARI || found) |
| 378 | /* Assume there's only one board possible... That seems true, since |
| 379 | * the Riebl/PAM board's address cannot be changed. */ |
| 380 | return ERR_PTR(-ENODEV); |
| 381 | |
| 382 | dev = alloc_etherdev(sizeof(struct lance_private)); |
| 383 | if (!dev) |
| 384 | return ERR_PTR(-ENOMEM); |
| 385 | if (unit >= 0) { |
| 386 | sprintf(dev->name, "eth%d", unit); |
| 387 | netdev_boot_setup_check(dev); |
| 388 | } |
| 389 | |
| 390 | for( i = 0; i < N_LANCE_ADDR; ++i ) { |
| 391 | if (lance_probe1( dev, &lance_addr_list[i] )) { |
| 392 | found = 1; |
| 393 | err = register_netdev(dev); |
| 394 | if (!err) |
| 395 | return dev; |
| 396 | free_irq(dev->irq, dev); |
| 397 | break; |
| 398 | } |
| 399 | } |
| 400 | free_netdev(dev); |
| 401 | return ERR_PTR(err); |
| 402 | } |
| 403 | |
| 404 | |
| 405 | /* Derived from hwreg_present() in atari/config.c: */ |
| 406 | |
| 407 | static noinline int __init addr_accessible(volatile void *regp, int wordflag, |
| 408 | int writeflag) |
| 409 | { |
| 410 | int ret; |
| 411 | long flags; |
| 412 | long *vbr, save_berr; |
| 413 | |
| 414 | local_irq_save(flags); |
| 415 | |
| 416 | __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : ); |
| 417 | save_berr = vbr[2]; |
| 418 | |
| 419 | __asm__ __volatile__ |
| 420 | ( "movel %/sp,%/d1\n\t" |
| 421 | "movel #Lberr,%2@\n\t" |
| 422 | "moveq #0,%0\n\t" |
| 423 | "tstl %3\n\t" |
| 424 | "bne 1f\n\t" |
| 425 | "moveb %1@,%/d0\n\t" |
| 426 | "nop \n\t" |
| 427 | "bra 2f\n" |
| 428 | "1: movew %1@,%/d0\n\t" |
| 429 | "nop \n" |
| 430 | "2: tstl %4\n\t" |
| 431 | "beq 2f\n\t" |
| 432 | "tstl %3\n\t" |
| 433 | "bne 1f\n\t" |
| 434 | "clrb %1@\n\t" |
| 435 | "nop \n\t" |
| 436 | "moveb %/d0,%1@\n\t" |
| 437 | "nop \n\t" |
| 438 | "bra 2f\n" |
| 439 | "1: clrw %1@\n\t" |
| 440 | "nop \n\t" |
| 441 | "movew %/d0,%1@\n\t" |
| 442 | "nop \n" |
| 443 | "2: moveq #1,%0\n" |
| 444 | "Lberr: movel %/d1,%/sp" |
| 445 | : "=&d" (ret) |
| 446 | : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag) |
| 447 | : "d0", "d1", "memory" |
| 448 | ); |
| 449 | |
| 450 | vbr[2] = save_berr; |
| 451 | local_irq_restore(flags); |
| 452 | |
| 453 | return( ret ); |
| 454 | } |
| 455 | |
| 456 | static const struct net_device_ops lance_netdev_ops = { |
| 457 | .ndo_open = lance_open, |
| 458 | .ndo_stop = lance_close, |
| 459 | .ndo_start_xmit = lance_start_xmit, |
| 460 | .ndo_set_multicast_list = set_multicast_list, |
| 461 | .ndo_set_mac_address = lance_set_mac_address, |
| 462 | .ndo_tx_timeout = lance_tx_timeout, |
| 463 | .ndo_validate_addr = eth_validate_addr, |
| 464 | .ndo_change_mtu = eth_change_mtu, |
| 465 | }; |
| 466 | |
| 467 | static unsigned long __init lance_probe1( struct net_device *dev, |
| 468 | struct lance_addr *init_rec ) |
| 469 | { |
| 470 | volatile unsigned short *memaddr = |
| 471 | (volatile unsigned short *)init_rec->memaddr; |
| 472 | volatile unsigned short *ioaddr = |
| 473 | (volatile unsigned short *)init_rec->ioaddr; |
| 474 | struct lance_private *lp; |
| 475 | struct lance_ioreg *IO; |
| 476 | int i; |
| 477 | static int did_version; |
| 478 | unsigned short save1, save2; |
| 479 | |
| 480 | PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n", |
| 481 | (long)memaddr, (long)ioaddr )); |
| 482 | |
| 483 | /* Test whether memory readable and writable */ |
| 484 | PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" )); |
| 485 | if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail; |
| 486 | |
| 487 | /* Written values should come back... */ |
| 488 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" )); |
| 489 | save1 = *memaddr; |
| 490 | *memaddr = 0x0001; |
| 491 | if (*memaddr != 0x0001) goto probe_fail; |
| 492 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" )); |
| 493 | *memaddr = 0x0000; |
| 494 | if (*memaddr != 0x0000) goto probe_fail; |
| 495 | *memaddr = save1; |
| 496 | |
| 497 | /* First port should be readable and writable */ |
| 498 | PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" )); |
| 499 | if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail; |
| 500 | |
| 501 | /* and written values should be readable */ |
| 502 | PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" )); |
| 503 | save2 = ioaddr[1]; |
| 504 | ioaddr[1] = 0x0001; |
| 505 | if (ioaddr[1] != 0x0001) goto probe_fail; |
| 506 | |
| 507 | /* The CSR0_INIT bit should not be readable */ |
| 508 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" )); |
| 509 | save1 = ioaddr[0]; |
| 510 | ioaddr[1] = CSR0; |
| 511 | ioaddr[0] = CSR0_INIT | CSR0_STOP; |
| 512 | if (ioaddr[0] != CSR0_STOP) { |
| 513 | ioaddr[0] = save1; |
| 514 | ioaddr[1] = save2; |
| 515 | goto probe_fail; |
| 516 | } |
| 517 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" )); |
| 518 | ioaddr[0] = CSR0_STOP; |
| 519 | if (ioaddr[0] != CSR0_STOP) { |
| 520 | ioaddr[0] = save1; |
| 521 | ioaddr[1] = save2; |
| 522 | goto probe_fail; |
| 523 | } |
| 524 | |
| 525 | /* Now ok... */ |
| 526 | PROBE_PRINT(( "lance_probe1: Lance card detected\n" )); |
| 527 | goto probe_ok; |
| 528 | |
| 529 | probe_fail: |
| 530 | return( 0 ); |
| 531 | |
| 532 | probe_ok: |
| 533 | lp = netdev_priv(dev); |
| 534 | MEM = (struct lance_memory *)memaddr; |
| 535 | IO = lp->iobase = (struct lance_ioreg *)ioaddr; |
| 536 | dev->base_addr = (unsigned long)ioaddr; /* informational only */ |
| 537 | lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy; |
| 538 | |
| 539 | REGA( CSR0 ) = CSR0_STOP; |
| 540 | |
| 541 | /* Now test for type: If the eeprom I/O port is readable, it is a |
| 542 | * PAM card */ |
| 543 | if (addr_accessible( &(IO->eeprom), 0, 0 )) { |
| 544 | /* Switch back to Ram */ |
| 545 | i = IO->mem; |
| 546 | lp->cardtype = PAM_CARD; |
| 547 | } |
| 548 | else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) { |
| 549 | lp->cardtype = NEW_RIEBL; |
| 550 | } |
| 551 | else |
| 552 | lp->cardtype = OLD_RIEBL; |
| 553 | |
| 554 | if (lp->cardtype == PAM_CARD || |
| 555 | memaddr == (unsigned short *)0xffe00000) { |
| 556 | /* PAMs card and Riebl on ST use level 5 autovector */ |
| 557 | if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO, |
| 558 | "PAM/Riebl-ST Ethernet", dev)) { |
| 559 | printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 ); |
| 560 | return( 0 ); |
| 561 | } |
| 562 | dev->irq = (unsigned short)IRQ_AUTO_5; |
| 563 | } |
| 564 | else { |
| 565 | /* For VME-RieblCards, request a free VME int; |
| 566 | * (This must be unsigned long, since dev->irq is short and the |
| 567 | * IRQ_MACHSPEC bit would be cut off...) |
| 568 | */ |
| 569 | unsigned long irq = atari_register_vme_int(); |
| 570 | if (!irq) { |
| 571 | printk( "Lance: request for VME interrupt failed\n" ); |
| 572 | return( 0 ); |
| 573 | } |
| 574 | if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO, |
| 575 | "Riebl-VME Ethernet", dev)) { |
| 576 | printk( "Lance: request for irq %ld failed\n", irq ); |
| 577 | return( 0 ); |
| 578 | } |
| 579 | dev->irq = irq; |
| 580 | } |
| 581 | |
| 582 | printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ", |
| 583 | dev->name, lance_names[lp->cardtype], |
| 584 | (unsigned long)ioaddr, |
| 585 | (unsigned long)memaddr, |
| 586 | dev->irq, |
| 587 | init_rec->slow_flag ? " (slow memcpy)" : "" ); |
| 588 | |
| 589 | /* Get the ethernet address */ |
| 590 | switch( lp->cardtype ) { |
| 591 | case OLD_RIEBL: |
| 592 | /* No ethernet address! (Set some default address) */ |
| 593 | memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 ); |
| 594 | break; |
| 595 | case NEW_RIEBL: |
| 596 | lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 ); |
| 597 | break; |
| 598 | case PAM_CARD: |
| 599 | i = IO->eeprom; |
| 600 | for( i = 0; i < 6; ++i ) |
| 601 | dev->dev_addr[i] = |
| 602 | ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) | |
| 603 | ((((unsigned short *)MEM)[i*2+1] & 0x0f)); |
| 604 | i = IO->mem; |
| 605 | break; |
| 606 | } |
| 607 | printk("%pM\n", dev->dev_addr); |
| 608 | if (lp->cardtype == OLD_RIEBL) { |
| 609 | printk( "%s: Warning: This is a default ethernet address!\n", |
| 610 | dev->name ); |
| 611 | printk( " Use \"ifconfig hw ether ...\" to set the address.\n" ); |
| 612 | } |
| 613 | |
| 614 | spin_lock_init(&lp->devlock); |
| 615 | |
| 616 | MEM->init.mode = 0x0000; /* Disable Rx and Tx. */ |
| 617 | for( i = 0; i < 6; i++ ) |
| 618 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ |
| 619 | MEM->init.filter[0] = 0x00000000; |
| 620 | MEM->init.filter[1] = 0x00000000; |
| 621 | MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head ); |
| 622 | MEM->init.rx_ring.adr_hi = 0; |
| 623 | MEM->init.rx_ring.len = RX_RING_LEN_BITS; |
| 624 | MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head ); |
| 625 | MEM->init.tx_ring.adr_hi = 0; |
| 626 | MEM->init.tx_ring.len = TX_RING_LEN_BITS; |
| 627 | |
| 628 | if (lp->cardtype == PAM_CARD) |
| 629 | IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq); |
| 630 | else |
| 631 | *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq); |
| 632 | |
| 633 | if (did_version++ == 0) |
| 634 | DPRINTK( 1, ( version )); |
| 635 | |
| 636 | dev->netdev_ops = &lance_netdev_ops; |
| 637 | |
| 638 | /* XXX MSch */ |
| 639 | dev->watchdog_timeo = TX_TIMEOUT; |
| 640 | |
| 641 | return( 1 ); |
| 642 | } |
| 643 | |
| 644 | |
| 645 | static int lance_open( struct net_device *dev ) |
| 646 | { |
| 647 | struct lance_private *lp = netdev_priv(dev); |
| 648 | struct lance_ioreg *IO = lp->iobase; |
| 649 | int i; |
| 650 | |
| 651 | DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); |
| 652 | |
| 653 | lance_init_ring(dev); |
| 654 | /* Re-initialize the LANCE, and start it when done. */ |
| 655 | |
| 656 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); |
| 657 | REGA( CSR2 ) = 0; |
| 658 | REGA( CSR1 ) = 0; |
| 659 | REGA( CSR0 ) = CSR0_INIT; |
| 660 | /* From now on, AREG is kept to point to CSR0 */ |
| 661 | |
| 662 | i = 1000000; |
| 663 | while (--i > 0) |
| 664 | if (DREG & CSR0_IDON) |
| 665 | break; |
| 666 | if (i < 0 || (DREG & CSR0_ERR)) { |
| 667 | DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", |
| 668 | dev->name, i, DREG )); |
| 669 | DREG = CSR0_STOP; |
| 670 | return( -EIO ); |
| 671 | } |
| 672 | DREG = CSR0_IDON; |
| 673 | DREG = CSR0_STRT; |
| 674 | DREG = CSR0_INEA; |
| 675 | |
| 676 | netif_start_queue (dev); |
| 677 | |
| 678 | DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); |
| 679 | |
| 680 | return( 0 ); |
| 681 | } |
| 682 | |
| 683 | |
| 684 | /* Initialize the LANCE Rx and Tx rings. */ |
| 685 | |
| 686 | static void lance_init_ring( struct net_device *dev ) |
| 687 | { |
| 688 | struct lance_private *lp = netdev_priv(dev); |
| 689 | int i; |
| 690 | unsigned offset; |
| 691 | |
| 692 | lp->tx_full = 0; |
| 693 | lp->cur_rx = lp->cur_tx = 0; |
| 694 | lp->dirty_tx = 0; |
| 695 | |
| 696 | offset = offsetof( struct lance_memory, packet_area ); |
| 697 | |
| 698 | /* If the packet buffer at offset 'o' would conflict with the reserved area |
| 699 | * of RieblCards, advance it */ |
| 700 | #define CHECK_OFFSET(o) \ |
| 701 | do { \ |
| 702 | if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \ |
| 703 | if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \ |
| 704 | : (o) < RIEBL_RSVD_END) \ |
| 705 | (o) = RIEBL_RSVD_END; \ |
| 706 | } \ |
| 707 | } while(0) |
| 708 | |
| 709 | for( i = 0; i < TX_RING_SIZE; i++ ) { |
| 710 | CHECK_OFFSET(offset); |
| 711 | MEM->tx_head[i].base = offset; |
| 712 | MEM->tx_head[i].flag = TMD1_OWN_HOST; |
| 713 | MEM->tx_head[i].base_hi = 0; |
| 714 | MEM->tx_head[i].length = 0; |
| 715 | MEM->tx_head[i].misc = 0; |
| 716 | offset += PKT_BUF_SZ; |
| 717 | } |
| 718 | |
| 719 | for( i = 0; i < RX_RING_SIZE; i++ ) { |
| 720 | CHECK_OFFSET(offset); |
| 721 | MEM->rx_head[i].base = offset; |
| 722 | MEM->rx_head[i].flag = TMD1_OWN_CHIP; |
| 723 | MEM->rx_head[i].base_hi = 0; |
| 724 | MEM->rx_head[i].buf_length = -PKT_BUF_SZ; |
| 725 | MEM->rx_head[i].msg_length = 0; |
| 726 | offset += PKT_BUF_SZ; |
| 727 | } |
| 728 | } |
| 729 | |
| 730 | |
| 731 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ |
| 732 | |
| 733 | |
| 734 | static void lance_tx_timeout (struct net_device *dev) |
| 735 | { |
| 736 | struct lance_private *lp = netdev_priv(dev); |
| 737 | struct lance_ioreg *IO = lp->iobase; |
| 738 | |
| 739 | AREG = CSR0; |
| 740 | DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", |
| 741 | dev->name, DREG )); |
| 742 | DREG = CSR0_STOP; |
| 743 | /* |
| 744 | * Always set BSWP after a STOP as STOP puts it back into |
| 745 | * little endian mode. |
| 746 | */ |
| 747 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); |
| 748 | dev->stats.tx_errors++; |
| 749 | #ifndef final_version |
| 750 | { int i; |
| 751 | DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n", |
| 752 | lp->dirty_tx, lp->cur_tx, |
| 753 | lp->tx_full ? " (full)" : "", |
| 754 | lp->cur_rx )); |
| 755 | for( i = 0 ; i < RX_RING_SIZE; i++ ) |
| 756 | DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n", |
| 757 | i, MEM->rx_head[i].base, |
| 758 | -MEM->rx_head[i].buf_length, |
| 759 | MEM->rx_head[i].msg_length )); |
| 760 | for( i = 0 ; i < TX_RING_SIZE; i++ ) |
| 761 | DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n", |
| 762 | i, MEM->tx_head[i].base, |
| 763 | -MEM->tx_head[i].length, |
| 764 | MEM->tx_head[i].misc )); |
| 765 | } |
| 766 | #endif |
| 767 | /* XXX MSch: maybe purge/reinit ring here */ |
| 768 | /* lance_restart, essentially */ |
| 769 | lance_init_ring(dev); |
| 770 | REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; |
| 771 | dev->trans_start = jiffies; |
| 772 | netif_wake_queue (dev); |
| 773 | } |
| 774 | |
| 775 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ |
| 776 | |
| 777 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ) |
| 778 | { |
| 779 | struct lance_private *lp = netdev_priv(dev); |
| 780 | struct lance_ioreg *IO = lp->iobase; |
| 781 | int entry, len; |
| 782 | struct lance_tx_head *head; |
| 783 | unsigned long flags; |
| 784 | |
| 785 | DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", |
| 786 | dev->name, DREG )); |
| 787 | |
| 788 | |
| 789 | /* The old LANCE chips doesn't automatically pad buffers to min. size. */ |
| 790 | len = skb->len; |
| 791 | if (len < ETH_ZLEN) |
| 792 | len = ETH_ZLEN; |
| 793 | /* PAM-Card has a bug: Can only send packets with even number of bytes! */ |
| 794 | else if (lp->cardtype == PAM_CARD && (len & 1)) |
| 795 | ++len; |
| 796 | |
| 797 | if (len > skb->len) { |
| 798 | if (skb_padto(skb, len)) |
| 799 | return NETDEV_TX_OK; |
| 800 | } |
| 801 | |
| 802 | netif_stop_queue (dev); |
| 803 | |
| 804 | /* Fill in a Tx ring entry */ |
| 805 | if (lance_debug >= 3) { |
| 806 | printk( "%s: TX pkt type 0x%04x from %pM to %pM" |
| 807 | " data at 0x%08x len %d\n", |
| 808 | dev->name, ((u_short *)skb->data)[6], |
| 809 | &skb->data[6], skb->data, |
| 810 | (int)skb->data, (int)skb->len ); |
| 811 | } |
| 812 | |
| 813 | /* We're not prepared for the int until the last flags are set/reset. And |
| 814 | * the int may happen already after setting the OWN_CHIP... */ |
| 815 | spin_lock_irqsave (&lp->devlock, flags); |
| 816 | |
| 817 | /* Mask to ring buffer boundary. */ |
| 818 | entry = lp->cur_tx & TX_RING_MOD_MASK; |
| 819 | head = &(MEM->tx_head[entry]); |
| 820 | |
| 821 | /* Caution: the write order is important here, set the "ownership" bits |
| 822 | * last. |
| 823 | */ |
| 824 | |
| 825 | |
| 826 | head->length = -len; |
| 827 | head->misc = 0; |
| 828 | lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len ); |
| 829 | head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; |
| 830 | dev->stats.tx_bytes += skb->len; |
| 831 | dev_kfree_skb( skb ); |
| 832 | lp->cur_tx++; |
| 833 | while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) { |
| 834 | lp->cur_tx -= TX_RING_SIZE; |
| 835 | lp->dirty_tx -= TX_RING_SIZE; |
| 836 | } |
| 837 | |
| 838 | /* Trigger an immediate send poll. */ |
| 839 | DREG = CSR0_INEA | CSR0_TDMD; |
| 840 | dev->trans_start = jiffies; |
| 841 | |
| 842 | if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == |
| 843 | TMD1_OWN_HOST) |
| 844 | netif_start_queue (dev); |
| 845 | else |
| 846 | lp->tx_full = 1; |
| 847 | spin_unlock_irqrestore (&lp->devlock, flags); |
| 848 | |
| 849 | return NETDEV_TX_OK; |
| 850 | } |
| 851 | |
| 852 | /* The LANCE interrupt handler. */ |
| 853 | |
| 854 | static irqreturn_t lance_interrupt( int irq, void *dev_id ) |
| 855 | { |
| 856 | struct net_device *dev = dev_id; |
| 857 | struct lance_private *lp; |
| 858 | struct lance_ioreg *IO; |
| 859 | int csr0, boguscnt = 10; |
| 860 | int handled = 0; |
| 861 | |
| 862 | if (dev == NULL) { |
| 863 | DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" )); |
| 864 | return IRQ_NONE; |
| 865 | } |
| 866 | |
| 867 | lp = netdev_priv(dev); |
| 868 | IO = lp->iobase; |
| 869 | spin_lock (&lp->devlock); |
| 870 | |
| 871 | AREG = CSR0; |
| 872 | |
| 873 | while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) && |
| 874 | --boguscnt >= 0) { |
| 875 | handled = 1; |
| 876 | /* Acknowledge all of the current interrupt sources ASAP. */ |
| 877 | DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | |
| 878 | CSR0_TDMD | CSR0_INEA); |
| 879 | |
| 880 | DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", |
| 881 | dev->name, csr0, DREG )); |
| 882 | |
| 883 | if (csr0 & CSR0_RINT) /* Rx interrupt */ |
| 884 | lance_rx( dev ); |
| 885 | |
| 886 | if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ |
| 887 | int dirty_tx = lp->dirty_tx; |
| 888 | |
| 889 | while( dirty_tx < lp->cur_tx) { |
| 890 | int entry = dirty_tx & TX_RING_MOD_MASK; |
| 891 | int status = MEM->tx_head[entry].flag; |
| 892 | |
| 893 | if (status & TMD1_OWN_CHIP) |
| 894 | break; /* It still hasn't been Txed */ |
| 895 | |
| 896 | MEM->tx_head[entry].flag = 0; |
| 897 | |
| 898 | if (status & TMD1_ERR) { |
| 899 | /* There was an major error, log it. */ |
| 900 | int err_status = MEM->tx_head[entry].misc; |
| 901 | dev->stats.tx_errors++; |
| 902 | if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++; |
| 903 | if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++; |
| 904 | if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++; |
| 905 | if (err_status & TMD3_UFLO) { |
| 906 | /* Ackk! On FIFO errors the Tx unit is turned off! */ |
| 907 | dev->stats.tx_fifo_errors++; |
| 908 | /* Remove this verbosity later! */ |
| 909 | DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n", |
| 910 | dev->name, csr0 )); |
| 911 | /* Restart the chip. */ |
| 912 | DREG = CSR0_STRT; |
| 913 | } |
| 914 | } else { |
| 915 | if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF)) |
| 916 | dev->stats.collisions++; |
| 917 | dev->stats.tx_packets++; |
| 918 | } |
| 919 | |
| 920 | /* XXX MSch: free skb?? */ |
| 921 | dirty_tx++; |
| 922 | } |
| 923 | |
| 924 | #ifndef final_version |
| 925 | if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { |
| 926 | DPRINTK( 0, ( "out-of-sync dirty pointer," |
| 927 | " %d vs. %d, full=%ld.\n", |
| 928 | dirty_tx, lp->cur_tx, lp->tx_full )); |
| 929 | dirty_tx += TX_RING_SIZE; |
| 930 | } |
| 931 | #endif |
| 932 | |
| 933 | if (lp->tx_full && (netif_queue_stopped(dev)) |
| 934 | && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) { |
| 935 | /* The ring is no longer full, clear tbusy. */ |
| 936 | lp->tx_full = 0; |
| 937 | netif_wake_queue (dev); |
| 938 | } |
| 939 | |
| 940 | lp->dirty_tx = dirty_tx; |
| 941 | } |
| 942 | |
| 943 | /* Log misc errors. */ |
| 944 | if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ |
| 945 | if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ |
| 946 | if (csr0 & CSR0_MERR) { |
| 947 | DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " |
| 948 | "status %04x.\n", dev->name, csr0 )); |
| 949 | /* Restart the chip. */ |
| 950 | DREG = CSR0_STRT; |
| 951 | } |
| 952 | } |
| 953 | |
| 954 | /* Clear any other interrupt, and set interrupt enable. */ |
| 955 | DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | |
| 956 | CSR0_IDON | CSR0_INEA; |
| 957 | |
| 958 | DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", |
| 959 | dev->name, DREG )); |
| 960 | |
| 961 | spin_unlock (&lp->devlock); |
| 962 | return IRQ_RETVAL(handled); |
| 963 | } |
| 964 | |
| 965 | |
| 966 | static int lance_rx( struct net_device *dev ) |
| 967 | { |
| 968 | struct lance_private *lp = netdev_priv(dev); |
| 969 | int entry = lp->cur_rx & RX_RING_MOD_MASK; |
| 970 | int i; |
| 971 | |
| 972 | DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name, |
| 973 | MEM->rx_head[entry].flag )); |
| 974 | |
| 975 | /* If we own the next entry, it's a new packet. Send it up. */ |
| 976 | while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { |
| 977 | struct lance_rx_head *head = &(MEM->rx_head[entry]); |
| 978 | int status = head->flag; |
| 979 | |
| 980 | if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ |
| 981 | /* There is a tricky error noted by John Murphy, |
| 982 | <murf@perftech.com> to Russ Nelson: Even with full-sized |
| 983 | buffers it's possible for a jabber packet to use two |
| 984 | buffers, with only the last correctly noting the error. */ |
| 985 | if (status & RMD1_ENP) /* Only count a general error at the */ |
| 986 | dev->stats.rx_errors++; /* end of a packet.*/ |
| 987 | if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; |
| 988 | if (status & RMD1_OFLO) dev->stats.rx_over_errors++; |
| 989 | if (status & RMD1_CRC) dev->stats.rx_crc_errors++; |
| 990 | if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; |
| 991 | head->flag &= (RMD1_ENP|RMD1_STP); |
| 992 | } else { |
| 993 | /* Malloc up new buffer, compatible with net-3. */ |
| 994 | short pkt_len = head->msg_length & 0xfff; |
| 995 | struct sk_buff *skb; |
| 996 | |
| 997 | if (pkt_len < 60) { |
| 998 | printk( "%s: Runt packet!\n", dev->name ); |
| 999 | dev->stats.rx_errors++; |
| 1000 | } |
| 1001 | else { |
| 1002 | skb = dev_alloc_skb( pkt_len+2 ); |
| 1003 | if (skb == NULL) { |
| 1004 | DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n", |
| 1005 | dev->name )); |
| 1006 | for( i = 0; i < RX_RING_SIZE; i++ ) |
| 1007 | if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag & |
| 1008 | RMD1_OWN_CHIP) |
| 1009 | break; |
| 1010 | |
| 1011 | if (i > RX_RING_SIZE - 2) { |
| 1012 | dev->stats.rx_dropped++; |
| 1013 | head->flag |= RMD1_OWN_CHIP; |
| 1014 | lp->cur_rx++; |
| 1015 | } |
| 1016 | break; |
| 1017 | } |
| 1018 | |
| 1019 | if (lance_debug >= 3) { |
| 1020 | u_char *data = PKTBUF_ADDR(head); |
| 1021 | |
| 1022 | printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM " |
| 1023 | "data %02x %02x %02x %02x %02x %02x %02x %02x " |
| 1024 | "len %d\n", |
| 1025 | dev->name, ((u_short *)data)[6], |
| 1026 | &data[6], data, |
| 1027 | data[15], data[16], data[17], data[18], |
| 1028 | data[19], data[20], data[21], data[22], |
| 1029 | pkt_len); |
| 1030 | } |
| 1031 | |
| 1032 | skb_reserve( skb, 2 ); /* 16 byte align */ |
| 1033 | skb_put( skb, pkt_len ); /* Make room */ |
| 1034 | lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len ); |
| 1035 | skb->protocol = eth_type_trans( skb, dev ); |
| 1036 | netif_rx( skb ); |
| 1037 | dev->stats.rx_packets++; |
| 1038 | dev->stats.rx_bytes += pkt_len; |
| 1039 | } |
| 1040 | } |
| 1041 | |
| 1042 | head->flag |= RMD1_OWN_CHIP; |
| 1043 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; |
| 1044 | } |
| 1045 | lp->cur_rx &= RX_RING_MOD_MASK; |
| 1046 | |
| 1047 | /* From lance.c (Donald Becker): */ |
| 1048 | /* We should check that at least two ring entries are free. If not, |
| 1049 | we should free one and mark stats->rx_dropped++. */ |
| 1050 | |
| 1051 | return 0; |
| 1052 | } |
| 1053 | |
| 1054 | |
| 1055 | static int lance_close( struct net_device *dev ) |
| 1056 | { |
| 1057 | struct lance_private *lp = netdev_priv(dev); |
| 1058 | struct lance_ioreg *IO = lp->iobase; |
| 1059 | |
| 1060 | netif_stop_queue (dev); |
| 1061 | |
| 1062 | AREG = CSR0; |
| 1063 | |
| 1064 | DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", |
| 1065 | dev->name, DREG )); |
| 1066 | |
| 1067 | /* We stop the LANCE here -- it occasionally polls |
| 1068 | memory if we don't. */ |
| 1069 | DREG = CSR0_STOP; |
| 1070 | |
| 1071 | return 0; |
| 1072 | } |
| 1073 | |
| 1074 | |
| 1075 | /* Set or clear the multicast filter for this adaptor. |
| 1076 | num_addrs == -1 Promiscuous mode, receive all packets |
| 1077 | num_addrs == 0 Normal mode, clear multicast list |
| 1078 | num_addrs > 0 Multicast mode, receive normal and MC packets, and do |
| 1079 | best-effort filtering. |
| 1080 | */ |
| 1081 | |
| 1082 | static void set_multicast_list( struct net_device *dev ) |
| 1083 | { |
| 1084 | struct lance_private *lp = netdev_priv(dev); |
| 1085 | struct lance_ioreg *IO = lp->iobase; |
| 1086 | |
| 1087 | if (netif_running(dev)) |
| 1088 | /* Only possible if board is already started */ |
| 1089 | return; |
| 1090 | |
| 1091 | /* We take the simple way out and always enable promiscuous mode. */ |
| 1092 | DREG = CSR0_STOP; /* Temporarily stop the lance. */ |
| 1093 | |
| 1094 | if (dev->flags & IFF_PROMISC) { |
| 1095 | /* Log any net taps. */ |
| 1096 | DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name )); |
| 1097 | REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ |
| 1098 | } else { |
| 1099 | short multicast_table[4]; |
| 1100 | int num_addrs = dev->mc_count; |
| 1101 | int i; |
| 1102 | /* We don't use the multicast table, but rely on upper-layer |
| 1103 | * filtering. */ |
| 1104 | memset( multicast_table, (num_addrs == 0) ? 0 : -1, |
| 1105 | sizeof(multicast_table) ); |
| 1106 | for( i = 0; i < 4; i++ ) |
| 1107 | REGA( CSR8+i ) = multicast_table[i]; |
| 1108 | REGA( CSR15 ) = 0; /* Unset promiscuous mode */ |
| 1109 | } |
| 1110 | |
| 1111 | /* |
| 1112 | * Always set BSWP after a STOP as STOP puts it back into |
| 1113 | * little endian mode. |
| 1114 | */ |
| 1115 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); |
| 1116 | |
| 1117 | /* Resume normal operation and reset AREG to CSR0 */ |
| 1118 | REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; |
| 1119 | } |
| 1120 | |
| 1121 | |
| 1122 | /* This is needed for old RieblCards and possible for new RieblCards */ |
| 1123 | |
| 1124 | static int lance_set_mac_address( struct net_device *dev, void *addr ) |
| 1125 | { |
| 1126 | struct lance_private *lp = netdev_priv(dev); |
| 1127 | struct sockaddr *saddr = addr; |
| 1128 | int i; |
| 1129 | |
| 1130 | if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL) |
| 1131 | return( -EOPNOTSUPP ); |
| 1132 | |
| 1133 | if (netif_running(dev)) { |
| 1134 | /* Only possible while card isn't started */ |
| 1135 | DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n", |
| 1136 | dev->name )); |
| 1137 | return( -EIO ); |
| 1138 | } |
| 1139 | |
| 1140 | memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len ); |
| 1141 | for( i = 0; i < 6; i++ ) |
| 1142 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ |
| 1143 | lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 ); |
| 1144 | /* set also the magic for future sessions */ |
| 1145 | *RIEBL_MAGIC_ADDR = RIEBL_MAGIC; |
| 1146 | |
| 1147 | return( 0 ); |
| 1148 | } |
| 1149 | |
| 1150 | |
| 1151 | #ifdef MODULE |
| 1152 | static struct net_device *atarilance_dev; |
| 1153 | |
| 1154 | static int __init atarilance_module_init(void) |
| 1155 | { |
| 1156 | atarilance_dev = atarilance_probe(-1); |
| 1157 | if (IS_ERR(atarilance_dev)) |
| 1158 | return PTR_ERR(atarilance_dev); |
| 1159 | return 0; |
| 1160 | } |
| 1161 | |
| 1162 | static void __exit atarilance_module_exit(void) |
| 1163 | { |
| 1164 | unregister_netdev(atarilance_dev); |
| 1165 | free_irq(atarilance_dev->irq, atarilance_dev); |
| 1166 | free_netdev(atarilance_dev); |
| 1167 | } |
| 1168 | module_init(atarilance_module_init); |
| 1169 | module_exit(atarilance_module_exit); |
| 1170 | #endif /* MODULE */ |
| 1171 | |
| 1172 | |
| 1173 | /* |
| 1174 | * Local variables: |
| 1175 | * c-indent-level: 4 |
| 1176 | * tab-width: 4 |
| 1177 | * End: |
| 1178 | */ |