| 1 | /* |
| 2 | * EDAC defs for Marvell MV64x60 bridge chip |
| 3 | * |
| 4 | * Author: Dave Jiang <djiang@mvista.com> |
| 5 | * |
| 6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
| 7 | * the terms of the GNU General Public License version 2. This program |
| 8 | * is licensed "as is" without any warranty of any kind, whether express |
| 9 | * or implied. |
| 10 | * |
| 11 | */ |
| 12 | #ifndef _MV64X60_EDAC_H_ |
| 13 | #define _MV64X60_EDAC_H_ |
| 14 | |
| 15 | #define MV64x60_REVISION " Ver: 2.0.0" |
| 16 | #define EDAC_MOD_STR "MV64x60_edac" |
| 17 | |
| 18 | #define mv64x60_printk(level, fmt, arg...) \ |
| 19 | edac_printk(level, "MV64x60", fmt, ##arg) |
| 20 | |
| 21 | #define mv64x60_mc_printk(mci, level, fmt, arg...) \ |
| 22 | edac_mc_chipset_printk(mci, level, "MV64x60", fmt, ##arg) |
| 23 | |
| 24 | /* CPU Error Report Registers */ |
| 25 | #define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */ |
| 26 | #define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */ |
| 27 | #define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */ |
| 28 | #define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */ |
| 29 | #define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */ |
| 30 | #define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */ |
| 31 | #define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */ |
| 32 | |
| 33 | #define MV64x60_CPU_CAUSE_MASK 0x07ffffff |
| 34 | |
| 35 | /* SRAM Error Report Registers */ |
| 36 | #define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */ |
| 37 | #define MV64X60_SRAM_ERR_ADDR_LO 0x10 /* 0x0390 */ |
| 38 | #define MV64X60_SRAM_ERR_ADDR_HI 0x78 /* 0x03f8 */ |
| 39 | #define MV64X60_SRAM_ERR_DATA_LO 0x18 /* 0x0398 */ |
| 40 | #define MV64X60_SRAM_ERR_DATA_HI 0x20 /* 0x03a0 */ |
| 41 | #define MV64X60_SRAM_ERR_PARITY 0x28 /* 0x03a8 */ |
| 42 | |
| 43 | /* SDRAM Controller Registers */ |
| 44 | #define MV64X60_SDRAM_CONFIG 0x00 /* 0x1400 */ |
| 45 | #define MV64X60_SDRAM_ERR_DATA_HI 0x40 /* 0x1440 */ |
| 46 | #define MV64X60_SDRAM_ERR_DATA_LO 0x44 /* 0x1444 */ |
| 47 | #define MV64X60_SDRAM_ERR_ECC_RCVD 0x48 /* 0x1448 */ |
| 48 | #define MV64X60_SDRAM_ERR_ECC_CALC 0x4c /* 0x144c */ |
| 49 | #define MV64X60_SDRAM_ERR_ADDR 0x50 /* 0x1450 */ |
| 50 | #define MV64X60_SDRAM_ERR_ECC_CNTL 0x54 /* 0x1454 */ |
| 51 | #define MV64X60_SDRAM_ERR_ECC_ERR_CNT 0x58 /* 0x1458 */ |
| 52 | |
| 53 | #define MV64X60_SDRAM_REGISTERED 0x20000 |
| 54 | #define MV64X60_SDRAM_ECC 0x40000 |
| 55 | |
| 56 | #ifdef CONFIG_PCI |
| 57 | /* |
| 58 | * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of |
| 59 | * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as |
| 60 | * well. IOW, don't set bit 0. |
| 61 | */ |
| 62 | #define MV64X60_PCIx_ERR_MASK_VAL 0x00a50c24 |
| 63 | |
| 64 | /* Register offsets from PCIx error address low register */ |
| 65 | #define MV64X60_PCI_ERROR_ADDR_LO 0x00 |
| 66 | #define MV64X60_PCI_ERROR_ADDR_HI 0x04 |
| 67 | #define MV64X60_PCI_ERROR_ATTR 0x08 |
| 68 | #define MV64X60_PCI_ERROR_CMD 0x10 |
| 69 | #define MV64X60_PCI_ERROR_CAUSE 0x18 |
| 70 | #define MV64X60_PCI_ERROR_MASK 0x1c |
| 71 | |
| 72 | #define MV64X60_PCI_ERR_SWrPerr 0x0002 |
| 73 | #define MV64X60_PCI_ERR_SRdPerr 0x0004 |
| 74 | #define MV64X60_PCI_ERR_MWrPerr 0x0020 |
| 75 | #define MV64X60_PCI_ERR_MRdPerr 0x0040 |
| 76 | |
| 77 | #define MV64X60_PCI_PE_MASK (MV64X60_PCI_ERR_SWrPerr | \ |
| 78 | MV64X60_PCI_ERR_SRdPerr | \ |
| 79 | MV64X60_PCI_ERR_MWrPerr | \ |
| 80 | MV64X60_PCI_ERR_MRdPerr) |
| 81 | |
| 82 | struct mv64x60_pci_pdata { |
| 83 | int pci_hose; |
| 84 | void __iomem *pci_vbase; |
| 85 | char *name; |
| 86 | int irq; |
| 87 | int edac_idx; |
| 88 | }; |
| 89 | |
| 90 | #endif /* CONFIG_PCI */ |
| 91 | |
| 92 | struct mv64x60_mc_pdata { |
| 93 | void __iomem *mc_vbase; |
| 94 | int total_mem; |
| 95 | char *name; |
| 96 | int irq; |
| 97 | int edac_idx; |
| 98 | }; |
| 99 | |
| 100 | struct mv64x60_cpu_pdata { |
| 101 | void __iomem *cpu_vbase[2]; |
| 102 | char *name; |
| 103 | int irq; |
| 104 | int edac_idx; |
| 105 | }; |
| 106 | |
| 107 | struct mv64x60_sram_pdata { |
| 108 | void __iomem *sram_vbase; |
| 109 | char *name; |
| 110 | int irq; |
| 111 | int edac_idx; |
| 112 | }; |
| 113 | |
| 114 | #endif |