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cpuidle: Remove CPUIDLE_FLAG_IGNORE and dev->prepare()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / acpi / processor_idle.c
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1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
39#include <linux/sched.h> /* need_resched() */
40#include <linux/pm_qos_params.h>
41#include <linux/clockchips.h>
42#include <linux/cpuidle.h>
43#include <linux/irqflags.h>
44
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
60#include <asm/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66ACPI_MODULE_NAME("processor_idle");
67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
74static unsigned int nocst __read_mostly;
75module_param(nocst, uint, 0000);
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
78
79static unsigned int latency_factor __read_mostly = 2;
80module_param(latency_factor, uint, 0644);
81
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
95static int set_max_cstate(const struct dmi_system_id *id)
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104 max_cstate = (long)id->driver_data;
105
106 return 0;
107}
108
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
124 {},
125};
126
127
128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
143 }
144 current_thread_info()->status |= TS_POLLING;
145}
146
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
154 */
155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
166
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
176}
177
178static void __lapic_timer_propagate_broadcast(void *arg)
179{
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
187}
188
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
195/* Power(C) State timer broadcast control */
196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
209}
210
211#else
212
213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
221
222#endif
223
224/*
225 * Suspend / resume control
226 */
227static int acpi_idle_suspend;
228static u32 saved_bm_rld;
229
230static void acpi_idle_bm_rld_save(void)
231{
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233}
234static void acpi_idle_bm_rld_restore(void)
235{
236 u32 resumed_bm_rld;
237
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239
240 if (resumed_bm_rld != saved_bm_rld)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
242}
243
244int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245{
246 if (acpi_idle_suspend == 1)
247 return 0;
248
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend = 1;
251 return 0;
252}
253
254int acpi_processor_resume(struct acpi_device * device)
255{
256 if (acpi_idle_suspend == 0)
257 return 0;
258
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend = 0;
261 return 0;
262}
263
264#if defined(CONFIG_X86)
265static void tsc_check_state(int state)
266{
267 switch (boot_cpu_data.x86_vendor) {
268 case X86_VENDOR_AMD:
269 case X86_VENDOR_INTEL:
270 /*
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
273 */
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
275 return;
276
277 /*FALL THROUGH*/
278 default:
279 /* TSC could halt in idle, so notify users */
280 if (state > ACPI_STATE_C1)
281 mark_tsc_unstable("TSC halts in idle");
282 }
283}
284#else
285static void tsc_check_state(int state) { return; }
286#endif
287
288static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
289{
290
291 if (!pr)
292 return -EINVAL;
293
294 if (!pr->pblk)
295 return -ENODEV;
296
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
299 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
300
301#ifndef CONFIG_HOTPLUG_CPU
302 /*
303 * Check for P_LVL2_UP flag before entering C2 and above on
304 * an SMP system.
305 */
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
308 return -ENODEV;
309#endif
310
311 /* determine C2 and C3 address from pblk */
312 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
313 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
314
315 /* determine latencies from FADT */
316 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
317 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
318
319 /*
320 * FADT specified C2 latency must be less than or equal to
321 * 100 microseconds.
322 */
323 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
326 /* invalidate C2 */
327 pr->power.states[ACPI_STATE_C2].address = 0;
328 }
329
330 /*
331 * FADT supplied C3 latency must be less than or equal to
332 * 1000 microseconds.
333 */
334 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
337 /* invalidate C3 */
338 pr->power.states[ACPI_STATE_C3].address = 0;
339 }
340
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr->power.states[ACPI_STATE_C2].address,
344 pr->power.states[ACPI_STATE_C3].address));
345
346 return 0;
347}
348
349static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
350{
351 if (!pr->power.states[ACPI_STATE_C1].valid) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
355 pr->power.states[ACPI_STATE_C1].valid = 1;
356 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
357 }
358 /* the C0 state only exists as a filler in our array */
359 pr->power.states[ACPI_STATE_C0].valid = 1;
360 return 0;
361}
362
363static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
364{
365 acpi_status status = 0;
366 u64 count;
367 int current_count;
368 int i;
369 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
370 union acpi_object *cst;
371
372
373 if (nocst)
374 return -ENODEV;
375
376 current_count = 0;
377
378 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
379 if (ACPI_FAILURE(status)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
381 return -ENODEV;
382 }
383
384 cst = buffer.pointer;
385
386 /* There must be at least 2 elements */
387 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
388 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
389 status = -EFAULT;
390 goto end;
391 }
392
393 count = cst->package.elements[0].integer.value;
394
395 /* Validate number of power states. */
396 if (count < 1 || count != cst->package.count - 1) {
397 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
398 status = -EFAULT;
399 goto end;
400 }
401
402 /* Tell driver that at least _CST is supported. */
403 pr->flags.has_cst = 1;
404
405 for (i = 1; i <= count; i++) {
406 union acpi_object *element;
407 union acpi_object *obj;
408 struct acpi_power_register *reg;
409 struct acpi_processor_cx cx;
410
411 memset(&cx, 0, sizeof(cx));
412
413 element = &(cst->package.elements[i]);
414 if (element->type != ACPI_TYPE_PACKAGE)
415 continue;
416
417 if (element->package.count != 4)
418 continue;
419
420 obj = &(element->package.elements[0]);
421
422 if (obj->type != ACPI_TYPE_BUFFER)
423 continue;
424
425 reg = (struct acpi_power_register *)obj->buffer.pointer;
426
427 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
428 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
429 continue;
430
431 /* There should be an easy way to extract an integer... */
432 obj = &(element->package.elements[1]);
433 if (obj->type != ACPI_TYPE_INTEGER)
434 continue;
435
436 cx.type = obj->integer.value;
437 /*
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
440 */
441 if (i == 1 && cx.type != ACPI_STATE_C1)
442 current_count++;
443
444 cx.address = reg->address;
445 cx.index = current_count + 1;
446
447 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
448 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr->id, &cx, reg) == 0) {
451 cx.entry_method = ACPI_CSTATE_FFH;
452 } else if (cx.type == ACPI_STATE_C1) {
453 /*
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
458 */
459 cx.entry_method = ACPI_CSTATE_HALT;
460 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
461 } else {
462 continue;
463 }
464 if (cx.type == ACPI_STATE_C1 &&
465 (boot_option_idle_override == IDLE_NOMWAIT)) {
466 /*
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
474 * CSTATE_HALT.
475 */
476 cx.entry_method = ACPI_CSTATE_HALT;
477 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
478 }
479 } else {
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
481 cx.address);
482 }
483
484 if (cx.type == ACPI_STATE_C1) {
485 cx.valid = 1;
486 }
487
488 obj = &(element->package.elements[2]);
489 if (obj->type != ACPI_TYPE_INTEGER)
490 continue;
491
492 cx.latency = obj->integer.value;
493
494 obj = &(element->package.elements[3]);
495 if (obj->type != ACPI_TYPE_INTEGER)
496 continue;
497
498 cx.power = obj->integer.value;
499
500 current_count++;
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
502
503 /*
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
506 */
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
508 printk(KERN_WARNING
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
511 printk(KERN_WARNING
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
513 break;
514 }
515 }
516
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
518 current_count));
519
520 /* Validate number of power states discovered */
521 if (current_count < 2)
522 status = -EFAULT;
523
524 end:
525 kfree(buffer.pointer);
526
527 return status;
528}
529
530static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
532{
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
535
536
537 if (!cx->address)
538 return;
539
540 /*
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
546 */
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
550 return;
551 }
552
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
559 } else {
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
562 }
563
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
570 return;
571 } else {
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
575 }
576 }
577 } else {
578 /*
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
581 */
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
586 return;
587 }
588 }
589
590 /*
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
595 */
596 cx->valid = 1;
597
598 cx->latency_ticks = cx->latency;
599 /*
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
606 */
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
608
609 return;
610}
611
612static int acpi_processor_power_verify(struct acpi_processor *pr)
613{
614 unsigned int i;
615 unsigned int working = 0;
616
617 pr->power.timer_broadcast_on_state = INT_MAX;
618
619 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
620 struct acpi_processor_cx *cx = &pr->power.states[i];
621
622 switch (cx->type) {
623 case ACPI_STATE_C1:
624 cx->valid = 1;
625 break;
626
627 case ACPI_STATE_C2:
628 if (!cx->address)
629 break;
630 cx->valid = 1;
631 cx->latency_ticks = cx->latency; /* Normalize latency */
632 break;
633
634 case ACPI_STATE_C3:
635 acpi_processor_power_verify_c3(pr, cx);
636 break;
637 }
638 if (!cx->valid)
639 continue;
640
641 lapic_timer_check_state(i, pr, cx);
642 tsc_check_state(cx->type);
643 working++;
644 }
645
646 lapic_timer_propagate_broadcast(pr);
647
648 return (working);
649}
650
651static int acpi_processor_get_power_info(struct acpi_processor *pr)
652{
653 unsigned int i;
654 int result;
655
656
657 /* NOTE: the idle thread may not be running while calling
658 * this function */
659
660 /* Zero initialize all the C-states info. */
661 memset(pr->power.states, 0, sizeof(pr->power.states));
662
663 result = acpi_processor_get_power_info_cst(pr);
664 if (result == -ENODEV)
665 result = acpi_processor_get_power_info_fadt(pr);
666
667 if (result)
668 return result;
669
670 acpi_processor_get_power_info_default(pr);
671
672 pr->power.count = acpi_processor_power_verify(pr);
673
674 /*
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
677 */
678 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
679 if (pr->power.states[i].valid) {
680 pr->power.count = i;
681 if (pr->power.states[i].type >= ACPI_STATE_C2)
682 pr->flags.power = 1;
683 }
684 }
685
686 return 0;
687}
688
689/**
690 * acpi_idle_bm_check - checks if bus master activity was detected
691 */
692static int acpi_idle_bm_check(void)
693{
694 u32 bm_status = 0;
695
696 if (bm_check_disable)
697 return 0;
698
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
700 if (bm_status)
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
702 /*
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
706 */
707 else if (errata.piix4.bmisx) {
708 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
709 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
710 bm_status = 1;
711 }
712 return bm_status;
713}
714
715/**
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
717 * @cx: cstate data
718 *
719 * Caller disables interrupt before call and enables interrupt after return.
720 */
721static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
722{
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx->entry_method == ACPI_CSTATE_FFH) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx);
728 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
729 acpi_safe_halt();
730 } else {
731 /* IO port based C-state */
732 inb(cx->address);
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT.xpm_timer_block.address);
737 }
738 start_critical_timings();
739}
740
741/**
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @index: index of target state
745 *
746 * This is equivalent to the HALT instruction.
747 */
748static int acpi_idle_enter_c1(struct cpuidle_device *dev,
749 int index)
750{
751 ktime_t kt1, kt2;
752 s64 idle_time;
753 struct acpi_processor *pr;
754 struct cpuidle_state *state = &dev->states[index];
755 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
756
757 pr = __this_cpu_read(processors);
758 dev->last_residency = 0;
759
760 if (unlikely(!pr))
761 return -EINVAL;
762
763 local_irq_disable();
764
765 /* Do not access any ACPI IO ports in suspend path */
766 if (acpi_idle_suspend) {
767 local_irq_enable();
768 cpu_relax();
769 return -EINVAL;
770 }
771
772 lapic_timer_state_broadcast(pr, cx, 1);
773 kt1 = ktime_get_real();
774 acpi_idle_do_entry(cx);
775 kt2 = ktime_get_real();
776 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
777
778 /* Update device last_residency*/
779 dev->last_residency = (int)idle_time;
780
781 local_irq_enable();
782 cx->usage++;
783 lapic_timer_state_broadcast(pr, cx, 0);
784
785 return index;
786}
787
788/**
789 * acpi_idle_enter_simple - enters an ACPI state without BM handling
790 * @dev: the target CPU
791 * @index: the index of suggested state
792 */
793static int acpi_idle_enter_simple(struct cpuidle_device *dev,
794 int index)
795{
796 struct acpi_processor *pr;
797 struct cpuidle_state *state = &dev->states[index];
798 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
799 ktime_t kt1, kt2;
800 s64 idle_time_ns;
801 s64 idle_time;
802
803 pr = __this_cpu_read(processors);
804 dev->last_residency = 0;
805
806 if (unlikely(!pr))
807 return -EINVAL;
808
809 local_irq_disable();
810
811 if (acpi_idle_suspend) {
812 local_irq_enable();
813 cpu_relax();
814 return -EINVAL;
815 }
816
817
818 if (cx->entry_method != ACPI_CSTATE_FFH) {
819 current_thread_info()->status &= ~TS_POLLING;
820 /*
821 * TS_POLLING-cleared state must be visible before we test
822 * NEED_RESCHED:
823 */
824 smp_mb();
825
826 if (unlikely(need_resched())) {
827 current_thread_info()->status |= TS_POLLING;
828 local_irq_enable();
829 return -EINVAL;
830 }
831 }
832
833 /*
834 * Must be done before busmaster disable as we might need to
835 * access HPET !
836 */
837 lapic_timer_state_broadcast(pr, cx, 1);
838
839 if (cx->type == ACPI_STATE_C3)
840 ACPI_FLUSH_CPU_CACHE();
841
842 kt1 = ktime_get_real();
843 /* Tell the scheduler that we are going deep-idle: */
844 sched_clock_idle_sleep_event();
845 acpi_idle_do_entry(cx);
846 kt2 = ktime_get_real();
847 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
848 idle_time = idle_time_ns;
849 do_div(idle_time, NSEC_PER_USEC);
850
851 /* Update device last_residency*/
852 dev->last_residency = (int)idle_time;
853
854 /* Tell the scheduler how much we idled: */
855 sched_clock_idle_wakeup_event(idle_time_ns);
856
857 local_irq_enable();
858 if (cx->entry_method != ACPI_CSTATE_FFH)
859 current_thread_info()->status |= TS_POLLING;
860
861 cx->usage++;
862
863 lapic_timer_state_broadcast(pr, cx, 0);
864 cx->time += idle_time;
865 return index;
866}
867
868static int c3_cpu_count;
869static DEFINE_SPINLOCK(c3_lock);
870
871/**
872 * acpi_idle_enter_bm - enters C3 with proper BM handling
873 * @dev: the target CPU
874 * @index: the index of suggested state
875 *
876 * If BM is detected, the deepest non-C3 idle state is entered instead.
877 */
878static int acpi_idle_enter_bm(struct cpuidle_device *dev,
879 int index)
880{
881 struct acpi_processor *pr;
882 struct cpuidle_state *state = &dev->states[index];
883 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
884 ktime_t kt1, kt2;
885 s64 idle_time_ns;
886 s64 idle_time;
887
888
889 pr = __this_cpu_read(processors);
890 dev->last_residency = 0;
891
892 if (unlikely(!pr))
893 return -EINVAL;
894
895
896 if (acpi_idle_suspend) {
897 cpu_relax();
898 return -EINVAL;
899 }
900
901 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
902 if (dev->safe_state_index >= 0) {
903 return dev->states[dev->safe_state_index].enter(dev,
904 dev->safe_state_index);
905 } else {
906 local_irq_disable();
907 acpi_safe_halt();
908 local_irq_enable();
909 return -EINVAL;
910 }
911 }
912
913 local_irq_disable();
914
915 if (cx->entry_method != ACPI_CSTATE_FFH) {
916 current_thread_info()->status &= ~TS_POLLING;
917 /*
918 * TS_POLLING-cleared state must be visible before we test
919 * NEED_RESCHED:
920 */
921 smp_mb();
922
923 if (unlikely(need_resched())) {
924 current_thread_info()->status |= TS_POLLING;
925 local_irq_enable();
926 return -EINVAL;
927 }
928 }
929
930 acpi_unlazy_tlb(smp_processor_id());
931
932 /* Tell the scheduler that we are going deep-idle: */
933 sched_clock_idle_sleep_event();
934 /*
935 * Must be done before busmaster disable as we might need to
936 * access HPET !
937 */
938 lapic_timer_state_broadcast(pr, cx, 1);
939
940 kt1 = ktime_get_real();
941 /*
942 * disable bus master
943 * bm_check implies we need ARB_DIS
944 * !bm_check implies we need cache flush
945 * bm_control implies whether we can do ARB_DIS
946 *
947 * That leaves a case where bm_check is set and bm_control is
948 * not set. In that case we cannot do much, we enter C3
949 * without doing anything.
950 */
951 if (pr->flags.bm_check && pr->flags.bm_control) {
952 spin_lock(&c3_lock);
953 c3_cpu_count++;
954 /* Disable bus master arbitration when all CPUs are in C3 */
955 if (c3_cpu_count == num_online_cpus())
956 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
957 spin_unlock(&c3_lock);
958 } else if (!pr->flags.bm_check) {
959 ACPI_FLUSH_CPU_CACHE();
960 }
961
962 acpi_idle_do_entry(cx);
963
964 /* Re-enable bus master arbitration */
965 if (pr->flags.bm_check && pr->flags.bm_control) {
966 spin_lock(&c3_lock);
967 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
968 c3_cpu_count--;
969 spin_unlock(&c3_lock);
970 }
971 kt2 = ktime_get_real();
972 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
973 idle_time = idle_time_ns;
974 do_div(idle_time, NSEC_PER_USEC);
975
976 /* Update device last_residency*/
977 dev->last_residency = (int)idle_time;
978
979 /* Tell the scheduler how much we idled: */
980 sched_clock_idle_wakeup_event(idle_time_ns);
981
982 local_irq_enable();
983 if (cx->entry_method != ACPI_CSTATE_FFH)
984 current_thread_info()->status |= TS_POLLING;
985
986 cx->usage++;
987
988 lapic_timer_state_broadcast(pr, cx, 0);
989 cx->time += idle_time;
990 return index;
991}
992
993struct cpuidle_driver acpi_idle_driver = {
994 .name = "acpi_idle",
995 .owner = THIS_MODULE,
996};
997
998/**
999 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1000 * @pr: the ACPI processor
1001 */
1002static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1003{
1004 int i, count = CPUIDLE_DRIVER_STATE_START;
1005 struct acpi_processor_cx *cx;
1006 struct cpuidle_state *state;
1007 struct cpuidle_device *dev = &pr->power.dev;
1008
1009 if (!pr->flags.power_setup_done)
1010 return -EINVAL;
1011
1012 if (pr->flags.power == 0) {
1013 return -EINVAL;
1014 }
1015
1016 dev->cpu = pr->id;
1017 dev->safe_state_index = -1;
1018 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1019 dev->states[i].name[0] = '\0';
1020 dev->states[i].desc[0] = '\0';
1021 }
1022
1023 if (max_cstate == 0)
1024 max_cstate = 1;
1025
1026 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1027 cx = &pr->power.states[i];
1028 state = &dev->states[count];
1029
1030 if (!cx->valid)
1031 continue;
1032
1033#ifdef CONFIG_HOTPLUG_CPU
1034 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1035 !pr->flags.has_cst &&
1036 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1037 continue;
1038#endif
1039 cpuidle_set_statedata(state, cx);
1040
1041 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1042 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1043 state->exit_latency = cx->latency;
1044 state->target_residency = cx->latency * latency_factor;
1045
1046 state->flags = 0;
1047 switch (cx->type) {
1048 case ACPI_STATE_C1:
1049 if (cx->entry_method == ACPI_CSTATE_FFH)
1050 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1051
1052 state->enter = acpi_idle_enter_c1;
1053 dev->safe_state_index = count;
1054 break;
1055
1056 case ACPI_STATE_C2:
1057 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1058 state->enter = acpi_idle_enter_simple;
1059 dev->safe_state_index = count;
1060 break;
1061
1062 case ACPI_STATE_C3:
1063 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1064 state->enter = pr->flags.bm_check ?
1065 acpi_idle_enter_bm :
1066 acpi_idle_enter_simple;
1067 break;
1068 }
1069
1070 count++;
1071 if (count == CPUIDLE_STATE_MAX)
1072 break;
1073 }
1074
1075 dev->state_count = count;
1076
1077 if (!count)
1078 return -EINVAL;
1079
1080 return 0;
1081}
1082
1083int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1084{
1085 int ret = 0;
1086
1087 if (disabled_by_idle_boot_param())
1088 return 0;
1089
1090 if (!pr)
1091 return -EINVAL;
1092
1093 if (nocst) {
1094 return -ENODEV;
1095 }
1096
1097 if (!pr->flags.power_setup_done)
1098 return -ENODEV;
1099
1100 cpuidle_pause_and_lock();
1101 cpuidle_disable_device(&pr->power.dev);
1102 acpi_processor_get_power_info(pr);
1103 if (pr->flags.power) {
1104 acpi_processor_setup_cpuidle(pr);
1105 ret = cpuidle_enable_device(&pr->power.dev);
1106 }
1107 cpuidle_resume_and_unlock();
1108
1109 return ret;
1110}
1111
1112int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1113 struct acpi_device *device)
1114{
1115 acpi_status status = 0;
1116 static int first_run;
1117
1118 if (disabled_by_idle_boot_param())
1119 return 0;
1120
1121 if (!first_run) {
1122 dmi_check_system(processor_power_dmi_table);
1123 max_cstate = acpi_processor_cstate_check(max_cstate);
1124 if (max_cstate < ACPI_C_STATES_MAX)
1125 printk(KERN_NOTICE
1126 "ACPI: processor limited to max C-state %d\n",
1127 max_cstate);
1128 first_run++;
1129 }
1130
1131 if (!pr)
1132 return -EINVAL;
1133
1134 if (acpi_gbl_FADT.cst_control && !nocst) {
1135 status =
1136 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1137 if (ACPI_FAILURE(status)) {
1138 ACPI_EXCEPTION((AE_INFO, status,
1139 "Notifying BIOS of _CST ability failed"));
1140 }
1141 }
1142
1143 acpi_processor_get_power_info(pr);
1144 pr->flags.power_setup_done = 1;
1145
1146 /*
1147 * Install the idle handler if processor power management is supported.
1148 * Note that we use previously set idle handler will be used on
1149 * platforms that only support C1.
1150 */
1151 if (pr->flags.power) {
1152 acpi_processor_setup_cpuidle(pr);
1153 if (cpuidle_register_device(&pr->power.dev))
1154 return -EIO;
1155 }
1156 return 0;
1157}
1158
1159int acpi_processor_power_exit(struct acpi_processor *pr,
1160 struct acpi_device *device)
1161{
1162 if (disabled_by_idle_boot_param())
1163 return 0;
1164
1165 cpuidle_unregister_device(&pr->power.dev);
1166 pr->flags.power_setup_done = 0;
1167
1168 return 0;
1169}
kernel source for telekom puls (alcatel/mediatek)