| 1 | /* |
| 2 | * This file contains the 64-bit "server" PowerPC variant |
| 3 | * of the low level exception handling including exception |
| 4 | * vectors, exception return, part of the slb and stab |
| 5 | * handling and other fixed offset specific things. |
| 6 | * |
| 7 | * This file is meant to be #included from head_64.S due to |
| 8 | * position dependent assembly. |
| 9 | * |
| 10 | * Most of this originates from head_64.S and thus has the same |
| 11 | * copyright history. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <asm/hw_irq.h> |
| 16 | #include <asm/exception-64s.h> |
| 17 | #include <asm/ptrace.h> |
| 18 | |
| 19 | /* |
| 20 | * We layout physical memory as follows: |
| 21 | * 0x0000 - 0x00ff : Secondary processor spin code |
| 22 | * 0x0100 - 0x17ff : pSeries Interrupt prologs |
| 23 | * 0x1800 - 0x4000 : interrupt support common interrupt prologs |
| 24 | * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 |
| 25 | * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 |
| 26 | * 0x7000 - 0x7fff : FWNMI data area |
| 27 | * 0x8000 - 0x8fff : Initial (CPU0) segment table |
| 28 | * 0x9000 - : Early init and support code |
| 29 | */ |
| 30 | /* Syscall routine is used twice, in reloc-off and reloc-on paths */ |
| 31 | #define SYSCALL_PSERIES_1 \ |
| 32 | BEGIN_FTR_SECTION \ |
| 33 | cmpdi r0,0x1ebe ; \ |
| 34 | beq- 1f ; \ |
| 35 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ |
| 36 | mr r9,r13 ; \ |
| 37 | GET_PACA(r13) ; \ |
| 38 | mfspr r11,SPRN_SRR0 ; \ |
| 39 | 0: |
| 40 | |
| 41 | #define SYSCALL_PSERIES_2_RFID \ |
| 42 | mfspr r12,SPRN_SRR1 ; \ |
| 43 | ld r10,PACAKBASE(r13) ; \ |
| 44 | LOAD_HANDLER(r10, system_call_entry) ; \ |
| 45 | mtspr SPRN_SRR0,r10 ; \ |
| 46 | ld r10,PACAKMSR(r13) ; \ |
| 47 | mtspr SPRN_SRR1,r10 ; \ |
| 48 | rfid ; \ |
| 49 | b . ; /* prevent speculative execution */ |
| 50 | |
| 51 | #define SYSCALL_PSERIES_3 \ |
| 52 | /* Fast LE/BE switch system call */ \ |
| 53 | 1: mfspr r12,SPRN_SRR1 ; \ |
| 54 | xori r12,r12,MSR_LE ; \ |
| 55 | mtspr SPRN_SRR1,r12 ; \ |
| 56 | rfid ; /* return to userspace */ \ |
| 57 | b . ; \ |
| 58 | 2: mfspr r12,SPRN_SRR1 ; \ |
| 59 | andi. r12,r12,MSR_PR ; \ |
| 60 | bne 0b ; \ |
| 61 | mtspr SPRN_SRR0,r3 ; \ |
| 62 | mtspr SPRN_SRR1,r4 ; \ |
| 63 | mtspr SPRN_SDR1,r5 ; \ |
| 64 | rfid ; \ |
| 65 | b . ; /* prevent speculative execution */ |
| 66 | |
| 67 | #if defined(CONFIG_RELOCATABLE) |
| 68 | /* |
| 69 | * We can't branch directly; in the direct case we use LR |
| 70 | * and system_call_entry restores LR. (We thus need to move |
| 71 | * LR to r10 in the RFID case too.) |
| 72 | */ |
| 73 | #define SYSCALL_PSERIES_2_DIRECT \ |
| 74 | mflr r10 ; \ |
| 75 | ld r12,PACAKBASE(r13) ; \ |
| 76 | LOAD_HANDLER(r12, system_call_entry_direct) ; \ |
| 77 | mtctr r12 ; \ |
| 78 | mfspr r12,SPRN_SRR1 ; \ |
| 79 | /* Re-use of r13... No spare regs to do this */ \ |
| 80 | li r13,MSR_RI ; \ |
| 81 | mtmsrd r13,1 ; \ |
| 82 | GET_PACA(r13) ; /* get r13 back */ \ |
| 83 | bctr ; |
| 84 | #else |
| 85 | /* We can branch directly */ |
| 86 | #define SYSCALL_PSERIES_2_DIRECT \ |
| 87 | mfspr r12,SPRN_SRR1 ; \ |
| 88 | li r10,MSR_RI ; \ |
| 89 | mtmsrd r10,1 ; /* Set RI (EE=0) */ \ |
| 90 | b system_call_entry_direct ; |
| 91 | #endif |
| 92 | |
| 93 | /* |
| 94 | * This is the start of the interrupt handlers for pSeries |
| 95 | * This code runs with relocation off. |
| 96 | * Code from here to __end_interrupts gets copied down to real |
| 97 | * address 0x100 when we are running a relocatable kernel. |
| 98 | * Therefore any relative branches in this section must only |
| 99 | * branch to labels in this section. |
| 100 | */ |
| 101 | . = 0x100 |
| 102 | .globl __start_interrupts |
| 103 | __start_interrupts: |
| 104 | |
| 105 | .globl system_reset_pSeries; |
| 106 | system_reset_pSeries: |
| 107 | HMT_MEDIUM_PPR_DISCARD |
| 108 | SET_SCRATCH0(r13) |
| 109 | #ifdef CONFIG_PPC_P7_NAP |
| 110 | BEGIN_FTR_SECTION |
| 111 | /* Running native on arch 2.06 or later, check if we are |
| 112 | * waking up from nap. We only handle no state loss and |
| 113 | * supervisor state loss. We do -not- handle hypervisor |
| 114 | * state loss at this time. |
| 115 | */ |
| 116 | mfspr r13,SPRN_SRR1 |
| 117 | rlwinm. r13,r13,47-31,30,31 |
| 118 | beq 9f |
| 119 | |
| 120 | /* waking up from powersave (nap) state */ |
| 121 | cmpwi cr1,r13,2 |
| 122 | /* Total loss of HV state is fatal, we could try to use the |
| 123 | * PIR to locate a PACA, then use an emergency stack etc... |
| 124 | * but for now, let's just stay stuck here |
| 125 | */ |
| 126 | bgt cr1,. |
| 127 | GET_PACA(r13) |
| 128 | |
| 129 | #ifdef CONFIG_KVM_BOOK3S_64_HV |
| 130 | li r0,KVM_HWTHREAD_IN_KERNEL |
| 131 | stb r0,HSTATE_HWTHREAD_STATE(r13) |
| 132 | /* Order setting hwthread_state vs. testing hwthread_req */ |
| 133 | sync |
| 134 | lbz r0,HSTATE_HWTHREAD_REQ(r13) |
| 135 | cmpwi r0,0 |
| 136 | beq 1f |
| 137 | b kvm_start_guest |
| 138 | 1: |
| 139 | #endif |
| 140 | |
| 141 | beq cr1,2f |
| 142 | b .power7_wakeup_noloss |
| 143 | 2: b .power7_wakeup_loss |
| 144 | 9: |
| 145 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
| 146 | #endif /* CONFIG_PPC_P7_NAP */ |
| 147 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
| 148 | NOTEST, 0x100) |
| 149 | |
| 150 | . = 0x200 |
| 151 | machine_check_pSeries_1: |
| 152 | /* This is moved out of line as it can be patched by FW, but |
| 153 | * some code path might still want to branch into the original |
| 154 | * vector |
| 155 | */ |
| 156 | HMT_MEDIUM_PPR_DISCARD |
| 157 | SET_SCRATCH0(r13) /* save r13 */ |
| 158 | EXCEPTION_PROLOG_0(PACA_EXMC) |
| 159 | b machine_check_pSeries_0 |
| 160 | |
| 161 | . = 0x300 |
| 162 | .globl data_access_pSeries |
| 163 | data_access_pSeries: |
| 164 | HMT_MEDIUM_PPR_DISCARD |
| 165 | SET_SCRATCH0(r13) |
| 166 | BEGIN_FTR_SECTION |
| 167 | b data_access_check_stab |
| 168 | data_access_not_stab: |
| 169 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB) |
| 170 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, |
| 171 | KVMTEST, 0x300) |
| 172 | |
| 173 | . = 0x380 |
| 174 | .globl data_access_slb_pSeries |
| 175 | data_access_slb_pSeries: |
| 176 | HMT_MEDIUM_PPR_DISCARD |
| 177 | SET_SCRATCH0(r13) |
| 178 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
| 179 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) |
| 180 | std r3,PACA_EXSLB+EX_R3(r13) |
| 181 | mfspr r3,SPRN_DAR |
| 182 | #ifdef __DISABLED__ |
| 183 | /* Keep that around for when we re-implement dynamic VSIDs */ |
| 184 | cmpdi r3,0 |
| 185 | bge slb_miss_user_pseries |
| 186 | #endif /* __DISABLED__ */ |
| 187 | mfspr r12,SPRN_SRR1 |
| 188 | #ifndef CONFIG_RELOCATABLE |
| 189 | b .slb_miss_realmode |
| 190 | #else |
| 191 | /* |
| 192 | * We can't just use a direct branch to .slb_miss_realmode |
| 193 | * because the distance from here to there depends on where |
| 194 | * the kernel ends up being put. |
| 195 | */ |
| 196 | mfctr r11 |
| 197 | ld r10,PACAKBASE(r13) |
| 198 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 199 | mtctr r10 |
| 200 | bctr |
| 201 | #endif |
| 202 | |
| 203 | STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access) |
| 204 | |
| 205 | . = 0x480 |
| 206 | .globl instruction_access_slb_pSeries |
| 207 | instruction_access_slb_pSeries: |
| 208 | HMT_MEDIUM_PPR_DISCARD |
| 209 | SET_SCRATCH0(r13) |
| 210 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
| 211 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480) |
| 212 | std r3,PACA_EXSLB+EX_R3(r13) |
| 213 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ |
| 214 | #ifdef __DISABLED__ |
| 215 | /* Keep that around for when we re-implement dynamic VSIDs */ |
| 216 | cmpdi r3,0 |
| 217 | bge slb_miss_user_pseries |
| 218 | #endif /* __DISABLED__ */ |
| 219 | mfspr r12,SPRN_SRR1 |
| 220 | #ifndef CONFIG_RELOCATABLE |
| 221 | b .slb_miss_realmode |
| 222 | #else |
| 223 | mfctr r11 |
| 224 | ld r10,PACAKBASE(r13) |
| 225 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 226 | mtctr r10 |
| 227 | bctr |
| 228 | #endif |
| 229 | |
| 230 | /* We open code these as we can't have a ". = x" (even with |
| 231 | * x = "." within a feature section |
| 232 | */ |
| 233 | . = 0x500; |
| 234 | .globl hardware_interrupt_pSeries; |
| 235 | .globl hardware_interrupt_hv; |
| 236 | hardware_interrupt_pSeries: |
| 237 | hardware_interrupt_hv: |
| 238 | HMT_MEDIUM_PPR_DISCARD |
| 239 | BEGIN_FTR_SECTION |
| 240 | _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, |
| 241 | EXC_HV, SOFTEN_TEST_HV) |
| 242 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) |
| 243 | FTR_SECTION_ELSE |
| 244 | _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, |
| 245 | EXC_STD, SOFTEN_TEST_HV_201) |
| 246 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) |
| 247 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
| 248 | |
| 249 | STD_EXCEPTION_PSERIES(0x600, 0x600, alignment) |
| 250 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600) |
| 251 | |
| 252 | STD_EXCEPTION_PSERIES(0x700, 0x700, program_check) |
| 253 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700) |
| 254 | |
| 255 | STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable) |
| 256 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800) |
| 257 | |
| 258 | . = 0x900 |
| 259 | .globl decrementer_pSeries |
| 260 | decrementer_pSeries: |
| 261 | _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) |
| 262 | |
| 263 | STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) |
| 264 | |
| 265 | MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) |
| 266 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00) |
| 267 | |
| 268 | STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b) |
| 269 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00) |
| 270 | |
| 271 | . = 0xc00 |
| 272 | .globl system_call_pSeries |
| 273 | system_call_pSeries: |
| 274 | HMT_MEDIUM |
| 275 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 276 | SET_SCRATCH0(r13) |
| 277 | GET_PACA(r13) |
| 278 | std r9,PACA_EXGEN+EX_R9(r13) |
| 279 | std r10,PACA_EXGEN+EX_R10(r13) |
| 280 | mfcr r9 |
| 281 | KVMTEST(0xc00) |
| 282 | GET_SCRATCH0(r13) |
| 283 | #endif |
| 284 | SYSCALL_PSERIES_1 |
| 285 | SYSCALL_PSERIES_2_RFID |
| 286 | SYSCALL_PSERIES_3 |
| 287 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) |
| 288 | |
| 289 | STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step) |
| 290 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00) |
| 291 | |
| 292 | /* At 0xe??? we have a bunch of hypervisor exceptions, we branch |
| 293 | * out of line to handle them |
| 294 | */ |
| 295 | . = 0xe00 |
| 296 | hv_exception_trampoline: |
| 297 | SET_SCRATCH0(r13) |
| 298 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 299 | b h_data_storage_hv |
| 300 | |
| 301 | . = 0xe20 |
| 302 | SET_SCRATCH0(r13) |
| 303 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 304 | b h_instr_storage_hv |
| 305 | |
| 306 | . = 0xe40 |
| 307 | SET_SCRATCH0(r13) |
| 308 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 309 | b emulation_assist_hv |
| 310 | |
| 311 | . = 0xe60 |
| 312 | SET_SCRATCH0(r13) |
| 313 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 314 | b hmi_exception_hv |
| 315 | |
| 316 | . = 0xe80 |
| 317 | SET_SCRATCH0(r13) |
| 318 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 319 | b h_doorbell_hv |
| 320 | |
| 321 | /* We need to deal with the Altivec unavailable exception |
| 322 | * here which is at 0xf20, thus in the middle of the |
| 323 | * prolog code of the PerformanceMonitor one. A little |
| 324 | * trickery is thus necessary |
| 325 | */ |
| 326 | performance_monitor_pSeries_1: |
| 327 | . = 0xf00 |
| 328 | SET_SCRATCH0(r13) |
| 329 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 330 | b performance_monitor_pSeries |
| 331 | |
| 332 | altivec_unavailable_pSeries_1: |
| 333 | . = 0xf20 |
| 334 | SET_SCRATCH0(r13) |
| 335 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 336 | b altivec_unavailable_pSeries |
| 337 | |
| 338 | vsx_unavailable_pSeries_1: |
| 339 | . = 0xf40 |
| 340 | SET_SCRATCH0(r13) |
| 341 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 342 | b vsx_unavailable_pSeries |
| 343 | |
| 344 | facility_unavailable_trampoline: |
| 345 | . = 0xf60 |
| 346 | SET_SCRATCH0(r13) |
| 347 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 348 | b facility_unavailable_pSeries |
| 349 | |
| 350 | hv_facility_unavailable_trampoline: |
| 351 | . = 0xf80 |
| 352 | SET_SCRATCH0(r13) |
| 353 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 354 | b facility_unavailable_hv |
| 355 | |
| 356 | #ifdef CONFIG_CBE_RAS |
| 357 | STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) |
| 358 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) |
| 359 | #endif /* CONFIG_CBE_RAS */ |
| 360 | |
| 361 | STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint) |
| 362 | KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300) |
| 363 | |
| 364 | . = 0x1500 |
| 365 | .global denorm_exception_hv |
| 366 | denorm_exception_hv: |
| 367 | HMT_MEDIUM_PPR_DISCARD |
| 368 | mtspr SPRN_SPRG_HSCRATCH0,r13 |
| 369 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 370 | std r11,PACA_EXGEN+EX_R11(r13) |
| 371 | std r12,PACA_EXGEN+EX_R12(r13) |
| 372 | mfspr r9,SPRN_SPRG_HSCRATCH0 |
| 373 | std r9,PACA_EXGEN+EX_R13(r13) |
| 374 | mfcr r9 |
| 375 | |
| 376 | #ifdef CONFIG_PPC_DENORMALISATION |
| 377 | mfspr r10,SPRN_HSRR1 |
| 378 | mfspr r11,SPRN_HSRR0 /* save HSRR0 */ |
| 379 | andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ |
| 380 | addi r11,r11,-4 /* HSRR0 is next instruction */ |
| 381 | bne+ denorm_assist |
| 382 | #endif |
| 383 | |
| 384 | EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) |
| 385 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) |
| 386 | |
| 387 | #ifdef CONFIG_CBE_RAS |
| 388 | STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) |
| 389 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) |
| 390 | #endif /* CONFIG_CBE_RAS */ |
| 391 | |
| 392 | STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist) |
| 393 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700) |
| 394 | |
| 395 | #ifdef CONFIG_CBE_RAS |
| 396 | STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) |
| 397 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) |
| 398 | #else |
| 399 | . = 0x1800 |
| 400 | #endif /* CONFIG_CBE_RAS */ |
| 401 | |
| 402 | |
| 403 | /*** Out of line interrupts support ***/ |
| 404 | |
| 405 | .align 7 |
| 406 | /* moved from 0x200 */ |
| 407 | machine_check_pSeries: |
| 408 | .globl machine_check_fwnmi |
| 409 | machine_check_fwnmi: |
| 410 | HMT_MEDIUM_PPR_DISCARD |
| 411 | SET_SCRATCH0(r13) /* save r13 */ |
| 412 | EXCEPTION_PROLOG_0(PACA_EXMC) |
| 413 | machine_check_pSeries_0: |
| 414 | EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) |
| 415 | EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) |
| 416 | KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) |
| 417 | |
| 418 | /* moved from 0x300 */ |
| 419 | data_access_check_stab: |
| 420 | GET_PACA(r13) |
| 421 | std r9,PACA_EXSLB+EX_R9(r13) |
| 422 | std r10,PACA_EXSLB+EX_R10(r13) |
| 423 | mfspr r10,SPRN_DAR |
| 424 | mfspr r9,SPRN_DSISR |
| 425 | srdi r10,r10,60 |
| 426 | rlwimi r10,r9,16,0x20 |
| 427 | #ifdef CONFIG_KVM_BOOK3S_PR |
| 428 | lbz r9,HSTATE_IN_GUEST(r13) |
| 429 | rlwimi r10,r9,8,0x300 |
| 430 | #endif |
| 431 | mfcr r9 |
| 432 | cmpwi r10,0x2c |
| 433 | beq do_stab_bolted_pSeries |
| 434 | mtcrf 0x80,r9 |
| 435 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 436 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 437 | b data_access_not_stab |
| 438 | do_stab_bolted_pSeries: |
| 439 | std r11,PACA_EXSLB+EX_R11(r13) |
| 440 | std r12,PACA_EXSLB+EX_R12(r13) |
| 441 | GET_SCRATCH0(r10) |
| 442 | std r10,PACA_EXSLB+EX_R13(r13) |
| 443 | EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD) |
| 444 | |
| 445 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) |
| 446 | KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) |
| 447 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400) |
| 448 | KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480) |
| 449 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900) |
| 450 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) |
| 451 | |
| 452 | #ifdef CONFIG_PPC_DENORMALISATION |
| 453 | denorm_assist: |
| 454 | BEGIN_FTR_SECTION |
| 455 | /* |
| 456 | * To denormalise we need to move a copy of the register to itself. |
| 457 | * For POWER6 do that here for all FP regs. |
| 458 | */ |
| 459 | mfmsr r10 |
| 460 | ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) |
| 461 | xori r10,r10,(MSR_FE0|MSR_FE1) |
| 462 | mtmsrd r10 |
| 463 | sync |
| 464 | |
| 465 | #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 |
| 466 | #define FMR4(n) FMR2(n) ; FMR2(n+2) |
| 467 | #define FMR8(n) FMR4(n) ; FMR4(n+4) |
| 468 | #define FMR16(n) FMR8(n) ; FMR8(n+8) |
| 469 | #define FMR32(n) FMR16(n) ; FMR16(n+16) |
| 470 | FMR32(0) |
| 471 | |
| 472 | FTR_SECTION_ELSE |
| 473 | /* |
| 474 | * To denormalise we need to move a copy of the register to itself. |
| 475 | * For POWER7 do that here for the first 32 VSX registers only. |
| 476 | */ |
| 477 | mfmsr r10 |
| 478 | oris r10,r10,MSR_VSX@h |
| 479 | mtmsrd r10 |
| 480 | sync |
| 481 | |
| 482 | #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) |
| 483 | #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) |
| 484 | #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) |
| 485 | #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) |
| 486 | #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) |
| 487 | XVCPSGNDP32(0) |
| 488 | |
| 489 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) |
| 490 | |
| 491 | BEGIN_FTR_SECTION |
| 492 | b denorm_done |
| 493 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) |
| 494 | /* |
| 495 | * To denormalise we need to move a copy of the register to itself. |
| 496 | * For POWER8 we need to do that for all 64 VSX registers |
| 497 | */ |
| 498 | XVCPSGNDP32(32) |
| 499 | denorm_done: |
| 500 | mtspr SPRN_HSRR0,r11 |
| 501 | mtcrf 0x80,r9 |
| 502 | ld r9,PACA_EXGEN+EX_R9(r13) |
| 503 | RESTORE_PPR_PACA(PACA_EXGEN, r10) |
| 504 | ld r10,PACA_EXGEN+EX_R10(r13) |
| 505 | ld r11,PACA_EXGEN+EX_R11(r13) |
| 506 | ld r12,PACA_EXGEN+EX_R12(r13) |
| 507 | ld r13,PACA_EXGEN+EX_R13(r13) |
| 508 | HRFID |
| 509 | b . |
| 510 | #endif |
| 511 | |
| 512 | .align 7 |
| 513 | /* moved from 0xe00 */ |
| 514 | STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) |
| 515 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) |
| 516 | STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) |
| 517 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) |
| 518 | STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) |
| 519 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) |
| 520 | STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */ |
| 521 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) |
| 522 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) |
| 523 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) |
| 524 | |
| 525 | /* moved from 0xf00 */ |
| 526 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
| 527 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00) |
| 528 | STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
| 529 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20) |
| 530 | STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) |
| 531 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40) |
| 532 | STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
| 533 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60) |
| 534 | STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) |
| 535 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) |
| 536 | |
| 537 | /* |
| 538 | * An interrupt came in while soft-disabled. We set paca->irq_happened, then: |
| 539 | * - If it was a decrementer interrupt, we bump the dec to max and and return. |
| 540 | * - If it was a doorbell we return immediately since doorbells are edge |
| 541 | * triggered and won't automatically refire. |
| 542 | * - else we hard disable and return. |
| 543 | * This is called with r10 containing the value to OR to the paca field. |
| 544 | */ |
| 545 | #define MASKED_INTERRUPT(_H) \ |
| 546 | masked_##_H##interrupt: \ |
| 547 | std r11,PACA_EXGEN+EX_R11(r13); \ |
| 548 | lbz r11,PACAIRQHAPPENED(r13); \ |
| 549 | or r11,r11,r10; \ |
| 550 | stb r11,PACAIRQHAPPENED(r13); \ |
| 551 | cmpwi r10,PACA_IRQ_DEC; \ |
| 552 | bne 1f; \ |
| 553 | lis r10,0x7fff; \ |
| 554 | ori r10,r10,0xffff; \ |
| 555 | mtspr SPRN_DEC,r10; \ |
| 556 | b 2f; \ |
| 557 | 1: cmpwi r10,PACA_IRQ_DBELL; \ |
| 558 | beq 2f; \ |
| 559 | mfspr r10,SPRN_##_H##SRR1; \ |
| 560 | rldicl r10,r10,48,1; /* clear MSR_EE */ \ |
| 561 | rotldi r10,r10,16; \ |
| 562 | mtspr SPRN_##_H##SRR1,r10; \ |
| 563 | 2: mtcrf 0x80,r9; \ |
| 564 | ld r9,PACA_EXGEN+EX_R9(r13); \ |
| 565 | ld r10,PACA_EXGEN+EX_R10(r13); \ |
| 566 | ld r11,PACA_EXGEN+EX_R11(r13); \ |
| 567 | GET_SCRATCH0(r13); \ |
| 568 | ##_H##rfid; \ |
| 569 | b . |
| 570 | |
| 571 | MASKED_INTERRUPT() |
| 572 | MASKED_INTERRUPT(H) |
| 573 | |
| 574 | /* |
| 575 | * Called from arch_local_irq_enable when an interrupt needs |
| 576 | * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate |
| 577 | * which kind of interrupt. MSR:EE is already off. We generate a |
| 578 | * stackframe like if a real interrupt had happened. |
| 579 | * |
| 580 | * Note: While MSR:EE is off, we need to make sure that _MSR |
| 581 | * in the generated frame has EE set to 1 or the exception |
| 582 | * handler will not properly re-enable them. |
| 583 | */ |
| 584 | _GLOBAL(__replay_interrupt) |
| 585 | /* We are going to jump to the exception common code which |
| 586 | * will retrieve various register values from the PACA which |
| 587 | * we don't give a damn about, so we don't bother storing them. |
| 588 | */ |
| 589 | mfmsr r12 |
| 590 | mflr r11 |
| 591 | mfcr r9 |
| 592 | ori r12,r12,MSR_EE |
| 593 | cmpwi r3,0x900 |
| 594 | beq decrementer_common |
| 595 | cmpwi r3,0x500 |
| 596 | beq hardware_interrupt_common |
| 597 | BEGIN_FTR_SECTION |
| 598 | cmpwi r3,0xe80 |
| 599 | beq h_doorbell_common |
| 600 | FTR_SECTION_ELSE |
| 601 | cmpwi r3,0xa00 |
| 602 | beq doorbell_super_common |
| 603 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
| 604 | blr |
| 605 | |
| 606 | #ifdef CONFIG_PPC_PSERIES |
| 607 | /* |
| 608 | * Vectors for the FWNMI option. Share common code. |
| 609 | */ |
| 610 | .globl system_reset_fwnmi |
| 611 | .align 7 |
| 612 | system_reset_fwnmi: |
| 613 | HMT_MEDIUM_PPR_DISCARD |
| 614 | SET_SCRATCH0(r13) /* save r13 */ |
| 615 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
| 616 | NOTEST, 0x100) |
| 617 | |
| 618 | #endif /* CONFIG_PPC_PSERIES */ |
| 619 | |
| 620 | #ifdef __DISABLED__ |
| 621 | /* |
| 622 | * This is used for when the SLB miss handler has to go virtual, |
| 623 | * which doesn't happen for now anymore but will once we re-implement |
| 624 | * dynamic VSIDs for shared page tables |
| 625 | */ |
| 626 | slb_miss_user_pseries: |
| 627 | std r10,PACA_EXGEN+EX_R10(r13) |
| 628 | std r11,PACA_EXGEN+EX_R11(r13) |
| 629 | std r12,PACA_EXGEN+EX_R12(r13) |
| 630 | GET_SCRATCH0(r10) |
| 631 | ld r11,PACA_EXSLB+EX_R9(r13) |
| 632 | ld r12,PACA_EXSLB+EX_R3(r13) |
| 633 | std r10,PACA_EXGEN+EX_R13(r13) |
| 634 | std r11,PACA_EXGEN+EX_R9(r13) |
| 635 | std r12,PACA_EXGEN+EX_R3(r13) |
| 636 | clrrdi r12,r13,32 |
| 637 | mfmsr r10 |
| 638 | mfspr r11,SRR0 /* save SRR0 */ |
| 639 | ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ |
| 640 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI |
| 641 | mtspr SRR0,r12 |
| 642 | mfspr r12,SRR1 /* and SRR1 */ |
| 643 | mtspr SRR1,r10 |
| 644 | rfid |
| 645 | b . /* prevent spec. execution */ |
| 646 | #endif /* __DISABLED__ */ |
| 647 | |
| 648 | /* |
| 649 | * Code from here down to __end_handlers is invoked from the |
| 650 | * exception prologs above. Because the prologs assemble the |
| 651 | * addresses of these handlers using the LOAD_HANDLER macro, |
| 652 | * which uses an ori instruction, these handlers must be in |
| 653 | * the first 64k of the kernel image. |
| 654 | */ |
| 655 | |
| 656 | /*** Common interrupt handlers ***/ |
| 657 | |
| 658 | STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception) |
| 659 | |
| 660 | /* |
| 661 | * Machine check is different because we use a different |
| 662 | * save area: PACA_EXMC instead of PACA_EXGEN. |
| 663 | */ |
| 664 | .align 7 |
| 665 | .globl machine_check_common |
| 666 | machine_check_common: |
| 667 | |
| 668 | mfspr r10,SPRN_DAR |
| 669 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 670 | mfspr r10,SPRN_DSISR |
| 671 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 672 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) |
| 673 | FINISH_NAP |
| 674 | DISABLE_INTS |
| 675 | ld r3,PACA_EXGEN+EX_DAR(r13) |
| 676 | lwz r4,PACA_EXGEN+EX_DSISR(r13) |
| 677 | std r3,_DAR(r1) |
| 678 | std r4,_DSISR(r1) |
| 679 | bl .save_nvgprs |
| 680 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 681 | bl .machine_check_exception |
| 682 | b .ret_from_except |
| 683 | |
| 684 | STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) |
| 685 | STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt) |
| 686 | STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt) |
| 687 | #ifdef CONFIG_PPC_DOORBELL |
| 688 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception) |
| 689 | #else |
| 690 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception) |
| 691 | #endif |
| 692 | STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception) |
| 693 | STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception) |
| 694 | STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception) |
| 695 | STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt) |
| 696 | STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception) |
| 697 | #ifdef CONFIG_PPC_DOORBELL |
| 698 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception) |
| 699 | #else |
| 700 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception) |
| 701 | #endif |
| 702 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception) |
| 703 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception) |
| 704 | STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception) |
| 705 | #ifdef CONFIG_ALTIVEC |
| 706 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception) |
| 707 | #else |
| 708 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception) |
| 709 | #endif |
| 710 | #ifdef CONFIG_CBE_RAS |
| 711 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception) |
| 712 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception) |
| 713 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception) |
| 714 | #endif /* CONFIG_CBE_RAS */ |
| 715 | |
| 716 | /* |
| 717 | * Relocation-on interrupts: A subset of the interrupts can be delivered |
| 718 | * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering |
| 719 | * it. Addresses are the same as the original interrupt addresses, but |
| 720 | * offset by 0xc000000000004000. |
| 721 | * It's impossible to receive interrupts below 0x300 via this mechanism. |
| 722 | * KVM: None of these traps are from the guest ; anything that escalated |
| 723 | * to HV=1 from HV=0 is delivered via real mode handlers. |
| 724 | */ |
| 725 | |
| 726 | /* |
| 727 | * This uses the standard macro, since the original 0x300 vector |
| 728 | * only has extra guff for STAB-based processors -- which never |
| 729 | * come here. |
| 730 | */ |
| 731 | STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) |
| 732 | . = 0x4380 |
| 733 | .globl data_access_slb_relon_pSeries |
| 734 | data_access_slb_relon_pSeries: |
| 735 | SET_SCRATCH0(r13) |
| 736 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
| 737 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) |
| 738 | std r3,PACA_EXSLB+EX_R3(r13) |
| 739 | mfspr r3,SPRN_DAR |
| 740 | mfspr r12,SPRN_SRR1 |
| 741 | #ifndef CONFIG_RELOCATABLE |
| 742 | b .slb_miss_realmode |
| 743 | #else |
| 744 | /* |
| 745 | * We can't just use a direct branch to .slb_miss_realmode |
| 746 | * because the distance from here to there depends on where |
| 747 | * the kernel ends up being put. |
| 748 | */ |
| 749 | mfctr r11 |
| 750 | ld r10,PACAKBASE(r13) |
| 751 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 752 | mtctr r10 |
| 753 | bctr |
| 754 | #endif |
| 755 | |
| 756 | STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) |
| 757 | . = 0x4480 |
| 758 | .globl instruction_access_slb_relon_pSeries |
| 759 | instruction_access_slb_relon_pSeries: |
| 760 | SET_SCRATCH0(r13) |
| 761 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
| 762 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) |
| 763 | std r3,PACA_EXSLB+EX_R3(r13) |
| 764 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ |
| 765 | mfspr r12,SPRN_SRR1 |
| 766 | #ifndef CONFIG_RELOCATABLE |
| 767 | b .slb_miss_realmode |
| 768 | #else |
| 769 | mfctr r11 |
| 770 | ld r10,PACAKBASE(r13) |
| 771 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 772 | mtctr r10 |
| 773 | bctr |
| 774 | #endif |
| 775 | |
| 776 | . = 0x4500 |
| 777 | .globl hardware_interrupt_relon_pSeries; |
| 778 | .globl hardware_interrupt_relon_hv; |
| 779 | hardware_interrupt_relon_pSeries: |
| 780 | hardware_interrupt_relon_hv: |
| 781 | BEGIN_FTR_SECTION |
| 782 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) |
| 783 | FTR_SECTION_ELSE |
| 784 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) |
| 785 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
| 786 | STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) |
| 787 | STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) |
| 788 | STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) |
| 789 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) |
| 790 | STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) |
| 791 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) |
| 792 | STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) |
| 793 | |
| 794 | . = 0x4c00 |
| 795 | .globl system_call_relon_pSeries |
| 796 | system_call_relon_pSeries: |
| 797 | HMT_MEDIUM |
| 798 | SYSCALL_PSERIES_1 |
| 799 | SYSCALL_PSERIES_2_DIRECT |
| 800 | SYSCALL_PSERIES_3 |
| 801 | |
| 802 | STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) |
| 803 | |
| 804 | . = 0x4e00 |
| 805 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
| 806 | |
| 807 | . = 0x4e20 |
| 808 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
| 809 | |
| 810 | . = 0x4e40 |
| 811 | SET_SCRATCH0(r13) |
| 812 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 813 | b emulation_assist_relon_hv |
| 814 | |
| 815 | . = 0x4e60 |
| 816 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
| 817 | |
| 818 | . = 0x4e80 |
| 819 | SET_SCRATCH0(r13) |
| 820 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 821 | b h_doorbell_relon_hv |
| 822 | |
| 823 | performance_monitor_relon_pSeries_1: |
| 824 | . = 0x4f00 |
| 825 | SET_SCRATCH0(r13) |
| 826 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 827 | b performance_monitor_relon_pSeries |
| 828 | |
| 829 | altivec_unavailable_relon_pSeries_1: |
| 830 | . = 0x4f20 |
| 831 | SET_SCRATCH0(r13) |
| 832 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 833 | b altivec_unavailable_relon_pSeries |
| 834 | |
| 835 | vsx_unavailable_relon_pSeries_1: |
| 836 | . = 0x4f40 |
| 837 | SET_SCRATCH0(r13) |
| 838 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 839 | b vsx_unavailable_relon_pSeries |
| 840 | |
| 841 | facility_unavailable_relon_trampoline: |
| 842 | . = 0x4f60 |
| 843 | SET_SCRATCH0(r13) |
| 844 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 845 | b facility_unavailable_relon_pSeries |
| 846 | |
| 847 | hv_facility_unavailable_relon_trampoline: |
| 848 | . = 0x4f80 |
| 849 | SET_SCRATCH0(r13) |
| 850 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 851 | b hv_facility_unavailable_relon_hv |
| 852 | |
| 853 | STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) |
| 854 | #ifdef CONFIG_PPC_DENORMALISATION |
| 855 | . = 0x5500 |
| 856 | b denorm_exception_hv |
| 857 | #endif |
| 858 | STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) |
| 859 | |
| 860 | .align 7 |
| 861 | system_call_entry_direct: |
| 862 | #if defined(CONFIG_RELOCATABLE) |
| 863 | /* The first level prologue may have used LR to get here, saving |
| 864 | * orig in r10. To save hacking/ifdeffing common code, restore here. |
| 865 | */ |
| 866 | mtlr r10 |
| 867 | #endif |
| 868 | system_call_entry: |
| 869 | b system_call_common |
| 870 | |
| 871 | ppc64_runlatch_on_trampoline: |
| 872 | b .__ppc64_runlatch_on |
| 873 | |
| 874 | /* |
| 875 | * Here we have detected that the kernel stack pointer is bad. |
| 876 | * R9 contains the saved CR, r13 points to the paca, |
| 877 | * r10 contains the (bad) kernel stack pointer, |
| 878 | * r11 and r12 contain the saved SRR0 and SRR1. |
| 879 | * We switch to using an emergency stack, save the registers there, |
| 880 | * and call kernel_bad_stack(), which panics. |
| 881 | */ |
| 882 | bad_stack: |
| 883 | ld r1,PACAEMERGSP(r13) |
| 884 | subi r1,r1,64+INT_FRAME_SIZE |
| 885 | std r9,_CCR(r1) |
| 886 | std r10,GPR1(r1) |
| 887 | std r11,_NIP(r1) |
| 888 | std r12,_MSR(r1) |
| 889 | mfspr r11,SPRN_DAR |
| 890 | mfspr r12,SPRN_DSISR |
| 891 | std r11,_DAR(r1) |
| 892 | std r12,_DSISR(r1) |
| 893 | mflr r10 |
| 894 | mfctr r11 |
| 895 | mfxer r12 |
| 896 | std r10,_LINK(r1) |
| 897 | std r11,_CTR(r1) |
| 898 | std r12,_XER(r1) |
| 899 | SAVE_GPR(0,r1) |
| 900 | SAVE_GPR(2,r1) |
| 901 | ld r10,EX_R3(r3) |
| 902 | std r10,GPR3(r1) |
| 903 | SAVE_GPR(4,r1) |
| 904 | SAVE_4GPRS(5,r1) |
| 905 | ld r9,EX_R9(r3) |
| 906 | ld r10,EX_R10(r3) |
| 907 | SAVE_2GPRS(9,r1) |
| 908 | ld r9,EX_R11(r3) |
| 909 | ld r10,EX_R12(r3) |
| 910 | ld r11,EX_R13(r3) |
| 911 | std r9,GPR11(r1) |
| 912 | std r10,GPR12(r1) |
| 913 | std r11,GPR13(r1) |
| 914 | BEGIN_FTR_SECTION |
| 915 | ld r10,EX_CFAR(r3) |
| 916 | std r10,ORIG_GPR3(r1) |
| 917 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) |
| 918 | SAVE_8GPRS(14,r1) |
| 919 | SAVE_10GPRS(22,r1) |
| 920 | lhz r12,PACA_TRAP_SAVE(r13) |
| 921 | std r12,_TRAP(r1) |
| 922 | addi r11,r1,INT_FRAME_SIZE |
| 923 | std r11,0(r1) |
| 924 | li r12,0 |
| 925 | std r12,0(r11) |
| 926 | ld r2,PACATOC(r13) |
| 927 | ld r11,exception_marker@toc(r2) |
| 928 | std r12,RESULT(r1) |
| 929 | std r11,STACK_FRAME_OVERHEAD-16(r1) |
| 930 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 931 | bl .kernel_bad_stack |
| 932 | b 1b |
| 933 | |
| 934 | /* |
| 935 | * Here r13 points to the paca, r9 contains the saved CR, |
| 936 | * SRR0 and SRR1 are saved in r11 and r12, |
| 937 | * r9 - r13 are saved in paca->exgen. |
| 938 | */ |
| 939 | .align 7 |
| 940 | .globl data_access_common |
| 941 | data_access_common: |
| 942 | mfspr r10,SPRN_DAR |
| 943 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 944 | mfspr r10,SPRN_DSISR |
| 945 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 946 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) |
| 947 | DISABLE_INTS |
| 948 | ld r12,_MSR(r1) |
| 949 | ld r3,PACA_EXGEN+EX_DAR(r13) |
| 950 | lwz r4,PACA_EXGEN+EX_DSISR(r13) |
| 951 | li r5,0x300 |
| 952 | b .do_hash_page /* Try to handle as hpte fault */ |
| 953 | |
| 954 | .align 7 |
| 955 | .globl h_data_storage_common |
| 956 | h_data_storage_common: |
| 957 | mfspr r10,SPRN_HDAR |
| 958 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 959 | mfspr r10,SPRN_HDSISR |
| 960 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 961 | EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) |
| 962 | bl .save_nvgprs |
| 963 | DISABLE_INTS |
| 964 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 965 | bl .unknown_exception |
| 966 | b .ret_from_except |
| 967 | |
| 968 | .align 7 |
| 969 | .globl instruction_access_common |
| 970 | instruction_access_common: |
| 971 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) |
| 972 | DISABLE_INTS |
| 973 | ld r12,_MSR(r1) |
| 974 | ld r3,_NIP(r1) |
| 975 | andis. r4,r12,0x5820 |
| 976 | li r5,0x400 |
| 977 | b .do_hash_page /* Try to handle as hpte fault */ |
| 978 | |
| 979 | STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception) |
| 980 | |
| 981 | /* |
| 982 | * Here is the common SLB miss user that is used when going to virtual |
| 983 | * mode for SLB misses, that is currently not used |
| 984 | */ |
| 985 | #ifdef __DISABLED__ |
| 986 | .align 7 |
| 987 | .globl slb_miss_user_common |
| 988 | slb_miss_user_common: |
| 989 | mflr r10 |
| 990 | std r3,PACA_EXGEN+EX_DAR(r13) |
| 991 | stw r9,PACA_EXGEN+EX_CCR(r13) |
| 992 | std r10,PACA_EXGEN+EX_LR(r13) |
| 993 | std r11,PACA_EXGEN+EX_SRR0(r13) |
| 994 | bl .slb_allocate_user |
| 995 | |
| 996 | ld r10,PACA_EXGEN+EX_LR(r13) |
| 997 | ld r3,PACA_EXGEN+EX_R3(r13) |
| 998 | lwz r9,PACA_EXGEN+EX_CCR(r13) |
| 999 | ld r11,PACA_EXGEN+EX_SRR0(r13) |
| 1000 | mtlr r10 |
| 1001 | beq- slb_miss_fault |
| 1002 | |
| 1003 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
| 1004 | beq- unrecov_user_slb |
| 1005 | mfmsr r10 |
| 1006 | |
| 1007 | .machine push |
| 1008 | .machine "power4" |
| 1009 | mtcrf 0x80,r9 |
| 1010 | .machine pop |
| 1011 | |
| 1012 | clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ |
| 1013 | mtmsrd r10,1 |
| 1014 | |
| 1015 | mtspr SRR0,r11 |
| 1016 | mtspr SRR1,r12 |
| 1017 | |
| 1018 | ld r9,PACA_EXGEN+EX_R9(r13) |
| 1019 | ld r10,PACA_EXGEN+EX_R10(r13) |
| 1020 | ld r11,PACA_EXGEN+EX_R11(r13) |
| 1021 | ld r12,PACA_EXGEN+EX_R12(r13) |
| 1022 | ld r13,PACA_EXGEN+EX_R13(r13) |
| 1023 | rfid |
| 1024 | b . |
| 1025 | |
| 1026 | slb_miss_fault: |
| 1027 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) |
| 1028 | ld r4,PACA_EXGEN+EX_DAR(r13) |
| 1029 | li r5,0 |
| 1030 | std r4,_DAR(r1) |
| 1031 | std r5,_DSISR(r1) |
| 1032 | b handle_page_fault |
| 1033 | |
| 1034 | unrecov_user_slb: |
| 1035 | EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) |
| 1036 | DISABLE_INTS |
| 1037 | bl .save_nvgprs |
| 1038 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 1039 | bl .unrecoverable_exception |
| 1040 | b 1b |
| 1041 | |
| 1042 | #endif /* __DISABLED__ */ |
| 1043 | |
| 1044 | |
| 1045 | .align 7 |
| 1046 | .globl alignment_common |
| 1047 | alignment_common: |
| 1048 | mfspr r10,SPRN_DAR |
| 1049 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 1050 | mfspr r10,SPRN_DSISR |
| 1051 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 1052 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) |
| 1053 | ld r3,PACA_EXGEN+EX_DAR(r13) |
| 1054 | lwz r4,PACA_EXGEN+EX_DSISR(r13) |
| 1055 | std r3,_DAR(r1) |
| 1056 | std r4,_DSISR(r1) |
| 1057 | bl .save_nvgprs |
| 1058 | DISABLE_INTS |
| 1059 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1060 | bl .alignment_exception |
| 1061 | b .ret_from_except |
| 1062 | |
| 1063 | .align 7 |
| 1064 | .globl program_check_common |
| 1065 | program_check_common: |
| 1066 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) |
| 1067 | bl .save_nvgprs |
| 1068 | DISABLE_INTS |
| 1069 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1070 | bl .program_check_exception |
| 1071 | b .ret_from_except |
| 1072 | |
| 1073 | .align 7 |
| 1074 | .globl fp_unavailable_common |
| 1075 | fp_unavailable_common: |
| 1076 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) |
| 1077 | bne 1f /* if from user, just load it up */ |
| 1078 | bl .save_nvgprs |
| 1079 | DISABLE_INTS |
| 1080 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1081 | bl .kernel_fp_unavailable_exception |
| 1082 | BUG_OPCODE |
| 1083 | 1: |
| 1084 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1085 | BEGIN_FTR_SECTION |
| 1086 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in |
| 1087 | * transaction), go do TM stuff |
| 1088 | */ |
| 1089 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) |
| 1090 | bne- 2f |
| 1091 | END_FTR_SECTION_IFSET(CPU_FTR_TM) |
| 1092 | #endif |
| 1093 | bl .load_up_fpu |
| 1094 | b fast_exception_return |
| 1095 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1096 | 2: /* User process was in a transaction */ |
| 1097 | bl .save_nvgprs |
| 1098 | DISABLE_INTS |
| 1099 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1100 | bl .fp_unavailable_tm |
| 1101 | b .ret_from_except |
| 1102 | #endif |
| 1103 | .align 7 |
| 1104 | .globl altivec_unavailable_common |
| 1105 | altivec_unavailable_common: |
| 1106 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) |
| 1107 | #ifdef CONFIG_ALTIVEC |
| 1108 | BEGIN_FTR_SECTION |
| 1109 | beq 1f |
| 1110 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1111 | BEGIN_FTR_SECTION_NESTED(69) |
| 1112 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in |
| 1113 | * transaction), go do TM stuff |
| 1114 | */ |
| 1115 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) |
| 1116 | bne- 2f |
| 1117 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) |
| 1118 | #endif |
| 1119 | bl .load_up_altivec |
| 1120 | b fast_exception_return |
| 1121 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1122 | 2: /* User process was in a transaction */ |
| 1123 | bl .save_nvgprs |
| 1124 | DISABLE_INTS |
| 1125 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1126 | bl .altivec_unavailable_tm |
| 1127 | b .ret_from_except |
| 1128 | #endif |
| 1129 | 1: |
| 1130 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) |
| 1131 | #endif |
| 1132 | bl .save_nvgprs |
| 1133 | DISABLE_INTS |
| 1134 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1135 | bl .altivec_unavailable_exception |
| 1136 | b .ret_from_except |
| 1137 | |
| 1138 | .align 7 |
| 1139 | .globl vsx_unavailable_common |
| 1140 | vsx_unavailable_common: |
| 1141 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) |
| 1142 | #ifdef CONFIG_VSX |
| 1143 | BEGIN_FTR_SECTION |
| 1144 | beq 1f |
| 1145 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1146 | BEGIN_FTR_SECTION_NESTED(69) |
| 1147 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in |
| 1148 | * transaction), go do TM stuff |
| 1149 | */ |
| 1150 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) |
| 1151 | bne- 2f |
| 1152 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) |
| 1153 | #endif |
| 1154 | b .load_up_vsx |
| 1155 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1156 | 2: /* User process was in a transaction */ |
| 1157 | bl .save_nvgprs |
| 1158 | DISABLE_INTS |
| 1159 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1160 | bl .vsx_unavailable_tm |
| 1161 | b .ret_from_except |
| 1162 | #endif |
| 1163 | 1: |
| 1164 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) |
| 1165 | #endif |
| 1166 | bl .save_nvgprs |
| 1167 | DISABLE_INTS |
| 1168 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1169 | bl .vsx_unavailable_exception |
| 1170 | b .ret_from_except |
| 1171 | |
| 1172 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception) |
| 1173 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception) |
| 1174 | |
| 1175 | .align 7 |
| 1176 | .globl __end_handlers |
| 1177 | __end_handlers: |
| 1178 | |
| 1179 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ |
| 1180 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) |
| 1181 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) |
| 1182 | |
| 1183 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
| 1184 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
| 1185 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) |
| 1186 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
| 1187 | STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) |
| 1188 | |
| 1189 | /* |
| 1190 | * The __end_interrupts marker must be past the out-of-line (OOL) |
| 1191 | * handlers, so that they are copied to real address 0x100 when running |
| 1192 | * a relocatable kernel. This ensures they can be reached from the short |
| 1193 | * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch |
| 1194 | * directly, without using LOAD_HANDLER(). |
| 1195 | */ |
| 1196 | .align 7 |
| 1197 | .globl __end_interrupts |
| 1198 | __end_interrupts: |
| 1199 | |
| 1200 | #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) |
| 1201 | /* |
| 1202 | * Data area reserved for FWNMI option. |
| 1203 | * This address (0x7000) is fixed by the RPA. |
| 1204 | */ |
| 1205 | .= 0x7000 |
| 1206 | .globl fwnmi_data_area |
| 1207 | fwnmi_data_area: |
| 1208 | |
| 1209 | /* pseries and powernv need to keep the whole page from |
| 1210 | * 0x7000 to 0x8000 free for use by the firmware |
| 1211 | */ |
| 1212 | . = 0x8000 |
| 1213 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ |
| 1214 | |
| 1215 | /* Space for CPU0's segment table */ |
| 1216 | .balign 4096 |
| 1217 | .globl initial_stab |
| 1218 | initial_stab: |
| 1219 | .space 4096 |
| 1220 | |
| 1221 | #ifdef CONFIG_PPC_POWERNV |
| 1222 | _GLOBAL(opal_mc_secondary_handler) |
| 1223 | HMT_MEDIUM_PPR_DISCARD |
| 1224 | SET_SCRATCH0(r13) |
| 1225 | GET_PACA(r13) |
| 1226 | clrldi r3,r3,2 |
| 1227 | tovirt(r3,r3) |
| 1228 | std r3,PACA_OPAL_MC_EVT(r13) |
| 1229 | ld r13,OPAL_MC_SRR0(r3) |
| 1230 | mtspr SPRN_SRR0,r13 |
| 1231 | ld r13,OPAL_MC_SRR1(r3) |
| 1232 | mtspr SPRN_SRR1,r13 |
| 1233 | ld r3,OPAL_MC_GPR3(r3) |
| 1234 | GET_SCRATCH0(r13) |
| 1235 | b machine_check_pSeries |
| 1236 | #endif /* CONFIG_PPC_POWERNV */ |
| 1237 | |
| 1238 | |
| 1239 | /* |
| 1240 | * r13 points to the PACA, r9 contains the saved CR, |
| 1241 | * r12 contain the saved SRR1, SRR0 is still ready for return |
| 1242 | * r3 has the faulting address |
| 1243 | * r9 - r13 are saved in paca->exslb. |
| 1244 | * r3 is saved in paca->slb_r3 |
| 1245 | * We assume we aren't going to take any exceptions during this procedure. |
| 1246 | */ |
| 1247 | _GLOBAL(slb_miss_realmode) |
| 1248 | mflr r10 |
| 1249 | #ifdef CONFIG_RELOCATABLE |
| 1250 | mtctr r11 |
| 1251 | #endif |
| 1252 | |
| 1253 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ |
| 1254 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ |
| 1255 | |
| 1256 | bl .slb_allocate_realmode |
| 1257 | |
| 1258 | /* All done -- return from exception. */ |
| 1259 | |
| 1260 | ld r10,PACA_EXSLB+EX_LR(r13) |
| 1261 | ld r3,PACA_EXSLB+EX_R3(r13) |
| 1262 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ |
| 1263 | |
| 1264 | mtlr r10 |
| 1265 | |
| 1266 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
| 1267 | beq- 2f |
| 1268 | |
| 1269 | .machine push |
| 1270 | .machine "power4" |
| 1271 | mtcrf 0x80,r9 |
| 1272 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ |
| 1273 | .machine pop |
| 1274 | |
| 1275 | RESTORE_PPR_PACA(PACA_EXSLB, r9) |
| 1276 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 1277 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 1278 | ld r11,PACA_EXSLB+EX_R11(r13) |
| 1279 | ld r12,PACA_EXSLB+EX_R12(r13) |
| 1280 | ld r13,PACA_EXSLB+EX_R13(r13) |
| 1281 | rfid |
| 1282 | b . /* prevent speculative execution */ |
| 1283 | |
| 1284 | 2: mfspr r11,SPRN_SRR0 |
| 1285 | ld r10,PACAKBASE(r13) |
| 1286 | LOAD_HANDLER(r10,unrecov_slb) |
| 1287 | mtspr SPRN_SRR0,r10 |
| 1288 | ld r10,PACAKMSR(r13) |
| 1289 | mtspr SPRN_SRR1,r10 |
| 1290 | rfid |
| 1291 | b . |
| 1292 | |
| 1293 | unrecov_slb: |
| 1294 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) |
| 1295 | DISABLE_INTS |
| 1296 | bl .save_nvgprs |
| 1297 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 1298 | bl .unrecoverable_exception |
| 1299 | b 1b |
| 1300 | |
| 1301 | |
| 1302 | #ifdef CONFIG_PPC_970_NAP |
| 1303 | power4_fixup_nap: |
| 1304 | andc r9,r9,r10 |
| 1305 | std r9,TI_LOCAL_FLAGS(r11) |
| 1306 | ld r10,_LINK(r1) /* make idle task do the */ |
| 1307 | std r10,_NIP(r1) /* equivalent of a blr */ |
| 1308 | blr |
| 1309 | #endif |
| 1310 | |
| 1311 | /* |
| 1312 | * Hash table stuff |
| 1313 | */ |
| 1314 | .align 7 |
| 1315 | _STATIC(do_hash_page) |
| 1316 | std r3,_DAR(r1) |
| 1317 | std r4,_DSISR(r1) |
| 1318 | |
| 1319 | andis. r0,r4,0xa410 /* weird error? */ |
| 1320 | bne- handle_page_fault /* if not, try to insert a HPTE */ |
| 1321 | andis. r0,r4,DSISR_DABRMATCH@h |
| 1322 | bne- handle_dabr_fault |
| 1323 | |
| 1324 | BEGIN_FTR_SECTION |
| 1325 | andis. r0,r4,0x0020 /* Is it a segment table fault? */ |
| 1326 | bne- do_ste_alloc /* If so handle it */ |
| 1327 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB) |
| 1328 | |
| 1329 | CURRENT_THREAD_INFO(r11, r1) |
| 1330 | lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ |
| 1331 | andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ |
| 1332 | bne 77f /* then don't call hash_page now */ |
| 1333 | /* |
| 1334 | * We need to set the _PAGE_USER bit if MSR_PR is set or if we are |
| 1335 | * accessing a userspace segment (even from the kernel). We assume |
| 1336 | * kernel addresses always have the high bit set. |
| 1337 | */ |
| 1338 | rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ |
| 1339 | rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ |
| 1340 | orc r0,r12,r0 /* MSR_PR | ~high_bit */ |
| 1341 | rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ |
| 1342 | ori r4,r4,1 /* add _PAGE_PRESENT */ |
| 1343 | rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ |
| 1344 | |
| 1345 | /* |
| 1346 | * r3 contains the faulting address |
| 1347 | * r4 contains the required access permissions |
| 1348 | * r5 contains the trap number |
| 1349 | * |
| 1350 | * at return r3 = 0 for success, 1 for page fault, negative for error |
| 1351 | */ |
| 1352 | bl .hash_page /* build HPTE if possible */ |
| 1353 | cmpdi r3,0 /* see if hash_page succeeded */ |
| 1354 | |
| 1355 | /* Success */ |
| 1356 | beq fast_exc_return_irq /* Return from exception on success */ |
| 1357 | |
| 1358 | /* Error */ |
| 1359 | blt- 13f |
| 1360 | |
| 1361 | /* Here we have a page fault that hash_page can't handle. */ |
| 1362 | handle_page_fault: |
| 1363 | 11: ld r4,_DAR(r1) |
| 1364 | ld r5,_DSISR(r1) |
| 1365 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1366 | bl .do_page_fault |
| 1367 | cmpdi r3,0 |
| 1368 | beq+ 12f |
| 1369 | bl .save_nvgprs |
| 1370 | mr r5,r3 |
| 1371 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1372 | lwz r4,_DAR(r1) |
| 1373 | bl .bad_page_fault |
| 1374 | b .ret_from_except |
| 1375 | |
| 1376 | /* We have a data breakpoint exception - handle it */ |
| 1377 | handle_dabr_fault: |
| 1378 | bl .save_nvgprs |
| 1379 | ld r4,_DAR(r1) |
| 1380 | ld r5,_DSISR(r1) |
| 1381 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1382 | bl .do_break |
| 1383 | 12: b .ret_from_except_lite |
| 1384 | |
| 1385 | |
| 1386 | /* We have a page fault that hash_page could handle but HV refused |
| 1387 | * the PTE insertion |
| 1388 | */ |
| 1389 | 13: bl .save_nvgprs |
| 1390 | mr r5,r3 |
| 1391 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1392 | ld r4,_DAR(r1) |
| 1393 | bl .low_hash_fault |
| 1394 | b .ret_from_except |
| 1395 | |
| 1396 | /* |
| 1397 | * We come here as a result of a DSI at a point where we don't want |
| 1398 | * to call hash_page, such as when we are accessing memory (possibly |
| 1399 | * user memory) inside a PMU interrupt that occurred while interrupts |
| 1400 | * were soft-disabled. We want to invoke the exception handler for |
| 1401 | * the access, or panic if there isn't a handler. |
| 1402 | */ |
| 1403 | 77: bl .save_nvgprs |
| 1404 | mr r4,r3 |
| 1405 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1406 | li r5,SIGSEGV |
| 1407 | bl .bad_page_fault |
| 1408 | b .ret_from_except |
| 1409 | |
| 1410 | /* here we have a segment miss */ |
| 1411 | do_ste_alloc: |
| 1412 | bl .ste_allocate /* try to insert stab entry */ |
| 1413 | cmpdi r3,0 |
| 1414 | bne- handle_page_fault |
| 1415 | b fast_exception_return |
| 1416 | |
| 1417 | /* |
| 1418 | * r13 points to the PACA, r9 contains the saved CR, |
| 1419 | * r11 and r12 contain the saved SRR0 and SRR1. |
| 1420 | * r9 - r13 are saved in paca->exslb. |
| 1421 | * We assume we aren't going to take any exceptions during this procedure. |
| 1422 | * We assume (DAR >> 60) == 0xc. |
| 1423 | */ |
| 1424 | .align 7 |
| 1425 | _GLOBAL(do_stab_bolted) |
| 1426 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ |
| 1427 | std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */ |
| 1428 | mfspr r11,SPRN_DAR /* ea */ |
| 1429 | |
| 1430 | /* |
| 1431 | * check for bad kernel/user address |
| 1432 | * (ea & ~REGION_MASK) >= PGTABLE_RANGE |
| 1433 | */ |
| 1434 | rldicr. r9,r11,4,(63 - 46 - 4) |
| 1435 | li r9,0 /* VSID = 0 for bad address */ |
| 1436 | bne- 0f |
| 1437 | |
| 1438 | /* |
| 1439 | * Calculate VSID: |
| 1440 | * This is the kernel vsid, we take the top for context from |
| 1441 | * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1 |
| 1442 | * Here we know that (ea >> 60) == 0xc |
| 1443 | */ |
| 1444 | lis r9,(MAX_USER_CONTEXT + 1)@ha |
| 1445 | addi r9,r9,(MAX_USER_CONTEXT + 1)@l |
| 1446 | |
| 1447 | srdi r10,r11,SID_SHIFT |
| 1448 | rldimi r10,r9,ESID_BITS,0 /* proto vsid */ |
| 1449 | ASM_VSID_SCRAMBLE(r10, r9, 256M) |
| 1450 | rldic r9,r10,12,16 /* r9 = vsid << 12 */ |
| 1451 | |
| 1452 | 0: |
| 1453 | /* Hash to the primary group */ |
| 1454 | ld r10,PACASTABVIRT(r13) |
| 1455 | srdi r11,r11,SID_SHIFT |
| 1456 | rldimi r10,r11,7,52 /* r10 = first ste of the group */ |
| 1457 | |
| 1458 | /* Search the primary group for a free entry */ |
| 1459 | 1: ld r11,0(r10) /* Test valid bit of the current ste */ |
| 1460 | andi. r11,r11,0x80 |
| 1461 | beq 2f |
| 1462 | addi r10,r10,16 |
| 1463 | andi. r11,r10,0x70 |
| 1464 | bne 1b |
| 1465 | |
| 1466 | /* Stick for only searching the primary group for now. */ |
| 1467 | /* At least for now, we use a very simple random castout scheme */ |
| 1468 | /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ |
| 1469 | mftb r11 |
| 1470 | rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */ |
| 1471 | ori r11,r11,0x10 |
| 1472 | |
| 1473 | /* r10 currently points to an ste one past the group of interest */ |
| 1474 | /* make it point to the randomly selected entry */ |
| 1475 | subi r10,r10,128 |
| 1476 | or r10,r10,r11 /* r10 is the entry to invalidate */ |
| 1477 | |
| 1478 | isync /* mark the entry invalid */ |
| 1479 | ld r11,0(r10) |
| 1480 | rldicl r11,r11,56,1 /* clear the valid bit */ |
| 1481 | rotldi r11,r11,8 |
| 1482 | std r11,0(r10) |
| 1483 | sync |
| 1484 | |
| 1485 | clrrdi r11,r11,28 /* Get the esid part of the ste */ |
| 1486 | slbie r11 |
| 1487 | |
| 1488 | 2: std r9,8(r10) /* Store the vsid part of the ste */ |
| 1489 | eieio |
| 1490 | |
| 1491 | mfspr r11,SPRN_DAR /* Get the new esid */ |
| 1492 | clrrdi r11,r11,28 /* Permits a full 32b of ESID */ |
| 1493 | ori r11,r11,0x90 /* Turn on valid and kp */ |
| 1494 | std r11,0(r10) /* Put new entry back into the stab */ |
| 1495 | |
| 1496 | sync |
| 1497 | |
| 1498 | /* All done -- return from exception. */ |
| 1499 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ |
| 1500 | ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */ |
| 1501 | |
| 1502 | andi. r10,r12,MSR_RI |
| 1503 | beq- unrecov_slb |
| 1504 | |
| 1505 | mtcrf 0x80,r9 /* restore CR */ |
| 1506 | |
| 1507 | mfmsr r10 |
| 1508 | clrrdi r10,r10,2 |
| 1509 | mtmsrd r10,1 |
| 1510 | |
| 1511 | mtspr SPRN_SRR0,r11 |
| 1512 | mtspr SPRN_SRR1,r12 |
| 1513 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 1514 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 1515 | ld r11,PACA_EXSLB+EX_R11(r13) |
| 1516 | ld r12,PACA_EXSLB+EX_R12(r13) |
| 1517 | ld r13,PACA_EXSLB+EX_R13(r13) |
| 1518 | rfid |
| 1519 | b . /* prevent speculative execution */ |