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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
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1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/export.h>
18
19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h>
21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22#include <asm/mmu.h>
23#include <asm/setup.h>
24
25struct cpu_spec* cur_cpu_spec = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31/* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38#ifdef CONFIG_PPC32
39extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61#endif /* CONFIG_PPC32 */
62#ifdef CONFIG_PPC64
63extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67extern void __restore_cpu_pa6t(void);
68extern void __restore_cpu_ppc970(void);
69extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70extern void __restore_cpu_power7(void);
71extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72extern void __restore_cpu_power8(void);
73extern void __restore_cpu_a2(void);
74#endif /* CONFIG_PPC64 */
75#if defined(CONFIG_E500)
76extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
77extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
78extern void __restore_cpu_e5500(void);
79extern void __restore_cpu_e6500(void);
80#endif /* CONFIG_E500 */
81
82/* This table only contains "desktop" CPUs, it need to be filled with embedded
83 * ones as well...
84 */
85#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
86 PPC_FEATURE_HAS_MMU)
87#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
88#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
89#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
91#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
93#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
97#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
102#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
106#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
107 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
108 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
109 PPC_FEATURE2_VEC_CRYPTO)
110#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
111 PPC_FEATURE_TRUE_LE | \
112 PPC_FEATURE_HAS_ALTIVEC_COMP)
113#ifdef CONFIG_PPC_BOOK3E_64
114#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
115#else
116#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
117 PPC_FEATURE_BOOKE)
118#endif
119
120static struct cpu_spec __initdata cpu_specs[] = {
121#ifdef CONFIG_PPC_BOOK3S_64
122 { /* Power3 */
123 .pvr_mask = 0xffff0000,
124 .pvr_value = 0x00400000,
125 .cpu_name = "POWER3 (630)",
126 .cpu_features = CPU_FTRS_POWER3,
127 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
128 .mmu_features = MMU_FTR_HPTE_TABLE,
129 .icache_bsize = 128,
130 .dcache_bsize = 128,
131 .num_pmcs = 8,
132 .pmc_type = PPC_PMC_IBM,
133 .oprofile_cpu_type = "ppc64/power3",
134 .oprofile_type = PPC_OPROFILE_RS64,
135 .platform = "power3",
136 },
137 { /* Power3+ */
138 .pvr_mask = 0xffff0000,
139 .pvr_value = 0x00410000,
140 .cpu_name = "POWER3 (630+)",
141 .cpu_features = CPU_FTRS_POWER3,
142 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
143 .mmu_features = MMU_FTR_HPTE_TABLE,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/power3",
149 .oprofile_type = PPC_OPROFILE_RS64,
150 .platform = "power3",
151 },
152 { /* Northstar */
153 .pvr_mask = 0xffff0000,
154 .pvr_value = 0x00330000,
155 .cpu_name = "RS64-II (northstar)",
156 .cpu_features = CPU_FTRS_RS64,
157 .cpu_user_features = COMMON_USER_PPC64,
158 .mmu_features = MMU_FTR_HPTE_TABLE,
159 .icache_bsize = 128,
160 .dcache_bsize = 128,
161 .num_pmcs = 8,
162 .pmc_type = PPC_PMC_IBM,
163 .oprofile_cpu_type = "ppc64/rs64",
164 .oprofile_type = PPC_OPROFILE_RS64,
165 .platform = "rs64",
166 },
167 { /* Pulsar */
168 .pvr_mask = 0xffff0000,
169 .pvr_value = 0x00340000,
170 .cpu_name = "RS64-III (pulsar)",
171 .cpu_features = CPU_FTRS_RS64,
172 .cpu_user_features = COMMON_USER_PPC64,
173 .mmu_features = MMU_FTR_HPTE_TABLE,
174 .icache_bsize = 128,
175 .dcache_bsize = 128,
176 .num_pmcs = 8,
177 .pmc_type = PPC_PMC_IBM,
178 .oprofile_cpu_type = "ppc64/rs64",
179 .oprofile_type = PPC_OPROFILE_RS64,
180 .platform = "rs64",
181 },
182 { /* I-star */
183 .pvr_mask = 0xffff0000,
184 .pvr_value = 0x00360000,
185 .cpu_name = "RS64-III (icestar)",
186 .cpu_features = CPU_FTRS_RS64,
187 .cpu_user_features = COMMON_USER_PPC64,
188 .mmu_features = MMU_FTR_HPTE_TABLE,
189 .icache_bsize = 128,
190 .dcache_bsize = 128,
191 .num_pmcs = 8,
192 .pmc_type = PPC_PMC_IBM,
193 .oprofile_cpu_type = "ppc64/rs64",
194 .oprofile_type = PPC_OPROFILE_RS64,
195 .platform = "rs64",
196 },
197 { /* S-star */
198 .pvr_mask = 0xffff0000,
199 .pvr_value = 0x00370000,
200 .cpu_name = "RS64-IV (sstar)",
201 .cpu_features = CPU_FTRS_RS64,
202 .cpu_user_features = COMMON_USER_PPC64,
203 .mmu_features = MMU_FTR_HPTE_TABLE,
204 .icache_bsize = 128,
205 .dcache_bsize = 128,
206 .num_pmcs = 8,
207 .pmc_type = PPC_PMC_IBM,
208 .oprofile_cpu_type = "ppc64/rs64",
209 .oprofile_type = PPC_OPROFILE_RS64,
210 .platform = "rs64",
211 },
212 { /* Power4 */
213 .pvr_mask = 0xffff0000,
214 .pvr_value = 0x00350000,
215 .cpu_name = "POWER4 (gp)",
216 .cpu_features = CPU_FTRS_POWER4,
217 .cpu_user_features = COMMON_USER_POWER4,
218 .mmu_features = MMU_FTRS_POWER4,
219 .icache_bsize = 128,
220 .dcache_bsize = 128,
221 .num_pmcs = 8,
222 .pmc_type = PPC_PMC_IBM,
223 .oprofile_cpu_type = "ppc64/power4",
224 .oprofile_type = PPC_OPROFILE_POWER4,
225 .platform = "power4",
226 },
227 { /* Power4+ */
228 .pvr_mask = 0xffff0000,
229 .pvr_value = 0x00380000,
230 .cpu_name = "POWER4+ (gq)",
231 .cpu_features = CPU_FTRS_POWER4,
232 .cpu_user_features = COMMON_USER_POWER4,
233 .mmu_features = MMU_FTRS_POWER4,
234 .icache_bsize = 128,
235 .dcache_bsize = 128,
236 .num_pmcs = 8,
237 .pmc_type = PPC_PMC_IBM,
238 .oprofile_cpu_type = "ppc64/power4",
239 .oprofile_type = PPC_OPROFILE_POWER4,
240 .platform = "power4",
241 },
242 { /* PPC970 */
243 .pvr_mask = 0xffff0000,
244 .pvr_value = 0x00390000,
245 .cpu_name = "PPC970",
246 .cpu_features = CPU_FTRS_PPC970,
247 .cpu_user_features = COMMON_USER_POWER4 |
248 PPC_FEATURE_HAS_ALTIVEC_COMP,
249 .mmu_features = MMU_FTRS_PPC970,
250 .icache_bsize = 128,
251 .dcache_bsize = 128,
252 .num_pmcs = 8,
253 .pmc_type = PPC_PMC_IBM,
254 .cpu_setup = __setup_cpu_ppc970,
255 .cpu_restore = __restore_cpu_ppc970,
256 .oprofile_cpu_type = "ppc64/970",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 .platform = "ppc970",
259 },
260 { /* PPC970FX */
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x003c0000,
263 .cpu_name = "PPC970FX",
264 .cpu_features = CPU_FTRS_PPC970,
265 .cpu_user_features = COMMON_USER_POWER4 |
266 PPC_FEATURE_HAS_ALTIVEC_COMP,
267 .mmu_features = MMU_FTRS_PPC970,
268 .icache_bsize = 128,
269 .dcache_bsize = 128,
270 .num_pmcs = 8,
271 .pmc_type = PPC_PMC_IBM,
272 .cpu_setup = __setup_cpu_ppc970,
273 .cpu_restore = __restore_cpu_ppc970,
274 .oprofile_cpu_type = "ppc64/970",
275 .oprofile_type = PPC_OPROFILE_POWER4,
276 .platform = "ppc970",
277 },
278 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
279 .pvr_mask = 0xffffffff,
280 .pvr_value = 0x00440100,
281 .cpu_name = "PPC970MP",
282 .cpu_features = CPU_FTRS_PPC970,
283 .cpu_user_features = COMMON_USER_POWER4 |
284 PPC_FEATURE_HAS_ALTIVEC_COMP,
285 .mmu_features = MMU_FTRS_PPC970,
286 .icache_bsize = 128,
287 .dcache_bsize = 128,
288 .num_pmcs = 8,
289 .pmc_type = PPC_PMC_IBM,
290 .cpu_setup = __setup_cpu_ppc970,
291 .cpu_restore = __restore_cpu_ppc970,
292 .oprofile_cpu_type = "ppc64/970MP",
293 .oprofile_type = PPC_OPROFILE_POWER4,
294 .platform = "ppc970",
295 },
296 { /* PPC970MP */
297 .pvr_mask = 0xffff0000,
298 .pvr_value = 0x00440000,
299 .cpu_name = "PPC970MP",
300 .cpu_features = CPU_FTRS_PPC970,
301 .cpu_user_features = COMMON_USER_POWER4 |
302 PPC_FEATURE_HAS_ALTIVEC_COMP,
303 .mmu_features = MMU_FTRS_PPC970,
304 .icache_bsize = 128,
305 .dcache_bsize = 128,
306 .num_pmcs = 8,
307 .pmc_type = PPC_PMC_IBM,
308 .cpu_setup = __setup_cpu_ppc970MP,
309 .cpu_restore = __restore_cpu_ppc970,
310 .oprofile_cpu_type = "ppc64/970MP",
311 .oprofile_type = PPC_OPROFILE_POWER4,
312 .platform = "ppc970",
313 },
314 { /* PPC970GX */
315 .pvr_mask = 0xffff0000,
316 .pvr_value = 0x00450000,
317 .cpu_name = "PPC970GX",
318 .cpu_features = CPU_FTRS_PPC970,
319 .cpu_user_features = COMMON_USER_POWER4 |
320 PPC_FEATURE_HAS_ALTIVEC_COMP,
321 .mmu_features = MMU_FTRS_PPC970,
322 .icache_bsize = 128,
323 .dcache_bsize = 128,
324 .num_pmcs = 8,
325 .pmc_type = PPC_PMC_IBM,
326 .cpu_setup = __setup_cpu_ppc970,
327 .oprofile_cpu_type = "ppc64/970",
328 .oprofile_type = PPC_OPROFILE_POWER4,
329 .platform = "ppc970",
330 },
331 { /* Power5 GR */
332 .pvr_mask = 0xffff0000,
333 .pvr_value = 0x003a0000,
334 .cpu_name = "POWER5 (gr)",
335 .cpu_features = CPU_FTRS_POWER5,
336 .cpu_user_features = COMMON_USER_POWER5,
337 .mmu_features = MMU_FTRS_POWER5,
338 .icache_bsize = 128,
339 .dcache_bsize = 128,
340 .num_pmcs = 6,
341 .pmc_type = PPC_PMC_IBM,
342 .oprofile_cpu_type = "ppc64/power5",
343 .oprofile_type = PPC_OPROFILE_POWER4,
344 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
345 * and above but only works on POWER5 and above
346 */
347 .oprofile_mmcra_sihv = MMCRA_SIHV,
348 .oprofile_mmcra_sipr = MMCRA_SIPR,
349 .platform = "power5",
350 },
351 { /* Power5++ */
352 .pvr_mask = 0xffffff00,
353 .pvr_value = 0x003b0300,
354 .cpu_name = "POWER5+ (gs)",
355 .cpu_features = CPU_FTRS_POWER5,
356 .cpu_user_features = COMMON_USER_POWER5_PLUS,
357 .mmu_features = MMU_FTRS_POWER5,
358 .icache_bsize = 128,
359 .dcache_bsize = 128,
360 .num_pmcs = 6,
361 .oprofile_cpu_type = "ppc64/power5++",
362 .oprofile_type = PPC_OPROFILE_POWER4,
363 .oprofile_mmcra_sihv = MMCRA_SIHV,
364 .oprofile_mmcra_sipr = MMCRA_SIPR,
365 .platform = "power5+",
366 },
367 { /* Power5 GS */
368 .pvr_mask = 0xffff0000,
369 .pvr_value = 0x003b0000,
370 .cpu_name = "POWER5+ (gs)",
371 .cpu_features = CPU_FTRS_POWER5,
372 .cpu_user_features = COMMON_USER_POWER5_PLUS,
373 .mmu_features = MMU_FTRS_POWER5,
374 .icache_bsize = 128,
375 .dcache_bsize = 128,
376 .num_pmcs = 6,
377 .pmc_type = PPC_PMC_IBM,
378 .oprofile_cpu_type = "ppc64/power5+",
379 .oprofile_type = PPC_OPROFILE_POWER4,
380 .oprofile_mmcra_sihv = MMCRA_SIHV,
381 .oprofile_mmcra_sipr = MMCRA_SIPR,
382 .platform = "power5+",
383 },
384 { /* POWER6 in P5+ mode; 2.04-compliant processor */
385 .pvr_mask = 0xffffffff,
386 .pvr_value = 0x0f000001,
387 .cpu_name = "POWER5+",
388 .cpu_features = CPU_FTRS_POWER5,
389 .cpu_user_features = COMMON_USER_POWER5_PLUS,
390 .mmu_features = MMU_FTRS_POWER5,
391 .icache_bsize = 128,
392 .dcache_bsize = 128,
393 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
394 .oprofile_type = PPC_OPROFILE_POWER4,
395 .platform = "power5+",
396 },
397 { /* Power6 */
398 .pvr_mask = 0xffff0000,
399 .pvr_value = 0x003e0000,
400 .cpu_name = "POWER6 (raw)",
401 .cpu_features = CPU_FTRS_POWER6,
402 .cpu_user_features = COMMON_USER_POWER6 |
403 PPC_FEATURE_POWER6_EXT,
404 .mmu_features = MMU_FTRS_POWER6,
405 .icache_bsize = 128,
406 .dcache_bsize = 128,
407 .num_pmcs = 6,
408 .pmc_type = PPC_PMC_IBM,
409 .oprofile_cpu_type = "ppc64/power6",
410 .oprofile_type = PPC_OPROFILE_POWER4,
411 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
412 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
413 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
414 POWER6_MMCRA_OTHER,
415 .platform = "power6x",
416 },
417 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
418 .pvr_mask = 0xffffffff,
419 .pvr_value = 0x0f000002,
420 .cpu_name = "POWER6 (architected)",
421 .cpu_features = CPU_FTRS_POWER6,
422 .cpu_user_features = COMMON_USER_POWER6,
423 .mmu_features = MMU_FTRS_POWER6,
424 .icache_bsize = 128,
425 .dcache_bsize = 128,
426 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
427 .oprofile_type = PPC_OPROFILE_POWER4,
428 .platform = "power6",
429 },
430 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
431 .pvr_mask = 0xffffffff,
432 .pvr_value = 0x0f000003,
433 .cpu_name = "POWER7 (architected)",
434 .cpu_features = CPU_FTRS_POWER7,
435 .cpu_user_features = COMMON_USER_POWER7,
436 .cpu_user_features2 = COMMON_USER2_POWER7,
437 .mmu_features = MMU_FTRS_POWER7,
438 .icache_bsize = 128,
439 .dcache_bsize = 128,
440 .oprofile_type = PPC_OPROFILE_POWER4,
441 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
442 .cpu_setup = __setup_cpu_power7,
443 .cpu_restore = __restore_cpu_power7,
444 .platform = "power7",
445 },
446 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
447 .pvr_mask = 0xffffffff,
448 .pvr_value = 0x0f000004,
449 .cpu_name = "POWER8 (architected)",
450 .cpu_features = CPU_FTRS_POWER8,
451 .cpu_user_features = COMMON_USER_POWER8,
452 .cpu_user_features2 = COMMON_USER2_POWER8,
453 .mmu_features = MMU_FTRS_POWER8,
454 .icache_bsize = 128,
455 .dcache_bsize = 128,
456 .oprofile_type = PPC_OPROFILE_INVALID,
457 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
458 .cpu_setup = __setup_cpu_power8,
459 .cpu_restore = __restore_cpu_power8,
460 .platform = "power8",
461 },
462 { /* Power7 */
463 .pvr_mask = 0xffff0000,
464 .pvr_value = 0x003f0000,
465 .cpu_name = "POWER7 (raw)",
466 .cpu_features = CPU_FTRS_POWER7,
467 .cpu_user_features = COMMON_USER_POWER7,
468 .cpu_user_features2 = COMMON_USER2_POWER7,
469 .mmu_features = MMU_FTRS_POWER7,
470 .icache_bsize = 128,
471 .dcache_bsize = 128,
472 .num_pmcs = 6,
473 .pmc_type = PPC_PMC_IBM,
474 .oprofile_cpu_type = "ppc64/power7",
475 .oprofile_type = PPC_OPROFILE_POWER4,
476 .cpu_setup = __setup_cpu_power7,
477 .cpu_restore = __restore_cpu_power7,
478 .platform = "power7",
479 },
480 { /* Power7+ */
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x004A0000,
483 .cpu_name = "POWER7+ (raw)",
484 .cpu_features = CPU_FTRS_POWER7,
485 .cpu_user_features = COMMON_USER_POWER7,
486 .cpu_user_features2 = COMMON_USER2_POWER7,
487 .mmu_features = MMU_FTRS_POWER7,
488 .icache_bsize = 128,
489 .dcache_bsize = 128,
490 .num_pmcs = 6,
491 .pmc_type = PPC_PMC_IBM,
492 .oprofile_cpu_type = "ppc64/power7",
493 .oprofile_type = PPC_OPROFILE_POWER4,
494 .cpu_setup = __setup_cpu_power7,
495 .cpu_restore = __restore_cpu_power7,
496 .platform = "power7+",
497 },
498 { /* Power8 */
499 .pvr_mask = 0xffff0000,
500 .pvr_value = 0x004b0000,
501 .cpu_name = "POWER8 (raw)",
502 .cpu_features = CPU_FTRS_POWER8,
503 .cpu_user_features = COMMON_USER_POWER8,
504 .cpu_user_features2 = COMMON_USER2_POWER8,
505 .mmu_features = MMU_FTRS_POWER8,
506 .icache_bsize = 128,
507 .dcache_bsize = 128,
508 .num_pmcs = 6,
509 .pmc_type = PPC_PMC_IBM,
510 .oprofile_cpu_type = "ppc64/power8",
511 .oprofile_type = PPC_OPROFILE_INVALID,
512 .cpu_setup = __setup_cpu_power8,
513 .cpu_restore = __restore_cpu_power8,
514 .platform = "power8",
515 },
516 { /* Cell Broadband Engine */
517 .pvr_mask = 0xffff0000,
518 .pvr_value = 0x00700000,
519 .cpu_name = "Cell Broadband Engine",
520 .cpu_features = CPU_FTRS_CELL,
521 .cpu_user_features = COMMON_USER_PPC64 |
522 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
523 PPC_FEATURE_SMT,
524 .mmu_features = MMU_FTRS_CELL,
525 .icache_bsize = 128,
526 .dcache_bsize = 128,
527 .num_pmcs = 4,
528 .pmc_type = PPC_PMC_IBM,
529 .oprofile_cpu_type = "ppc64/cell-be",
530 .oprofile_type = PPC_OPROFILE_CELL,
531 .platform = "ppc-cell-be",
532 },
533 { /* PA Semi PA6T */
534 .pvr_mask = 0x7fff0000,
535 .pvr_value = 0x00900000,
536 .cpu_name = "PA6T",
537 .cpu_features = CPU_FTRS_PA6T,
538 .cpu_user_features = COMMON_USER_PA6T,
539 .mmu_features = MMU_FTRS_PA6T,
540 .icache_bsize = 64,
541 .dcache_bsize = 64,
542 .num_pmcs = 6,
543 .pmc_type = PPC_PMC_PA6T,
544 .cpu_setup = __setup_cpu_pa6t,
545 .cpu_restore = __restore_cpu_pa6t,
546 .oprofile_cpu_type = "ppc64/pa6t",
547 .oprofile_type = PPC_OPROFILE_PA6T,
548 .platform = "pa6t",
549 },
550 { /* default match */
551 .pvr_mask = 0x00000000,
552 .pvr_value = 0x00000000,
553 .cpu_name = "POWER4 (compatible)",
554 .cpu_features = CPU_FTRS_COMPATIBLE,
555 .cpu_user_features = COMMON_USER_PPC64,
556 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
557 .icache_bsize = 128,
558 .dcache_bsize = 128,
559 .num_pmcs = 6,
560 .pmc_type = PPC_PMC_IBM,
561 .platform = "power4",
562 }
563#endif /* CONFIG_PPC_BOOK3S_64 */
564
565#ifdef CONFIG_PPC32
566#if CLASSIC_PPC
567 { /* 601 */
568 .pvr_mask = 0xffff0000,
569 .pvr_value = 0x00010000,
570 .cpu_name = "601",
571 .cpu_features = CPU_FTRS_PPC601,
572 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
573 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
574 .mmu_features = MMU_FTR_HPTE_TABLE,
575 .icache_bsize = 32,
576 .dcache_bsize = 32,
577 .machine_check = machine_check_generic,
578 .platform = "ppc601",
579 },
580 { /* 603 */
581 .pvr_mask = 0xffff0000,
582 .pvr_value = 0x00030000,
583 .cpu_name = "603",
584 .cpu_features = CPU_FTRS_603,
585 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
586 .mmu_features = 0,
587 .icache_bsize = 32,
588 .dcache_bsize = 32,
589 .cpu_setup = __setup_cpu_603,
590 .machine_check = machine_check_generic,
591 .platform = "ppc603",
592 },
593 { /* 603e */
594 .pvr_mask = 0xffff0000,
595 .pvr_value = 0x00060000,
596 .cpu_name = "603e",
597 .cpu_features = CPU_FTRS_603,
598 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
599 .mmu_features = 0,
600 .icache_bsize = 32,
601 .dcache_bsize = 32,
602 .cpu_setup = __setup_cpu_603,
603 .machine_check = machine_check_generic,
604 .platform = "ppc603",
605 },
606 { /* 603ev */
607 .pvr_mask = 0xffff0000,
608 .pvr_value = 0x00070000,
609 .cpu_name = "603ev",
610 .cpu_features = CPU_FTRS_603,
611 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
612 .mmu_features = 0,
613 .icache_bsize = 32,
614 .dcache_bsize = 32,
615 .cpu_setup = __setup_cpu_603,
616 .machine_check = machine_check_generic,
617 .platform = "ppc603",
618 },
619 { /* 604 */
620 .pvr_mask = 0xffff0000,
621 .pvr_value = 0x00040000,
622 .cpu_name = "604",
623 .cpu_features = CPU_FTRS_604,
624 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
625 .mmu_features = MMU_FTR_HPTE_TABLE,
626 .icache_bsize = 32,
627 .dcache_bsize = 32,
628 .num_pmcs = 2,
629 .cpu_setup = __setup_cpu_604,
630 .machine_check = machine_check_generic,
631 .platform = "ppc604",
632 },
633 { /* 604e */
634 .pvr_mask = 0xfffff000,
635 .pvr_value = 0x00090000,
636 .cpu_name = "604e",
637 .cpu_features = CPU_FTRS_604,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
639 .mmu_features = MMU_FTR_HPTE_TABLE,
640 .icache_bsize = 32,
641 .dcache_bsize = 32,
642 .num_pmcs = 4,
643 .cpu_setup = __setup_cpu_604,
644 .machine_check = machine_check_generic,
645 .platform = "ppc604",
646 },
647 { /* 604r */
648 .pvr_mask = 0xffff0000,
649 .pvr_value = 0x00090000,
650 .cpu_name = "604r",
651 .cpu_features = CPU_FTRS_604,
652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
653 .mmu_features = MMU_FTR_HPTE_TABLE,
654 .icache_bsize = 32,
655 .dcache_bsize = 32,
656 .num_pmcs = 4,
657 .cpu_setup = __setup_cpu_604,
658 .machine_check = machine_check_generic,
659 .platform = "ppc604",
660 },
661 { /* 604ev */
662 .pvr_mask = 0xffff0000,
663 .pvr_value = 0x000a0000,
664 .cpu_name = "604ev",
665 .cpu_features = CPU_FTRS_604,
666 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
667 .mmu_features = MMU_FTR_HPTE_TABLE,
668 .icache_bsize = 32,
669 .dcache_bsize = 32,
670 .num_pmcs = 4,
671 .cpu_setup = __setup_cpu_604,
672 .machine_check = machine_check_generic,
673 .platform = "ppc604",
674 },
675 { /* 740/750 (0x4202, don't support TAU ?) */
676 .pvr_mask = 0xffffffff,
677 .pvr_value = 0x00084202,
678 .cpu_name = "740/750",
679 .cpu_features = CPU_FTRS_740_NOTAU,
680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
681 .mmu_features = MMU_FTR_HPTE_TABLE,
682 .icache_bsize = 32,
683 .dcache_bsize = 32,
684 .num_pmcs = 4,
685 .cpu_setup = __setup_cpu_750,
686 .machine_check = machine_check_generic,
687 .platform = "ppc750",
688 },
689 { /* 750CX (80100 and 8010x?) */
690 .pvr_mask = 0xfffffff0,
691 .pvr_value = 0x00080100,
692 .cpu_name = "750CX",
693 .cpu_features = CPU_FTRS_750,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
695 .mmu_features = MMU_FTR_HPTE_TABLE,
696 .icache_bsize = 32,
697 .dcache_bsize = 32,
698 .num_pmcs = 4,
699 .cpu_setup = __setup_cpu_750cx,
700 .machine_check = machine_check_generic,
701 .platform = "ppc750",
702 },
703 { /* 750CX (82201 and 82202) */
704 .pvr_mask = 0xfffffff0,
705 .pvr_value = 0x00082200,
706 .cpu_name = "750CX",
707 .cpu_features = CPU_FTRS_750,
708 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
709 .mmu_features = MMU_FTR_HPTE_TABLE,
710 .icache_bsize = 32,
711 .dcache_bsize = 32,
712 .num_pmcs = 4,
713 .pmc_type = PPC_PMC_IBM,
714 .cpu_setup = __setup_cpu_750cx,
715 .machine_check = machine_check_generic,
716 .platform = "ppc750",
717 },
718 { /* 750CXe (82214) */
719 .pvr_mask = 0xfffffff0,
720 .pvr_value = 0x00082210,
721 .cpu_name = "750CXe",
722 .cpu_features = CPU_FTRS_750,
723 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
724 .mmu_features = MMU_FTR_HPTE_TABLE,
725 .icache_bsize = 32,
726 .dcache_bsize = 32,
727 .num_pmcs = 4,
728 .pmc_type = PPC_PMC_IBM,
729 .cpu_setup = __setup_cpu_750cx,
730 .machine_check = machine_check_generic,
731 .platform = "ppc750",
732 },
733 { /* 750CXe "Gekko" (83214) */
734 .pvr_mask = 0xffffffff,
735 .pvr_value = 0x00083214,
736 .cpu_name = "750CXe",
737 .cpu_features = CPU_FTRS_750,
738 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
739 .mmu_features = MMU_FTR_HPTE_TABLE,
740 .icache_bsize = 32,
741 .dcache_bsize = 32,
742 .num_pmcs = 4,
743 .pmc_type = PPC_PMC_IBM,
744 .cpu_setup = __setup_cpu_750cx,
745 .machine_check = machine_check_generic,
746 .platform = "ppc750",
747 },
748 { /* 750CL (and "Broadway") */
749 .pvr_mask = 0xfffff0e0,
750 .pvr_value = 0x00087000,
751 .cpu_name = "750CL",
752 .cpu_features = CPU_FTRS_750CL,
753 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
754 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
755 .icache_bsize = 32,
756 .dcache_bsize = 32,
757 .num_pmcs = 4,
758 .pmc_type = PPC_PMC_IBM,
759 .cpu_setup = __setup_cpu_750,
760 .machine_check = machine_check_generic,
761 .platform = "ppc750",
762 .oprofile_cpu_type = "ppc/750",
763 .oprofile_type = PPC_OPROFILE_G4,
764 },
765 { /* 745/755 */
766 .pvr_mask = 0xfffff000,
767 .pvr_value = 0x00083000,
768 .cpu_name = "745/755",
769 .cpu_features = CPU_FTRS_750,
770 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
771 .mmu_features = MMU_FTR_HPTE_TABLE,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .num_pmcs = 4,
775 .pmc_type = PPC_PMC_IBM,
776 .cpu_setup = __setup_cpu_750,
777 .machine_check = machine_check_generic,
778 .platform = "ppc750",
779 },
780 { /* 750FX rev 1.x */
781 .pvr_mask = 0xffffff00,
782 .pvr_value = 0x70000100,
783 .cpu_name = "750FX",
784 .cpu_features = CPU_FTRS_750FX1,
785 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
786 .mmu_features = MMU_FTR_HPTE_TABLE,
787 .icache_bsize = 32,
788 .dcache_bsize = 32,
789 .num_pmcs = 4,
790 .pmc_type = PPC_PMC_IBM,
791 .cpu_setup = __setup_cpu_750,
792 .machine_check = machine_check_generic,
793 .platform = "ppc750",
794 .oprofile_cpu_type = "ppc/750",
795 .oprofile_type = PPC_OPROFILE_G4,
796 },
797 { /* 750FX rev 2.0 must disable HID0[DPM] */
798 .pvr_mask = 0xffffffff,
799 .pvr_value = 0x70000200,
800 .cpu_name = "750FX",
801 .cpu_features = CPU_FTRS_750FX2,
802 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
803 .mmu_features = MMU_FTR_HPTE_TABLE,
804 .icache_bsize = 32,
805 .dcache_bsize = 32,
806 .num_pmcs = 4,
807 .pmc_type = PPC_PMC_IBM,
808 .cpu_setup = __setup_cpu_750,
809 .machine_check = machine_check_generic,
810 .platform = "ppc750",
811 .oprofile_cpu_type = "ppc/750",
812 .oprofile_type = PPC_OPROFILE_G4,
813 },
814 { /* 750FX (All revs except 2.0) */
815 .pvr_mask = 0xffff0000,
816 .pvr_value = 0x70000000,
817 .cpu_name = "750FX",
818 .cpu_features = CPU_FTRS_750FX,
819 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
820 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
821 .icache_bsize = 32,
822 .dcache_bsize = 32,
823 .num_pmcs = 4,
824 .pmc_type = PPC_PMC_IBM,
825 .cpu_setup = __setup_cpu_750fx,
826 .machine_check = machine_check_generic,
827 .platform = "ppc750",
828 .oprofile_cpu_type = "ppc/750",
829 .oprofile_type = PPC_OPROFILE_G4,
830 },
831 { /* 750GX */
832 .pvr_mask = 0xffff0000,
833 .pvr_value = 0x70020000,
834 .cpu_name = "750GX",
835 .cpu_features = CPU_FTRS_750GX,
836 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
837 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .num_pmcs = 4,
841 .pmc_type = PPC_PMC_IBM,
842 .cpu_setup = __setup_cpu_750fx,
843 .machine_check = machine_check_generic,
844 .platform = "ppc750",
845 .oprofile_cpu_type = "ppc/750",
846 .oprofile_type = PPC_OPROFILE_G4,
847 },
848 { /* 740/750 (L2CR bit need fixup for 740) */
849 .pvr_mask = 0xffff0000,
850 .pvr_value = 0x00080000,
851 .cpu_name = "740/750",
852 .cpu_features = CPU_FTRS_740,
853 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
854 .mmu_features = MMU_FTR_HPTE_TABLE,
855 .icache_bsize = 32,
856 .dcache_bsize = 32,
857 .num_pmcs = 4,
858 .pmc_type = PPC_PMC_IBM,
859 .cpu_setup = __setup_cpu_750,
860 .machine_check = machine_check_generic,
861 .platform = "ppc750",
862 },
863 { /* 7400 rev 1.1 ? (no TAU) */
864 .pvr_mask = 0xffffffff,
865 .pvr_value = 0x000c1101,
866 .cpu_name = "7400 (1.1)",
867 .cpu_features = CPU_FTRS_7400_NOTAU,
868 .cpu_user_features = COMMON_USER |
869 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
870 .mmu_features = MMU_FTR_HPTE_TABLE,
871 .icache_bsize = 32,
872 .dcache_bsize = 32,
873 .num_pmcs = 4,
874 .pmc_type = PPC_PMC_G4,
875 .cpu_setup = __setup_cpu_7400,
876 .machine_check = machine_check_generic,
877 .platform = "ppc7400",
878 },
879 { /* 7400 */
880 .pvr_mask = 0xffff0000,
881 .pvr_value = 0x000c0000,
882 .cpu_name = "7400",
883 .cpu_features = CPU_FTRS_7400,
884 .cpu_user_features = COMMON_USER |
885 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
886 .mmu_features = MMU_FTR_HPTE_TABLE,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .num_pmcs = 4,
890 .pmc_type = PPC_PMC_G4,
891 .cpu_setup = __setup_cpu_7400,
892 .machine_check = machine_check_generic,
893 .platform = "ppc7400",
894 },
895 { /* 7410 */
896 .pvr_mask = 0xffff0000,
897 .pvr_value = 0x800c0000,
898 .cpu_name = "7410",
899 .cpu_features = CPU_FTRS_7400,
900 .cpu_user_features = COMMON_USER |
901 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
902 .mmu_features = MMU_FTR_HPTE_TABLE,
903 .icache_bsize = 32,
904 .dcache_bsize = 32,
905 .num_pmcs = 4,
906 .pmc_type = PPC_PMC_G4,
907 .cpu_setup = __setup_cpu_7410,
908 .machine_check = machine_check_generic,
909 .platform = "ppc7400",
910 },
911 { /* 7450 2.0 - no doze/nap */
912 .pvr_mask = 0xffffffff,
913 .pvr_value = 0x80000200,
914 .cpu_name = "7450",
915 .cpu_features = CPU_FTRS_7450_20,
916 .cpu_user_features = COMMON_USER |
917 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
918 .mmu_features = MMU_FTR_HPTE_TABLE,
919 .icache_bsize = 32,
920 .dcache_bsize = 32,
921 .num_pmcs = 6,
922 .pmc_type = PPC_PMC_G4,
923 .cpu_setup = __setup_cpu_745x,
924 .oprofile_cpu_type = "ppc/7450",
925 .oprofile_type = PPC_OPROFILE_G4,
926 .machine_check = machine_check_generic,
927 .platform = "ppc7450",
928 },
929 { /* 7450 2.1 */
930 .pvr_mask = 0xffffffff,
931 .pvr_value = 0x80000201,
932 .cpu_name = "7450",
933 .cpu_features = CPU_FTRS_7450_21,
934 .cpu_user_features = COMMON_USER |
935 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
936 .mmu_features = MMU_FTR_HPTE_TABLE,
937 .icache_bsize = 32,
938 .dcache_bsize = 32,
939 .num_pmcs = 6,
940 .pmc_type = PPC_PMC_G4,
941 .cpu_setup = __setup_cpu_745x,
942 .oprofile_cpu_type = "ppc/7450",
943 .oprofile_type = PPC_OPROFILE_G4,
944 .machine_check = machine_check_generic,
945 .platform = "ppc7450",
946 },
947 { /* 7450 2.3 and newer */
948 .pvr_mask = 0xffff0000,
949 .pvr_value = 0x80000000,
950 .cpu_name = "7450",
951 .cpu_features = CPU_FTRS_7450_23,
952 .cpu_user_features = COMMON_USER |
953 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
954 .mmu_features = MMU_FTR_HPTE_TABLE,
955 .icache_bsize = 32,
956 .dcache_bsize = 32,
957 .num_pmcs = 6,
958 .pmc_type = PPC_PMC_G4,
959 .cpu_setup = __setup_cpu_745x,
960 .oprofile_cpu_type = "ppc/7450",
961 .oprofile_type = PPC_OPROFILE_G4,
962 .machine_check = machine_check_generic,
963 .platform = "ppc7450",
964 },
965 { /* 7455 rev 1.x */
966 .pvr_mask = 0xffffff00,
967 .pvr_value = 0x80010100,
968 .cpu_name = "7455",
969 .cpu_features = CPU_FTRS_7455_1,
970 .cpu_user_features = COMMON_USER |
971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
972 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .num_pmcs = 6,
976 .pmc_type = PPC_PMC_G4,
977 .cpu_setup = __setup_cpu_745x,
978 .oprofile_cpu_type = "ppc/7450",
979 .oprofile_type = PPC_OPROFILE_G4,
980 .machine_check = machine_check_generic,
981 .platform = "ppc7450",
982 },
983 { /* 7455 rev 2.0 */
984 .pvr_mask = 0xffffffff,
985 .pvr_value = 0x80010200,
986 .cpu_name = "7455",
987 .cpu_features = CPU_FTRS_7455_20,
988 .cpu_user_features = COMMON_USER |
989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
990 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
991 .icache_bsize = 32,
992 .dcache_bsize = 32,
993 .num_pmcs = 6,
994 .pmc_type = PPC_PMC_G4,
995 .cpu_setup = __setup_cpu_745x,
996 .oprofile_cpu_type = "ppc/7450",
997 .oprofile_type = PPC_OPROFILE_G4,
998 .machine_check = machine_check_generic,
999 .platform = "ppc7450",
1000 },
1001 { /* 7455 others */
1002 .pvr_mask = 0xffff0000,
1003 .pvr_value = 0x80010000,
1004 .cpu_name = "7455",
1005 .cpu_features = CPU_FTRS_7455,
1006 .cpu_user_features = COMMON_USER |
1007 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1008 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1009 .icache_bsize = 32,
1010 .dcache_bsize = 32,
1011 .num_pmcs = 6,
1012 .pmc_type = PPC_PMC_G4,
1013 .cpu_setup = __setup_cpu_745x,
1014 .oprofile_cpu_type = "ppc/7450",
1015 .oprofile_type = PPC_OPROFILE_G4,
1016 .machine_check = machine_check_generic,
1017 .platform = "ppc7450",
1018 },
1019 { /* 7447/7457 Rev 1.0 */
1020 .pvr_mask = 0xffffffff,
1021 .pvr_value = 0x80020100,
1022 .cpu_name = "7447/7457",
1023 .cpu_features = CPU_FTRS_7447_10,
1024 .cpu_user_features = COMMON_USER |
1025 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1026 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1027 .icache_bsize = 32,
1028 .dcache_bsize = 32,
1029 .num_pmcs = 6,
1030 .pmc_type = PPC_PMC_G4,
1031 .cpu_setup = __setup_cpu_745x,
1032 .oprofile_cpu_type = "ppc/7450",
1033 .oprofile_type = PPC_OPROFILE_G4,
1034 .machine_check = machine_check_generic,
1035 .platform = "ppc7450",
1036 },
1037 { /* 7447/7457 Rev 1.1 */
1038 .pvr_mask = 0xffffffff,
1039 .pvr_value = 0x80020101,
1040 .cpu_name = "7447/7457",
1041 .cpu_features = CPU_FTRS_7447_10,
1042 .cpu_user_features = COMMON_USER |
1043 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1044 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1045 .icache_bsize = 32,
1046 .dcache_bsize = 32,
1047 .num_pmcs = 6,
1048 .pmc_type = PPC_PMC_G4,
1049 .cpu_setup = __setup_cpu_745x,
1050 .oprofile_cpu_type = "ppc/7450",
1051 .oprofile_type = PPC_OPROFILE_G4,
1052 .machine_check = machine_check_generic,
1053 .platform = "ppc7450",
1054 },
1055 { /* 7447/7457 Rev 1.2 and later */
1056 .pvr_mask = 0xffff0000,
1057 .pvr_value = 0x80020000,
1058 .cpu_name = "7447/7457",
1059 .cpu_features = CPU_FTRS_7447,
1060 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1061 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1062 .icache_bsize = 32,
1063 .dcache_bsize = 32,
1064 .num_pmcs = 6,
1065 .pmc_type = PPC_PMC_G4,
1066 .cpu_setup = __setup_cpu_745x,
1067 .oprofile_cpu_type = "ppc/7450",
1068 .oprofile_type = PPC_OPROFILE_G4,
1069 .machine_check = machine_check_generic,
1070 .platform = "ppc7450",
1071 },
1072 { /* 7447A */
1073 .pvr_mask = 0xffff0000,
1074 .pvr_value = 0x80030000,
1075 .cpu_name = "7447A",
1076 .cpu_features = CPU_FTRS_7447A,
1077 .cpu_user_features = COMMON_USER |
1078 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1079 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1080 .icache_bsize = 32,
1081 .dcache_bsize = 32,
1082 .num_pmcs = 6,
1083 .pmc_type = PPC_PMC_G4,
1084 .cpu_setup = __setup_cpu_745x,
1085 .oprofile_cpu_type = "ppc/7450",
1086 .oprofile_type = PPC_OPROFILE_G4,
1087 .machine_check = machine_check_generic,
1088 .platform = "ppc7450",
1089 },
1090 { /* 7448 */
1091 .pvr_mask = 0xffff0000,
1092 .pvr_value = 0x80040000,
1093 .cpu_name = "7448",
1094 .cpu_features = CPU_FTRS_7448,
1095 .cpu_user_features = COMMON_USER |
1096 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1097 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1098 .icache_bsize = 32,
1099 .dcache_bsize = 32,
1100 .num_pmcs = 6,
1101 .pmc_type = PPC_PMC_G4,
1102 .cpu_setup = __setup_cpu_745x,
1103 .oprofile_cpu_type = "ppc/7450",
1104 .oprofile_type = PPC_OPROFILE_G4,
1105 .machine_check = machine_check_generic,
1106 .platform = "ppc7450",
1107 },
1108 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1109 .pvr_mask = 0x7fff0000,
1110 .pvr_value = 0x00810000,
1111 .cpu_name = "82xx",
1112 .cpu_features = CPU_FTRS_82XX,
1113 .cpu_user_features = COMMON_USER,
1114 .mmu_features = 0,
1115 .icache_bsize = 32,
1116 .dcache_bsize = 32,
1117 .cpu_setup = __setup_cpu_603,
1118 .machine_check = machine_check_generic,
1119 .platform = "ppc603",
1120 },
1121 { /* All G2_LE (603e core, plus some) have the same pvr */
1122 .pvr_mask = 0x7fff0000,
1123 .pvr_value = 0x00820000,
1124 .cpu_name = "G2_LE",
1125 .cpu_features = CPU_FTRS_G2_LE,
1126 .cpu_user_features = COMMON_USER,
1127 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1128 .icache_bsize = 32,
1129 .dcache_bsize = 32,
1130 .cpu_setup = __setup_cpu_603,
1131 .machine_check = machine_check_generic,
1132 .platform = "ppc603",
1133 },
1134 { /* e300c1 (a 603e core, plus some) on 83xx */
1135 .pvr_mask = 0x7fff0000,
1136 .pvr_value = 0x00830000,
1137 .cpu_name = "e300c1",
1138 .cpu_features = CPU_FTRS_E300,
1139 .cpu_user_features = COMMON_USER,
1140 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 .cpu_setup = __setup_cpu_603,
1144 .machine_check = machine_check_generic,
1145 .platform = "ppc603",
1146 },
1147 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1148 .pvr_mask = 0x7fff0000,
1149 .pvr_value = 0x00840000,
1150 .cpu_name = "e300c2",
1151 .cpu_features = CPU_FTRS_E300C2,
1152 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1153 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1154 MMU_FTR_NEED_DTLB_SW_LRU,
1155 .icache_bsize = 32,
1156 .dcache_bsize = 32,
1157 .cpu_setup = __setup_cpu_603,
1158 .machine_check = machine_check_generic,
1159 .platform = "ppc603",
1160 },
1161 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1162 .pvr_mask = 0x7fff0000,
1163 .pvr_value = 0x00850000,
1164 .cpu_name = "e300c3",
1165 .cpu_features = CPU_FTRS_E300,
1166 .cpu_user_features = COMMON_USER,
1167 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1168 MMU_FTR_NEED_DTLB_SW_LRU,
1169 .icache_bsize = 32,
1170 .dcache_bsize = 32,
1171 .cpu_setup = __setup_cpu_603,
1172 .num_pmcs = 4,
1173 .oprofile_cpu_type = "ppc/e300",
1174 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1175 .platform = "ppc603",
1176 },
1177 { /* e300c4 (e300c1, plus one IU) */
1178 .pvr_mask = 0x7fff0000,
1179 .pvr_value = 0x00860000,
1180 .cpu_name = "e300c4",
1181 .cpu_features = CPU_FTRS_E300,
1182 .cpu_user_features = COMMON_USER,
1183 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1184 MMU_FTR_NEED_DTLB_SW_LRU,
1185 .icache_bsize = 32,
1186 .dcache_bsize = 32,
1187 .cpu_setup = __setup_cpu_603,
1188 .machine_check = machine_check_generic,
1189 .num_pmcs = 4,
1190 .oprofile_cpu_type = "ppc/e300",
1191 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1192 .platform = "ppc603",
1193 },
1194 { /* default match, we assume split I/D cache & TB (non-601)... */
1195 .pvr_mask = 0x00000000,
1196 .pvr_value = 0x00000000,
1197 .cpu_name = "(generic PPC)",
1198 .cpu_features = CPU_FTRS_CLASSIC32,
1199 .cpu_user_features = COMMON_USER,
1200 .mmu_features = MMU_FTR_HPTE_TABLE,
1201 .icache_bsize = 32,
1202 .dcache_bsize = 32,
1203 .machine_check = machine_check_generic,
1204 .platform = "ppc603",
1205 },
1206#endif /* CLASSIC_PPC */
1207#ifdef CONFIG_8xx
1208 { /* 8xx */
1209 .pvr_mask = 0xffff0000,
1210 .pvr_value = 0x00500000,
1211 .cpu_name = "8xx",
1212 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1213 * if the 8xx code is there.... */
1214 .cpu_features = CPU_FTRS_8XX,
1215 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1216 .mmu_features = MMU_FTR_TYPE_8xx,
1217 .icache_bsize = 16,
1218 .dcache_bsize = 16,
1219 .platform = "ppc823",
1220 },
1221#endif /* CONFIG_8xx */
1222#ifdef CONFIG_40x
1223 { /* 403GC */
1224 .pvr_mask = 0xffffff00,
1225 .pvr_value = 0x00200200,
1226 .cpu_name = "403GC",
1227 .cpu_features = CPU_FTRS_40X,
1228 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1229 .mmu_features = MMU_FTR_TYPE_40x,
1230 .icache_bsize = 16,
1231 .dcache_bsize = 16,
1232 .machine_check = machine_check_4xx,
1233 .platform = "ppc403",
1234 },
1235 { /* 403GCX */
1236 .pvr_mask = 0xffffff00,
1237 .pvr_value = 0x00201400,
1238 .cpu_name = "403GCX",
1239 .cpu_features = CPU_FTRS_40X,
1240 .cpu_user_features = PPC_FEATURE_32 |
1241 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1242 .mmu_features = MMU_FTR_TYPE_40x,
1243 .icache_bsize = 16,
1244 .dcache_bsize = 16,
1245 .machine_check = machine_check_4xx,
1246 .platform = "ppc403",
1247 },
1248 { /* 403G ?? */
1249 .pvr_mask = 0xffff0000,
1250 .pvr_value = 0x00200000,
1251 .cpu_name = "403G ??",
1252 .cpu_features = CPU_FTRS_40X,
1253 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1254 .mmu_features = MMU_FTR_TYPE_40x,
1255 .icache_bsize = 16,
1256 .dcache_bsize = 16,
1257 .machine_check = machine_check_4xx,
1258 .platform = "ppc403",
1259 },
1260 { /* 405GP */
1261 .pvr_mask = 0xffff0000,
1262 .pvr_value = 0x40110000,
1263 .cpu_name = "405GP",
1264 .cpu_features = CPU_FTRS_40X,
1265 .cpu_user_features = PPC_FEATURE_32 |
1266 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1267 .mmu_features = MMU_FTR_TYPE_40x,
1268 .icache_bsize = 32,
1269 .dcache_bsize = 32,
1270 .machine_check = machine_check_4xx,
1271 .platform = "ppc405",
1272 },
1273 { /* STB 03xxx */
1274 .pvr_mask = 0xffff0000,
1275 .pvr_value = 0x40130000,
1276 .cpu_name = "STB03xxx",
1277 .cpu_features = CPU_FTRS_40X,
1278 .cpu_user_features = PPC_FEATURE_32 |
1279 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1280 .mmu_features = MMU_FTR_TYPE_40x,
1281 .icache_bsize = 32,
1282 .dcache_bsize = 32,
1283 .machine_check = machine_check_4xx,
1284 .platform = "ppc405",
1285 },
1286 { /* STB 04xxx */
1287 .pvr_mask = 0xffff0000,
1288 .pvr_value = 0x41810000,
1289 .cpu_name = "STB04xxx",
1290 .cpu_features = CPU_FTRS_40X,
1291 .cpu_user_features = PPC_FEATURE_32 |
1292 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1293 .mmu_features = MMU_FTR_TYPE_40x,
1294 .icache_bsize = 32,
1295 .dcache_bsize = 32,
1296 .machine_check = machine_check_4xx,
1297 .platform = "ppc405",
1298 },
1299 { /* NP405L */
1300 .pvr_mask = 0xffff0000,
1301 .pvr_value = 0x41610000,
1302 .cpu_name = "NP405L",
1303 .cpu_features = CPU_FTRS_40X,
1304 .cpu_user_features = PPC_FEATURE_32 |
1305 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1306 .mmu_features = MMU_FTR_TYPE_40x,
1307 .icache_bsize = 32,
1308 .dcache_bsize = 32,
1309 .machine_check = machine_check_4xx,
1310 .platform = "ppc405",
1311 },
1312 { /* NP4GS3 */
1313 .pvr_mask = 0xffff0000,
1314 .pvr_value = 0x40B10000,
1315 .cpu_name = "NP4GS3",
1316 .cpu_features = CPU_FTRS_40X,
1317 .cpu_user_features = PPC_FEATURE_32 |
1318 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1319 .mmu_features = MMU_FTR_TYPE_40x,
1320 .icache_bsize = 32,
1321 .dcache_bsize = 32,
1322 .machine_check = machine_check_4xx,
1323 .platform = "ppc405",
1324 },
1325 { /* NP405H */
1326 .pvr_mask = 0xffff0000,
1327 .pvr_value = 0x41410000,
1328 .cpu_name = "NP405H",
1329 .cpu_features = CPU_FTRS_40X,
1330 .cpu_user_features = PPC_FEATURE_32 |
1331 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1332 .mmu_features = MMU_FTR_TYPE_40x,
1333 .icache_bsize = 32,
1334 .dcache_bsize = 32,
1335 .machine_check = machine_check_4xx,
1336 .platform = "ppc405",
1337 },
1338 { /* 405GPr */
1339 .pvr_mask = 0xffff0000,
1340 .pvr_value = 0x50910000,
1341 .cpu_name = "405GPr",
1342 .cpu_features = CPU_FTRS_40X,
1343 .cpu_user_features = PPC_FEATURE_32 |
1344 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1345 .mmu_features = MMU_FTR_TYPE_40x,
1346 .icache_bsize = 32,
1347 .dcache_bsize = 32,
1348 .machine_check = machine_check_4xx,
1349 .platform = "ppc405",
1350 },
1351 { /* STBx25xx */
1352 .pvr_mask = 0xffff0000,
1353 .pvr_value = 0x51510000,
1354 .cpu_name = "STBx25xx",
1355 .cpu_features = CPU_FTRS_40X,
1356 .cpu_user_features = PPC_FEATURE_32 |
1357 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1358 .mmu_features = MMU_FTR_TYPE_40x,
1359 .icache_bsize = 32,
1360 .dcache_bsize = 32,
1361 .machine_check = machine_check_4xx,
1362 .platform = "ppc405",
1363 },
1364 { /* 405LP */
1365 .pvr_mask = 0xffff0000,
1366 .pvr_value = 0x41F10000,
1367 .cpu_name = "405LP",
1368 .cpu_features = CPU_FTRS_40X,
1369 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1370 .mmu_features = MMU_FTR_TYPE_40x,
1371 .icache_bsize = 32,
1372 .dcache_bsize = 32,
1373 .machine_check = machine_check_4xx,
1374 .platform = "ppc405",
1375 },
1376 { /* Xilinx Virtex-II Pro */
1377 .pvr_mask = 0xfffff000,
1378 .pvr_value = 0x20010000,
1379 .cpu_name = "Virtex-II Pro",
1380 .cpu_features = CPU_FTRS_40X,
1381 .cpu_user_features = PPC_FEATURE_32 |
1382 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1383 .mmu_features = MMU_FTR_TYPE_40x,
1384 .icache_bsize = 32,
1385 .dcache_bsize = 32,
1386 .machine_check = machine_check_4xx,
1387 .platform = "ppc405",
1388 },
1389 { /* Xilinx Virtex-4 FX */
1390 .pvr_mask = 0xfffff000,
1391 .pvr_value = 0x20011000,
1392 .cpu_name = "Virtex-4 FX",
1393 .cpu_features = CPU_FTRS_40X,
1394 .cpu_user_features = PPC_FEATURE_32 |
1395 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1396 .mmu_features = MMU_FTR_TYPE_40x,
1397 .icache_bsize = 32,
1398 .dcache_bsize = 32,
1399 .machine_check = machine_check_4xx,
1400 .platform = "ppc405",
1401 },
1402 { /* 405EP */
1403 .pvr_mask = 0xffff0000,
1404 .pvr_value = 0x51210000,
1405 .cpu_name = "405EP",
1406 .cpu_features = CPU_FTRS_40X,
1407 .cpu_user_features = PPC_FEATURE_32 |
1408 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1409 .mmu_features = MMU_FTR_TYPE_40x,
1410 .icache_bsize = 32,
1411 .dcache_bsize = 32,
1412 .machine_check = machine_check_4xx,
1413 .platform = "ppc405",
1414 },
1415 { /* 405EX Rev. A/B with Security */
1416 .pvr_mask = 0xffff000f,
1417 .pvr_value = 0x12910007,
1418 .cpu_name = "405EX Rev. A/B",
1419 .cpu_features = CPU_FTRS_40X,
1420 .cpu_user_features = PPC_FEATURE_32 |
1421 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1422 .mmu_features = MMU_FTR_TYPE_40x,
1423 .icache_bsize = 32,
1424 .dcache_bsize = 32,
1425 .machine_check = machine_check_4xx,
1426 .platform = "ppc405",
1427 },
1428 { /* 405EX Rev. C without Security */
1429 .pvr_mask = 0xffff000f,
1430 .pvr_value = 0x1291000d,
1431 .cpu_name = "405EX Rev. C",
1432 .cpu_features = CPU_FTRS_40X,
1433 .cpu_user_features = PPC_FEATURE_32 |
1434 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1435 .mmu_features = MMU_FTR_TYPE_40x,
1436 .icache_bsize = 32,
1437 .dcache_bsize = 32,
1438 .machine_check = machine_check_4xx,
1439 .platform = "ppc405",
1440 },
1441 { /* 405EX Rev. C with Security */
1442 .pvr_mask = 0xffff000f,
1443 .pvr_value = 0x1291000f,
1444 .cpu_name = "405EX Rev. C",
1445 .cpu_features = CPU_FTRS_40X,
1446 .cpu_user_features = PPC_FEATURE_32 |
1447 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1448 .mmu_features = MMU_FTR_TYPE_40x,
1449 .icache_bsize = 32,
1450 .dcache_bsize = 32,
1451 .machine_check = machine_check_4xx,
1452 .platform = "ppc405",
1453 },
1454 { /* 405EX Rev. D without Security */
1455 .pvr_mask = 0xffff000f,
1456 .pvr_value = 0x12910003,
1457 .cpu_name = "405EX Rev. D",
1458 .cpu_features = CPU_FTRS_40X,
1459 .cpu_user_features = PPC_FEATURE_32 |
1460 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1461 .mmu_features = MMU_FTR_TYPE_40x,
1462 .icache_bsize = 32,
1463 .dcache_bsize = 32,
1464 .machine_check = machine_check_4xx,
1465 .platform = "ppc405",
1466 },
1467 { /* 405EX Rev. D with Security */
1468 .pvr_mask = 0xffff000f,
1469 .pvr_value = 0x12910005,
1470 .cpu_name = "405EX Rev. D",
1471 .cpu_features = CPU_FTRS_40X,
1472 .cpu_user_features = PPC_FEATURE_32 |
1473 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1474 .mmu_features = MMU_FTR_TYPE_40x,
1475 .icache_bsize = 32,
1476 .dcache_bsize = 32,
1477 .machine_check = machine_check_4xx,
1478 .platform = "ppc405",
1479 },
1480 { /* 405EXr Rev. A/B without Security */
1481 .pvr_mask = 0xffff000f,
1482 .pvr_value = 0x12910001,
1483 .cpu_name = "405EXr Rev. A/B",
1484 .cpu_features = CPU_FTRS_40X,
1485 .cpu_user_features = PPC_FEATURE_32 |
1486 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1487 .mmu_features = MMU_FTR_TYPE_40x,
1488 .icache_bsize = 32,
1489 .dcache_bsize = 32,
1490 .machine_check = machine_check_4xx,
1491 .platform = "ppc405",
1492 },
1493 { /* 405EXr Rev. C without Security */
1494 .pvr_mask = 0xffff000f,
1495 .pvr_value = 0x12910009,
1496 .cpu_name = "405EXr Rev. C",
1497 .cpu_features = CPU_FTRS_40X,
1498 .cpu_user_features = PPC_FEATURE_32 |
1499 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1500 .mmu_features = MMU_FTR_TYPE_40x,
1501 .icache_bsize = 32,
1502 .dcache_bsize = 32,
1503 .machine_check = machine_check_4xx,
1504 .platform = "ppc405",
1505 },
1506 { /* 405EXr Rev. C with Security */
1507 .pvr_mask = 0xffff000f,
1508 .pvr_value = 0x1291000b,
1509 .cpu_name = "405EXr Rev. C",
1510 .cpu_features = CPU_FTRS_40X,
1511 .cpu_user_features = PPC_FEATURE_32 |
1512 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1513 .mmu_features = MMU_FTR_TYPE_40x,
1514 .icache_bsize = 32,
1515 .dcache_bsize = 32,
1516 .machine_check = machine_check_4xx,
1517 .platform = "ppc405",
1518 },
1519 { /* 405EXr Rev. D without Security */
1520 .pvr_mask = 0xffff000f,
1521 .pvr_value = 0x12910000,
1522 .cpu_name = "405EXr Rev. D",
1523 .cpu_features = CPU_FTRS_40X,
1524 .cpu_user_features = PPC_FEATURE_32 |
1525 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1526 .mmu_features = MMU_FTR_TYPE_40x,
1527 .icache_bsize = 32,
1528 .dcache_bsize = 32,
1529 .machine_check = machine_check_4xx,
1530 .platform = "ppc405",
1531 },
1532 { /* 405EXr Rev. D with Security */
1533 .pvr_mask = 0xffff000f,
1534 .pvr_value = 0x12910002,
1535 .cpu_name = "405EXr Rev. D",
1536 .cpu_features = CPU_FTRS_40X,
1537 .cpu_user_features = PPC_FEATURE_32 |
1538 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1539 .mmu_features = MMU_FTR_TYPE_40x,
1540 .icache_bsize = 32,
1541 .dcache_bsize = 32,
1542 .machine_check = machine_check_4xx,
1543 .platform = "ppc405",
1544 },
1545 {
1546 /* 405EZ */
1547 .pvr_mask = 0xffff0000,
1548 .pvr_value = 0x41510000,
1549 .cpu_name = "405EZ",
1550 .cpu_features = CPU_FTRS_40X,
1551 .cpu_user_features = PPC_FEATURE_32 |
1552 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1553 .mmu_features = MMU_FTR_TYPE_40x,
1554 .icache_bsize = 32,
1555 .dcache_bsize = 32,
1556 .machine_check = machine_check_4xx,
1557 .platform = "ppc405",
1558 },
1559 { /* APM8018X */
1560 .pvr_mask = 0xffff0000,
1561 .pvr_value = 0x7ff11432,
1562 .cpu_name = "APM8018X",
1563 .cpu_features = CPU_FTRS_40X,
1564 .cpu_user_features = PPC_FEATURE_32 |
1565 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1566 .mmu_features = MMU_FTR_TYPE_40x,
1567 .icache_bsize = 32,
1568 .dcache_bsize = 32,
1569 .machine_check = machine_check_4xx,
1570 .platform = "ppc405",
1571 },
1572 { /* default match */
1573 .pvr_mask = 0x00000000,
1574 .pvr_value = 0x00000000,
1575 .cpu_name = "(generic 40x PPC)",
1576 .cpu_features = CPU_FTRS_40X,
1577 .cpu_user_features = PPC_FEATURE_32 |
1578 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1579 .mmu_features = MMU_FTR_TYPE_40x,
1580 .icache_bsize = 32,
1581 .dcache_bsize = 32,
1582 .machine_check = machine_check_4xx,
1583 .platform = "ppc405",
1584 }
1585
1586#endif /* CONFIG_40x */
1587#ifdef CONFIG_44x
1588 {
1589 .pvr_mask = 0xf0000fff,
1590 .pvr_value = 0x40000850,
1591 .cpu_name = "440GR Rev. A",
1592 .cpu_features = CPU_FTRS_44X,
1593 .cpu_user_features = COMMON_USER_BOOKE,
1594 .mmu_features = MMU_FTR_TYPE_44x,
1595 .icache_bsize = 32,
1596 .dcache_bsize = 32,
1597 .machine_check = machine_check_4xx,
1598 .platform = "ppc440",
1599 },
1600 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1601 .pvr_mask = 0xf0000fff,
1602 .pvr_value = 0x40000858,
1603 .cpu_name = "440EP Rev. A",
1604 .cpu_features = CPU_FTRS_44X,
1605 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1606 .mmu_features = MMU_FTR_TYPE_44x,
1607 .icache_bsize = 32,
1608 .dcache_bsize = 32,
1609 .cpu_setup = __setup_cpu_440ep,
1610 .machine_check = machine_check_4xx,
1611 .platform = "ppc440",
1612 },
1613 {
1614 .pvr_mask = 0xf0000fff,
1615 .pvr_value = 0x400008d3,
1616 .cpu_name = "440GR Rev. B",
1617 .cpu_features = CPU_FTRS_44X,
1618 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1619 .mmu_features = MMU_FTR_TYPE_44x,
1620 .icache_bsize = 32,
1621 .dcache_bsize = 32,
1622 .machine_check = machine_check_4xx,
1623 .platform = "ppc440",
1624 },
1625 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1626 .pvr_mask = 0xf0000ff7,
1627 .pvr_value = 0x400008d4,
1628 .cpu_name = "440EP Rev. C",
1629 .cpu_features = CPU_FTRS_44X,
1630 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1631 .mmu_features = MMU_FTR_TYPE_44x,
1632 .icache_bsize = 32,
1633 .dcache_bsize = 32,
1634 .cpu_setup = __setup_cpu_440ep,
1635 .machine_check = machine_check_4xx,
1636 .platform = "ppc440",
1637 },
1638 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1639 .pvr_mask = 0xf0000fff,
1640 .pvr_value = 0x400008db,
1641 .cpu_name = "440EP Rev. B",
1642 .cpu_features = CPU_FTRS_44X,
1643 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1644 .mmu_features = MMU_FTR_TYPE_44x,
1645 .icache_bsize = 32,
1646 .dcache_bsize = 32,
1647 .cpu_setup = __setup_cpu_440ep,
1648 .machine_check = machine_check_4xx,
1649 .platform = "ppc440",
1650 },
1651 { /* 440GRX */
1652 .pvr_mask = 0xf0000ffb,
1653 .pvr_value = 0x200008D0,
1654 .cpu_name = "440GRX",
1655 .cpu_features = CPU_FTRS_44X,
1656 .cpu_user_features = COMMON_USER_BOOKE,
1657 .mmu_features = MMU_FTR_TYPE_44x,
1658 .icache_bsize = 32,
1659 .dcache_bsize = 32,
1660 .cpu_setup = __setup_cpu_440grx,
1661 .machine_check = machine_check_440A,
1662 .platform = "ppc440",
1663 },
1664 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1665 .pvr_mask = 0xf0000ffb,
1666 .pvr_value = 0x200008D8,
1667 .cpu_name = "440EPX",
1668 .cpu_features = CPU_FTRS_44X,
1669 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1670 .mmu_features = MMU_FTR_TYPE_44x,
1671 .icache_bsize = 32,
1672 .dcache_bsize = 32,
1673 .cpu_setup = __setup_cpu_440epx,
1674 .machine_check = machine_check_440A,
1675 .platform = "ppc440",
1676 },
1677 { /* 440GP Rev. B */
1678 .pvr_mask = 0xf0000fff,
1679 .pvr_value = 0x40000440,
1680 .cpu_name = "440GP Rev. B",
1681 .cpu_features = CPU_FTRS_44X,
1682 .cpu_user_features = COMMON_USER_BOOKE,
1683 .mmu_features = MMU_FTR_TYPE_44x,
1684 .icache_bsize = 32,
1685 .dcache_bsize = 32,
1686 .machine_check = machine_check_4xx,
1687 .platform = "ppc440gp",
1688 },
1689 { /* 440GP Rev. C */
1690 .pvr_mask = 0xf0000fff,
1691 .pvr_value = 0x40000481,
1692 .cpu_name = "440GP Rev. C",
1693 .cpu_features = CPU_FTRS_44X,
1694 .cpu_user_features = COMMON_USER_BOOKE,
1695 .mmu_features = MMU_FTR_TYPE_44x,
1696 .icache_bsize = 32,
1697 .dcache_bsize = 32,
1698 .machine_check = machine_check_4xx,
1699 .platform = "ppc440gp",
1700 },
1701 { /* 440GX Rev. A */
1702 .pvr_mask = 0xf0000fff,
1703 .pvr_value = 0x50000850,
1704 .cpu_name = "440GX Rev. A",
1705 .cpu_features = CPU_FTRS_44X,
1706 .cpu_user_features = COMMON_USER_BOOKE,
1707 .mmu_features = MMU_FTR_TYPE_44x,
1708 .icache_bsize = 32,
1709 .dcache_bsize = 32,
1710 .cpu_setup = __setup_cpu_440gx,
1711 .machine_check = machine_check_440A,
1712 .platform = "ppc440",
1713 },
1714 { /* 440GX Rev. B */
1715 .pvr_mask = 0xf0000fff,
1716 .pvr_value = 0x50000851,
1717 .cpu_name = "440GX Rev. B",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440gx,
1724 .machine_check = machine_check_440A,
1725 .platform = "ppc440",
1726 },
1727 { /* 440GX Rev. C */
1728 .pvr_mask = 0xf0000fff,
1729 .pvr_value = 0x50000892,
1730 .cpu_name = "440GX Rev. C",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440gx,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* 440GX Rev. F */
1741 .pvr_mask = 0xf0000fff,
1742 .pvr_value = 0x50000894,
1743 .cpu_name = "440GX Rev. F",
1744 .cpu_features = CPU_FTRS_44X,
1745 .cpu_user_features = COMMON_USER_BOOKE,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .cpu_setup = __setup_cpu_440gx,
1750 .machine_check = machine_check_440A,
1751 .platform = "ppc440",
1752 },
1753 { /* 440SP Rev. A */
1754 .pvr_mask = 0xfff00fff,
1755 .pvr_value = 0x53200891,
1756 .cpu_name = "440SP Rev. A",
1757 .cpu_features = CPU_FTRS_44X,
1758 .cpu_user_features = COMMON_USER_BOOKE,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .machine_check = machine_check_4xx,
1763 .platform = "ppc440",
1764 },
1765 { /* 440SPe Rev. A */
1766 .pvr_mask = 0xfff00fff,
1767 .pvr_value = 0x53400890,
1768 .cpu_name = "440SPe Rev. A",
1769 .cpu_features = CPU_FTRS_44X,
1770 .cpu_user_features = COMMON_USER_BOOKE,
1771 .mmu_features = MMU_FTR_TYPE_44x,
1772 .icache_bsize = 32,
1773 .dcache_bsize = 32,
1774 .cpu_setup = __setup_cpu_440spe,
1775 .machine_check = machine_check_440A,
1776 .platform = "ppc440",
1777 },
1778 { /* 440SPe Rev. B */
1779 .pvr_mask = 0xfff00fff,
1780 .pvr_value = 0x53400891,
1781 .cpu_name = "440SPe Rev. B",
1782 .cpu_features = CPU_FTRS_44X,
1783 .cpu_user_features = COMMON_USER_BOOKE,
1784 .mmu_features = MMU_FTR_TYPE_44x,
1785 .icache_bsize = 32,
1786 .dcache_bsize = 32,
1787 .cpu_setup = __setup_cpu_440spe,
1788 .machine_check = machine_check_440A,
1789 .platform = "ppc440",
1790 },
1791 { /* 440 in Xilinx Virtex-5 FXT */
1792 .pvr_mask = 0xfffffff0,
1793 .pvr_value = 0x7ff21910,
1794 .cpu_name = "440 in Virtex-5 FXT",
1795 .cpu_features = CPU_FTRS_44X,
1796 .cpu_user_features = COMMON_USER_BOOKE,
1797 .mmu_features = MMU_FTR_TYPE_44x,
1798 .icache_bsize = 32,
1799 .dcache_bsize = 32,
1800 .cpu_setup = __setup_cpu_440x5,
1801 .machine_check = machine_check_440A,
1802 .platform = "ppc440",
1803 },
1804 { /* 460EX */
1805 .pvr_mask = 0xffff0006,
1806 .pvr_value = 0x13020002,
1807 .cpu_name = "460EX",
1808 .cpu_features = CPU_FTRS_440x6,
1809 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1810 .mmu_features = MMU_FTR_TYPE_44x,
1811 .icache_bsize = 32,
1812 .dcache_bsize = 32,
1813 .cpu_setup = __setup_cpu_460ex,
1814 .machine_check = machine_check_440A,
1815 .platform = "ppc440",
1816 },
1817 { /* 460EX Rev B */
1818 .pvr_mask = 0xffff0007,
1819 .pvr_value = 0x13020004,
1820 .cpu_name = "460EX Rev. B",
1821 .cpu_features = CPU_FTRS_440x6,
1822 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1823 .mmu_features = MMU_FTR_TYPE_44x,
1824 .icache_bsize = 32,
1825 .dcache_bsize = 32,
1826 .cpu_setup = __setup_cpu_460ex,
1827 .machine_check = machine_check_440A,
1828 .platform = "ppc440",
1829 },
1830 { /* 460GT */
1831 .pvr_mask = 0xffff0006,
1832 .pvr_value = 0x13020000,
1833 .cpu_name = "460GT",
1834 .cpu_features = CPU_FTRS_440x6,
1835 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1836 .mmu_features = MMU_FTR_TYPE_44x,
1837 .icache_bsize = 32,
1838 .dcache_bsize = 32,
1839 .cpu_setup = __setup_cpu_460gt,
1840 .machine_check = machine_check_440A,
1841 .platform = "ppc440",
1842 },
1843 { /* 460GT Rev B */
1844 .pvr_mask = 0xffff0007,
1845 .pvr_value = 0x13020005,
1846 .cpu_name = "460GT Rev. B",
1847 .cpu_features = CPU_FTRS_440x6,
1848 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1849 .mmu_features = MMU_FTR_TYPE_44x,
1850 .icache_bsize = 32,
1851 .dcache_bsize = 32,
1852 .cpu_setup = __setup_cpu_460gt,
1853 .machine_check = machine_check_440A,
1854 .platform = "ppc440",
1855 },
1856 { /* 460SX */
1857 .pvr_mask = 0xffffff00,
1858 .pvr_value = 0x13541800,
1859 .cpu_name = "460SX",
1860 .cpu_features = CPU_FTRS_44X,
1861 .cpu_user_features = COMMON_USER_BOOKE,
1862 .mmu_features = MMU_FTR_TYPE_44x,
1863 .icache_bsize = 32,
1864 .dcache_bsize = 32,
1865 .cpu_setup = __setup_cpu_460sx,
1866 .machine_check = machine_check_440A,
1867 .platform = "ppc440",
1868 },
1869 { /* 464 in APM821xx */
1870 .pvr_mask = 0xfffffff0,
1871 .pvr_value = 0x12C41C80,
1872 .cpu_name = "APM821XX",
1873 .cpu_features = CPU_FTRS_44X,
1874 .cpu_user_features = COMMON_USER_BOOKE |
1875 PPC_FEATURE_HAS_FPU,
1876 .mmu_features = MMU_FTR_TYPE_44x,
1877 .icache_bsize = 32,
1878 .dcache_bsize = 32,
1879 .cpu_setup = __setup_cpu_apm821xx,
1880 .machine_check = machine_check_440A,
1881 .platform = "ppc440",
1882 },
1883 { /* 476 DD2 core */
1884 .pvr_mask = 0xffffffff,
1885 .pvr_value = 0x11a52080,
1886 .cpu_name = "476",
1887 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1888 .cpu_user_features = COMMON_USER_BOOKE |
1889 PPC_FEATURE_HAS_FPU,
1890 .mmu_features = MMU_FTR_TYPE_47x |
1891 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1892 .icache_bsize = 32,
1893 .dcache_bsize = 128,
1894 .machine_check = machine_check_47x,
1895 .platform = "ppc470",
1896 },
1897 { /* 476fpe */
1898 .pvr_mask = 0xffff0000,
1899 .pvr_value = 0x7ff50000,
1900 .cpu_name = "476fpe",
1901 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1902 .cpu_user_features = COMMON_USER_BOOKE |
1903 PPC_FEATURE_HAS_FPU,
1904 .mmu_features = MMU_FTR_TYPE_47x |
1905 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1906 .icache_bsize = 32,
1907 .dcache_bsize = 128,
1908 .machine_check = machine_check_47x,
1909 .platform = "ppc470",
1910 },
1911 { /* 476 iss */
1912 .pvr_mask = 0xffff0000,
1913 .pvr_value = 0x00050000,
1914 .cpu_name = "476",
1915 .cpu_features = CPU_FTRS_47X,
1916 .cpu_user_features = COMMON_USER_BOOKE |
1917 PPC_FEATURE_HAS_FPU,
1918 .mmu_features = MMU_FTR_TYPE_47x |
1919 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1920 .icache_bsize = 32,
1921 .dcache_bsize = 128,
1922 .machine_check = machine_check_47x,
1923 .platform = "ppc470",
1924 },
1925 { /* 476 others */
1926 .pvr_mask = 0xffff0000,
1927 .pvr_value = 0x11a50000,
1928 .cpu_name = "476",
1929 .cpu_features = CPU_FTRS_47X,
1930 .cpu_user_features = COMMON_USER_BOOKE |
1931 PPC_FEATURE_HAS_FPU,
1932 .mmu_features = MMU_FTR_TYPE_47x |
1933 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1934 .icache_bsize = 32,
1935 .dcache_bsize = 128,
1936 .machine_check = machine_check_47x,
1937 .platform = "ppc470",
1938 },
1939 { /* default match */
1940 .pvr_mask = 0x00000000,
1941 .pvr_value = 0x00000000,
1942 .cpu_name = "(generic 44x PPC)",
1943 .cpu_features = CPU_FTRS_44X,
1944 .cpu_user_features = COMMON_USER_BOOKE,
1945 .mmu_features = MMU_FTR_TYPE_44x,
1946 .icache_bsize = 32,
1947 .dcache_bsize = 32,
1948 .machine_check = machine_check_4xx,
1949 .platform = "ppc440",
1950 }
1951#endif /* CONFIG_44x */
1952#ifdef CONFIG_E200
1953 { /* e200z5 */
1954 .pvr_mask = 0xfff00000,
1955 .pvr_value = 0x81000000,
1956 .cpu_name = "e200z5",
1957 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1958 .cpu_features = CPU_FTRS_E200,
1959 .cpu_user_features = COMMON_USER_BOOKE |
1960 PPC_FEATURE_HAS_EFP_SINGLE |
1961 PPC_FEATURE_UNIFIED_CACHE,
1962 .mmu_features = MMU_FTR_TYPE_FSL_E,
1963 .dcache_bsize = 32,
1964 .machine_check = machine_check_e200,
1965 .platform = "ppc5554",
1966 },
1967 { /* e200z6 */
1968 .pvr_mask = 0xfff00000,
1969 .pvr_value = 0x81100000,
1970 .cpu_name = "e200z6",
1971 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1972 .cpu_features = CPU_FTRS_E200,
1973 .cpu_user_features = COMMON_USER_BOOKE |
1974 PPC_FEATURE_HAS_SPE_COMP |
1975 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1976 PPC_FEATURE_UNIFIED_CACHE,
1977 .mmu_features = MMU_FTR_TYPE_FSL_E,
1978 .dcache_bsize = 32,
1979 .machine_check = machine_check_e200,
1980 .platform = "ppc5554",
1981 },
1982 { /* default match */
1983 .pvr_mask = 0x00000000,
1984 .pvr_value = 0x00000000,
1985 .cpu_name = "(generic E200 PPC)",
1986 .cpu_features = CPU_FTRS_E200,
1987 .cpu_user_features = COMMON_USER_BOOKE |
1988 PPC_FEATURE_HAS_EFP_SINGLE |
1989 PPC_FEATURE_UNIFIED_CACHE,
1990 .mmu_features = MMU_FTR_TYPE_FSL_E,
1991 .dcache_bsize = 32,
1992 .cpu_setup = __setup_cpu_e200,
1993 .machine_check = machine_check_e200,
1994 .platform = "ppc5554",
1995 }
1996#endif /* CONFIG_E200 */
1997#endif /* CONFIG_PPC32 */
1998#ifdef CONFIG_E500
1999#ifdef CONFIG_PPC32
2000 { /* e500 */
2001 .pvr_mask = 0xffff0000,
2002 .pvr_value = 0x80200000,
2003 .cpu_name = "e500",
2004 .cpu_features = CPU_FTRS_E500,
2005 .cpu_user_features = COMMON_USER_BOOKE |
2006 PPC_FEATURE_HAS_SPE_COMP |
2007 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2008 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2009 .mmu_features = MMU_FTR_TYPE_FSL_E,
2010 .icache_bsize = 32,
2011 .dcache_bsize = 32,
2012 .num_pmcs = 4,
2013 .oprofile_cpu_type = "ppc/e500",
2014 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2015 .cpu_setup = __setup_cpu_e500v1,
2016 .machine_check = machine_check_e500,
2017 .platform = "ppc8540",
2018 },
2019 { /* e500v2 */
2020 .pvr_mask = 0xffff0000,
2021 .pvr_value = 0x80210000,
2022 .cpu_name = "e500v2",
2023 .cpu_features = CPU_FTRS_E500_2,
2024 .cpu_user_features = COMMON_USER_BOOKE |
2025 PPC_FEATURE_HAS_SPE_COMP |
2026 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2027 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2028 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2029 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2030 .icache_bsize = 32,
2031 .dcache_bsize = 32,
2032 .num_pmcs = 4,
2033 .oprofile_cpu_type = "ppc/e500",
2034 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2035 .cpu_setup = __setup_cpu_e500v2,
2036 .machine_check = machine_check_e500,
2037 .platform = "ppc8548",
2038 },
2039 { /* e500mc */
2040 .pvr_mask = 0xffff0000,
2041 .pvr_value = 0x80230000,
2042 .cpu_name = "e500mc",
2043 .cpu_features = CPU_FTRS_E500MC,
2044 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2045 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2046 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2047 MMU_FTR_USE_TLBILX,
2048 .icache_bsize = 64,
2049 .dcache_bsize = 64,
2050 .num_pmcs = 4,
2051 .oprofile_cpu_type = "ppc/e500mc",
2052 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2053 .cpu_setup = __setup_cpu_e500mc,
2054 .machine_check = machine_check_e500mc,
2055 .platform = "ppce500mc",
2056 },
2057#endif /* CONFIG_PPC32 */
2058 { /* e5500 */
2059 .pvr_mask = 0xffff0000,
2060 .pvr_value = 0x80240000,
2061 .cpu_name = "e5500",
2062 .cpu_features = CPU_FTRS_E5500,
2063 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2064 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2065 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2066 MMU_FTR_USE_TLBILX,
2067 .icache_bsize = 64,
2068 .dcache_bsize = 64,
2069 .num_pmcs = 4,
2070 .oprofile_cpu_type = "ppc/e500mc",
2071 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2072 .cpu_setup = __setup_cpu_e5500,
2073#ifndef CONFIG_PPC32
2074 .cpu_restore = __restore_cpu_e5500,
2075#endif
2076 .machine_check = machine_check_e500mc,
2077 .platform = "ppce5500",
2078 },
2079 { /* e6500 */
2080 .pvr_mask = 0xffff0000,
2081 .pvr_value = 0x80400000,
2082 .cpu_name = "e6500",
2083 .cpu_features = CPU_FTRS_E6500,
2084 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2085 PPC_FEATURE_HAS_ALTIVEC_COMP,
2086 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2087 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2088 MMU_FTR_USE_TLBILX,
2089 .icache_bsize = 64,
2090 .dcache_bsize = 64,
2091 .num_pmcs = 4,
2092 .oprofile_cpu_type = "ppc/e6500",
2093 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2094 .cpu_setup = __setup_cpu_e6500,
2095#ifndef CONFIG_PPC32
2096 .cpu_restore = __restore_cpu_e6500,
2097#endif
2098 .machine_check = machine_check_e500mc,
2099 .platform = "ppce6500",
2100 },
2101#ifdef CONFIG_PPC32
2102 { /* default match */
2103 .pvr_mask = 0x00000000,
2104 .pvr_value = 0x00000000,
2105 .cpu_name = "(generic E500 PPC)",
2106 .cpu_features = CPU_FTRS_E500,
2107 .cpu_user_features = COMMON_USER_BOOKE |
2108 PPC_FEATURE_HAS_SPE_COMP |
2109 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2110 .mmu_features = MMU_FTR_TYPE_FSL_E,
2111 .icache_bsize = 32,
2112 .dcache_bsize = 32,
2113 .machine_check = machine_check_e500,
2114 .platform = "powerpc",
2115 }
2116#endif /* CONFIG_PPC32 */
2117#endif /* CONFIG_E500 */
2118
2119#ifdef CONFIG_PPC_A2
2120 { /* Standard A2 (>= DD2) + FPU core */
2121 .pvr_mask = 0xffff0000,
2122 .pvr_value = 0x00480000,
2123 .cpu_name = "A2 (>= DD2)",
2124 .cpu_features = CPU_FTRS_A2,
2125 .cpu_user_features = COMMON_USER_PPC64,
2126 .mmu_features = MMU_FTRS_A2,
2127 .icache_bsize = 64,
2128 .dcache_bsize = 64,
2129 .num_pmcs = 0,
2130 .cpu_setup = __setup_cpu_a2,
2131 .cpu_restore = __restore_cpu_a2,
2132 .machine_check = machine_check_generic,
2133 .platform = "ppca2",
2134 },
2135 { /* This is a default entry to get going, to be replaced by
2136 * a real one at some stage
2137 */
2138#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2139 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2140 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2141 .pvr_mask = 0x00000000,
2142 .pvr_value = 0x00000000,
2143 .cpu_name = "Book3E",
2144 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2145 .cpu_user_features = COMMON_USER_PPC64,
2146 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2147 MMU_FTR_USE_TLBIVAX_BCAST |
2148 MMU_FTR_LOCK_BCAST_INVAL,
2149 .icache_bsize = 64,
2150 .dcache_bsize = 64,
2151 .num_pmcs = 0,
2152 .machine_check = machine_check_generic,
2153 .platform = "power6",
2154 },
2155#endif /* CONFIG_PPC_A2 */
2156};
2157
2158static struct cpu_spec the_cpu_spec;
2159
2160static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2161 struct cpu_spec *s)
2162{
2163 struct cpu_spec *t = &the_cpu_spec;
2164 struct cpu_spec old;
2165
2166 t = PTRRELOC(t);
2167 old = *t;
2168
2169 /* Copy everything, then do fixups */
2170 *t = *s;
2171
2172 /*
2173 * If we are overriding a previous value derived from the real
2174 * PVR with a new value obtained using a logical PVR value,
2175 * don't modify the performance monitor fields.
2176 */
2177 if (old.num_pmcs && !s->num_pmcs) {
2178 t->num_pmcs = old.num_pmcs;
2179 t->pmc_type = old.pmc_type;
2180 t->oprofile_type = old.oprofile_type;
2181 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2182 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2183 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2184
2185 /*
2186 * If we have passed through this logic once before and
2187 * have pulled the default case because the real PVR was
2188 * not found inside cpu_specs[], then we are possibly
2189 * running in compatibility mode. In that case, let the
2190 * oprofiler know which set of compatibility counters to
2191 * pull from by making sure the oprofile_cpu_type string
2192 * is set to that of compatibility mode. If the
2193 * oprofile_cpu_type already has a value, then we are
2194 * possibly overriding a real PVR with a logical one,
2195 * and, in that case, keep the current value for
2196 * oprofile_cpu_type.
2197 */
2198 if (old.oprofile_cpu_type != NULL) {
2199 t->oprofile_cpu_type = old.oprofile_cpu_type;
2200 t->oprofile_type = old.oprofile_type;
2201 }
2202 }
2203
2204 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2205
2206 /*
2207 * Set the base platform string once; assumes
2208 * we're called with real pvr first.
2209 */
2210 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2211 *PTRRELOC(&powerpc_base_platform) = t->platform;
2212
2213#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2214 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2215 * that processor. I will consolidate that at a later time, for now,
2216 * just use #ifdef. We also don't need to PTRRELOC the function
2217 * pointer on ppc64 and booke as we are running at 0 in real mode
2218 * on ppc64 and reloc_offset is always 0 on booke.
2219 */
2220 if (t->cpu_setup) {
2221 t->cpu_setup(offset, t);
2222 }
2223#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2224
2225 return t;
2226}
2227
2228struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2229{
2230 struct cpu_spec *s = cpu_specs;
2231 int i;
2232
2233 s = PTRRELOC(s);
2234
2235 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2236 if ((pvr & s->pvr_mask) == s->pvr_value)
2237 return setup_cpu_spec(offset, s);
2238 }
2239
2240 BUG();
2241
2242 return NULL;
2243}
kernel source for telekom puls (alcatel/mediatek)